gEDA-user: gsch2pcb
I'm running gsch2pcb 1.5 on Solaris for one design and cannot get it to produce a .net netlist. Please see the output below. Regards, Kurt gsch2pcb tusharproj -v Running command: gnetlist -g pcbpins -o fortusharout.cmd fortushar_1.sch gEDA/gnetlist version 20061020 gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details. This is free software, and you are welcome to redistribute it under certain conditions; please see the COPYING file for more details. Remember to check that your schematic has no errors using the drc2 backend. You can do it running 'gnetlist -g drc2 your_schematic.sch -o drc_output.txt' and seeing the contents of the file drc_output.txt. Loading schematic [/afs/lions.odu.edu/home/k/kpete017/seda/fortushar_1.sch] - gEDA/gnetlist pcbpins Backend This backend is EXPERIMENTAL Use at your own risk! - Running command: gnetlist -g PCB -o fortusharout.net fortushar_1.sch gEDA/gnetlist version 20061020 gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details. This is free software, and you are welcome to redistribute it under certain conditions; please see the COPYING file for more details. Remember to check that your schematic has no errors using the drc2 backend. You can do it running 'gnetlist -g drc2 your_schematic.sch -o drc_output.txt' and seeing the contents of the file drc_output.txt. Loading schematic [/afs/lions.odu.edu/home/k/kpete017/seda/fortushar_1.sch] Probably parenthesis mismatch in /afs/.lions.odu.edu/dep/ece/geda-20061020/share/gEDA/scheme/gnet-PCB.scm Most recently read form: ([EMAIL PROTECTED] ([EMAIL PROTECTED] ([EMAIL PROTECTED] ([EMAIL PROTECTED] ([EMAIL PROTECTED] (ice-9 format)) ERROR: Unbound variable: PCB Running command: gnetlist -g gsch2pcb -o fortusharout.pcb fortushar_1.sch gEDA/gnetlist version 20061020 gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more details. This is free software, and you are welcome to redistribute it under certain conditions; please see the COPYING file for more details. Remember to check that your schematic has no errors using the drc2 backend. You can do it running 'gnetlist -g drc2 your_schematic.sch -o drc_output.txt' and seeing the contents of the file drc_output.txt. Loading schematic [/afs/lions.odu.edu/home/k/kpete017/seda/fortushar_1.sch] /usr/pubsw/bin/gm4: /afs/.lions.odu.edu/dep/ece/geda-20061020/share/pcb/m4/common.m4: No such file or directory CONN4: need new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) Found: packages/CON_SMA__Amphenol_901-10112 CONN4: added new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) R4: need new file element for footprint 1206 (value=50) Found: packages/1206 R4: added new file element for footprint 1206 (value=50) CONN3: need new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) Found: packages/CON_SMA__Amphenol_901-10112 CONN3: added new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) R3: need new file element for footprint 1206 (value=4700) Found: packages/1206 R3: added new file element for footprint 1206 (value=4700) CONN2: need new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) Found: packages/CON_SMA__Amphenol_901-10112 CONN2: added new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) R2: need new file element for footprint 1206 (value=470) Found: packages/1206 R2: added new file element for footprint 1206 (value=470) CONN1: need new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) Found: packages/CON_SMA__Amphenol_901-10112 CONN1: added new file element for footprint CON_SMA__Amphenol_901-10112 (value=unknown) R1: need new file element for footprint 1206 (value=470) Found: packages/1206 R1: added new file element for footprint 1206 (value=470) C2: need new file element for footprint 1206 (value=10u) Found: packages/1206 C2: added new file element for footprint 1206 (value=10u) C1: need new file element for footprint 1206 (value=10u) Found: packages/1206 C1: added new file element for footprint 1206 (value=10u) U1: need new file element for footprint SOIC-127P-600L1-8N (value=unknown) Found: packages/SOIC-127P-600L1-8N U1: added new file element for footprint SOIC-127P-600L1-8N (value=unknown) -- Done processing. Work performed: 11 file elements and 0 m4 elements added to fortusharout.pcb. Next step: 1. Run pcb on your file fortusharout.pcb. You will find all your footprints in a bundle ready for you to place or disperse with File - Disperse all elements in PCB 2. From within PCB, select File - Load netlist
Re: gEDA-user: symbol for dual optocoupler
Hello! On Thu, Feb 15, 2007 at 05:45:01PM -0500, DJ Delorie wrote: The IC socket DIL 16 POL want to use to connect two optocaplers MCT6 with the PCB and IC socket DIL 20 POL want to use to connect one SN74HCT245N. Then what you want is a symbol for a dual optocoupler, and a symbol for a 74245. I have the symbol for a 74HCT245, but haven't for a dual optocoupler. I can't find this symbol for optocoupler nowhere. Also, want to find a symbol a footprint for a SUBD_FEMALE_LAY 36 (PC-centronics) or SUBD_FEMALE_STAND 36 (PC-centronics). What I need is a symbol for dual optocoupler a symbol a footprint for SUBD_FEMALE_LAY 36 (PC-centronics) or SUBD_FEMALE_STAND 36 (PC-centronics). So, what would you advice to me? Can I find these symbols footprints anywhere, or I must to make this symbols footprints by my own hand? I make not yet any symbol so it would to be for me a difficult job. :( Any advices will be appreciated! -- Regards, Paul Csányi http://www.freewebs.com/csanyi-pal/index.htm ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
RE: gEDA-user: Re: Windows install
Thanks for the Cygwin suggestion. I'm an EE by degree, but mostly a programmer by trade, and I've played with Linux a little bit; in fact I have a Ubuntu machine at home running [EMAIL PROTECTED], but I don't think it has enough RAM to handle a gEDA installation, and I have a LOT to learn about setting up new programs on Linux (still haven't figured out how to create a desktop shortcut yet!!). Dave -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Cesar Strauss Sent: Tuesday, February 20, 2007 10:29 PM To: geda-user@seul.org Subject: gEDA-user: Re: Windows install David Kerber wrote: I'm a newbie to gEDA, and was wondering if anybody knows of a Windows installation for it? I know there's no officially supported one, but am hoping somebody has built one, or knows where there might be one. A google search turned up one from 2003, but nothing since. Hi, David Sorry, I don't know of any Windows version which is less that one year old. You would miss many new features, as well as many important software fixes. However, I am currently preparing an up-to-date Cygwin version, which will be installed with the Cygwin Setup program. If you are not familiar with Cygwin (www.cygwin.com), it is a collection of Linux software which runs on Windows thanks to a special software layer. I hope my Cygwin version of gEDA, when ready, will be part of that collection, if the Cygwin folks accept it. I also hope I can keep up so it doesn't become obsolete as well. On the other hand, with some basic Linux skills, you can compile a Cygwin version yourself right now, by following the instructions at http://geda.seul.org/wiki/geda:cygwin Regards, Cesar ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Re: Windows install
Hello, I used to run the last gEDA release on my Pentium II with 64MB of RAM. I compiled from scratch. If you can run [EMAIL PROTECTED] gEDA should work. The problem(s) you might have as a newbie are all dependency related. At least that was what bothered me. -- http://www.coe.neu.edu/~efoss/ http://evanfoss.googlepages.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gsch2pcb problems - I think!
People,
I just created a 4-slot symbol and associated 1153 pin footprint for a
Xilinx element that I need to route. This morning I set out to test
these elements to see if they worked together OK. Well -
I created a dummy schematic composed of the 4 slot elements, and
connected the power and ground connections to various net names.
Actually, that's not quite true, the GND connection is the GND symbol
from the library.
I then set up a project1 file to facilitate gsch2pcb and ran the
command
gsch2pcb project1
The screen showing how things ran is attached below.
I call your attention to the line FORMAT: error with call.
I opened the resulting files in PCB and everything looked OK until I
tried to locate the GND net. It was simply missing.
Checking the netlist file, GND existed as a name, however there were no
entries for the net.
An attempt to autoroute the existing nets resulted in dropping me clear
out of the PCB program.
I did recently update to gEDA-20061214, but if my memory isn't failing
me, I've routed 3 small boards since then.
Any assistance would be appreciated.
Harold Skank
[EMAIL PROTECTED] Test]$ gsch2pcb project1
Invalid path [/usr/tools/geda-install/share/gEDA/sym/Spice/Opamps] passed to
com ponent-library
-
gEDA/gnetlist pcbpins Backend
This backend is EXPERIMENTAL
Use at your own risk!
-
Invalid path [/usr/tools/geda-install/share/gEDA/sym/Spice/Opamps] passed to
component-library
FORMAT: error with call: (format #f ~:@{~A-~A ~}
=== (U1 R13) (U1 R15) (U1 R17) (U1 R19) (U1 R21) (U1
R23) (U1 R25) (U1 R5) (U1 T12) (U1 T14) (U1 T16) (U1
T2) (U1 T20) (U1 T22) (U1 T27) (U1 T32) (U1 U13) (U1
U15) (U1 U19) (U1 U21) (U1 U23) (U1 U29) (U1 U34) (U1
U9) (U1 V1) (U1 V12) (U1 V14) (U1 V16) (U1 V20) (U1
V22) (U1 V26) (U1 V6) (U1 W13) (U1 W15) (U1 W19) (U1
W21) (U1 W23) (U1 W3) (U1 W33) (U1 Y10) (U1 Y12) (U1
Y14) (U1 Y16) (U1 Y18) (U1 Y20) (U1 Y22) (U1 Y25) (U1
Y30) (U1 R10) (U1 G29) (U1 G34) (U1 G9) (U1 H1) (U1
H11) (U1 H16) (U1 H26) (U1 H6) (U1 J13) (U1 J18) (U1
J23) (U1 J28) (U1 J3) (U1 J33) (U1 K10) (U1 K15) (U1
K20) (U1 K25) (U1 K30) (U1 L17) (U1 L2) (U1 L22) (U1
L27) (U1 L7) (U1 M12) (U1 M14) (U1 M16) (U1 M18) (U1
M20) (U1 M24) (U1 M34) (U1 M4) (U1 M9) (U1 N1) (U1
N11) (U1 N15) (U1 N17) (U1 N19) (U1 N21) (U1 N26) (U1
N31) (U1 P12) (U1 P14) (U1 P16) (U1 P18) (U1 P20) (U1
P28) (U1 P8) (U1 G19) (U1 AH6) (U1 AJ13) ===(U1 AJ23)
(U1 AJ3) (U1 AJ33) (U1 AK10) (U1 AK20) (U1 AK30) (U1
AL17) (U1 AL2) (U1 AL27) (U1 AL7) (U1 AM14) (U1 AM24)
(U1 AM34) (U1 AM4) (U1 AN1) (U1 AN11) (U1 AN21) (U1
AN26) (U1 AN31) (U1 AP13) (U1 AP18) (U1 AP23) (U1 AP28)
(U1 AP3) (U1 AP33) (U1 AP8) (U1 B14) (U1 B24) (U1 B34)
(U1 B4) (U1 C1) (U1 C11) (U1 C21) (U1 C31) (U1 D18)
(U1 D28) (U1 D3) (U1 D33) (U1 D8) (U1 E15) (U1 E25)
(U1 E5) (U1 F12) (U1 F2) (U1 F22) (U1 F32) (U1 AH26)
(U1 AB18) (U1 AA2) (U1 A12) (U1 A17) (U1 A2) (U1 A22)
(U1 A27) (U1 A32) (U1 A7) (U1 AA15) (U1 AA17) (U1 AA19)
(U1 AA21) (U1 AA23) (U1 AA27) (U1 AA7) (U1 AB12) (U1
AB14) (U1 AB16) (U1 AF22) (U1 AB20) (U1 AB22) (U1 AB24)
(U1 AB34) (U1 AB4) (U1 AC1) (U1 AC11) (U1 AC17) (U1
AC21) (U1 AC26) (U1 AC31) (U1 AD12) (U1 AD18) (U1 AD28)
(U1 AD8) (U1 AE10) (U1 AE15) (U1 AE20) (U1 AE25) (U1
AE5) (U1 AF12) (U1 AF2) (U1 AF32) (U1 AG19) (U1 AG29)
(U1 AG34) (U1 AG9) (U1 AH1) (U1 AH16) (U1 A1) )
97 superfluous arguments
ERROR: error in format
Invalid path [/usr/tools/geda-install/share/gEDA/sym/Spice/Opamps] passed to
component-library
--
Done processing. Work performed:
1 file elements and 0 m4 elements added to TestOut.pcb.
Next step:
1. Run pcb on your file TestOut.pcb.
You will find all your footprints in a bundle ready for you to place
or disperse with File - Disperse all elements in PCB
2. From within PCB, select File - Load netlist file and select
TestOut.net to load the netlist.
3. From within PCB, enter
:ExecuteFile(TestOut.cmd)
to propagate the pin names of all footprints to the layout.
[EMAIL PROTECTED] Test]$
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gEDA-user: gattrib for symbols?
Can I use gattrib to edit the attributes of a symbol? I have some largish symbols that I'm incrementally working on, and editing attributes such as pintype and pinseq are a burden. (Meaning I see no way to do it within gschem.) But when I try to load a symbol file into gattrib I get a SEGV: (gdb) run microsd-1.sym Starting program: /usr/bin/gattrib microsd-1.sym gEDA/gattrib version 20070216 gEDA/gattrib comes with ABSOLUTELY NO WARRANTY; see COPYING for more details. This is free software, and you are welcome to redistribute it under certain conditions; please see the COPYING file for more details. [Thread debugging using libthread_db enabled] [New Thread 47904931222720 (LWP 14699)] Error while reading shared library symbols: Cannot find new threads: generic error Loading file [/home/u/wing/steve/picturel/mmc/demoboard/microsd-1.sym] Program received signal SIGSEGV, Segmentation fault. [Switching to Thread 47904931222720 (LWP 14699)] 0x2b91bbd5f970 in strcmp () from /lib64/libc.so.6 (gdb) where #0 0x2b91bbd5f970 in strcmp () from /lib64/libc.so.6 #1 0x0042a016 in s_string_list_sort_master_comp_attrib_list () #2 0x0042d053 in gattrib_main () #3 0x2b91bb5c1b61 in scm_boot_guile () from /usr/lib64/libguile.so.12 #4 0x0042cd83 in main () -- Steve WilliamsThe woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Re: gattrib for symbols?
http://www.gedasymbols.org/user/dj_delorie/ Hmm... ooffice 2.0 doesn't seem to understand the csv that you write out. So I've just tried it, and it's not much help either. Hmmm... I have OO 2.0 and just tried it, and it works just fine. It's a comma separated values file, OO should import it into oomath. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: DIY brass stencils
On Wed, Feb 21, 2007 at 02:41:23PM -0500, DJ Delorie wrote: DJ Delorie [EMAIL PROTECTED] writes: http://www.delorie.com/pcb/brass/ I added today's results to that page, too. The next thing to try would be compensating the shapes for the distortion caused by the etching. You should try bowing in the sides of the openings to see if you could square up the holes, like: __ )__( -- Ben Jackson AD7GD [EMAIL PROTECTED] http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: DIY brass stencils
The next thing to try would be compensating the shapes for the distortion caused by the etching. You should try bowing in the sides of the openings to see if you could square up the holes, like: The issue is that, if you're etching through 5 mil of brass, you should expect 5 mil of undercutting. I don't think there's much of a way around that, so I'm kinda limited to a 5 mil radius by the time I'm through the panel. I thought of masking both sides, which would cut both etch time and undercutting in half, but lining up the masks proved to be difficult. If you look at the lower right on this picture, for example: http://www.delorie.com/pcb/brass/20070221-60-top.jpg You'll see that a pinhole in the toner results in an etched cone about 10 mil in diameter on the toner side. What I need to do is try to second-guess the over-etching and figure out the right ps-bloat setting so that the final size is what I want. Note that it differs depending on pad size; the thin holes for the 60 pin connector (0.5mm pitch) didn't over-etch as much as the bigger holes. In fact, they came out pretty much perfect with a ps-bloat of -200 (2 mils smaller on each edge). I might go to -250 depending on the results of the squeegee testing. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: DIY brass stencils
On Wed, Feb 21, 2007 at 02:57:08PM -0500, DJ Delorie wrote: The issue is that, if you're etching through 5 mil of brass, you should expect 5 mil of undercutting. You have to control the access of the etchant to the metal. Maybe a dithered fuzz of toner around the edge of the hole would allow the center more access to etchant so you could go through before exposing as much edge. Eventually the isolated dots would just fall off as the surrounding metal was eaten away. I'm wondering if you use a scalloped hole like that, if the bowl of solder paste will actually be peeled off by the lip all around the edge. You almost need to etch it from the board side so that the opening faces downward. -- Ben Jackson AD7GD [EMAIL PROTECTED] http://www.ben.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: DIY brass stencils
You have to control the access of the etchant to the metal. Maybe a dithered fuzz of toner around the edge of the hole would allow the center more access to etchant so you could go through before exposing as much edge. Eventually the isolated dots would just fall off as the surrounding metal was eaten away. The pitting indicates that any tiny hole, no matter how fine my dithering, results in a cone shaped pit. Think about it - if the etchant can get to the other side, which is 5 mils away, it can certainly get sideways the same amount through the same hole. Since the holes I'm trying to make are only 10 mils across, I'm wondering if you use a scalloped hole like that, if the bowl of solder paste will actually be peeled off by the lip all around the edge. You almost need to etch it from the board side so that the opening faces downward. The idea was always to have the toner side down, so that it releases the paste easier. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
