Re: gEDA-user: pcb: a segfault bug in rats.c:AddAllRats()

2007-03-06 Thread Seb James
On Mon, 2007-03-05 at 17:06 +, Seb James wrote:
 Quite possibly not the list to put this message. I'll put this in bug
 tracking as well.
 
 Here is a crashing bug with pcb:
 
 This occurs when I disperse all the elements in my design. There are a
 lot of them and they run off the page even if I set it to the max size
 3 by 3. The key thing is that the elements disperse off the
 diagram.
 
 Once dispersed off the edge of the diagram, if I call the optimize rats
 nest function, I get a segfault:

With more testing, and setting the size of the diagram to allow me to
disperse all the elements, I find that the crashing still occurs when I
load the netlist, then disperse all elements, then try to optimize
the rats nest.

If I _don't_ disperse, but manually move a few components out into the
diagram, then the optimize rats nest step completes with no crash.

Seb James



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Re: gEDA-user: symbol error shows up with gsymcheck

2007-03-06 Thread Seb James
On Mon, 2007-03-05 at 17:57 +0100, Werner Hoch wrote:
 Hi Seb,
 
 On Monday 05 March 2007 12:41, Seb James wrote:
  I have a symbol, 7I33_IO.sym which has four slots. When I run
  gsymcheck on the symbol, I get the following errors which I don't
  understand.
 
  Can anyone help me here?
 
 Your slotdef attributes are attached to the box. Just remove the 
 brackets in line 3 and 24 or detach them from the box.

Thanks for the info Werner. I should have posted that I discovered that
with a bit of trial and error in the end. Knowing how to detach an
attribute by removing the brackets is useful.

This business of attaching or not attaching is a little confusing for a
new user. The error messages generated by gsymcheck only indicate the
problem if you know the code, I think. Might be something to add some
extra documentation about in the faqs. 

best,

Seb James



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Re: gEDA-user: nets in symbols

2007-03-06 Thread Seb James
On Mon, 2007-03-05 at 10:41 -0700, Marc Moreau wrote:
 On Mon, 05 Mar 2007 14:51:45 +
 Seb James [EMAIL PROTECTED] wrote:
 
  ERROR: Duplicated reference U3501.
 
 I neglected to say one important thing about multiple parts...
 Each unit must have a unique refdes, but all the same.  Okay..  Example...
 
 I call my parts
 U3163pwr
 U3163ioone
 U3163iotwo
 U3163adc

Great! That's it!

Seb



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Re: gEDA-user: pcb: a segfault bug in rats.c:AddAllRats()

2007-03-06 Thread Seb James
On Mon, 2007-03-05 at 09:40 -0800, Ben Jackson wrote:
 On Mon, Mar 05, 2007 at 05:06:37PM +, Seb James wrote:
  max size 3 by 3
 
 I think if you hand-edit the file you can make it larger.  One of the
 first lines in the .pcb file will start with PCB and has the dimensions.
 
  The key thing is that the elements disperse off the diagram.
 
 It's worth trying my smartdisperse plugin, not because it tries to deal
 with this case in particular, but because it will pick a different order
 for your board that might fit in less area:
 
   http://www.gedasymbols.org/user/ben_jackson/

I tried your plugin, which is very good and lays the components out in
much less space. I was hoping that this might act as a workaround for
this crashing bug, but alas, not. I'll just have to debug the problem
*puts on diving helmet*

Seb



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Re: gEDA-user: pcb: a segfault bug in rats.c:AddAllRats()

2007-03-06 Thread Seb James
On Tue, 2007-03-06 at 09:53 +, Seb James wrote:
 On Mon, 2007-03-05 at 17:06 +, Seb James wrote:
  Quite possibly not the list to put this message. I'll put this in bug
  tracking as well.
  
  Here is a crashing bug with pcb:
  
  This occurs when I disperse all the elements in my design. There are a
  lot of them and they run off the page even if I set it to the max size
  3 by 3. The key thing is that the elements disperse off the
  diagram.
  
  Once dispersed off the edge of the diagram, if I call the optimize rats
  nest function, I get a segfault:
 
 With more testing, and setting the size of the diagram to allow me to
 disperse all the elements, I find that the crashing still occurs when I
 load the netlist, then disperse all elements, then try to optimize
 the rats nest.
 
 If I _don't_ disperse, but manually move a few components out into the
 diagram, then the optimize rats nest step completes with no crash.

The bug was triggered by the following problem in my design:

Can't find U3551 pin 99 called for in netlist.
Can't find U3551 pin 87 called for in netlist.
Can't find U3551 pin 75 called for in netlist.
Can't find U3551 pin 63 called for in netlist.

etc etc (lots more messages)...

The crash occurred in rats.c, around line 610 in the function
DrawShortestRats() where CreateNewRat() is called with some arguments
which don't exist. There was no check in DrawShortestRats() that these
arguments are safe to pass to CreateNewRat() so I have patched the file;
patch attached.

This patch has been generated comparing with pcb 20070208.

Now I have to find out why these pins aren't in the netlist...

Seb
--- rats.c.orig	2007-02-04 02:29:28.0 +
+++ rats.c	2007-03-06 13:25:25.0 +
@@ -342,6 +342,7 @@
 {
   ConnectionTypePtr conn;
 
+  /* It would be worth checking if SourceNet is NULL here to avoid a segfault. Seb James. */
   CONNECTION_LOOP (SourceNet);
   {
 conn = GetConnectionMemory (DestNet);
@@ -575,11 +576,13 @@
   register float distance, temp;
   register ConnectionTypePtr conn1, conn2, firstpoint, secondpoint;
   Boolean changed = False;
+  Boolean havepoints = False;
   Cardinal n, m, j;
   NetTypePtr next, subnet, theSubnet = NULL;
 
+  if (Netl-NetN  2) { return False; }
   firstpoint = secondpoint = NULL;
-  while (Netl-NetN  1)
+  do
 {
   subnet = Netl-Net[0];
   distance = SQUARE (MAX_COORD);
@@ -598,34 +601,38 @@
 		  distance = temp;
 		  firstpoint = conn1;
 		  secondpoint = conn2;
+		  havepoints = True;
 		  theSubnet = next;
 		}
 		}
 	}
 	}
-  if (funcp)
-	{
-	  (*funcp) (firstpoint, secondpoint, subnet-Style);
-	}
-  else
-	{
-	  /* found the shortest distance subnet, draw the rat */
-	  if ((line = CreateNewRat (PCB-Data,
-firstpoint-X, firstpoint-Y,
-secondpoint-X, secondpoint-Y,
-firstpoint-group, secondpoint-group,
-Settings.RatThickness,
-NoFlags ())) != NULL)
-	{
-	  AddObjectToCreateUndoList (RATLINE_TYPE, line, line, line);
-	  DrawRat (line, 0);
-	  changed = True;
-	}
-	}
+  if (havepoints == True)
+{
+if (funcp)
+	  {
+	(*funcp) (firstpoint, secondpoint, subnet-Style);
+	  }
+else
+	  {
+	/* found the shortest distance subnet, draw the rat */
+	if ((line = CreateNewRat (PCB-Data,
+  firstpoint-X, firstpoint-Y,
+  secondpoint-X, secondpoint-Y,
+  firstpoint-group, secondpoint-group,
+  Settings.RatThickness,
+  NoFlags ())) != NULL)
+	  {
+	AddObjectToCreateUndoList (RATLINE_TYPE, line, line, line);
+	DrawRat (line, 0);
+	changed = True;
+	  }
+	  }
 
-  /* copy theSubnet into the current subnet */
-  TransferNet (Netl, theSubnet, subnet);
-}
+/* copy theSubnet into the current subnet */
+TransferNet (Netl, theSubnet, subnet);
+  } /* if (havepoints == True) */
+} while (Netl-NetN  1  havepoints == True);
   /* presently nothing to do with the new subnet */
   /* so we throw it away and free the space */
   FreeNetMemory (Netl-Net[--(Netl-NetN)]);


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Re: gEDA-user: nets in symbols

2007-03-06 Thread Seb James
On Tue, 2007-03-06 at 09:58 +, Seb James wrote:
 On Mon, 2007-03-05 at 10:41 -0700, Marc Moreau wrote:
  On Mon, 05 Mar 2007 14:51:45 +
  Seb James [EMAIL PROTECTED] wrote:
  
   ERROR: Duplicated reference U3501.
  
  I neglected to say one important thing about multiple parts...
  Each unit must have a unique refdes, but all the same.  Okay..  Example...
  
  I call my parts
  U3163pwr
  U3163ioone
  U3163iotwo
  U3163adc
 
 Great! That's it!

Ah, no, that's not it quite yet...

I called my slotted parts U3501io and the power part U3501pwr.

That means I have 4 U3501io symbols in my schematic and 1 U3501pwr.

On the pcb layout, I get 2 footprints - one for U3501pwr and one for
U3501io...

I tried a step further, and called the io symbols:

U3501ioone
U3501iotwo
U3501iothree
U3501iofour

And then I get 5 footprints on the diagram...

Have I missed anything?

Seb



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Re: gEDA-user: nets in symbols

2007-03-06 Thread Marc Moreau
 Ah, no, that's not it quite yet...

 I called my slotted parts U3501io and the power part U3501pwr.

 That means I have 4 U3501io symbols in my schematic and 1 U3501pwr.

 On the pcb layout, I get 2 footprints - one for U3501pwr and one for
 U3501io...

 I tried a step further, and called the io symbols:

 U3501ioone
 U3501iotwo
 U3501iothree
 U3501iofour

 And then I get 5 footprints on the diagram...

Only put one footprint per refses, don't need one per symbol.
Try putting all the one-time information in the pwr symbol, that way it will 
always be there, and if you don't need one or more of the io's all the 
footprint/copyright/documentation/foo attributes are still available.  The only 
attributes needed for io's is 'slot'.

Perhaps I should add a wiki article at www.geda.seul/wiki

-Marc


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gEDA-user: PCB non-feature... work-around?

2007-03-06 Thread KURT PETERS
I am doing only a two-layer board with three layers per group.  In other 
words the preferences for layers looks something like this:


  grp   1   2  3  4  5  6
soldtrace x
pwrgndsdx
something   x
comptracex
pwrgndcmp  x
somethincp  x
solder x
component   x

Now, when I try to only see pwrgndsd, it turns off the entire group, kind of 
defeating the purpose of separating the layers, in my opinion.  Thus 
soldtrace, pwrgndsd, something all turn off when any of them turn off, and 
all turn on when any one of them turns on.  The same for the other three.  
Is there some way around this and still keep a two-layer board?


 My understanding, which may be wrong, is that if I move pwrgndsd to group 
3, and somethingcp to group 4, that would create a 4 layer board?  Is that 
understanding right?


Regards,
Kurt




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Re: gEDA-user: nets in symbols

2007-03-06 Thread Seb James
On Tue, 2007-03-06 at 08:06 -0700, Marc Moreau wrote:
  Ah, no, that's not it quite yet...
 
  I called my slotted parts U3501io and the power part U3501pwr.
 
  That means I have 4 U3501io symbols in my schematic and 1 U3501pwr.
 
  On the pcb layout, I get 2 footprints - one for U3501pwr and one for
  U3501io...
 
  I tried a step further, and called the io symbols:
 
  U3501ioone
  U3501iotwo
  U3501iothree
  U3501iofour
 
  And then I get 5 footprints on the diagram...
 
 Only put one footprint per refses, don't need one per symbol.
 Try putting all the one-time information in the pwr symbol, that way it will 
 always be there, and if you don't need one or more of the io's all the 
 footprint/copyright/documentation/foo attributes are still available.  The 
 only attributes needed for io's is 'slot'.
 
 Perhaps I should add a wiki article at www.geda.seul/wiki

I volunteer to proof-read such an article.

Things still don't quite work right here. If I call all the symbols
U3501 then I see the correct number of components on my pcb layout, even
though the design doesn't validate with gnetlist.

If I name the symbols U3501io and U3501pwr, then I get two components on
my layout instead of one, but the design validates through gnetlist.

It looks like the pcb program doesn't think U3501io is the same as
U3501pwr - it thinks they are two different components. Except that when
pcb reads in the netlist, it correctly understands that U3501pwr ==
U3501io == U3501..

Seb



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Re: gEDA-user: PCB non-feature... work-around?

2007-03-06 Thread DJ Delorie

 Now, when I try to only see pwrgndsd, it turns off the entire group,
 kind of defeating the purpose of separating the layers, in my
 opinion.

Intentional.  The purpose of the grouping is to color the signals
differently.

Have you tried the check polygons setting?  It might do what you
really want.

 Thus soldtrace, pwrgndsd, something all turn off when any of them
 turn off, and all turn on when any one of them turns on.  The same
 for the other three.  Is there some way around this and still keep a
 two-layer board?

What I do is re-group them as individual layers, do my editing, then
group them back.

   My understanding, which may be wrong, is that if I move pwrgndsd to group 
 3, and somethingcp to group 4, that would create a 4 layer board?  Is that 
 understanding right?

Yes, maybe.  What makes it a 4 layer board in reality is telling the
fab I want a four layer board, here's the gerbers :-)

You can do whatever you want as long as you re-group them as two
groups before exporting it to gerber.  The exporters assume one
physical layer per group.


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Re: gEDA-user: nets in symbols

2007-03-06 Thread Marc Moreau
Hmm... I jsut tried it again, and sure enough.  it doesn't work exactly as I 
described...

I'll take a look at it tonight and get back to ya.

-Marc

On Tue, 06 Mar 2007 15:51:01 +
Seb James [EMAIL PROTECTED] wrote:

 On Tue, 2007-03-06 at 08:06 -0700, Marc Moreau wrote:
   Ah, no, that's not it quite yet...
  
   I called my slotted parts U3501io and the power part U3501pwr.
  
   That means I have 4 U3501io symbols in my schematic and 1 U3501pwr.
  
   On the pcb layout, I get 2 footprints - one for U3501pwr and one for
   U3501io...
  
   I tried a step further, and called the io symbols:
  
   U3501ioone
   U3501iotwo
   U3501iothree
   U3501iofour
  
   And then I get 5 footprints on the diagram...
 
  Only put one footprint per refses, don't need one per symbol.
  Try putting all the one-time information in the pwr symbol, that way it 
  will always be there, and if you don't need one or more of the io's all the 
  footprint/copyright/documentation/foo attributes are still available.  The 
  only attributes needed for io's is 'slot'.
 
  Perhaps I should add a wiki article at www.geda.seul/wiki

 I volunteer to proof-read such an article.

 Things still don't quite work right here. If I call all the symbols
 U3501 then I see the correct number of components on my pcb layout, even
 though the design doesn't validate with gnetlist.

 If I name the symbols U3501io and U3501pwr, then I get two components on
 my layout instead of one, but the design validates through gnetlist.

 It looks like the pcb program doesn't think U3501io is the same as
 U3501pwr - it thinks they are two different components. Except that when
 pcb reads in the netlist, it correctly understands that U3501pwr ==
 U3501io == U3501..

 Seb



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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Stuart Brorson

How can I create gEDA symbols for unsupported parts ??


U, you draw them using the symbol editor?

Usually, I start with a symbol similar to the one I want.  I place it
on the schematic, select it, do right mouse - down symbol, and this
places me in a mode where I can edit the symbol.  Make sure to turn on
all invisible attributes.  Then edit away.  Use pinout info from the
part's datasheet.

Stuart


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread John Coppens
On Tue, 6 Mar 2007 13:18:02 -0400
Felipe Balbi [EMAIL PROTECTED] wrote:

 How can I create gEDA symbols for unsupported parts ??
 

Hi Felipe.

If you mean symbols for gschem, check this:

http://geda.seul.org/wiki/geda:faq-gschem

If you mean footprints for PCB:

http://www.brorson.com/gEDA/
http://geda.seul.org/wiki/geda:pcb_tips

John

(Maybe useful - in Spanish:
http://jcoppens.com/soft/howto/geda-spice/part3.php)


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Stuart Brorson

Here's some documentation about drawing symbols:

http://geda.seul.org/wiki/geda:scg



On Tue, 6 Mar 2007, Felipe Balbi wrote:


How can I create gEDA symbols for unsupported parts ??

Thanks in advance

--
Best Regards,

Felipe Balbi
[EMAIL PROTECTED]


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Felipe Balbi

Hello all,

Thanks to everybody...

I'll start creating symbols for gEDA. I want to use some ATMEL
processors in my designs and I didn't see them in gEDA's symbol
database. As soon as I get them done, I'll send them to be added in
the symbol database.

Thanks a lot guys.



BTW, does anybody here know where are the code portion that reads the
.sym files and shows the symbol itself ?

I'm wondering to develop something in this area, maybe some XML-like
file and a symbol creation program.. What do you guys think about it ?


On 3/6/07, Stuart Brorson [EMAIL PROTECTED] wrote:

Here's some documentation about drawing symbols:

http://geda.seul.org/wiki/geda:scg



On Tue, 6 Mar 2007, Felipe Balbi wrote:

 How can I create gEDA symbols for unsupported parts ??

 Thanks in advance

 --
 Best Regards,

 Felipe Balbi
 [EMAIL PROTECTED]


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--
Best Regards,

Felipe Balbi
[EMAIL PROTECTED]


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread DJ Delorie

 I'll start creating symbols for gEDA. I want to use some ATMEL
 processors in my designs and I didn't see them in gEDA's symbol
 database. As soon as I get them done, I'll send them to be added in
 the symbol database.

http://www.gedasymbols.org/scripts/search.cgi?key=atmel

http://www.gedasymbols.org/

 BTW, does anybody here know where are the code portion that reads the
 .sym files and shows the symbol itself ?

I have a sym2eps tool here: http://www.gedasymbols.org/user/dj_delorie/

There's a djboxsym there too, which is a symbol creation helper.

 I'm wondering to develop something in this area, maybe some XML-like
 file and a symbol creation program.. What do you guys think about it ?

First, there's a bunch of existing symbol-maker helpers out there, so
make sure you're not doing something that's already been done.

Second, if it hasn't been done, don't let all those other helpers stop
you from making another one.  It seems to be a competition to see how
many different helpers we can come up with :-)


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Ben Jackson
On Tue, Mar 06, 2007 at 01:56:48PM -0500, DJ Delorie wrote:
 Second, if it hasn't been done, don't let all those other helpers stop
 you from making another one.  It seems to be a competition to see how
 many different helpers we can come up with :-)

You just take your initials and add 'boxsym' to the end!

By the way, I'd recommend that new boxsym hackers take a look at bjjboxsym.
I tried to generalize the internals a bit.  You can do things like draw
symbol objects in transformed coordinate spaces.  The idea was to be able
to plug in layout classes that would do whatever you want.

-- 
Ben Jackson AD7GD
[EMAIL PROTECTED]
http://www.ben.com/


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Stuart Brorson

I'll echo DJ's comment:  First take a look around to see what's
already out there w.r.t. symbol creation utilties.  You may be able to
use or modify one of them instead of writing your own.


BTW, does anybody here know where are the code portion that reads the
.sym files and shows the symbol itself ?


Both .sym and .sch files are read by functions in the libgeda/src
directory.  In particular, look at f_read.c and at a_basic.c:o_read().

Stuart


On Tue, 6 Mar 2007, Felipe Balbi wrote:


Hello all,

Thanks to everybody...

I'll start creating symbols for gEDA. I want to use some ATMEL
processors in my designs and I didn't see them in gEDA's symbol
database. As soon as I get them done, I'll send them to be added in
the symbol database.

Thanks a lot guys.



BTW, does anybody here know where are the code portion that reads the
.sym files and shows the symbol itself ?

I'm wondering to develop something in this area, maybe some XML-like
file and a symbol creation program.. What do you guys think about it ?


On 3/6/07, Stuart Brorson [EMAIL PROTECTED] wrote:

Here's some documentation about drawing symbols:

http://geda.seul.org/wiki/geda:scg



On Tue, 6 Mar 2007, Felipe Balbi wrote:

 How can I create gEDA symbols for unsupported parts ??

 Thanks in advance

 --
 Best Regards,

 Felipe Balbi
 [EMAIL PROTECTED]


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--
Best Regards,

Felipe Balbi
[EMAIL PROTECTED]


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Felipe Balbi

Hello Dj,


http://www.gedasymbols.org/scripts/search.cgi?key=atmel

there's already lots of ATMEL chips there... I'll modify one of them
to add my AT91SAM9261 and send to geda-symbol maintainers.



 BTW, does anybody here know where are the code portion that reads the
 .sym files and shows the symbol itself ?

I have a sym2eps tool here: http://www.gedasymbols.org/user/dj_delorie/

There's a djboxsym there too, which is a symbol creation helper.

 I'm wondering to develop something in this area, maybe some XML-like
 file and a symbol creation program.. What do you guys think about it ?

First, there's a bunch of existing symbol-maker helpers out there, so
make sure you're not doing something that's already been done.

Second, if it hasn't been done, don't let all those other helpers stop
you from making another one.  It seems to be a competition to see how
many different helpers we can come up with :-)

Actually I was thinking about gschem source code itself... where is
the code that it parses the  .sym files... where is the .sym
language defined... Maybe an XML-like file would be a lot easier to
understand. And, also, a lot easier to write part generators.

I'll check that on geda-dev list. ;-)


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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Felipe Balbi

Hello Stuart,

On 3/6/07, Stuart Brorson [EMAIL PROTECTED] wrote:

I'll echo DJ's comment:  First take a look around to see what's
already out there w.r.t. symbol creation utilties.  You may be able to
use or modify one of them instead of writing your own.

 BTW, does anybody here know where are the code portion that reads the
 .sym files and shows the symbol itself ?

Both .sym and .sch files are read by functions in the libgeda/src
directory.  In particular, look at f_read.c and at a_basic.c:o_read().


Thanks a lot for you comments, that's what I was looking for :-)


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gEDA-user: Re: gEDA Symbols

2007-03-06 Thread Levente
Felipe Balbi [EMAIL PROTECTED] wrote:
 Hello all,
 
 Thanks to everybody...
 
 I'll start creating symbols for gEDA. I want to use some ATMEL
 processors in my designs and I didn't see them in gEDA's symbol
 database. As soon as I get them done, I'll send them to be added in
 the symbol database.

Which Atmel? I have symbol for ATMEGA8 and 16. Tell me if you want it.

-- 
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Re: gEDA-user: gEDA Symbols

2007-03-06 Thread Stuart Brorson

Actually I was thinking about gschem source code itself... where is
the code that it parses the  .sym files... where is the .sym
language defined...


http://geda.seul.org/wiki/geda:file_format_spec


Maybe an XML-like file would be a lot easier to
understand. And, also, a lot easier to write part generators.


This is flame-bait.  :-)

We've discussed XML file formats several times in
the past.  There are lots of reasons to *not* use XML.  Google will
help you find them.

Stuart



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Re: gEDA-user: Re: gEDA Symbols

2007-03-06 Thread Felipe Balbi

AT91SAM9261

On 3/6/07, Levente [EMAIL PROTECTED] wrote:

Felipe Balbi [EMAIL PROTECTED] wrote:
 Hello all,

 Thanks to everybody...

 I'll start creating symbols for gEDA. I want to use some ATMEL
 processors in my designs and I didn't see them in gEDA's symbol
 database. As soon as I get them done, I'll send them to be added in
 the symbol database.

Which Atmel? I have symbol for ATMEGA8 and 16. Tell me if you want it.

--
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http://web.interware.hu/lekovacs



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--
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Felipe Balbi
[EMAIL PROTECTED]


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Re: gEDA-user: nets in symbols

2007-03-06 Thread Marc Moreau
OKay...  After some poking around, I found this...

I have been able to verify, but IIRC, we used to be able to have U1a, U1b etc 
for different slots within the same device.

Trying that anew today. It doesn't work.  Netlist doesn't recognize them as the 
same, and neither does PCB.  I think something changed.

Can someone verify that I am remembering correctly.

PCB version 20070208
gschem,gsch2pcb from geda-20061020

-Marc

On Tue, 6 Mar 2007 10:04:19 -0700
Marc Moreau [EMAIL PROTECTED] wrote:

 Hmm... I jsut tried it again, and sure enough.  it doesn't work exactly as I 
 described...

 I'll take a look at it tonight and get back to ya.

 -Marc

 On Tue, 06 Mar 2007 15:51:01 +
 Seb James [EMAIL PROTECTED] wrote:

  On Tue, 2007-03-06 at 08:06 -0700, Marc Moreau wrote:
Ah, no, that's not it quite yet...
   
I called my slotted parts U3501io and the power part U3501pwr.
   
That means I have 4 U3501io symbols in my schematic and 1 U3501pwr.
   
On the pcb layout, I get 2 footprints - one for U3501pwr and one for
U3501io...
   
I tried a step further, and called the io symbols:
   
U3501ioone
U3501iotwo
U3501iothree
U3501iofour
   
And then I get 5 footprints on the diagram...
  
   Only put one footprint per refses, don't need one per symbol.
   Try putting all the one-time information in the pwr symbol, that way it 
   will always be there, and if you don't need one or more of the io's all 
   the footprint/copyright/documentation/foo attributes are still available. 
The only attributes needed for io's is 'slot'.
  
   Perhaps I should add a wiki article at www.geda.seul/wiki
 
  I volunteer to proof-read such an article.
 
  Things still don't quite work right here. If I call all the symbols
  U3501 then I see the correct number of components on my pcb layout, even
  though the design doesn't validate with gnetlist.
 
  If I name the symbols U3501io and U3501pwr, then I get two components on
  my layout instead of one, but the design validates through gnetlist.
 
  It looks like the pcb program doesn't think U3501io is the same as
  U3501pwr - it thinks they are two different components. Except that when
  pcb reads in the netlist, it correctly understands that U3501pwr ==
  U3501io == U3501..
 
  Seb
 
 
 
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Re: gEDA-user: Why use gEDA?

2007-03-06 Thread Peter Baxendale
 And i do a question, is gEDA an proper software to use during the
 formation academical  process? I think yes that, this can be used for
 that.
 
 What do you think about?

A bit late to reply to this, but ...

We used gEDA in our Engineering course here at Durham University (UK)
School of Engineering for the first time this year. We previously used
Orcad for teaching purposes. Since I don't use Windows myself this
wasn't an option for me personally so I had already been using gEDA.
When it came to buying a load more Orcad licenses to support a new ECAD
course I decided instead to switch to gEDA because (in no particular
order)
1. it seems to give us pretty well everything we need
2. the licensing allows students and staff to have their own copies
3. well documented text file formats are used
4. it's open source
5. it's well supported (eg here)
These all seem to me good reasons for getting students to use it. In
addition, I think the fact that parts of the process involve using a
command line interface makes for a good learning experience for students
who are too used to clicking without thinking.

We set a very simple assignment for our students to get some experience
of the schematic entry/simulation/pcb design process, adapted from the
earlier Orcad exercise. If you're interested to see what we did take a
look at
http://www.dur.ac.uk/peter.baxendale/stuff/gEDA/assignment_desc.pdf .
It's limited because it's a short course, the electronics had to be
simple because of the level these students were at, and it had to use
components I could find spice models for.

I think if you use Linux machines for teaching there's no reason at all
not to use gEDA. Unfortunately, here all our teaching machines currently
run Windows only, so we use a rather old Windows distribution which is
not entirely satisfactory. Also, I found that students wanting to use it
on their own machines were put off by the relatively complicated
installation, including having to install Cygwin first (that is, for the
majority of students who only use Windows). When I get the time I want
to find better solutions. Native Windows versions of gschem and pcb with
an installer would be attractive to the students, but it doesn't seem
easy to build these out of the box. I'd like to encourage more to use
gEDA, and unfortunately that means getting my hands dirty with Windows.

All things considered, it's been pretty successful and I intend to stick
with it for next year.



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Re: gEDA-user: nets in symbols

2007-03-06 Thread John Luciani

On 3/6/07, Marc Moreau [EMAIL PROTECTED] wrote:

OKay...  After some poking around, I found this...

I have been able to verify, but IIRC, we used to be able to have U1a, U1b etc 
for different slots within the same device.

Trying that anew today. It doesn't work.  Netlist doesn't recognize them as the 
same, and neither does PCB.  I think something changed.

Can someone verify that I am remembering correctly.



You are remembering correctly. From the PCB documentation ---

If a NAME ends with a lower-case letter,
all lower-case letters are stripped from the end of the NAME to determine the
matching layout-name name.  For example:

  Data U1-3 U2abc-4 FLOP1a-7 Uabc3-A9

specifies that the net called Data should have
pin 3 of U1 connected to pin 4 of U2, to pin 7 of
FLOP1 and to pin A9 of Uabc3.  Note that element name and
pin number strings are case-sensitive.
It is up to you to name the elements so that their layout-name names
agrees with the netlist.

(* jcl *)

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Re: gEDA-user: Why use gEDA?

2007-03-06 Thread Dan McMahill

Peter Baxendale wrote:
 majority of students who only use Windows). When I get the time I want

to find better solutions. Native Windows versions of gschem and pcb with
an installer would be attractive to the students, but it doesn't seem
easy to build these out of the box. I'd like to encourage more to use
gEDA, and unfortunately that means getting my hands dirty with Windows.


For PCB it is pretty much there.  I've found a couple of little things 
which need fixing and I hope to do that soon.  I thought we were all the 
way there with the last snapshot, but afterwards I found some minor 
bugs.  I probably would have fixed them before the snapshot by my wifes 
pc had a hardware problem followed by XP flaking out on us.  My 
computers do not run windows (they're not even the right hardware 
platform for it).


-Dan







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Re: gEDA-user: Why use gEDA?

2007-03-06 Thread al davis
On Tuesday 06 March 2007 18:52, Peter Baxendale wrote:
 I think if you use Linux machines for teaching there's no
 reason at all not to use gEDA. Unfortunately, here all our
 teaching machines currently run Windows only, so we use a
 rather old Windows distribution which is not entirely
 satisfactory. 

How about setting up a server, with remote X display on the 
windows boxes?

 Also, I found that students wanting to use it 
 on their own machines were put off by the relatively
 complicated installation, including having to install Cygwin
 first (that is, for the majority of students who only use
 Windows). 

They need to learn to deal with more than one system.  Faculty 
need to learn this too.  They need to learn it early.

They can't run commercial windows software at home because of 
cost and licensing.  If you run all windows stuff, they need to 
come into the lab for work that should not take lab time.

If you run free software on a server, they might be able to 
access the server remotely.  They might need to come into the 
lab as they would need to for windows.

The real benefit is that if they want to run it at home, they 
are only blocked by their own unwillingness to do it.

 When I get the time I want to find better 
 solutions. Native Windows versions of gschem and pcb with an
 installer would be attractive to the students, but it doesn't
 seem easy to build these out of the box. I'd like to
 encourage more to use gEDA, and unfortunately that means
 getting my hands dirty with Windows.

Let those who use only windows come into the lab to use the 
software.  Reward those who care with everything they need at 
home.

Windows has its market position only because people believe 
everything runs there.  Everything runs there only by force.  
Students need to learn that there is more than one way, and 
that claim of everything and everyone runs windows is false.


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Re: gEDA-user: Why use gEDA?

2007-03-06 Thread Dan McMahill

al davis wrote:

On Tuesday 06 March 2007 18:52, Peter Baxendale wrote:


I think if you use Linux machines for teaching there's no
reason at all not to use gEDA. Unfortunately, here all our
teaching machines currently run Windows only, so we use a
rather old Windows distribution which is not entirely
satisfactory. 



How about setting up a server, with remote X display on the 
windows boxes?



Also, I found that students wanting to use it 
on their own machines were put off by the relatively

complicated installation, including having to install Cygwin
first (that is, for the majority of students who only use
Windows). 



They need to learn to deal with more than one system.  Faculty 
need to learn this too.  They need to learn it early.


and at the risk of sounding like a broken record a gui only 
environment just does not cut it as far as I'm concerned for lots of 
real world work.  Being literate in the use of unix like operating 
systems can be a huge benefit.


Jim Williams wrote an app note many years back that had a pair of 
photos.  I can't seem to place my hands on it so I hope I haven't 
misquoted him too much.  In the first photo there is a computer on a 
very neat table with a vase full of flowers and maybe a glass of wine. 
The caption reads something along the lines of the cad companies would 
like you to think circuit design is neatly captured with their tools 
and the second picture shows an old vacuum tube based tektronix scope 
with a giant mass of wires in front of it hooked up to all 4 channels 
and some empty pizza boxes on top.  The caption here reads something 
like in the real world other approaches are often required.   I guess 
my version of that would be a GUI-only CAD flow in a GUI-only desktop 
environment in the first photo and the second photo having little 
snippets of shell scripts, awk scripts, a perl script or two and an 
emacs window.


-Dan


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread Marc Moreau
On Tue, 06 Mar 2007 22:04:43 -0500
Dan McMahill [EMAIL PROTECTED] wrote:
[cut]
 the second photo having little
 snippets of shell scripts, awk scripts, a perl script or two and an
 emacs window.

*cough* vim *ahem*

Sorry..  Couldn't resist.

/me dawns the flame suit

-Marc


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread DJ Delorie

  the second photo having little
  snippets of shell scripts, awk scripts, a perl script or two and an
  emacs window.
 
 *cough* vim *ahem*

In real life, you have several of each :-P


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread al davis
On Tuesday 06 March 2007 22:45, Marc Moreau wrote:
 *cough* vim *ahem*

 Sorry..  Couldn't resist.

 /me dawns the flame suit

Regardless of preference, at some time everyone will be 
confronted with something else.  Whether you like it or not, it 
is important to be able to cope with it.

I have yet to meet anyone skilled at unix that cannot cope with 
MS-windows when the need arises.  When I see a school that is 
all-MS, and graduates that know only MS ...  I assume they 
cannot cope with anything else.  Usually that assumption is 
true.  I assume such narrowness prevails in all that they do. 

I would go even farther on this  ...Even if stuck with 
windoze ..   sometimes you still need to work with text files.  
The unix hack digs in and solves the problem.  The windows user 
says I can't and they call in someone else to solve the 
problem.

When I am interviewing job applicants, this is the kind of thing 
I look for. 

As a teacher, try to emphasize this, even in the tests.  The 
highest grades go to those who can dig in and solve strange 
problems.  I don't care about memorizing formulas.  I have 
gotten both praise and complaints for this policy.

A couple years ago, despite pressure from other faculty, I used 
gnucap in class, with mixed results.  Within a year later, two 
of the students came back (separately, without knowledge of 
each other) to tell me how much it helped them in a job 
interview.

I have seen things like this over and over.


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread Dave N6NZ



al davis wrote:

Regardless of preference, at some time everyone will be 
confronted with something else.  Whether you like it or not, it 
is important to be able to cope with it.


Gee... in the old days, that was simply assumed.  Let's see...

My career as measured by operating systems on which I have developed 
code, in rough chronological order (naked metal systems not included :)


OS/360 MFT
OS/360 MVT
VAX/VMS
Apple II DOS
NOS/BE
NOS/VE
Scope
Kronos
Star OS
Cyber-18 OS
OS-1100
More VAX/VMS
Unix
Macintosh OS (the oold one)
Another Unix
A different Unix
Yet two more different Unix systems at the same time, requiring a 
portable code base

Windows
Unix again
Linux
Windows again, and I swear for the last time and never again because 
life it too short

Linux
Mac OS X (but so far only for the BSD part that you find under the hood, 
and only a few trivial things -- this hardly counts, I do mostly Linux 
work today.)




As a teacher, try to emphasize this, even in the tests.  The 
highest grades go to those who can dig in and solve strange 
problems.  


Absolutely.  As a hiring manager, I'm only interested in people who can 
tackle difficult, unsolved problems with whatever tools happen to be 
available.  It's that over, around, or through mentality that makes a 
good engineer.


-dave


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gEDA-user: thermal vias in pcb

2007-03-06 Thread Dave N6NZ
What is the easiest way to create thermal vias? Not a via with a 
thermal relief -- I can do that :) .. but a via with no thermal relief 
punched into polygons on both sides of the board that ends up getting 
filled with solder to help create a large thermal mass to be used as a 
heat sink.


The application I am targeting is surface mount motor control and 
voltage regulator IC's.  So, a typical part will have a large bottom 
contact that is to be connected to large pad in the footprint.  Then, on 
the front and the back, as convenient, there are polygons that are also 
part of the ground plane, the top one overlaps and contacts the 
footprint pad.  Now, the trick: there is a field of small holes drilled 
into the polygons, with *no* thermal reliefs.  Drill size is chosen such 
that the vias wick up lots of solder and you end up with a nice metal 
mass.  See Freescale Ap-Note AN4005.


So, anyway, should I specify some kind of pin with clearance smaller 
than the pad?  How can I keep pcb's DRC from whining?  I'm sure the 
answer is simple but I'm not sure how to approach it.


TIA,
 dave


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Re: gEDA-user: thermal vias in pcb

2007-03-06 Thread joe tarantino

I use a number of parts with backside thermal pads.  Draw the rectangle as
you describe to comfortably surround the vias.  Then with the mouse over the
rectangle hit 's'.  This will flood the thermal reliefs on the vias.  If you
want to ever de-solder the part from the back, make sure the pad on the
opposite side has the solder resist cleared.

Joe T


On 3/6/07, Dave N6NZ [EMAIL PROTECTED] wrote:


What is the easiest way to create thermal vias? Not a via with a
thermal relief -- I can do that :) .. but a via with no thermal relief
punched into polygons on both sides of the board that ends up getting
filled with solder to help create a large thermal mass to be used as a
heat sink.

The application I am targeting is surface mount motor control and
voltage regulator IC's.  So, a typical part will have a large bottom
contact that is to be connected to large pad in the footprint.  Then, on
the front and the back, as convenient, there are polygons that are also
part of the ground plane, the top one overlaps and contacts the
footprint pad.  Now, the trick: there is a field of small holes drilled
into the polygons, with *no* thermal reliefs.  Drill size is chosen such
that the vias wick up lots of solder and you end up with a nice metal
mass.  See Freescale Ap-Note AN4005.

So, anyway, should I specify some kind of pin with clearance smaller
than the pad?  How can I keep pcb's DRC from whining?  I'm sure the
answer is simple but I'm not sure how to approach it.

TIA,
dave


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RE: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread Bert Timmerman
Hi Al and all,

In my line of work (steel industry) it's a bit more harsh:

If you don't solve the first problem, you won't be given another problem to
solve.

To find a method is one thing, to get the correct result is another one.

One problem to solve, twenty possible solutions, and then sort the best one
out of those ...

Kind regards,

Bert Timmerman.

-Oorspronkelijk bericht-
Van: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Namens al davis
Verzonden: woensdag 7 maart 2007 5:34
Aan: geda-user@moria.seul.org
Onderwerp: Re: gEDA-user: Why use gEDA? [OT]

On Tuesday 06 March 2007 22:45, Marc Moreau wrote:
 *cough* vim *ahem*

 Sorry..  Couldn't resist.

 /me dawns the flame suit

Regardless of preference, at some time everyone will be confronted with
something else.  Whether you like it or not, it is important to be able to
cope with it.

I have yet to meet anyone skilled at unix that cannot cope with MS-windows
when the need arises.  When I see a school that is all-MS, and graduates
that know only MS ...  I assume they cannot cope with anything else.
Usually that assumption is true.  I assume such narrowness prevails in all
that they do. 

I would go even farther on this  ...Even if stuck with 
windoze ..   sometimes you still need to work with text files.  
The unix hack digs in and solves the problem.  The windows user says I
can't and they call in someone else to solve the problem.

When I am interviewing job applicants, this is the kind of thing I look for.


As a teacher, try to emphasize this, even in the tests.  The highest grades
go to those who can dig in and solve strange problems.  I don't care about
memorizing formulas.  I have gotten both praise and complaints for this
policy.

A couple years ago, despite pressure from other faculty, I used gnucap in
class, with mixed results.  Within a year later, two of the students came
back (separately, without knowledge of each other) to tell me how much it
helped them in a job interview.

I have seen things like this over and over.


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread Svenn Are Bjerkem

On 3/7/07, Dave N6NZ [EMAIL PROTECTED] wrote:



al davis wrote:




 As a teacher, try to emphasize this, even in the tests.  The
 highest grades go to those who can dig in and solve strange
 problems.

Absolutely.  As a hiring manager, I'm only interested in people who can
tackle difficult, unsolved problems with whatever tools happen to be
available.  It's that over, around, or through mentality that makes a
good engineer.


As an engineer I try to work around the problems that arise when
somebody, that is mostly a sysop, think he knows more than me just
because he is the sysop and have the root password. I think that every
engineer should shout out loud when his favourite tool is not
installed on the system. tackle difficult, unsolved problems with
whatever tools happen to be available is a reality show scenario for
entertainment on TV. For real day-to-day work the engineer should be
able to decide himself what tool he wants to use. Emacs, vim, nedit or
whatever should always be installed on the system in the newest
version. KDE, Gnome, fvwm etc. should be possible to change with the
edit of an environmental variable in the login shell control file. If
a package of whatever is missing on the system, it should be enough to
run a command to have it installed. But that is the ideal world. With
linux and open source this should be possible, but it is still a long
way to go.
--
Svenn


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Re: gEDA-user: Why use gEDA? [OT]

2007-03-06 Thread Dave McGuire

On Mar 6, 2007, at 11:34 PM, al davis wrote:

I would go even farther on this  ...Even if stuck with
windoze ..   sometimes you still need to work with text files.
The unix hack digs in and solves the problem.  The windows user
says I can't and they call in someone else to solve the
problem.


  I've explained this to people before, and nobody seems to get it.   
It's not a matter of the use of Windows causing the inability to  
think properly...the inability to think properly causes the use of  
Windows.


   -Dave

--
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Port Charlotte, FL




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