Re: gEDA-user: pcb component layers
Who are the other active pcb developers, and would anyone be interested in starting a discussion around what would be needed? Going back to this, who are the active PCB developers? If I want to start a discussion to flesh this (or any other feature) out, should I just post to the gEDA developers list? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Symbol attributes not in the master attributes list
I'd like to better understand what should or shouldn't be done with symbol attributes. I can see on http://geda.seul.org/wiki/geda:master_attributes_list which attributes are available for a resistor symbol by example: device, graphical, description, author, comment, pinseq, pinnumber, pintype, pinlabel, numslots, slotdef, footprint, documentation, refdes, slot, net, value, symversion, dist-license, use-license To automate some aspects of the BOM generation, I would like to have the following attributes on a instantiated resistor symbol: refdes=R1 value=100 tol=1% rating=.0625W tech=CHIP footprint=0402 device=104-1-01 bom=1,2 refdes, value and footprint are pretty clear to me. tol=1% is used to specify the tolerance of the component. rating=.0625W is used to specify its rating. tech=CHIP is used to specify its technology, could be XR7 for a cap by example. bom=1,2 is used to specify which assembly build of material options this components will be associated with, like BOM=0 means the components is not assembled, etc. device=part-number is used to specify the actual part number to be assembled on the board. While tol, rating, tech and bom are attributes that are not listed in http://geda.seul.org/wiki/geda:master_attributes_list I am wondering if I should/can use them as such or if I would have to embed them in comment=tol=1%. I don't want to use comment= because it does not allow me to hide the tol= part of the tol=1% on the instantiated symbol in the schematics. What are the implications of using attributes that are not defined in the master attribute list? The device=104-1-01 attribute, where 104-1-01 is an arbitrary database index that uniquely identifies the device, should be a valid usage, right? What are the implications of doing so when using pcb or other gEDA/gaf tools? Thanks, _jP ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Drill guide
I really see a pad in a pad. Or better an inner ring in a ring. it is a rough sketch, cause i do not the layout here, but the following link is how it looks like : http://www.geocities.com/stdf23173/geda_pcb.html grtz Simon If you mean a smaller HOLE in a pad -- yes, I think this is how its works. If there is (only) a small area in the center of pins/pads not plated with copper, then the drill should center itself. (I have never used this, because I do not make pcb boards at home since many years) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Slotting and visible power connections
On Wed, Nov 5, 2008 at 8:06 PM, Joerg [EMAIL PROTECTED] wrote: When you place, say, a LM324 as the seventh chip it will plop down U7A. What do you mean place ... as the seventh chip? Do you mean when you place your 25th opamp symbol that happens to be realized as 1/4 of a LM324? How does Eagle deal with, say, a 7464: 4-2-3-2-Input AND-OR-INVERT Gate (randomly picking from a 7400-series list)? Only U7A, U8A and so on have power pins. Why? What's so special about the A slots? If you pick a device with implicit pins and suddenly find out Oh, I better filter that chip over there separately you click an invoke tab and the hidden power pins show up on the -A slot. But only for the device you click after invoke, not all of them. Hmm, how do you prevent yourself from doing incompatible things with the various slots' power supplies? Say, for example, that in one part of your schematic you have an opamp where you use the power pins as outputs, but in another part of the schematic far far away, you're filtering the power supply? Are the hidden power pins always there but not visible? In another of your replies it seems like Eagle is adding a *separate* power symbol on top of the opamp symbol, judging by the U7P refdes that gets in your way. I guess I don't get what this invoke tab is. Can you send me a screenshot (privately) - maybe that will help me understand? When you renumber it leaves those instantations intact, if you don't let it then it will not swap, for example, U7C with U8A. This is important for situation where some not-so-orthodox compensation scheme relies on the fact that circuits are on the same die. Heh, I wonder how this would affect gate-swapping back-annotation. The PCB layout tool would have to be smart enough to know that SOME identical-looking gates/opamps can be swapped, but not ALL. elsewhere you wrote: That could quickly lead to an island solution where there is no way back to where everybody else is. It sounds worse than it is; yes it takes work to merge the forks again after a period of divergence, but it isn't like speciation in nature where there's no way back. I've managed to keep my fork(s) in sync with the mainline code so far. (This isn't a symmetric relation, though.) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
Thank you very much, And how do I remove copper ? I know how to add copper, but not how to remove ! Thank again. If I delete, the create space is filled with copper and if I make a o to recreate the rat, then when I use line to recreate the connection, the copped stays and I do not have have the rigth connection. Check under the Settings menu and make sure that New lines, arcs clear polygons is set. If that is set then the line should clear the polygon as you go, else it will connect directly to the polygon. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- --- == Patrick DUPRÉ | | Department of Chemistry| |Phone: (44)-(0)-1904-434384 The University of York | |Fax: (44)-(0)-1904-432516 Heslington | | York YO10 5DD United Kingdom | |email: [EMAIL PROTECTED] == ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Symbol attributes not in the master attributes list
On Thursday 06 November 2008 09:52:48 fricker wrote: The device=104-1-01 attribute, where 104-1-01 is an arbitrary database index that uniquely identifies the device, should be a valid usage, right? What are the implications of doing so when using pcb or other gEDA/gaf tools? You can use any attribute name you like. The attribute spec merely lists those which have particular significance to the schematic editor or netlister. I frequently use vendor-name and vendor-partno, for instance. Peter -- Peter Brett Electronic Systems Engineer Integral Informatics Ltd signature.asc Description: This is a digitally signed message part. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
He may mean to add a negative polygon, which removes copper present within the polygon, instead of a positive polygon, which fills areas within the polygon with copper. The last polygon constructed has the final say over whether or not a given point has copper. This is standard practice in mechanical CAD packages - which also provide several boolean operations to overlapping geometries - AND, OR, XOR, etc. - which then generate a consolidated geometrical object (in the case of an AND or OR) or multiple objects (in the case of an XOR). This would be a wonderful feature in PCB, but I'm sure it would take a fair effort in the generation of gerber files. -Ethan Duncan Drennan wrote: And how do I remove copper ? I know how to add copper, but not how to remove ! I don't really understand what you mean. Do you mean delete lines and polygons? Just hold the pointer over what you want to delete and then press delete. If you want to delete whole selections, then select what you want to delete, type : and then delete and press enter. Alternatively select it, then press CTRL-x (cut to buffer) and the ESC. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
If I delete, the create space is filled with copper and if I make a o to recreate the rat, then when I use line to recreate the connection, the copped stays and I do not have have the rigth connection. Check under the Settings menu and make sure that New lines, arcs clear polygons is set. If that is set then the line should clear the polygon as you go, else it will connect directly to the polygon. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Drill guide
I really see a pad in a pad. Or better an inner ring in a ring. Unusual, that's the old drill helper. The new one just has the little white spot in the middle, not the white ring also. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: DIY thermographic camera?
I second that thought. Except Sensitivity of silicon is fairly low for UV light should be Sensitivity of silicon is fairly low for IR (infrared) light There are some IR sensors that work at 3-5 micrometer wavelengths, but they are really more sensitive to things at hotter temperatures. The best ones for objects at around room temperature are in the 8-12 micrometer band. I have seen both side by side at demonstrations for the military (German Army), and 8-12 is better for looking at a field for people and vehicles. Unfortunately 8-12 systems is are more expensive than 3-5 systems, which are more expensive than light or near infrared you get from a camcorder. Expect to spend around 7-10 K$ for a little 8-12 camera. On Wed, 2008-11-05 at 19:25 +, Kai-Martin Knaak wrote: On Wed, 05 Nov 2008 10:01:37 -0500, Randall Nortman wrote: ould one get reasonably useful results from a hacked camcorder or digital camera with appropriate filters? Short answer: No. Long version: The light detector in consumer camcorders and cameras is based on silicon. Sensitivity of silicon is fairly low for UV light, rises towards the red end of the spectrum. It peaks at 950 nm and drops like a rock when going further to the infrared. However, the wavelength of heat radiation of houses is an order of magnitude larger (about 10 µm). The photo diode is essentially insensitive to this kind of radiation. ---(kaimartin)--- -- Kipton Moravec AE5IB Always do right; this will gratify some people and astonish the rest. --Mark Twain ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb component layers
Going back to this, who are the active PCB developers? I'm one... If I want to start a discussion to flesh this (or any other feature) out, should I just post to the gEDA developers list? Yes. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
And how do I remove copper ? I know how to add copper, but not how to remove ! I don't really understand what you mean. Do you mean delete lines and polygons? Just hold the pointer over what you want to delete and then press delete. If you want to delete whole selections, then select what you want to delete, type : and then delete and press enter. Alternatively select it, then press CTRL-x (cut to buffer) and the ESC. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: remove copper
Hello, After I have made a ground plane, how can I remove a little bit of copper, like a square shape ? Regards. -- --- == Patrick DUPRÉ | | Department of Chemistry| |Phone: (44)-(0)-1904-434384 The University of York | |Fax: (44)-(0)-1904-432516 Heslington | | York YO10 5DD United Kingdom | |email: [EMAIL PROTECTED] == ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: remove copper
After I have made a ground plane, how can I remove a little bit of copper, like a square shape ? Some ways: 1. Draw lines that clear the copper, but this leaves lines around. 2. Add more corners to go around the hole. 3. split the polygon into two, one on each side of the hole. PCB doesn't have a negative copper tool, if that's what you're asking for. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
Am Donnerstag, den 06.11.2008, 08:41 -0500 schrieb Ethan Swint: This is standard practice in mechanical CAD packages - which also provide several boolean operations to overlapping geometries - AND, OR, XOR, etc. - which then generate a consolidated geometrical object (in the case of an AND or OR) or multiple objects (in the case of an XOR). This would be a wonderful feature in PCB, but I'm sure it would take a fair effort in the generation of gerber files. -Ethan Is this really related to gerber output? PCB program already has arbitrary shaped copper polygons. Your mentioned AND, OR, XOR operations will again generate copper polygons -- so it should be possible to handle negative stuff inside pcb program, without concerning gerbers. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: From on side to the other one
Hello, is their a way to move a component from one side to the other one just as is, no flip, no rotation. Regards -- --- == Patrick DUPRÉ | | Department of Chemistry| |Phone: (44)-(0)-1904-434384 The University of York | |Fax: (44)-(0)-1904-432516 Heslington | | York YO10 5DD United Kingdom | |email: [EMAIL PROTECTED] == ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: From on side to the other one
is their a way to move a component from one side to the other one just as is, no flip, no rotation. Sorry, no. Why do you want to do this? (I'm not being sarcastic, if you explain what you're trying to accomplish, we can figure out how to get there). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
Is this really related to gerber output? PCB program already has arbitrary shaped copper polygons. Your mentioned AND, OR, XOR operations will again generate copper polygons -- so it should be possible to handle negative stuff inside pcb program, without concerning gerbers. Only a hypothesis - I'm not active on the PCB development side, so I'm not sure what obstacles there are to constructive geometry techniques. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
Hi Ethan and all, On Thu, 2008-11-06 at 13:18 -0500, Ethan Swint wrote: Is this really related to gerber output? PCB program already has arbitrary shaped copper polygons. Your mentioned AND, OR, XOR operations will again generate copper polygons -- so it should be possible to handle negative stuff inside pcb program, without concerning gerbers. Only a hypothesis - I'm not active on the PCB development side, so I'm not sure what obstacles there are to constructive geometry techniques. IMHO, I would place my bets on replacing the original polygon with a series [0, 1, 2, ..., N] of new polygons describing the results of the boolean operations mentioned above. Modifying the existing polygon would probably become too cumbersome if new vertices need be added and holes (negative copper) in polygons to be defined in ways currently not feasible within the current pcb file format. Better generate a new positive copper polygon, and delete the existing one. Just my EUR 0.02 BTW: would the OR operation result in an overlapping polygons, would the AND operation result in the intersection of two polygons, and would the XOR operation result in negative copper (a.k.a. a hole) where two polygons were overlapping and leave positive copper where only one of the two former polygons touched the laminate ? Kind regards, Bert Timmerman. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: constructive geometry (was Re: final modification)
Bert Timmerman wrote: Modifying the existing polygon would probably become too cumbersome if new vertices need be added and holes (negative copper) in polygons to be defined in ways currently not feasible within the current pcb file format. Ah - back to the file format. ;) Would it be difficult to add in a final positive/negative argument to the polygon definition, which, if absent, defaults to positive? (I think I already know the answer, but yet I ask...) BTW: would the OR operation result in an overlapping polygons, would the AND operation result in the intersection of two polygons, and would the XOR operation result in negative copper (a.k.a. a hole) where two polygons were overlapping and leave positive copper where only one of the two former polygons touched the laminate ? The AND and OR of two overlapping polygons would both end up with a single, final polygon, e.g. square AND circle = a quarter circle; square OR circle = circle with a square protruding from it. XOR could result in a negative copper space, if one geometry is completely contained within the other; square XOR circle = square w/ circular hole (a la square pin for a component). Otherwise, the geometry would be broken into two new geometries, touching at the former intersection points, square XOR circle = 3/4 circle and all that's left of the square is an arrowhead shape. I wonder how the code presently handles the negative copper that results from a pad/track/via that has the clears polygon flag set? -Ethan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Slotting and visible power connections
On Nov 5, 2008, at 11:32 AM, Stefan Salewski wrote: One question to the professional: Are hidden power pins really useful today? It depends on the design. Sometimes I do a board where all of the 74XX logic runs on 3.3V. In that case, explicit power is a distraction, so just connect the incoming power to a Vcc symbol and make a note. Other times, each individual chip has a resistor on its power pin to protect against radiation-induced latchup, so explicit power pins are essential. And VLSI design gets you into a bunch of other issues. gEDA is a flexible toolkit, not a one-size-fits-all solution. Hurray! John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ [EMAIL PROTECTED] ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem symbol and PCB footprint for BTM-22x Bluetooth module
Hi All, I have prepared a gschem symbol, and PCB footprint for the Rayson BTM-22x Bluetooth modules (described e.g. here: http://www.kamami.pl/dl/btm222_datasheet.pdf ). You can find it here: http://www.ise.pw.edu.pl/~wzab/geda/gschem-symbols/BTM-22x.zip (in the page http://www.ise.pw.edu.pl/~wzab/geda/gschem-symbols you can find also other symbols I have created). -- HTH Regards, Wojtek Zabolotny ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: constructive geometry (was Re: final modification)
Hi all, On Thu, 2008-11-06 at 15:22 -0500, Ethan Swint wrote: Bert Timmerman wrote: Modifying the existing polygon would probably become too cumbersome if new vertices need be added and holes (negative copper) in polygons to be defined in ways currently not feasible within the current pcb file format. Ah - back to the file format. ;) Would it be difficult to add in a final positive/negative argument to the polygon definition, which, if absent, defaults to positive? (I think I already know the answer, but yet I ask...) Let me first say that I do not consider myself a pcb-developer :) I do not push code into the pcb CVS repository myself, I merely try to contribute with patches. And BTW I'd rather have somebody else have a look on my code before the forthcoming mayhem is only to blame on me :) And yes the pcb file format. When and if the pcb file format needs to be improved, it needs to be done :) Prior to that one can think up proper definitions of multi layered pad stacks, keepout and all sorts of other layers with special meanings etc. and polygons for negative copper pours and buried vias and hatching (thieving) and discuss those on the mailing list. If you think it needs to be done, cook up a patch (or series of) and contribute to the SF trackers. After that you can advocate the pros and cons of new vs. existing on the geda-dev list with __real__ arguments. Yeah, I know, this will keep you busy for a couple of hours. BTW the pcb file format change subject rears it's head every now and then (almost twice a year) on the geda-dev list (for some reason or another when the leaves on trees start to fall/grow). Just my EUR 0.02 Kind regards, Bert Timmerman. BTW: would the OR operation result in an overlapping polygons, would the AND operation result in the intersection of two polygons, and would the XOR operation result in negative copper (a.k.a. a hole) where two polygons were overlapping and leave positive copper where only one of the two former polygons touched the laminate ? The AND and OR of two overlapping polygons would both end up with a single, final polygon, e.g. square AND circle = a quarter circle; square OR circle = circle with a square protruding from it. XOR could result in a negative copper space, if one geometry is completely contained within the other; square XOR circle = square w/ circular hole (a la square pin for a component). Otherwise, the geometry would be broken into two new geometries, touching at the former intersection points, square XOR circle = 3/4 circle and all that's left of the square is an arrowhead shape. I wonder how the code presently handles the negative copper that results from a pad/track/via that has the clears polygon flag set? -Ethan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: remove copper
On Thu, 2008-11-06 at 11:12 -0500, DJ Delorie wrote: After I have made a ground plane, how can I remove a little bit of copper, like a square shape ? Some ways: 1. Draw lines that clear the copper, but this leaves lines around. 2. Add more corners to go around the hole. 3. split the polygon into two, one on each side of the hole. PCB doesn't have a negative copper tool, if that's what you're asking for. I have a patch which adds that functionality (it mis-uses the hole flag to indicate that a polygon isn't drawn, and uses it to clear away other polygons... made vague sense to me at the time, its a hole in the polygon, but perhaps I ought to make a new flag if this feature were ever merged) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: final modification
On Thu, 2008-11-06 at 21:08 +0100, Bert Timmerman wrote: Hi Ethan and all, On Thu, 2008-11-06 at 13:18 -0500, Ethan Swint wrote: Is this really related to gerber output? PCB program already has arbitrary shaped copper polygons. Your mentioned AND, OR, XOR operations will again generate copper polygons -- so it should be possible to handle negative stuff inside pcb program, without concerning gerbers. Only a hypothesis - I'm not active on the PCB development side, so I'm not sure what obstacles there are to constructive geometry techniques. IMHO, I would place my bets on replacing the original polygon with a series [0, 1, 2, ..., N] of new polygons describing the results of the boolean operations mentioned above. I might go for the idea of adding the ability to define polygon shapes with holes in them though, however I did manage to make this work with one polygon, and an anti-polygon (polygon with a flag specified). I then used the same mechanism which clears holes in polygons around pads, etc.. to clear a holes in the shape of the anti-polygon(s). Modifying the existing polygon would probably become too cumbersome if new vertices need be added and holes (negative copper) in polygons to be defined in ways currently not feasible within the current pcb file format. Actually its pretty easy. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: remove copper
On Fri, 2008-11-07 at 01:01 +, Peter Clifton wrote: On Thu, 2008-11-06 at 11:12 -0500, DJ Delorie wrote: PCB doesn't have a negative copper tool, if that's what you're asking for. I have a patch which adds that functionality (it mis-uses the hole flag to indicate that a polygon isn't drawn, and uses it to clear away other polygons... made vague sense to me at the time, its a hole in the polygon, but perhaps I ought to make a new flag if this feature were ever merged) I over-loaded the join flag on polygons to set the behaviour as well. Possibly an undesirable over-loading, but allowed me to prove the concept without a lot of extra coding. The patch is here: http://repo.or.cz/w/geda-pcb/pcjc2.git?a=commitdiff;h=2bd2dcaec36093c1aa10cef62e2a96240dcbf346 -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
