Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread al davis
On Thursday 19 March 2009, Stuart Brorson wrote:
 I am unhappy to announce that the gEDA Project's application
 to the Google Summer of Code was turned down this year.

Gnucap will be participating as part of the GNU project.

GNU participates as an umbrella organization, and also has 
several projects that were in SoC on their own.  Some of those 
were turned down, which really means they are absorbed under 
the umbrella.


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gEDA-user: symbol

2009-03-20 Thread Levente

Hi,


I've created a symbol using tragesym. When I place the symbol on my 
schematic, end press `ve` sequence gschem zooms a waay out. So I suspect 
that there is something wrong with my symbol. There might be some hidden 
element in it. I've opened with a text editor, but found nothing. The 
symbol is attached. Could anyone check it?


Thanks,
Levente


PIC24FJ128GA008.sym
Description: application/geda-symbol


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Re: gEDA-user: sd card

2009-03-20 Thread gene glick
DJ Delorie wrote:
 Anyone done any sd-card designs?  Looking for symbols, footprints,
 connector recommendations, schematics, anything I can leech off you :-)
 
 Note: SD, not mini- or micro-SD.  Surface mount preferred.
 

I've got one that I'm working on right now.  It's not tested so you get 
what pay for :)

http://www.geocities.com/fazool1_2000/geda/sdCardExample.tgz

I made a self contained folder that should have everything you need to 
open the schematic.

micro_pg6.sch  sample schematic containing the SD card.
I included my PCB footprint, the gschem symbol, and the datasheet.  Last 
I looked, this part is stocked at digikey and they are very inexpensive.


gene


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Re: gEDA-user: symbol

2009-03-20 Thread Stefan Salewski
On Fri, 2009-03-20 at 11:26 +0100, Levente wrote:
 Hi,
 
 
 I've created a symbol using tragesym. When I place the symbol on my 
 schematic, end press `ve` sequence gschem zooms a waay out. So I suspect 
 that there is something wrong with my symbol. There might be some hidden 
 element in it. I've opened with a text editor, but found nothing. The 
 symbol is attached. Could anyone check it?
 

Same strange zooming (ve) here with gEDA/gschem version 1.4.3.20081231

Your symbol is v 20060113 1 1

so you really should consider updating your tragesym/gschem.

This message is in log window:

Found an improper attribute: _documentation=_
Found an improper attribute: _description=_

I do not know enough about symbol file format to see a bug -- what I
would try: Delete portions of the symbol (with texteditor or gschem) to
isolate the problem.





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Re: gEDA-user: symbol

2009-03-20 Thread Stefan Salewski
On Fri, 2009-03-20 at 14:43 +0100, Stefan Salewski wrote:

 
 I do not know enough about symbol file format to see a bug -- what I
 would try: Delete portions of the symbol (with texteditor or gschem) to
 isolate the problem.
 

OK, it is very easy:

You have 

B 400 400 9000 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 9400 8900 8 10 1 1 0 6 1
refdes=U?
T 4700 4500 9 10 1 0 0 0 1

T 4700 4800 5 10 0 0 0 0 1
device=PIC24FJ128GA008

Something like text position without a text string.

Try removing

T 4700 4500 9 10 1 0 0 0 1






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Re: gEDA-user: PCB footprints

2009-03-20 Thread Stefan Salewski
On Fri, 2009-03-20 at 11:03 +0530, vsrk sarma wrote:
 I suppose the problem will not show when DB25-1.sym and
 DB25f.fp are  used without editing.
My requirement is a 21 pin connector which has staggered pins like
DB25 but with numbered serially i.e. staggered, unlike DB25, which has
row-wise numbering. Also pin spacing is 100 mil instead of 50 mil in
DB25. So, I tried editing coordinates and numbers in the 25f.fp file.
This did not match with numbering in symbol file which was also
edited, suitably.
Finally relocating Pin  ElementLine in the order of pin
numbers(desired) and changing the numbers in quotes also in the same
order, worked as solution. Iam attacing both the edited files. I
request  help confirming this editing has no loopholes.
BTW, is there simillar connector in newlib folder. I do not notice
any.
My versions are gEDA/gschem version 1.4.0.20080127  PCB version
20080202, default package version of Ubuntu 8.10. Will upgrading to
1.4.3 help?
vsrk sarma
 

I do not fully understand your problem.

If you have to use an other device, you have to modify the footprint.
You have done this. Have you done this with pcb or with a texteditor?
Modifying pinnumbers is easy with texteditor, moving pins needs
calculations.

Maybe your problem is this: The shape of gschem symbols has absolutely
no meaning for the pcb layout. The connection is done only by pinnumber.
A pin in symbol with pinnumber 7 is related to pin 7 in footprint
file. If you connect something to pin 7 in the schematic by a net,
then this connection is mapped to the footprint pin. Only by pinnumber,
not by shape.

Maybe one of the other subscribers to this list will understand your
problem better and will answer your later.

Best regards

Stefan Salewski




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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Kai-Martin Knaak
On Thu, 19 Mar 2009 14:51:27 -0500, John Griessen wrote:

 Google interest could be movie related...but as is, BRLCAD looks verrry
 eighties

Ack. I looked into brlcad, and found it next to unusable when compared 
with a modern 3D CAD application. Although I strongly prefer FOSS, I bit 
the bullet and went for a commercial solution. The project certainly made 
it into GSoC along with blender, because it promises to produce elements 
of a virtual reality. 

By the way, when are the results of the 2008 projects expected to hit 
main stream testing? The autorouter looked quite promising. What about 
the project manager?

---(kaimartin)---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get



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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Stefan Salewski
On Fri, 2009-03-20 at 15:25 +, Kai-Martin Knaak wrote:
 
 By the way, when are the results of the 2008 projects expected to hit 
 main stream testing? The autorouter looked quite promising. What about 
 the project manager?

Hello,

I was going to ask the same yesterday...

Did some searching about the 2008 projects yesterday, found not much. Of
course one of the problems of summer of code is that people may work for
a few weeks on a project, and then the project dies. (I know this from
university projects, i.e. related to the fine programming language
Oberon...)

I hope the topological autorouter is still alive?

Best regards

Stefan Salewski
  



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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Anthony Blake
Stefan Salewski wrote:
 On Fri, 2009-03-20 at 15:25 +, Kai-Martin Knaak wrote:
 By the way, when are the results of the 2008 projects expected to hit 
 main stream testing? The autorouter looked quite promising. What about 
 the project manager?
 I hope the topological autorouter is still alive?

I've been pretty slack, and have not had much time to put into it, but 
I'm not going to stop working on it (please keep hassling me for 
progress!).

In the last few months I made the switch  to GNU GTS, and completed most 
of the code which will handle SMT constraints and so on. I want to add 
code to handle a few peculiar cases in a more general way (e.g., square 
pins inside pads with a collinear edge). There is a small bug in GTS 
which needs a fix for my code to compile. I sent a patch off to the 
maintainer over a month ago, but haven't heard anything back yet, so I'm 
not sure about what to do next there.

I am really surprised that projects such as BZFlag were accepted to the 
GSoC and gEDA was not.

-Anthony


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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Stefan Salewski
On Sat, 2009-03-21 at 05:16 +1300, Anthony Blake wrote:
 but 
 I'm not going to stop working on it (please keep hassling me for 
 progress!).
 

I am glad to hear this.
I guess your router is really complicated stuff, so it will be difficult
for others to continue your project.

Best wishes

Stefan Salewski




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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Windell H. Oskay
 I've been pretty slack, and have not had much time to put into it, but
 I'm not going to stop working on it (please keep hassling me for
 progress!).

Yes yes yes!  I was at a meeting last night and showed several people your
screenshots.  One person said that they would switch from Eagle-- and
learn everything all over again --if there was a better autorouter like
this.

So, *please* keep up the good work!

-Windell


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Re: gEDA-user: sd card

2009-03-20 Thread DJ Delorie

Yup, just what I wanted.  Thanks!


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Re: gEDA-user: Symbol style recommendations

2009-03-20 Thread Steven Michalske

On Mar 19, 2009, at 8:41 PM, Mark Rages wrote:

 2009/3/19 Peter TB Brett pe...@peter-b.co.uk:
 On Thursday 19 March 2009 21:58:59 Josh Jordan wrote:
 I prefer to use actual pinouts in my schematics for two reasons:  
 It helps
 you with chip placement because naturally you will tend to place  
 symbols
 and lines to get the fewest line crossings.  Going to layout after  
 you have
 already decided the best general position for parts makes it much  
 easier.
 The second reason is that later on it will be easy to look back to a
 schematic that has a similar layout as the board and the same  
 pinouts.

 We'll have to agree to disagree. When I look at a schematic, I want  
 to be able
 to quickly and easily work out what the circuit is designed to do,  
 and having
 the pins on my symbols arranged by function and bus offset rather  
 than by
 physical position helps a great deal.

 What you're doing completely defeats the point of having separate  
 schematic
 and layout diagrams, IMHO.

 What do you do about parts that have different pinouts depending on  
 what
 package they're in?

Peter

 Of course you use the place the part on the schematic with the pinout
 you are using.

 When you are troubleshooting a circuit with a scope or analyzer, it
 adds an extra decoding step to have the pin order scrambled.  And it
 really is annoying when you're trying to look at the schematic to see
 where your 64-pin micro has an unused pin free.

I always use a layout with proper netnames when working off of a  
board,  then got to the schematic for the general idea.

it's easy to find extra I/Os when you name its net spare_IO_x

selected them in the netlist and highlight them in layout,  really  
easy :-)   cause I hate counting pins or balls.


This argument works for low pin count parts, it fails with high pin  
count parts.


For FPGA's we make customized symbols when the pinout of the device is  
I/O mapped.



 The usual problem with having the pins in IC-order is this big rat's
 nest of wires running around the chip to get to the pin.  But a better
 solution than moving the pins around is using named nets / ports.
 This also helps make the intended function of the circuit more
 explicit.

 Regards,
 Mark
 markra...@gmail
 -- 
 Mark Rages, Engineer
 Midwest Telecine LLC
 markra...@midwesttelecine.com


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Re: gEDA-user: gsch2pcb output file does not load on pcb

2009-03-20 Thread vincent Onelli

 From: DJ Delorie d...@delorie.com
 Subject: Re: gEDA-user: gsch2pcb output file does not load on pcb
 To: geda-user@moria.seul.org
 Cc: geda-user@moria.seul.org
 Message-ID: 200903170110.n2h1arg4028...@envy.delorie.com
 
 
 Right, the parser is seeing (for example) 0603.fp and converting the
 0603 to the new footprint, leaving the rest of the line intact.
 
 Also, avoid using - in footprint names.  It's a special character in
 M4; use _ instead.

I did not get an answer on how to get around or to disable the m4, so I
delete the m4 directory, it cure the problem, I completed the pcb. 
Now I need help for the next step, photo plot. In the pcb manual
instruct to choose printer layout from the file menu, but when I get
to printer dialog box I do no have all the selection that is called for,
Gerber,drillhelper, alignment, are not there. I typed gerber in place of
lpr  but when I click on OK nothing happens. I try with lpr and printed
about 10  pages of various of layout, maybe I have some thing missing
here?
Please Help. Thank you 
Vinny   



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Re: gEDA-user: gsch2pcb output file does not load on pcb

2009-03-20 Thread DJ Delorie

Choose File-Export instead.

Have you gone through the pcb tutorial at
http://www.delorie.com/pcb/docs/gs/ ?


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Re: gEDA-user: How to fit REFDES on PCB with Hierarchy

2009-03-20 Thread gene glick
Is it ok to use . as the delimeter in the hierarchy name?  For example 
S6.S2.C2

The . uses up sooo much less room than the / and I think it reads 
kind of nice.

gene



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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread John Griessen
Anthony Blake wrote:
 I've been pretty slack, and have not had much time to put into it, but 
 I'm not going to stop working on it (please keep hassling me for 
 progress!).

Hassle hassle.  I want it!  It looks fabulous to use!

 
 In the last few months I made the switch  to GNU GTS, and completed most 
 of the code which will handle SMT constraints and so on. I want to add 
 code to handle a few peculiar cases in a more general way (e.g., square 
 pins inside pads with a collinear edge). There is a small bug in GTS 
 which needs a fix for my code to compile. I sent a patch off to the 
 maintainer over a month ago, but haven't heard anything back yet, so I'm 
 not sure about what to do next there.

Just tell me how to patch it and I'll test, then ask him to commit your patch 
also.

John Griessen
-- 
Ecosensory   Austin TX


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Re: gEDA-user: Bad news about gEDA's participation in GSoC 2009

2009-03-20 Thread Dan McMahill
Anthony Blake wrote:
 Stefan Salewski wrote:
 On Fri, 2009-03-20 at 15:25 +, Kai-Martin Knaak wrote:
 By the way, when are the results of the 2008 projects expected to hit 
 main stream testing? The autorouter looked quite promising. What about 
 the project manager?
 I hope the topological autorouter is still alive?
 
 I've been pretty slack, and have not had much time to put into it, but 
 I'm not going to stop working on it (please keep hassling me for 
 progress!).

Any chance of committing what you have?  If nothing else it ups the bus 
number, but maybe it will help generate some more excitement about it.

 In the last few months I made the switch  to GNU GTS, and completed most 
 of the code which will handle SMT constraints and so on. I want to add 
 code to handle a few peculiar cases in a more general way (e.g., square 
 pins inside pads with a collinear edge). There is a small bug in GTS 
 which needs a fix for my code to compile. I sent a patch off to the 
 maintainer over a month ago, but haven't heard anything back yet, so I'm 
 not sure about what to do next there.
 

I sent the GTS maintainer an email at least that long ago too with a few 
minor patches and promised some more if I knew the project was still 
alive.  I also heard nothing back.  I wonder if the maintainer could be 
persuaded to try recruiting some extra developers.  Stefan did that with 
gerbv and Julian really stepped up to the plate with it.

-Dan


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