Re: gEDA-user: Adding options for manufacturer
Hi, On 5/27/10, Jose Luis Diaz Bernabe jldiazm...@gmail.com wrote: I'm new in PCB, and PCB manual suggested use vendor file to specify set of sizes for a PCB manufacturers. But I'd like to know how change defaults of individual layers gerbers as: top layer: mirror; units: mm, etc. and produce it? Too I'd like to know how to add options to drills files: supress LZ, presicion, absolute, etc.? Some options are supported by the patchset at http://repo.or.cz/w/geda-pcb/dti.git/shortlog/refs/heads/gerber. they are not going to be merged mainstream because the feature is rarely useful and often confusing (there also was some discussion at http://sourceforge.net/tracker/?func=detailaid=2156903group_id=73743atid=538813). Hope that helps ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.
On Thu, May 27, 2010 at 10:57 PM, Ineiev ine...@gmail.com wrote: Robert Spanton rspan...@zepler.net wrote: The key word being if. If and when the issue arises, then we fix it. In other words, you are willing to break it and won't fix. It's not exactly one way or the other, but I believe this falls more under the You Aren't Gonna Need It category than the breaking it category. Robert has already pointed out that PCB currently won't build without a C99 compiler (because of the c++ style comments, and I'd be willing to bet a few other things). Why add complexity to the code for unneeded and half-way features (the feature here being non-c99 compatibility). If you need the feature, you can add it when you need it. I'll grant that replacing Boolean with bool takes it further away from being non-c99 compatible, which could be seen as breaking it further if non-c99 compatibility is what you want. However, it has plenty of advantages, that he has pointed out, that IMHO out weigh that negative. In addition, if one were to aim for non-c99 compatibility, the AC_HDR_STDBOOL way is arguably the right way to do it, so this patch takes the code part of the way there anyway. Why not apply it to your local branch instead of PCB master? Because it's annoying to maintain a local patch set, and one of the great things about open-source software is the community contributing back and making the code/program better. Robert provided the script and the git filter-branch tip to make it easier for those with local change-sets to avoid the conflicts if this were committed to the main repo by removing all the conflicts in one easy step. Jared ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.
*barf* I've never liked C++-style comments. Just my opinion, worth every penny you pay for it. ;) Many compilers forbid nested comments, so I use // if I suspect I may want to comment out a code block with its comment - nearly everywhere ;-) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Still confused on using PCB to make footprints
DJ Delorie wrote: However, if PCB can find your footprints in the library window, try using the new importer (File-Import Schematics). I've not tried that yet. Any chance it will work with flattened hierarchic named schematics with repeated subschematics? John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PolyStitch plugin
DJ Delorie wrote: I needed to do some logos, so everyone gets a logo tool :-) It can also be used to cut holes in a ground plane, by drawing the hole as a separate polygon then stitching it to the plane's polygon. Thanks DJ. Having stitched shapes that will be selectable/draggable with one aim and click is a great new feature. John ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Still confused on using PCB to make footprints
I've not tried that yet. Any chance it will work with flattened hierarchic named schematics with repeated subschematics? It supports whatever gnetlist supports. It just doesn't use gsch2pcb to do the merge. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Still confused on using PCB to make footprints
On Thu, 27 May 2010 10:03:27 -0700, Mike Bushroe wrote: Could someone explain to me how to create a footprint in PCB with pins and assign names/numbers to them? Karel Kullhavy compiled a comprehensive howto here: http://ronja.twibright.com/guidelines/footprints.php There is a link to the howto in the geda wiki: http://geda.seul.org/wiki/geda:pcb_tips#how_do_i_draw_a_new_footprint ---)kaimartin(--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: [PATCH] gnetlist, (any)spice, and variable resistors on schematics
Hello I created quite hackish way to convert-on-fly variable resistors placed on schematic to two resistors on netlist for spice backend, to allow use variable resistor with two attributes, one named value and with expected meaning, and second wiper which is 0 wiper 1, used to calculate which side of pot goes to which resistor. It isn't best code, won't work with value=3k3, because code which extract unit suffix will stop at 'k' character, thus selecting 3 as value, k3 as unit, thus values will be produced using (wiper * 3) and then stringified and k3 appended, and (1-wiper) * 3 and stringified then k3 appended for second one, but 3Meg should work as expected. Feel free to fix it. best regards Maciej -- Maciej Pijanka I don't fear computers, I fear lack of them -- Isaac Asimov diff -Nur gnetlist.ori/scheme/gnet-spice-sdb.scm gnetlist.mod/scheme/gnet-spice-sdb.scm --- gnetlist.ori/scheme/gnet-spice-sdb.scm 2010-05-28 23:57:48.0 +0200 +++ gnetlist.mod/scheme/gnet-spice-sdb.scm 2010-05-29 00:03:35.0 +0200 @@ -1310,6 +1310,127 @@ ) ;; close of lambda ) ;; close of define +;; +;; Set of routines that allow to convert-on-fly variable resistors on +;; schematics to two resistor with apreciate values on netlist +;; 2010-05-27 - Maciej 'agaran' Pijanka +;; +;; Given a value it extract part of string which is a number in value +;; but will fail on 2k2 or similar (sorry, no fix idea yet) +;; +(define spice-sdb:value-number-extract + (lambda (value) +(let* ( + (value-length (string-length value)) + (value-cut (substring value 0 (- value-length 1))) + (value-tail (substring value (- value-length 1))) + (value-number (string-number value-cut)) + ) ;; End of local assignments + +;;(debug-spew (string-append At extract (number-string value-length) \n cuted = value-cut \n)) + +(if (not value-number) + (set! value-cut (spice-sdb:value-number-extract value-cut))) + +(string-append value-cut) + ) ;; end of let + ) ;; close of lambda +) ;; close of define + + +(define spice-sdb:value-multiplier + (lambda (value coef) +(let* ( + (value-number-string (spice-sdb:value-number-extract value)) + (value-tail (substring value (string-length value-number-string))) + (value-number (string-number value-number-string)) + ) ;; End of local assignments + +(string-append (number-string (* value-number coef)) value-tail) + ) ;; end of let + ) ;; close of lambda +) ;; close of define + +;; +;; Given a refdes and pin number, this writes out the net attached to the +;; component's pin. Used only in write variable resistor. Call it with +;; component refdes and number of pin to print +;; this is hacked from write-net-names-on-component, and probably it could +;; use this procedure to do actual writing (no idea if that makes sense) +;; +(define spice-sdb:write-net-name-on-component + (lambda (refdes number-of-pin port) +(if ( number-of-pin 0) + (begin +;; generate a pin-name e.g. pin1, pin2, pin3 ... +(let* ((pin-name (number-string number-of-pin)) + (pinnumber (gnetlist:get-attribute-by-pinseq refdes pin-name pinnumber)) + (pinseq (gnetlist:get-attribute-by-pinseq refdes pin-name pinseq)) + (netname (car (spice-sdb:get-net refdes pinnumber)) ) + ) + +;; --- Super debug stuff + (debug-spew In write-net-name-on-component. . . . \n) + (debug-spew (string-append pin-name = pin-name \n)) + (debug-spew (string-append pinnumber = pinnumber \n)) + (debug-spew (string-append pinseq = pinseq \n)) + (debug-spew (string-append netname = netname \n)) +;; -- + + (if (not (string=? netname ERROR_INVALID_PIN)) + (display (string-append netname ) port) ;; write out attached net if OK. + (debug-spew (string-append For refdes , found pin with no pinseq attribute. Ignoring. . . .\n)) + ) +) ;; let* + );; begin +) + ) +) + + +(define spice-sdb:write-variable-resistor + (lambda (package port) +;; fetch attributes.. +(let ((value (gnetlist:get-package-attribute package value)) + (wiper (gnetlist:get-package-attribute package wiper)) + ) ;; end of local assignments + +(debug-spew (string-append Found Variable resistor, refdes = package \n)) + +(if (string=? wiper unknown) + (set! wiper 0.5)) + +(debug-spew (string-append Value = value \nwiper = wiper \n )) + +(set! wiper (string-number wiper)) +(if (not wiper) + (set! wiper 0.5) +) + +;; at first fixed refdes +(display
Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.
Hello,
I wrote:
I forgot to mention that this script can be used with git filter-branch.
If one has some existing commits that haven't been pushed, one can
convert them over to bool like so:
git filter-branch --tree-filter rename-bool.sh HEAD...${HASH}
Ineiev wrote:
Why not apply it to your local branch instead of PCB master?
I have, and it works well here :-D It'd be great if my patch could be
merged in.
Are there outstanding technical issues with this patch? I think we've
worked through all those that have been highlighted.
Cheers,
Rob
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gEDA-user: gsch2pcb to pcb error
John, thanks for the advice on input/output connections. Last year when I did this, I rolled my own H-Bridge motor drivers, and used hierarchy. This year I am simplifying things a little, and using the Solarbotics 2AMP Dual motor drivers instead. Hierarchy still would have work well in most spots, but sometime the page was too small. However, I found that if used the same name with with different numbers after the colon, it did not work. I saw the suggestion to run gnletlist with drc2 and looking at the output I could see many connections to nets named OUTPUT and INPUT, so clearly I was not using the connection symbols correctly. It took much trial and error to discover that I should not have a device type other than none (otherwise it wanted a footprint for the connection), and that the critical attribute was net, not netname or refdes. And that I needed a unique text string before the colon for each separate signal. And that it did not matter whether I used input/output symbols 1, 2 or 3. That took several hours last night and today to iron out, but now the netlist looks good, and drc2 only reports expected errors (test points have pintype input/output, which conlicts with output pins, Reset in a net causes it to be listed as undriven, etc.) Now I have a clean set of schematics, with all the multiply referenced parts given new part numbers (next I will know to just not bother putting refdes numbers on each part and run refdes afterward and let IT keep track of what has been used and what hasn't!) I have run gsch2pcb with double verbose redirected into log files and checked everything there. I still NEVER managed to get any footprint libraries added, even after using gafrc in /gaf, gafrc in /motherboard, setting the PCBLIBPATH environment variable to include them, or putting element-library and element-dir commands in the project file. No matter what I did, the double verbose list of all the directories checked for the custom footprints never varied from /usr/share/pcb! The _only_ way I could fix it was to copy the custom footprints to /usr/share/pcb/pcblib-new/geda. even though that is a write protected folder. However, something worked right on the symbol side, so the custom symbols could remain in /gaf/symbols. Once I moved all the footprints into /usr/share/pcb and got gsch2pcb to find a footprint (element) for every symbol, I tried running pcb. However, that failed every time. I opened up the .new.pcb file and found something strange. the first few elements were formatted like this: Element(0x00 SIP2 CONN18 Video Center 160 10 3 100 0x00) ( Pin(50 50 60 28 1 0x101) Pin(50 150 60 28 2 0x01) ElementLine( 0 50 0 150 20) ElementLine(100 50 100 150 20) ElementLine( 0 100 100 100 10) ElementArc(50 50 50 50 180 180 20) ElementArc(50 150 50 50 0 180 20) Mark(50 50) ) But the pcb log window indicated an error at line 63, and the element there was formatted differently, like this: Element(0x00400 0 0 100 0x00) ( Pin(100 200 60 30 1 0x101) Pin(300 200 60 30 2 0x01) ElementArc(200 200 200 200 0 360 10) Mark (100 200) ).fp(RCY200.fp,C26,150pf) I found that if I hand edited the .pcb file to cut and past the footprint name, refdes, and value into the element line, and then delete everything that trailed the closing parenthesis, the file error moved further down. And looking through the file I see a mix of both formats. Is there any way to re-run or process the file to convert every element into something that pcb will recognize? Or do I need a newer version, that apt-get does not know about? If I have to edit the whole file, it will take some time. But my scripting and Python skills are a bit weak to whip up a script to read each element in, check for trailing details, and move them into the first line then spit out the corrected element and get the next.There are over 4000 lines in the .pcb file, so it will take awhile to hand process. Once again I have to ask for help. Any suggestions? # release: pcb 1.6.3 gsch2pcb version 1.6 Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PolyStitch plugin
On Fri, 2010-05-28 at 01:33 -0400, DJ Delorie wrote: I needed to do some logos, so everyone gets a logo tool :-) [snip] It can also be used to cut holes in a ground plane, by drawing the hole as a separate polygon then stitching it to the plane's polygon. I'd caution against such usage, as the stitching will break proper polygon trimming and possibly connectivity scanning. (More details on geda-dev). Use for logos should be fine - although might cause asserts with PCB built for debugging. The stitching rather relies on a corner case of polygon support, so let us know if you encounter any bugs.. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
I still NEVER managed to get any footprint libraries added, even after using gafrc in /gaf, gafrc in /motherboard, setting the PCBLIBPATH environment variable Those don't set the paths! You have to pass them to the file gsc2pcb reads, which I name *.prj. ).fp(RCY200.fp,C26,150pf) This means you have a fooprint with a subtaction (-) in the filename. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
I still NEVER managed to get any footprint libraries added, even after using gafrc in /gaf, gafrc in /motherboard, setting the PCBLIBPATH environment variable Those don't set the paths! You have to pass them to the file gsc2pcb reads, which I name *.prj. I forgot to mention I put several lines in the project file. I am still new enough to just call it 'project'. The file is: component-library /home/mike/gaf/symbols element-library /home/mike/gaf/packages element-dir /home/mike/gaf/packages schematics ATMega164P_motherboard.sch ROV_2010_analog.sch ROV_2010_power.sch ROV_2010_Hydraulics.sch ROV_2010_I2C.sch ROV_2010_subprocesser.sch ROV_2010_camera.sch output -name ROV-2010_motherboard ).fp(RCY200.fp,C26,150pf) This means you have a fooprint with a subtaction (-) in the filename. No subtaction in the file name, file, or footprint attribute. But I _did_ discover when reading the schematic files with gedit that some entries had TWO footprint attributes. When I ran gattrib this was not evident. They seem to be faster to find with gedit highlighting each 'footprint=' and just looking for two that are too close together. It would be nice if drc2 or gattrib would warn about this kind of problem. Mike ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb to pcb error
Are you footprints in the directories you indicate, or subdirectories of the directories you indicate? Are you running gsch2pcb project to use that project file? You might also have a file name that matches an M4 macro name. I like to put a suffix on mine to prevent that, like 0603dj.fp instead of 0603.fp. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
