gEDA-user: examples of edge connectors
Can someone point me to something on making gold-plated edge connectors? I'm trying to find the footprints and how to tell the fabber that gold needs to be there. -- David Griffith dgri...@cs.csubak.edu A: Because it fouls the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: examples of edge connectors
Just make regular pads and put them to the edge of PCB. Then tell them you either want ENIG coating for entire board (you do anyway if you're solderpasting) or ask to do gold fingers just for the edge connector part. You can also just leave them as bare copper, but that probably wont last long. On Thu, Jul 22, 2010 at 3:18 PM, David Griffith dgri...@cs.csubak.edu wrote: Can someone point me to something on making gold-plated edge connectors? I'm trying to find the footprints and how to tell the fabber that gold needs to be there. -- David Griffith dgri...@cs.csubak.edu A: Because it fouls the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: examples of edge connectors
http://www.gedasymbols.org/scripts/search.cgi?key=edge As for the gold, you probably include a note on the mechanical drawing saying this part needs to be gold. I suggest a phone call or email to ask them what they want you to say :-) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, 2010-07-22 at 02:13 -0400, gene glick wrote: I'm throwing this out to the list for opinions. . . This design has mixed analog and digital circuits. I do not know much about that, but I have seen a few discussions about that topic in Internet. My conclusion: General discussion makes not too much sense. You have to show your schematic and intended layout to smart experts, than they can tell you how to improve it. Often stupid partitioning of GND in digital and analog can generate much trouble, so one single low impedance ground plane can be a simple and not too bad solution. For my DAD/DSO board I used a 4 layer board with one ground plane, divided into analog and digital part, joined near the ADCs. I think that should be OK, but radiated noise (by air) may be a problem, ie. from FPGA and switching voltage regulators to analog amplifiers. So I have to shield the sensitive analog amplifiers by a tin cup. I think I will build the board in a few months, so I will learn more about noise coupling. Best regards Stefan Salewski ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
Often stupid partitioning of GND in digital and analog can generate much trouble, so one single low impedance ground plane can be a simple and not too bad solution. Yep. But a single plane *may* lead to stray currents flowing near sensitive analog stuff, like ADC and DAC. I don't want to degrade the performance of these parts. In fact, my analog gnd plane is sectioned as well, in order to isolate the high-current section from the low signal portion. Now that it's not 2 AM, and maybe I'm thinking a little more clearly, the ADC and DAC can be contained in one area, where the digital and analog gnd plane connects. Don't know why I didn't think of that before - that takes care of most of the high speed digital signals that transition between the two domains. That leaves some others, like I2C and pseudo-static control lines, which I am at a loss on the best routing methodology. Good luck with your design. The addage follow the currents works pretty well in figuring out if you will have trouble. Sort of like pretending your the electron, and see where you go. gene ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. I've used this approach on some relatively high-speed digital/analog/RF boards. Seems to work pretty well. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Jul 22, 2010, at 9:50 AM, Eric Brombaugh ebrombau...@cox.net wrote: On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. I've used this approach on some relatively high-speed digital/analog/RF boards. Seems to work pretty well. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, Jul 22, 2010 at 09:57:11AM -0700, Steven Michalske wrote: On Jul 22, 2010, at 9:50 AM, Eric Brombaugh ebrombau...@cox.net wrote: On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Now each side of this debate can call you a heretic -- that's a good thing! I'm generally on the single-ground-plane side of this fence, and the one time I ran into trouble, the solution was just as you describe. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) If you have _any_ signals crossing the slots, you're doing it wrong. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On 07/22/2010 09:57 AM, Steven Michalske wrote: Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) Good point - that's left as an exercise for the engineer. In my case these were 16-bit DAC data buses running at 250MHz, so a few extra inches in the return path could cause some noticeable distortion in the higher harmonics and splatter the edges. OTOH, this board has a 5-bit async attenuator control bus that pops about once an hour and we didn't give those any priority. Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, Jul 22, 2010 at 12:37 PM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P Yeah, Dilbert calls them 'anti-productivity pods' :D Seriously though, I like your idea except that sloted planes are generally frowned upon in the SI world - there's an opportunity for eddy currents to flow around the slot, and that will radiate. As long as no signals cross the slots on any other layers, maybe this is ok. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: examples of edge connectors
On Thu, Jul 22, 2010 at 3:18 PM, David Griffith dgri...@cs.csubak.edu wrote: Can someone point me to something on making gold-plated edge connectors? I'm trying to find the footprints and how to tell the fabber that gold needs to be there. -- David Griffith dgri...@cs.csubak.edu On Thu, Jul 22, 2010 at 2:56 AM, timecop time...@gmail.com wrote: Just make regular pads and put them to the edge of PCB. Then tell them you either want ENIG coating for entire board (you do anyway if you're solderpasting) or ask to do gold fingers just for the edge connector part. You can also just leave them as bare copper, but that probably wont last long. EING coating is not the same as the gold fingers process. EING will produce a very thin layer of gold (which is necessary for good solder joints, and also much cheaper than thick gold over the whole board). Using EING for an edge connector will provide little to no benefit as compared to a standard board. See this link for a reference on EING: http://www.ami.ac.uk/courses/topics/0143_cfng/index.html#2 which states: The ‘immersion gold’ plating process self-limits at around 0.05–0.1µm. Not only is this beneficial from the cost point of view, but this also reduces the possibility of gold embrittlement caused by the formation of a Au4Sn intermetallic phase. [Note that this process is not the same as that used to electroplate ‘gold finger’ edge connections]. On Thu, Jul 22, 2010 at 2:57 AM, DJ Delorie d...@delorie.com wrote: I suggest a phone call or email to ask them what they want you to say :-) Yup, probably the best plan. When you call, also ask if they bevel the edges for you - Most places will. -- Kevin Vermeer @David - Did I do the non-top-posting thing right? gmail seems to want to do it exactly wrong, and I want to avoid messing with this list (which seems to alternate between top-posting and not). This question can fork a new thread if it needs to, or just a PM if you want. First post, BTW. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
I came across this ([1]http://www.tentlabs.com/InfoSupport/page35/files/Supply_decoupling. pdf) some time ago. I would be interested to hear peoples thoughts as there are clearly many differing views on correct grounding and supply decoupling. The article certainly made a lot of sense to me and until proven otherwise it's the approach I follow. I understand why multiple ground planes seem attractive with the idea of somehow partitioning different current flows - but I have yet to see an implementation where this worked as intended. I have debugged circuits where there were as many as 4 separate ground planes and this certainly did not help the noise problems. I recognise that this is not enough to rule out the approach - just that the person designing didn't understand what they were doing. If someone has a design/layout that has *correctly* implemented split grounds etc I would be keen to have a look. Better yet if the design approach can be explained. This is one of those elements of practical electronic design that seems to be glossed over as assumed knowledge, and not necessarily very well taught. regards, Geoff On Fri, Jul 23, 2010 at 3:56 AM, myjunk stuff [2]carzr...@optonline.net wrote: On Thu, Jul 22, 2010 at 12:37 PM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P Yeah, Dilbert calls them 'anti-productivity pods' :D Seriously though, I like your idea except that sloted planes are generally frowned upon in the SI world - there's an opportunity for eddy currents to flow around the slot, and that will radiate. As long as no signals cross the slots on any other layers, maybe this is ok. ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.tentlabs.com/InfoSupport/page35/files/Supply_decoupling.pdf 2. mailto:carzr...@optonline.net 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Changing keyboard shortcuts (of Route Styles)
hellas! i don't like everything about gnome, but i really admire how setting keyboard shortcuts is implemented; sadly pcb does not save the changes one makes the gnome-way. anyway i changed a few shortcuts in my gpcb-menu.res file and it works fine. i would like to add a shortcut to select the different route styles (alt+1 - alt+4), but the res file does not add the styles directly but include them somehow (@routestyles)? please elaborate what is going on there. i guess i could remove that pointer and add the strings + actions + shortcuts myself? (i consider the different shortcut handling/defaults in gEDA and pcb as the most annoying thing in this software. not enough annoying to hack it myself though (sorry), but there was an urge to tell you (also in the name of a colleague of mine, who started to use gEDA/pcb a few weeks ago and finished a commercial project already. :) the rest is really nice, thank you all! i will never touch eagle again (which sux at keyboard shortcuts too)... ok i shut up already and go to sleep.) -- best regards, Stefan Tauner ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Changing keyboard shortcuts (of Route Styles)
The think about route styles and layers, is that the names change. The @thing is so that PCB can update the menus with the right names (and numbers of layers, and colors in lesstif). You can either hack the sources to include the key binding in that list, or add a second set of entries in the key bindings menu, which is for bindings not associated with a regular menu entry. Note that many window managers trap any Alt-whatever combination for their own uses. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
