Re: gEDA-user: the uber-scope (was: wishful UI)

2010-08-20 Thread Armin Faltl

Stefan Salewski wrote:

Indeed I was hoping for some support during the last two years, but
there was not much interest, some people with very limited skills in
electronics area contacted me, hoping for a very cheap device. But of
course I can not build large quantities, so costs can not be smaller
than similar commercial tools from china, so people are disappointed. I
do understand that.
  
I'm well aware (by now ;-) that building something from scratch is not 
the cheapo route

in many cases.

No, currently I do not need help, I have done schematics and layout very
carefully, learned VHDL, started design of a GTK GUI.
I'd help you if you used FLTK instead (and C++), actually I already got 
something called
'flscope' - it would need to be dual license though - well I can 
actually give you some code

without mentioning it's from me or whatever - or BSD.
That application uses 2 threads: one for the GUI and device control, the 
other to read
and store the data stream. Connection to a particular device is designed 
modular.


My personal interest in a homemade one would be something like a 
mainframe scope:
slot cards of potentially different type that communicate with the 
controller and memory
board via a highspeed bus, basically supplying a steady stream of time 
coded samples.
The master board sends a clock signal to all signal converters and info 
like settings

and start/stop.
For very fast signals, one could of course include local memory on a 
slot and transfer

data in bursts.
This should all be no problem with a bus like PXI (PCI eXtension for 
Instrumentation),
but I wouldn't use copper - I'd like to have a fiber bus for electrical 
insulation and
floating channels, so the power supply alone determines rated voltage 
(5kV - 20kV ?)

Should I really manage to burn a slot, 500-1000€ evaporate and not 1.
(an analog fiber connection from an active probe to the digitizer slot 
would be

cool as well)

 And I wrote my own
USB firmware some years ago. Currently I am doing some final checking of
schematics and layout, with minimal modifications. I indent to order
parts and two PCB prototype boards in harvest and intend soldering the
first prototype before end of this year. If that prototype works, than
there may be again room for support, for example for optimizing the VHDL
code, board firmware and communication with the PC, and finally
optimizing the user interface.
  
VHDL - thats specs for a silicon compiler, right? - so you are using 
ASICs in

hobby-project?

I will tell on my homepage and on this list when there is the first
working prototype -- hopefully before the end of this year.
  




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Re: gEDA-user: the uber-scope (was: wishful UI)

2010-08-20 Thread Peter Clifton
On Fri, 2010-08-20 at 12:37 +0200, Armin Faltl wrote:
 VHDL - thats specs for a silicon compiler, right? - so you are using 
 ASICs in
 hobby-project?

VHDL / Verilog is also used for developing with FPGAs.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: the uber-scope (was: wishful UI)

2010-08-20 Thread Oliver King-Smith
   The free FPGA compilers won't help much for an ASIC because they use
   the internal structure of the FPGA when compiling VHDL or Verilog.
   This doesn't exist on the ASIC.
   Oliver
 __

   From: Peter Clifton pc...@cam.ac.uk
   To: gEDA user mailing list geda-user@moria.seul.org
   Sent: Fri, August 20, 2010 6:39:56 AM
   Subject: Re: gEDA-user: the uber-scope (was: wishful UI)
   On Fri, 2010-08-20 at 12:37 +0200, Armin Faltl wrote:
VHDL - thats specs for a silicon compiler, right? - so you are using
ASICs in
hobby-project?
   VHDL / Verilog is also used for developing with FPGAs.
   --
   Peter Clifton
   Electrical Engineering Division,
   Engineering Department,
   University of Cambridge,
   9, JJ Thomson Avenue,
   Cambridge
   CB3 0FA
   Tel: +44 (0)7729 980173 - (No signal in the lab!)
   Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)
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References

   1. mailto:geda-user@moria.seul.org
   2. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user


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gEDA-user: alternate path for gnetlist scheme files

2010-08-20 Thread Matt Ettus
We have some local netlisters we used, and I would like to add
something to the gnetlistrc file to allow gnetlist to find them.   We
tried:

 (scheme-directory /path/to/scheme)

but that causes it to not find the files in /usr/share/gEDA/scheme
which are still needed.  Is there a way to specify multiple
directories?

Thanks,
Matt


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