Re: gEDA-user: PCB+GL Testers (please test)

2010-11-10 Thread Peter Clifton
On Tue, 2010-11-09 at 23:47 +, Peter TB Brett wrote:
 On Tue, 09 Nov 2010 23:08:15 +, Peter Clifton pc...@cam.ac.uk wrote:
 
  Try again now.. it is possible that I didn't have the correct patches
  pushed at that point. I was just pushing something out just now for
  someone at Intel to test (looking at a driver bug), so we might have
  collided.
 
 BTW, it can often be useful to use a tag rather than a branch when you have
 a specific commit that you want someone to check out and test.

;)

I don't tend to use tags very much. Probably because I would feel bad
deleting them eventually, yet I don't want a huge swathe of tag
history cluttering up my repositories.


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: Restrict facility?

2010-11-10 Thread Markus Hitter


Am 10.11.2010 um 06:09 schrieb DJ Delorie:


  a) There is no such facility.


This one.  We've been talking about a redesign to pcb's internals that
would allow support for this, but at the moment, we don't have it.


Isn't there the route layer? I've seen special handling of this  
layer in many source code files, but didn't test yet, what it  
actually does.



Markus

- - - - - - - - - - - - - - - - - - -
Dipl. Ing. (FH) Markus Hitter
http://www.jump-ing.de/







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Re: gEDA-user: Restrict facility?

2010-11-10 Thread Colin D Bennett
On Wed, 10 Nov 2010 00:09:50 -0500
DJ Delorie d...@delorie.com wrote:

 
a) There is no such facility.
 
 This one.  We've been talking about a redesign to pcb's internals that
 would allow support for this, but at the moment, we don't have it.

Could you emulate it in the current version of pcb by drawing a
rectangle/polygon on the area you wish to become the keep-out region?
Would the autorouter then avoid it?

Regards,
Colin


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Re: gEDA-user: pcb displays popup dialogs for messages instead of using log window

2010-11-10 Thread Colin D Bennett
On Wed, 10 Nov 2010 10:51:15 +1100
Stephen Ecob silicon.on.inspirat...@gmail.com wrote:

 On Wed, Nov 10, 2010 at 8:36 AM, Kai-Martin Knaak
 kn...@iqo.uni-hannover.de wrote:
  Colin D Bennett wrote:
 
  The startup messages are a little annoying,
  but when I hit 'o' and get a barrage of dozens of shorted net
  warnings, etc., it's basically unusable.
 
  I have installed many versions of pcb but have never seen this.
 
 Me neither.  Strange bug!
 
 On Wed, Nov 10, 2010 at 7:53 AM, Colin D Bennett co...@gibibit.com
 wrote:
  I've been using the pcb 2010-09-29 release (built from git sources
  on Ubuntu 10.04 amd64) and also now tried the latest git HEAD as of
  2010-11-07 and the problem remains.
 
 I've built and run 2010-09-29 from the sourceforge tarball and also
 recently built and run from git head.
 Both have been fine on my Fedora Core 13 x86-32 system.
 I also know that some community members are using Gentoo successully.
 So:
 
 * Anyone else out there running PCB on Ubuntu 10.04 ?
 
 * Anyone else out there running PCB on AMD64 ?
 
 If so, do you see this bug ?

Just to clarify in case any readers didn't see my other post in the
thread:  the problem is fixed and it was simply due to some stale
generated files in my build environment.  Doh!  I should have
double-checked that I did a clean build in a new directory before
posting to the list.

It's not a pcb bug, but it certainly was a weird experience.

Regards,
Colin


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gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread dfro
I want to try the latest release of pcb, but I am getting this compile 
error when I try the './configure' command:


checking for DBUS... no
configure: error: Cannot find dbus-1 = 0.61, install it and rerun 
./configure

Please review the following errors:
No package 'dbus-1' found

.

My OS is Ubuntu 10.04LTS. I looked in the repositories and there is no 
dbus-1. I have dbus installed. Any thoughts on how to fix this?


I am excited to try the new G-code exporter.

Thanks,
Dave


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Re: gEDA-user: PCB+GL Testers (please test)

2010-11-10 Thread Frank Bergmann

Am 10.11.2010 00:08, schrieb Peter Clifton:

Try again now..


Ok I did, but with no luck - seg. faults again with all options you 
mentioned.



PS. If you see crashes, I'm interested in the full backtrace. It might
be that the driver doesn't appreciate that I still have some buffer
mapped whilst I'm glClear'ing. (Although it should not care!).


You find the backtrace at

http://www.frajasalo.de/frank/projekt/pcb/gdb-pcb.local_customisation_no_pours-backtrace-20101110-1.txt

I hope it will help, even without the debugging symbols in the system 
stuff. In my former tests I only benchmark the program, so with deeper 
looking at it, I found some unexpected behavior:


On my AMD Mobility Radeon HD3450 (driver: radeonhd) system (debian, 
stable but old!) and your local_customisation_no_pours branch (without 
the recent patches) the line ends look wrong


http://www.frajasalo.de/frank/projekt/pcb/pcb.local_customisation_no_pours-20101110_amd4core.png

Is there option to enable such a view or is this an error? before_pours 
looks ok.


And on my Intel system I have disturbances comming like rays from the 
middle of the viewport/drawing area, see:


http://www.frajasalo.de/frank/projekt/pcb/pcb.local_customisation_no_pours-20101110_intel.ogv

This effect appears also with before_pours branch - this make me 
wondering because you are developing on an intel system if I understand 
right.


Frank.



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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Frank Bergmann

On 10.11.2010 21:36, DJ Delorie wrote:

Try ./configure --disable-dbus


or try installing package libdbus-1-dev



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Re: gEDA-user: Restrict facility?

2010-11-10 Thread Dietmar Schmunkamp
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

Am 10.11.2010 19:06, schrieb Colin D Bennett:
 On Wed, 10 Nov 2010 00:09:50 -0500
 DJ Delorie d...@delorie.com wrote:
 

   a) There is no such facility.

 This one.  We've been talking about a redesign to pcb's internals that
 would allow support for this, but at the moment, we don't have it.
 
 Could you emulate it in the current version of pcb by drawing a
 rectangle/polygon on the area you wish to become the keep-out region?
 Would the autorouter then avoid it?
 
 Regards,
 Colin
 
 
 ___
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 geda-user@moria.seul.org
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The trick with the rectangle works, I used it on my board to separate
the control section (TTL) of a solid state relais from the 220 V
section. The autorouter kept the digital signals on one side and the 220
V signals on the other side.
- -- 

Mit freundlichen Gruessen

Dietmar Schmunkamp
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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Kai-Martin Knaak
Frank Bergmann wrote:

 Try ./configure --disable-dbus
 
 or try installing package libdbus-1-dev
 
This is a common experience with the configure stage of geda and pcb. 
The script complains about a missing library even though the library is 
installed. What the script really misses is the but what it really misses
is the header file of the lib. In Debian related distros these files tend
be packaged separately in foobar-dev. Would it be possible to change the 
error message accordingly?

---)kaimartin(---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get



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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread DJ Delorie

 Would it be possible to change the error message accordingly?

If you can come up with one that works equally well on rpm-based and
deb-based systems.  Patches welcome :-)


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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Peter TB Brett
On Wednesday 10 November 2010 21:20:54 Kai-Martin Knaak wrote:
 Frank Bergmann wrote:
  Try ./configure --disable-dbus
  
  or try installing package libdbus-1-dev
 
 This is a common experience with the configure stage of geda and pcb.
 The script complains about a missing library even though the library is
 installed. What the script really misses is the but what it really misses
 is the header file of the lib. In Debian related distros these files tend
 be packaged separately in foobar-dev. Would it be possible to change the
 error message accordingly?

Or, y'know, people could try reading the README file, in which it clearly 
states:

 Troubleshooting dependencies
 
 
   I've installed the `libfoo' library, but `./configure' isn't
   picking it up!
 
 Many modern operating system distributions split a library into two
 packages:
 
 1. a `libfoo' package, which contains the files necessary to
 
*run* programs which use `libfoo'.
 
 2. a `libfoo-dev' or `libfoo-devel' package, which contains the files
 
necessary to *compile* programs which use `libfoo'.
 
 If you're having problems, make sure that you have all of the
 necessary `dev' or `devel' packages installed.

How about it, then?  The file is named README for a reason.

 Peter

-- 
Peter Brett pe...@peter-b.co.uk
Remote Sensing Research Group
Surrey Space Centre


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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Peter TB Brett
On Wed, 10 Nov 2010 21:32:33 +, Peter TB Brett pe...@peter-b.co.uk
wrote:
 On Wednesday 10 November 2010 21:20:54 Kai-Martin Knaak wrote:
 Frank Bergmann wrote:
  Try ./configure --disable-dbus
  
  or try installing package libdbus-1-dev
 
 This is a common experience with the configure stage of geda and pcb.
 The script complains about a missing library even though the library is
 installed. What the script really misses is the but what it really
misses
 is the header file of the lib. In Debian related distros these files
tend
 be packaged separately in foobar-dev. Would it be possible to change the
 error message accordingly?
 
 Or, y'know, people could try reading the README file, in which it clearly

 states:
 

Ignore me, I'm an idiot.  Y'all are talking about PCB, not gEDA.  Sorry!

Peter

-- 
Peter Brett pe...@peter-b.co.uk
Remote Sensing Research Group
Surrey Space Centre


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Re: gEDA-user: Restrict facility?

2010-11-10 Thread Colin D Bennett
On Wed, 10 Nov 2010 22:00:16 +0100
Dietmar Schmunkamp diet...@schmunkamp.name wrote:

 -BEGIN PGP SIGNED MESSAGE-
 Hash: SHA1
 
 Am 10.11.2010 19:06, schrieb Colin D Bennett:
  On Wed, 10 Nov 2010 00:09:50 -0500
  DJ Delorie d...@delorie.com wrote:
  
 
a) There is no such facility.
 
  This one.  We've been talking about a redesign to pcb's internals
  that would allow support for this, but at the moment, we don't
  have it.
  
  Could you emulate it in the current version of pcb by drawing a
  rectangle/polygon on the area you wish to become the keep-out
  region? Would the autorouter then avoid it?
  
 The trick with the rectangle works, I used it on my board to separate
 the control section (TTL) of a solid state relais from the 220 V
 section. The autorouter kept the digital signals on one side and the
 220 V signals on the other side.

Good to hear.  Also, I just ran across Chapter 4 in the pcb user
manual, which covers the autorouter.  It mentions a slightly different
method of drawing “continuous lines” to define keep-out zones.

Regards,
Colin


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gEDA-user: Thermal pads overlapping regular SMD pads and solder mask

2010-11-10 Thread Colin D Bennett
I'm working on a footprint for an SMD LED (Optek OVS5MWWBCR4) for
which the manufacturer recommends larger SMD pads for thermal reasons,
with appropriately applied solder mask only to the actual electrical
contact areas, presumably important to assist accurate placement of the
LED.

It looks like I can in fact set different solder mask clearances for
overlapping pads, but I have not been able to make a pad entirely
covered with solder mask.  Is this possible?  I found that
doing changeclearsize to 1 mil gave almost complete solder mask
coverage, but some copper was exposed.

See page 10 of the OVS5MxBCR4 data sheet PDF for the recommended PCB
layout. http://www.optekinc.com/datasheets/OVS5MWWBCR4.pdf

Does anyone have any recommendations or tips for me on creating a pcb
footprint like the one on page 10 of the data sheet?

Regards,
Colin


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Re: gEDA-user: Thermal pads overlapping regular SMD pads and solder mask

2010-11-10 Thread DJ Delorie

 contact areas, presumably important to assist accurate placement of
 the LED.

Turns out resist is a better black-body emitter than shiny metals.

 It looks like I can in fact set different solder mask clearances for
 overlapping pads, but I have not been able to make a pad entirely
 covered with solder mask.  Is this possible?  I found that
 doing changeclearsize to 1 mil gave almost complete solder mask
 coverage, but some copper was exposed.

You should be able to set the mask to exactly zero, although it might
be easier to edit the .fp file than do it in PCB itself.  You'll also
need this bug fixed:

https://sourceforge.net/tracker/?func=detailaid=3100510group_id=73743atid=538813

 Does anyone have any recommendations or tips for me on creating a pcb
 footprint like the one on page 10 of the data sheet?

Three pads per terminal.  One big one for the resist-covered parts,
two overlapping small ones to make the T shape.  Something like this:

Element[181102 181102 0 0 0 100 ]
(
Pad[-3543 4724 3543 4724 3937 1200 4537  1 square]
Pad[0 7481 0 7874 2362 1200 2962  1 square,edge2]
Pad[-11811 10630 11811 10630 15748 1200 0  1 square]
Pad[-3544 -4725 3542 -4725 3937 1200 4537  2 square]
Pad[0 -7874 0 -7481 2362 1200 2962  2 square]
Pad[-11811 -10630 11811 -10630 15748 1200 0  2 square]
ElementLine [-7874 -7874 7874 -7874 600]
ElementLine [7874 -7874 7874 7874 600]
ElementLine [7874 7874 -7874 7874 600]
ElementLine [-7874 7874 -7874 -7874 600]
ElementLine [5512 -7874 7874 -5512 600]

)


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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread dfro



On 11/10/2010 03:45 PM, Frank Bergmann wrote:

On 10.11.2010 21:36, DJ Delorie wrote:

Try ./configure --disable-dbus


or try installing package libdbus-1-dev



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Thanks. That got me past the dbus-1 error. Now I am running into this:

...
checking for gdlib-config... no
Cannot find gdlib-config.
Make sure it is installed and in your PATH.
gdlib-config is part of the GD library available from www.boutell.com/gd.
This is needed for the png HID.  I will look for libgd anyway and maybe
you will get lucky.

checking for main in -lgd... no
configure: error: You have requested gcode, nelma, or png HIDs  but -lgd 
could not be found

...

Any thoughts?

Thanks,
Dave


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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread DJ Delorie

 gdlib-config is part of the GD library available from www.boutell.com/gd.

or install the gd and gd-devel packages.


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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Frank Bergmann

On 10.11.2010 23:17, DJ Delorie wrote:



gdlib-config is part of the GD library available from www.boutell.com/gd.


or install the gd and gd-devel packages.


for ubuntu you find it in libgd2-(no)xpm-dev package



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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread Peter Clifton
On Wed, 2010-11-10 at 17:16 -0500, d...@umich.edu wrote:

 Thanks. That got me past the dbus-1 error. Now I am running into this:

Since _a_ version of PCB is in the Ubuntu repositories, this can be a
quick start to get what you need to build that particular version.
Things should not have changed too much in terms of build requirements
since then.

sudo apt-get build-dep pcb

That should help get you started.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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gEDA-user: NGspice and GNUcap Non-Linerar Dependent Sources

2010-11-10 Thread clif

Hi Gang,

I've been playing with ngspice and gnucap and have gotten good results 
with the Non-Linerar Dependent Sources eg ASRC B devices in ngspice. I 
mostly use those with VC-Switches to make full wave bridges, SCRs, Triacs, 
etc...  Though I see that they are not supported in gnucap. I guess the 
alternative is to use POLYs. I've looked around and except for a short 
description in the gnucap manual I haven't found a comprehensive howto on 
how to use them. I sapose you would want a curve fitting program to help 
you generate the coeficents like grace, or simfit, or you could use the 
fit function in gnucap. However this isn't supported in ngspice, so you 
couldn't use that model in both.


Are POLYs really that much better at solving convergence problems to be 
worth the extra trouble? Is there a good into or howto on how to use them? 
Are negitive coeficents even legal? Inquireing minds want to know. ;-)


Thanks,
Clif


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Re: gEDA-user: PCB+GL Testers (please test)

2010-11-10 Thread Peter Clifton
On Wed, 2010-11-10 at 21:34 +0100, Frank Bergmann wrote:

 You find the backtrace at
 
 http://www.frajasalo.de/frank/projekt/pcb/gdb-pcb.local_customisation_no_pours-backtrace-20101110-1.txt
 
 I hope it will help, even without the debugging symbols in the system 
 stuff.

To really dig into it, I would need the debugging symbols for the DRI
driver. On Ubuntu/Debian, they are in libgl1-mesa-dri-dbg


  In my former tests I only benchmark the program, so with deeper 
 looking at it, I found some unexpected behavior:

 On my AMD Mobility Radeon HD3450 (driver: radeonhd) system (debian, 
 stable but old!) and your local_customisation_no_pours branch (without 
 the recent patches) the line ends look wrong
 
 http://www.frajasalo.de/frank/projekt/pcb/pcb.local_customisation_no_pours-20101110_amd4core.png

The pixel shader which draws the rounded line ends (and vias / holes
etc..) isn't working. Your hardware might not support that GL extension,
and I've been pretty lazy so far about writing code to detect that and
give proper errors.

In the long term, I expect to fall-back to the old rendering in the
before_pours branch.

Please send me the output of glxinfo from this machine, so I can see
what extensions are supported.

 And on my Intel system I have disturbances comming like rays from the 
 middle of the viewport/drawing area, see:
 
 http://www.frajasalo.de/frank/projekt/pcb/pcb.local_customisation_no_pours-20101110_intel.ogv

Interesting.. I have no idea what is going on there. It could well be a
driver bug. Please let me know what mesa and kernel version you're
using.

I THINK I know what it might be, but I'm not certain. Please let me
know what graphics chipset you have. (Again, glxinfo output would help).
I just had a fix committed upstream to mesa master which gets around a
corruption when uploading data to the card. (An alignment issue).

Let me know what mesa version, and if the bug still applies, I'll see if
I can knock up up a patch. Are you on a Debian / Ubuntu system? (If so,
which version?)

 This effect appears also with before_pours branch - this make me 
 wondering because you are developing on an intel system if I understand 
 right.

Intel GM45 chipset here, with bleeding edge drivers. That is git HEAD
mesa + various patches, 2.6.37 kernel with backported drm-intel-next +
some local fixes ;)

In short.. my kernel / graphics drivers break more often than most
people would put up with, but I will have access to fixes for any known
bugs. (It isn't really practical debugging and submitting fixes without
tying current code first.) It is possible I never saw the issue as I've
been tracking these development drivers for quite a while.

Regarding this bug.. the colour looks like the errors are coming from
one of your polygon layers. Does it go away with certain layers
disabled?

What is the minimum board which exhibits the problem? Does it relate to
certain objects on the board, or is it general?
-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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Re: gEDA-user: Thermal pads overlapping regular SMD pads and solder mask

2010-11-10 Thread Colin D Bennett
On Wed, 10 Nov 2010 16:57:33 -0500
DJ Delorie d...@delorie.com wrote:

 
  contact areas, presumably important to assist accurate placement of
  the LED.
 
 Turns out resist is a better black-body emitter than shiny metals.
 
  It looks like I can in fact set different solder mask clearances for
  overlapping pads, but I have not been able to make a pad entirely
  covered with solder mask.  Is this possible?  I found that
  doing changeclearsize to 1 mil gave almost complete solder mask
  coverage, but some copper was exposed.
 
 You should be able to set the mask to exactly zero, although it might
 be easier to edit the .fp file than do it in PCB itself.  You'll also
 need this bug fixed:
 
 https://sourceforge.net/tracker/?func=detailaid=3100510group_id=73743atid=538813

Thanks for the footprint example. That is really helpful.
I built pcb HEAD with the patch (pcb-src-draw.c.diff dated 2010-11-01
05:40:45 UTC) from that bug applied and it seems worse.

With the patch applied, I actually get a much worse result with the
footprint example you provided.  The solder mask doesn't touch the big
pad at all.  See my screen shot collage at
http://gibibit.com/upload/2010-11-10_pcb_mask_drawing1.png.  The
lower-right image shows the patched version with the solder mask
showing.

  Does anyone have any recommendations or tips for me on creating a
  pcb footprint like the one on page 10 of the data sheet?
 
 Three pads per terminal.  One big one for the resist-covered parts,
 two overlapping small ones to make the T shape.  Something like this:
 
 Element[181102 181102 0 0 0 100 ]
 (
   Pad[-3543 4724 3543 4724 3937 1200 4537  1 square]
   Pad[0 7481 0 7874 2362 1200 2962  1 square,edge2]
   Pad[-11811 10630 11811 10630 15748 1200 0  1 square]
   Pad[-3544 -4725 3542 -4725 3937 1200 4537  2 square]
   Pad[0 -7874 0 -7481 2362 1200 2962  2 square]
   Pad[-11811 -10630 11811 -10630 15748 1200 0  2 square]
   ElementLine [-7874 -7874 7874 -7874 600]
   ElementLine [7874 -7874 7874 7874 600]
   ElementLine [7874 7874 -7874 7874 600]
   ElementLine [-7874 7874 -7874 -7874 600]
   ElementLine [5512 -7874 7874 -5512 600]
 
   )

Thanks for taking the time to do this!

OT: Back in the 90's, when I was 13 years old and learning to program
using DJGPP, I would not have thought I'd be interacting with DJ
Delorie in 2010!  :-)  P.S. thanks for all your work on DJGPP in the
past as well as the gEDA project.

Regards,
Colin


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Re: gEDA-user: Thermal pads overlapping regular SMD pads and solder mask

2010-11-10 Thread DJ Delorie

Right, if you read my comment I suggested making the call itself
conditional.

 OT: Back in the 90's, when I was 13 years old and learning to program
 using DJGPP, I would not have thought I'd be interacting with DJ
 Delorie in 2010!  :-)  P.S. thanks for all your work on DJGPP in the
 past as well as the gEDA project.

I wonder what I'll be famous for in 2030...


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Re: gEDA-user: Thermal pads overlapping regular SMD pads and solder mask

2010-11-10 Thread Colin D Bennett
On Wed, 10 Nov 2010 18:25:12 -0500
DJ Delorie d...@delorie.com wrote:

 Right, if you read my comment I suggested making the call itself
 conditional.

I just realized that after I posted.

The following patch actually seems to work:

=== modified file 'src/draw.c'
--- src/draw.c  2010-09-10 14:30:23 +
+++ src/draw.c  2010-11-10 23:32:09 +
@@ -673,7 +673,12 @@
 {
   PadTypePtr pad = (PadTypePtr) b;
   if (!XOR (TEST_FLAG (ONSOLDERFLAG, pad), SWAP_IDENT))
-ClearPad (pad, true);
+{
+  if (pad-Mask != 0)
+{
+  ClearPad (pad, true);
+}
+}
   return 1;
 }
 


Regards,
Colin


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Re: gEDA-user: PCB+GL Testers (please test)

2010-11-10 Thread Peter Clifton
On Wed, 2010-11-10 at 23:13 +, Peter Clifton wrote:

  On my AMD Mobility Radeon HD3450 (driver: radeonhd) system (debian, 
  stable but old!) and your local_customisation_no_pours branch (without 
  the recent patches) the line ends look wrong
  
  http://www.frajasalo.de/frank/projekt/pcb/pcb.local_customisation_no_pours-20101110_amd4core.png
 
 The pixel shader which draws the rounded line ends (and vias / holes
 etc..) isn't working. Your hardware might not support that GL extension,

I misread.. the card isn't that old.. but Debian stable is ;)

I still want to see the glxinfo output. I'm not quite sure how new a
mesa you need to get R600 series cards working properly. It might need
gallium drivers.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)



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gEDA-user: OT: Gilbert Cell

2010-11-10 Thread gene glick

Has anyone worked with Gilbert Cells?  I'm having a lot of trouble with
one from ON Semi, MC1496, formerly Motorola's part, I think.

The thing is configured as a product detector.  There's 2 input
frequencies and they both mix down to 5 kHz.  That part works well.
But, the chip just happens to oscillate at 5 kHz all by itself even
without the local oscillator running.  Go figure.  There's also a very
slow moving, 400 Hz or so, modulating the 5 kHz.  I cannot for the life
of me, figure out where it's coming from or how to get rid of it.

I appreciate any help.

gene



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Re: gEDA-user: Problems compiling PCB Release 20100929

2010-11-10 Thread dfro
Thanks guys. I built gd-2.0.35RC5 from source with no problems, and then 
pcb compiled. I also tried 'sudo apt-get build-dep pcb'. I didn't know 
about the 'build-dep' option. I like that, so I did it and there were 
four or five programs that got installed.


On 11/10/2010 05:59 PM, Peter Clifton wrote:

On Wed, 2010-11-10 at 17:16 -0500, d...@umich.edu wrote:


Thanks. That got me past the dbus-1 error. Now I am running into this:


Since _a_ version of PCB is in the Ubuntu repositories, this can be a
quick start to get what you need to build that particular version.
Things should not have changed too much in terms of build requirements
since then.

sudo apt-get build-dep pcb

That should help get you started.



'PCB 20100929' runs fine now.

Thanks again,
Dave

P.S. Will my Ubuntu 10.04 system get confused if I install both the 
Synaptic package of pcb along with the compiled version?



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Re: gEDA-user: OT: Gilbert Cell

2010-11-10 Thread Bob Paddock
On Wed, Nov 10, 2010 at 8:40 PM, gene glick carzr...@optonline.net wrote:
 Has anyone worked with Gilbert Cells?  I'm having a lot of trouble with
 one from ON Semi, MC1496, formerly Motorola's part, I think.

As Gilbert works for Analog Devices, I'd poke around there for ideas:

http://www.google.com/search?q=Gilbert+Cell+site:Aanalog.com

The most interesting use I've see for a Gilbert like device is for
mathematical analog division, think it was using a couple of AD630's.
Not finding that one right now, but this one might be more of direct
help to your problem:
http://www.analog.com/static/imported-files/rarely_asked_questions/computation.pdf


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gEDA-user: Comments on pcb's g-code exporter HeeksCAD/HeeksCNC FOSS program for pcb milling

2010-11-10 Thread dfro
The g-code exporter looks great! Right now I am looking at EMC2 simulate 
the milling of a pcb design!!


I like that the gound plane outline is machined. The circular pads could 
use some more lines to round them out. Have you thought about 
programming g-code arcs (G02, G03) for them? HeeksCAD/CNC does this (see 
below).


Please, consider a dxf export of the outline so that users can put the 
artwork into a cam program that can pocket out all of the copper, and 
make the board look just like the pcb program's artwork.


Having a dxf file allows people to tweak all of the milling variables 
(depths of cut, jogs, feed rates, number of passes, pocketing, drilling, 
etc) in a CAM program, rather than go through the g-code by hand.


Speaking of CAM programs...

I want to share with all of you a FOSS program that I am excited about - 
HeeksCAD/HeeksCNC. It is an integrated CAD/CAM software project started 
by Dan Heeks.


http://code.google.com/p/heekscad/
http://code.google.com/p/heekscnc/

Dan has a great blog where he shows parts he has made with HeeksCAD/CNC:

http://heekscnc.blogspot.com/

The current Vol. 5, No. 3, Fall 2010 issue of Digital Machinist Magazine 
has an article on it.


I was able to compile it from source easily on my EMC2-Ubuntu-10.04LTS 
system. At only 2 years old it has an incredible level of CAD and CAM 
functionality. I am most interested right now in its 2.5 axis and 3 axis 
CAM abilities. It freezes, crashes, and runs very slow at times, but 
heck, its only 2 years old.


Several months ago I wrote the gEDA-user list about my attempts to get a 
dxf outline of gEDA pcb's artwork using FOSS software like inkscape and 
pstoedit. The goal was to get an outline of all of the traces and pads 
so that I could pocket route away all of the copper exactly as it looks 
in gerbv - using a 2.5 axis cam program.


HeeksCAD/HeeksCNC has the ability to open .grb files and gives you four 
conversion choices:


Produce trace isolation sketches
Produce trace centre-line sketches
Produce mirrored trace isolation sketches
Produce mirrored centre-line sketches

Currently, I am only able to load small .grb files or else HeeksCAD/CNC 
freezes. The program produces a beautiful smooth outline on the circular 
pads using 'G03 - Circular interpolation counterclockwise' g-codes.


However, the program does not recognize the ground plane clearance 
outlines. It only gives the outside border of the entire ground plane 
rectangle. I hope that will come in the future.


Please, share your thoughts on this.

Thanks,
Dave





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Re: gEDA-user: Comments on pcb's g-code exporter HeeksCAD/HeeksCNC FOSS program for pcb milling

2010-11-10 Thread dfro

At 2000 dpi the curved traces look great on EMC2/Axis!

On 11/10/2010 11:11 PM, d...@umich.edu wrote:

The g-code exporter looks great! Right now I am looking at EMC2 simulate
the milling of a pcb design!!

I like that the gound plane outline is machined. The circular pads could
use some more lines to round them out. Have you thought about
programming g-code arcs (G02, G03) for them? HeeksCAD/CNC does this (see
below).

Please, consider a dxf export of the outline so that users can put the
artwork into a cam program that can pocket out all of the copper, and
make the board look just like the pcb program's artwork.

Having a dxf file allows people to tweak all of the milling variables
(depths of cut, jogs, feed rates, number of passes, pocketing, drilling,
etc) in a CAM program, rather than go through the g-code by hand.

Speaking of CAM programs...

I want to share with all of you a FOSS program that I am excited about -
HeeksCAD/HeeksCNC. It is an integrated CAD/CAM software project started
by Dan Heeks.

http://code.google.com/p/heekscad/
http://code.google.com/p/heekscnc/

Dan has a great blog where he shows parts he has made with HeeksCAD/CNC:

http://heekscnc.blogspot.com/

The current Vol. 5, No. 3, Fall 2010 issue of Digital Machinist Magazine
has an article on it.

I was able to compile it from source easily on my EMC2-Ubuntu-10.04LTS
system. At only 2 years old it has an incredible level of CAD and CAM
functionality. I am most interested right now in its 2.5 axis and 3 axis
CAM abilities. It freezes, crashes, and runs very slow at times, but
heck, its only 2 years old.

Several months ago I wrote the gEDA-user list about my attempts to get a
dxf outline of gEDA pcb's artwork using FOSS software like inkscape and
pstoedit. The goal was to get an outline of all of the traces and pads
so that I could pocket route away all of the copper exactly as it looks
in gerbv - using a 2.5 axis cam program.

HeeksCAD/HeeksCNC has the ability to open .grb files and gives you four
conversion choices:

Produce trace isolation sketches
Produce trace centre-line sketches
Produce mirrored trace isolation sketches
Produce mirrored centre-line sketches

Currently, I am only able to load small .grb files or else HeeksCAD/CNC
freezes. The program produces a beautiful smooth outline on the circular
pads using 'G03 - Circular interpolation counterclockwise' g-codes.

However, the program does not recognize the ground plane clearance
outlines. It only gives the outside border of the entire ground plane
rectangle. I hope that will come in the future.

Please, share your thoughts on this.

Thanks,
Dave





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