Re: gEDA-user: current working file name in gschemrc
Vladimir Zhbanov wrote: One problem I noticed before is no way to reprint all .eps-files from command line, that is from Makefile also. ack. A way to recursively print all schematics in a hierarchy is missing in the bag of features. ---)kaimartin(--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: creating new symbols
Hi, I encountered a segfault trying to connect a net to my shiny little newly created symbol (attached below). I created a few symbols, only one of those is causing a segfault (gschem from ubuntu 10.10 repos). I would be grateful for pointing out the error in creating this symbol Michal Dwuznik mic...@jabberwocky:~/pcb$ cat LM1108SF33-1.sym v 20100214 2 B 200 300 1400 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 N 200 1100 0 1100 1 { T 0 900 5 10 0 1 0 0 1 pinnumber=2 T 300 900 5 10 1 1 0 0 1 pinseq=2 T 300 1100 9 10 1 1 0 0 1 pinlabel=Vin T 0 1200 5 8 0 1 0 0 1 pintype=in } N 1800 1100 1600 1100 1 { T 1400 900 5 10 1 1 0 0 1 pinnumber=3 T 1900 900 5 10 0 1 0 0 1 pinseq=3 T 1100 1100 9 10 1 1 0 0 1 pinlabel=Vout T 1700 1200 5 8 0 1 0 0 1 pintype=out } N 900 300 900 0 1 { T 700 400 5 10 1 1 0 0 1 pinnumber=1 T 1000 100 5 10 0 1 0 0 1 pinseq=1 T 900 400 9 10 1 1 0 0 1 pinlabel=GND T 600 200 5 8 0 1 0 0 1 pintype=pwr } T 200 1400 9 10 0 1 0 0 1 devicename=LM1108SF-3.3 T 200 1800 9 10 0 1 0 0 1 description=LM1108 T 200 1600 9 10 0 1 0 0 1 footprint=SOT23 T 200 0 8 10 1 1 0 0 1 refdes=U? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Comments on pcb's g-code exporter HeeksCAD/HeeksCNC FOSS program for pcb milling
Am 16.11.2010 um 22:51 schrieb d...@umich.edu: However, the gcode export always crashes if I try to define the outline with a rectangle. It crashed also when the outline layer contains only a single vertical or horizontal line. Fixed in a new patchset: http://sourceforge.net/tracker/index.php? func=detailaid=3100354group_id=73743atid=538813 Markus - - - - - - - - - - - - - - - - - - - Dipl. Ing. (FH) Markus Hitter http://www.jump-ing.de/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: creating new symbols
Micha? Dwu?nik wrote: mic...@jabberwocky:~/pcb$ cat LM1108SF33-1.sym v 20100214 2 B 200 300 1400 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 N 200 1100 0 1100 1 This is a net, not a pin. Pin definition lines start with the letter P. { T 0 900 5 10 0 1 0 0 1 pinnumber=2 T 300 900 5 10 1 1 0 0 1 pinseq=2 T 300 1100 9 10 1 1 0 0 1 pinlabel=Vin T 0 1200 5 8 0 1 0 0 1 pintype=in } N 1800 1100 1600 1100 1 ^ Again a net, not a pin. You can add pins in the gschem GUI with Add - Pin The accel of this command is [ap]. ---)kaimartin(--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: creating new symbols
On Mon, Nov 29, 2010 at 16:29, Kai-Martin Knaak kn...@iqo.uni-hannover.de wrote: Micha? Dwu?nik wrote: mic...@jabberwocky:~/pcb$ cat LM1108SF33-1.sym v 20100214 2 B 200 300 1400 1000 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 N 200 1100 0 1100 1 This is a net, not a pin. Pin definition lines start with the letter P. Thank you, red squares helped : On the other hand - there's no visible clue in case of such error - segfault does not seem very elegant... M. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: creating new symbols
On Mon, 29 Nov 2010 19:34:36 +0100 Michał Dwużnik michal.dwuznik-re5jqeeqqe8avxtiumw...@public.gmane.org wrote: there's no visible clue in case of such error - segfault does not seem very elegant... You should file a bug report on SF project page. gEDA should not crash. Levente -- Levente Kovacs http://levente.logonex.eu ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PCB: Different solder mask clearance on top and bottom layers?
Hello, I'm working on a design with a largish (23x23 @ 0.8mm pitch) BGA chip, with vias to accomodate the fanout of the inner rows of pins. Now I would like to have these vias covered by the solder mask on the top layer (where the BGA device sits), but not on the bottom layer -- the latter so that I have easy access to the device's pins for testing purposes. Is there a way to change the solder mask on only one side of the board, but not the other side? When I use the K key over a via, the solder mask changes on both sides. Thanks already, Best regards, Richard Rasker ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: creating new symbols
Levente Kovacs wrote: You should file a bug report on SF project page. gEDA should not crash. This minimum example of a net in a symbol file that shows the same symptoms: /---net_crash.sym v 20100214 2 N 200 0 0 0 1 \ To reproduce: 1) put the file in the local project dir 2) open gschem 3) add the minimum symbol to the schematic 4) try to start a horizontal net at one of red squares gschem segfaults when the mouse cursor starts to move sideways. Vertical nets connect fine. However, if the symbol is rotated by 90°, it is the vertical nets that make gschem go belly up. I guess, the segfaulting piece of code is located in the procedure that tries to unite straight segments of nets. ---)kaimartin(--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB: Different solder mask clearance on top and bottom layers?
On Mon, 2010-11-29 at 21:53 +0100, Richard Rasker wrote: Is there a way to change the solder mask on only one side of the board, but not the other side? When I use the K key over a via, the solder mask changes on both sides. It may be possible to make vias covered with solder mask, and put a round pad free from solder mask on top. Not really nice. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user