Re: gEDA-user: [pcb/lesstif] allow zoom out and pan more than board size
FYI I pushed the patch to gpleda; update your git and build. Also, the 'v' key now centers the board in the window rather than place it at the upper left corner (as well as making it best-fit the window, as before). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soft and Hard symbols
> From: m...@ssalewski.de > To: geda-user@moria.seul.org > Date: Tue, 4 Jan 2011 03:17:21 +0100 > Subject: Re: gEDA-user: Soft and Hard symbols > > > At least the slotdef attribute is an example where we currently have to > make a decision in an very early design stage. If I know that I may need > some OpAmps or logic gates for my design, I may want to do not care > about single, dual or quad packages when drawing the schematic. But > currently we have to pick one of these types -- later we may have to > replace it. Stating the obviuous... How about this kind of situation. Let's say you are designing low-pass filter for mono signal and you have readily world's best quad opamp on your part box and symbol is there and SPICE model is there. Due to case you need to use slot three to fit all the resistors and caps because there is space on the enclosure. With this situation, there are two schematics. One for spice and onether for pcb. Ofcourse this is hobby example and gEDA should be considered professional tool :) But are those commercial situations so far away from that? I don't think that it is too hard to add the modelfile attribute for symbol, since it can be anywhere in the system. > > http://www.delorie.com/pcb/component-dbs.html I really liked DJ's ideas. I wish I was able to help, but gEDA is still too far away from my skils. best regards, Hannu Vuolasaho ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soft and Hard symbols
On Mon, 2011-01-03 at 16:04 -0800, Edward Hennessy wrote: > On Jan 3, 2011, at 8:20 AM, Stefan Salewski wrote: > > > I guess all this was discussed on the list multiple times in the past, > > so this is more a note to myself... > > > > I think it may be useful to have two types of symbols, soft and hard. > > Hard symbols have an footprint attribute and maybe additional hard > > properties. Soft symbols are simple an OpAmp or a resistor -- only type, > > no parameters defined. For schematic entry the use can select "Add soft > > symbol" or add hard symbol (if he exactly knows what he wants). If a > > schematic contains soft symbols, then there is an additional step > > necessary before PCB layout can start: Selecting footprints and slots -- > > this step may be supported by databases. (The user may have the optional > > choice to generate hard symbols from soft ones by specifying footprints > > and other hard facts in an early input stage.) > > Besides allowing attributes to contain a value representing unknown or > be empty, I don't see why the application needs to know the difference > between a hard and soft symbol. > > If the schematic editor allows empty attributes and allows the user > to edit these attributes, wouldn't it be capable of the functionality > requested above? > At least the slotdef attribute is an example where we currently have to make a decision in an very early design stage. If I know that I may need some OpAmps or logic gates for my design, I may want to do not care about single, dual or quad packages when drawing the schematic. But currently we have to pick one of these types -- later we may have to replace it. For many tasks heavy/hard symbols may be fine -- when we know in advance what we need. But I really would like to have the ability to do a top down design: OpAmp -> VoltageFeedback -> FetInput -> Dual -> SOT8 Similar like selection at Digikey -- and now I remember postings of DJ, I really should read his http://www.delorie.com/pcb/component-dbs.html and try to understand it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem usability: expand the component tree after filtering
Krzysztof Kościuszkiewicz wrote: > I found it annoying that I need to "click through" the whole > component tree after filtering the symbol file names. +1 Every click that can be avoided for common tasks adds to the productivity. I hope, this patch will be accepted. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PATCH: gnetlist's drc2 backend should check that NoConnection nets don't have connections
Adding the NoConnection DRC attribute to a net causes the drc2 backend to ignore it when checking for unconnected nets. However, drc2 currently doesn't enforce that the net is actually unconnected. It's possible to mark two pins as NoConnection and then accidentally wire them together. This patch to gnet-drc2.scm checks for that case: --- /usr/share/gEDA/scheme/gnet-drc2.scm.bak2011-01-03 17:35:36.0 -0700 +++ /usr/share/gEDA/scheme/gnet-drc2.scm2011-01-03 18:34:08.0 -0700 @@ -556,6 +556,42 @@ ; ;; +;; Check for NoConnection nets with more than one pin connected. +;; +;; Example of all-nets: (net1 net2 net3 net4) +(define drc2:check-connected-noconnects + (lambda (port all-nets) +(if (not (null? all-nets)) + (let* ((netname (car all-nets)) +(directives (gnetlist:graphical-objs-in-net-with-attrib-get-attrib +netname +"device=DRC_Directive" +"value"))) +(begin + ; Only check nets with a NoConnection directive + (if (member "NoConnection" directives) +(begin + (if ( > (length (gnetlist:get-all-connections netname)) '1) +(begin + (display (string-append "ERROR: Net '" + netname "' has connections, but " + "has the NoConnection DRC directive: ") port) + (drc2:display-pins-of-type port "all" (gnetlist:get-all-connections netname)) + (display "." port) + (newline port) + (set! errors_number (+ errors_number 1)) +) + ) +) + ) + (drc2:check-connected-noconnects port (cdr all-nets)) +) + ) +) + ) +) + +;; ;; Check for nets with less than two pins connected. ;; ;; Example of all-nets: (net1 net2 net3 net4) @@ -953,6 +989,14 @@ (drc2:check-duplicated-references port packages) (newline port))) + ;; Check for NoConnection nets with more than one pin connected. + (if (not (defined? 'dont-check-connected-noconnects)) + (begin + (display "Checking NoConnection nets for connections..." port) + (newline port) + (drc2:check-connected-noconnects port (gnetlist:get-all-unique-nets "dummy")) + (newline port))) + ;; Check nets with only one connection (if (not (defined? 'dont-check-one-connection-nets)) (begin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soft and Hard symbols
On Jan 3, 2011, at 8:20 AM, Stefan Salewski wrote: > I guess all this was discussed on the list multiple times in the past, > so this is more a note to myself... > > I think it may be useful to have two types of symbols, soft and hard. > Hard symbols have an footprint attribute and maybe additional hard > properties. Soft symbols are simple an OpAmp or a resistor -- only type, > no parameters defined. For schematic entry the use can select "Add soft > symbol" or add hard symbol (if he exactly knows what he wants). If a > schematic contains soft symbols, then there is an additional step > necessary before PCB layout can start: Selecting footprints and slots -- > this step may be supported by databases. (The user may have the optional > choice to generate hard symbols from soft ones by specifying footprints > and other hard facts in an early input stage.) Besides allowing attributes to contain a value representing unknown or be empty, I don't see why the application needs to know the difference between a hard and soft symbol. If the schematic editor allows empty attributes and allows the user to edit these attributes, wouldn't it be capable of the functionality requested above? > Note, this is not what we currently have with our light/heavy symbols. > The point is, that we should make a strict decision, not make a soft > transition from light to heavy but adding some attributes. Cheers, Ed ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Voltage symbols and Spice
On Mon, 03 Jan 2011 23:52:12 +0100 "Johnny Rosenberg" wrote: > Den 2011-01-03 23:37:23 skrev John Doty : > > [...] > > A bit off topic, but is it recommended to call something ”5VA” in > this case? Couldn't it be confused with the fact that VA means > Volt-Amperes, which is what you measure apparent power in? I would not start a netname by a numeric character (I don't have any reason why). I call this kind of nets as AVCC and DVCC. When I have more than one supply net I call them AVCC1, AVCC2, etc. I know this is a bit uncommon, because you have to have a table somewhere (at least one in your mind) which links which supply is what. AVCC2=5V, AVCC1=12V etc. Same goes for ground connections. AGND and DGND. HTH, Levente -- Levente Kovacs http://levente.logonex.eu ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Voltage symbols and Spice
Different places have different standards, but it is not that uncommon to use the Blah Blah A designation in some form to indicate an analog supply as opposed to a digital supply. If you really want to get folks frothing about conventions, just bring up the split ground planes vs solid ground plane. Oliver __ From: Johnny Rosenberg To: gEDA user mailing list Sent: Mon, January 3, 2011 2:52:12 PM Subject: Re: gEDA-user: Voltage symbols and Spice Den 2011-01-03 23:37:23 skrev John Doty <[1]...@noqsi.com>: > > On Jan 3, 2011, at 3:31 PM, Oliver King-Smith wrote: > >> I am trying to use the "generic-power.sym" in my schematic. I am >> setting the net attribute to 5VA (for 5V analog). I was hoping this >> would make all the nets with such a symbol. When I try to run gnetlist >> with the spice-sdb backend I get this error printing out several times. >> Got an invalid net= attrib [net=5VA] >> Missing : in net= attrib >> The nets don't appear connected in the spice file. Do folks have any >> suggestions on how to solve this? >> Oliver > > You must include the pin number in a net attribute, e.g.: > > net=5VA:1 > > John Doty Noqsi Aerospace, Ltd. > [2]http://www.noqsi.com/ > [3]...@noqsi.com > A bit off topic, but is it recommended to call something �5VA� in this case? Couldn't it be confused with the fact that VA means Volt-Amperes, which is what you measure apparent power in? --Kind regards Johnny Rosenberg ___ geda-user mailing list [4]geda-u...@moria.seul.org [5]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:j...@noqsi.com 2. http://www.noqsi.com/ 3. mailto:j...@noqsi.com 4. mailto:geda-user@moria.seul.org 5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Voltage symbols and Spice
Den 2011-01-03 23:37:23 skrev John Doty : On Jan 3, 2011, at 3:31 PM, Oliver King-Smith wrote: I am trying to use the "generic-power.sym" in my schematic. I am setting the net attribute to 5VA (for 5V analog). I was hoping this would make all the nets with such a symbol. When I try to run gnetlist with the spice-sdb backend I get this error printing out several times. Got an invalid net= attrib [net=5VA] Missing : in net= attrib The nets don't appear connected in the spice file. Do folks have any suggestions on how to solve this? Oliver You must include the pin number in a net attribute, e.g.: net=5VA:1 John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com A bit off topic, but is it recommended to call something ”5VA” in this case? Couldn't it be confused with the fact that VA means Volt-Amperes, which is what you measure apparent power in? -- Kind regards Johnny Rosenberg ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: MODEL statements
I have defined my diode with a model statement model=Is=1e-22 Rs=6 N=1.5 Cjo=50p Iave=20m Vpk=5 type=LED This works fine except the spice-sdb backend inserts a model statement every time it finds one of the diodes. Is there a way to have the model statement only once. Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Voltage symbols and Spice
On Jan 3, 2011, at 3:31 PM, Oliver King-Smith wrote: > I am trying to use the "generic-power.sym" in my schematic. I am > setting the net attribute to 5VA (for 5V analog). I was hoping this > would make all the nets with such a symbol. When I try to run gnetlist > with the spice-sdb backend I get this error printing out several times. > Got an invalid net= attrib [net=5VA] > Missing : in net= attrib > The nets don't appear connected in the spice file. Do folks have any > suggestions on how to solve this? > Oliver You must include the pin number in a net attribute, e.g.: net=5VA:1 John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Voltage symbols and Spice
I am trying to use the "generic-power.sym" in my schematic. I am setting the net attribute to 5VA (for 5V analog). I was hoping this would make all the nets with such a symbol. When I try to run gnetlist with the spice-sdb backend I get this error printing out several times. Got an invalid net= attrib [net=5VA] Missing : in net= attrib The nets don't appear connected in the spice file. Do folks have any suggestions on how to solve this? Oliver ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB object data and attributes
On Jan 3, 2011, at 3:33 AM, Stephan Boettcher wrote: > John Griessen writes: > >> On 01/02/2011 04:14 PM, Stephan Boettcher wrote: >>> If you do not use it, why do you care about associating >>> netnames to traces? >> >> That's not about auto DRC enforce drawing, it's about searching >> for parts related to schematic and cross probing >> and creating layout dereived models of trace capacitance >> for simulations. > > All of this should depend on the actual copper connectivity, not on some > (invisible) attributes of drawing elements. Yes. the netname belongs to a different level of abstraction, where geometry is assumed not to matter. Only topology matters. And while one can talk about the capacitance between nets, one generally cannot deal with inductance and resistance in this manner. I am increasingly seeing fast digital chips that are designed to be connected by transmission lines, not nets. Right now, every layout person I know pretends that transmission lines are composed of nets, and then manually forces their tool to create a transmission line geometry. As this gets more common, I expect that it will be important that the tools be capable of more automation in this area. gschem is in good shape here, as it does not make any semantic assumptions about its "nets", at least if you turn off net consolidation. "nets" in gschem therefore can easily represent transmission lines (or busses, as Paul Tan has shown). gnetlist isn't so flexible, as it hides the geometry, revealing only topology, and also hides attributes attached to "nets". --- John Doty Noqsi Aerospace, Ltd. This message contains technical discussion involving difficult issues. No personal disrespect or malice is intended. If you perceive such, your perception is simply wrong. I'm a busy person, and in my business "go along to get along" causes mission failures and sometimes kills people, so I tend to be a bit blunt. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soft and Hard symbols
Stefan Salewski writes: > I guess all this was discussed on the list multiple times in the past, My thoughts: http://www.delorie.com/pcb/component-dbs.html You should be able to defer the selection of packages, pinouts, and part numbers until later in the design cycle. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Soft and Hard symbols
I guess all this was discussed on the list multiple times in the past, so this is more a note to myself... I think it may be useful to have two types of symbols, soft and hard. Hard symbols have an footprint attribute and maybe additional hard properties. Soft symbols are simple an OpAmp or a resistor -- only type, no parameters defined. For schematic entry the use can select "Add soft symbol" or add hard symbol (if he exactly knows what he wants). If a schematic contains soft symbols, then there is an additional step necessary before PCB layout can start: Selecting footprints and slots -- this step may be supported by databases. (The user may have the optional choice to generate hard symbols from soft ones by specifying footprints and other hard facts in an early input stage.) Note, this is not what we currently have with our light/heavy symbols. The point is, that we should make a strict decision, not make a soft transition from light to heavy but adding some attributes. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
On Jan 3, 2011, at 8:50 AM, kai-martin knaak wrote: > Stefan Salewski wrote: > >> I wonder if slotdef in a symbol is a good thing at all. >> If I place an OpAmp in a schematic -- should I decide for dual or >> quad really at this moment? Or better later in the PCB layout >> process. > > Without this information gnetlist cannot produce a valid netlist. Depends on the kind of netlist you mean. The slotting mechanism gets in the way of simulation. You don't logically need pin numbers, although at the moment gnetlist gets into trouble without them. > I'd rather not have gnetlist look into *.sch and additionally into > *.pcb. Anyway, slot information on the schematic is feature not a > bug. It facilitates debugging and service. Different roles, possibly different schematics. As projects get bigger WYSIWYG gets in the way more. In a big project, it makes good sense to separate clean source schematics for design capture from from annotated schematics for debugging and service. That's part of the goal of the lambda-geda tool we've been developing, and the only area where it's developed enough to be useful (it can can flatten hierarchy for documentation). John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
Stefan Salewski wrote: > I wonder if slotdef in a symbol is a good thing at all. > If I place an OpAmp in a schematic -- should I decide for dual or > quad really at this moment? Or better later in the PCB layout > process. Without this information gnetlist cannot produce a valid netlist. I'd rather not have gnetlist look into *.sch and additionally into *.pcb. Anyway, slot information on the schematic is feature not a bug. It facilitates debugging and service. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
On Mon, 2011-01-03 at 14:24 +0100, kai-martin knaak wrote: > > +1 > Please don't introduce additional road blocks to double purpose > schematics for pcb and simulation. I wonder if slotdef in a symbol is a good thing at all. If I place an OpAmp in a schematic -- should I decide for dual or quad really at this moment? Or better later in the PCB layout process. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
Stephan Boettcher wrote: >> gnetlist: Option "sort_port_value" sorts spice-IO devs by value=. >> SF: 3150019 >> This allows using the refdes' to indicate pinlabel and then using >> value= to yield a meaningful ordering to a subckt's ports. My symbol >> generator script uses the refdes for pinlabel, order from the value >> attribute, and pintype from the device attribute. > > This smells like nasty attribute overloading. It there no way to > implement this with some orthogonal attribute names? +1 Please don't introduce additional road blocks to double purpose schematics for pcb and simulation. ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/pks/lookup?op=get&search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
On Monday 03 January 2011 07.19:46 Dan White wrote: > gnetlist: makedepend backend > SF: 3150021 > Gnetlist backend to determine a schematic's dependencies. Output > is in the form of: > > source.sch: depend1.sch depend2.sch > source.cir: source.sch depend1.cir depend2.cir other.inc > > ...written to "source.d" file for inclusion into a project's > Makefile. > > First line collects all source= attributes in the input pages. Second > line lists transformed source='s/sch/cir/' and file= attributes > (.include files). I think that the symbols should also be included in this file. I use a weird combination of grep, cut, sort, uniq, awk, tr and sed to do this, but a backend would be much nicer. I also use tragesym, so the depends on symbols relies either on *.sym (handdrawn symbol) or a *.sym generated out of a *.csv (tragesym source). A few suggestions: - There should be an attribute to set the directory which hold the symbols and subsheets. - There should be an option so that the backend includes only the symbols it founds in a directory, perhaps under another pattern and directory too, like "/.sym$/.csv/" (regex would be nice, or at least a simple extension matching), so that gEDA stock symbols aren't included. Below is the Makefile snippet I use: %.sch.d: %.sch ${ECHO} -n "$< $(<:%.sch=%.ps) $(<:%.sch=%_c.ps) $(<:%.sch=%.net): " >$@ && \ for SYM in $$(grep "C " $^ | cut -d " " -f 7 | sort | uniq | awk 'BEGIN {print}{print "${SYM_SYM_DIR}/"$$0}' | tr '\n' ' ') ; do \ if [ -f "$$(echo -n $$SYM | sed -e 's/\.sym$$/\.csv/' -e 's,^${SYM_SYM_DIR},${SYM_SRC_DIR},')" -o -f "$$SYM" ]; then \ ${ECHO} -n " $$SYM"; \ fi ; \ done >>$@ && \ ${ECHO} >>$@ && \ ${ECHO} >>$@ && \ ${ECHO} "$@: $<" >>$@ && \ ${ECHO} >>$@ -- mit freundlichem Gruss Christian Riggenbach signature.asc Description: This is a digitally signed message part. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: series of gnetlist backend patches
Dan White writes: > gnetlist: Option "sort_port_value" sorts spice-IO devs by value=. > SF: 3150019 > This allows using the refdes' to indicate pinlabel and then using > value= to yield a meaningful ordering to a subckt's ports. My symbol > generator script uses the refdes for pinlabel, order from the value > attribute, and pintype from the device attribute. This smells like nasty attribute overloading. It there no way to implement this with some orthogonal attribute names? -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB object data and attributes
John Griessen writes: > On 01/02/2011 04:14 PM, Stephan Boettcher wrote: >> If you do not use it, why do you care about associating >> netnames to traces? > > That's not about auto DRC enforce drawing, it's about searching > for parts related to schematic and cross probing > and creating layout dereived models of trace capacitance > for simulations. All of this should depend on the actual copper connectivity, not on some (invisible) attributes of drawing elements. -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: [PATCH 2/2] gnetlist: Silence warning in drc2 backend for multiple slot attributes.
Slot attributes have different values across symbol instances of a same package. But 'gnetlist:get-package-attribute' does not like that. So the value has to get directly extracted from the list returned by 'gnetlist:get-all-package-attributes'. --- gnetlist/scheme/gnet-drc2.scm |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/gnetlist/scheme/gnet-drc2.scm b/gnetlist/scheme/gnet-drc2.scm index a72f2a4..0570ba4 100644 --- a/gnetlist/scheme/gnet-drc2.scm +++ b/gnetlist/scheme/gnet-drc2.scm @@ -430,7 +430,9 @@ (let* ( (numslots_string (gnetlist:get-package-attribute uref "numslots")) (numslots (string->number numslots_string)) - (slot_string (gnetlist:get-package-attribute uref "slot")) + (slot_string (let ((slots (gnetlist:get-all-package-attributes uref "slot"))) + (if (or (null? slots) (not (car slots))) + "unknown" (car slots (slot (string->number slot_string)) ) (let () ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: [PATCH 1/2] gnetlist: Add access to all attributes from components with multiple symbol instances.
This commit introduces 'gnetlist:get-all-package-attributes' to retrieve every first attribute value for package consisting of multiple symbol instances. 'gnetlist:get-package-attribute' gets redefined to use the above procedure. To preserve backward compatibility, it returns the first value found in file order and warns when detecting different, possibly conflicting values. This behavior is configurable. Derived from patch #3071482, C code by Sebastian Gieltjes. --- gnetlist/include/prototype.h |2 +- gnetlist/scheme/gnetlist.scm | 41 ++ gnetlist/src/g_netlist.c | 45 +- gnetlist/src/g_register.c|2 +- 4 files changed, 70 insertions(+), 20 deletions(-) diff --git a/gnetlist/include/prototype.h b/gnetlist/include/prototype.h index d37d397..3a976c2 100644 --- a/gnetlist/include/prototype.h +++ b/gnetlist/include/prototype.h @@ -11,7 +11,7 @@ SCM g_get_all_unique_nets(SCM scm_level); SCM g_get_all_connections(SCM scm_netname); SCM g_get_nets(SCM scm_uref, SCM scm_pin); SCM g_get_pins_nets(SCM scm_uref); -SCM g_get_package_attribute(SCM scm_uref, SCM scm_wanted_attrib); +SCM g_get_all_package_attributes(SCM scm_uref, SCM scm_wanted_attrib); SCM g_get_attribute_by_pinseq(SCM scm_uref, SCM scm_pinseq, SCM scm_wanted_attrib); SCM g_get_attribute_by_pinnumber(SCM scm_uref, SCM scm_pin, SCM scm_wanted_attrib); SCM g_get_toplevel_attribute(SCM scm_wanted_attrib); diff --git a/gnetlist/scheme/gnetlist.scm b/gnetlist/scheme/gnetlist.scm index d798259..a58ec79 100644 --- a/gnetlist/scheme/gnetlist.scm +++ b/gnetlist/scheme/gnetlist.scm @@ -17,6 +17,8 @@ ;;; along with this program; if not, write to the Free Software ;;; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +(use-modules (srfi srfi-1)) + ;;-- ;; The below functions added by SDB in Sept 2003 to support command-line flag ;; processing. @@ -94,6 +96,45 @@ ) ) +;; Default resolver: returns value associated with first symbol instance +;; in file order and warns if instances have different values. +(define (unique-attribute refdes name values) +(let ((value (car values))) + (or (every (lambda (x) (equal? x value)) values) + (format (current-error-port) "\ +Possible attribute conflict for refdes: ~A +name: ~A +values: ~A +" refdes name values)) + value)) + +(define (gnetlist:get-package-attribute refdes name) + "Return the value associated with attribute NAME on package +identified by REFDES. + +It actually computes a single value from the full list of values +produced by 'gnetlist:get-all-package-attributes' as that list is +passed through 'unique-attribute'. + +For backward compatibility, the default behavior is to return the +value associated with the first symbol instance for REFDES. If all +instances of REFDES do not have the same value for NAME, it prints a +warning. + +This can be modified by redefining 'unique-attribute' that is a +procedure that gets provided a non-empty list of attribute values, the +REFDES and the NAME used for the search. It is expected to return a +single value as a string or #f for an empty or non-existent attribute +value. + +Note that given the current load sequence of gnetlist, this +customization can only happen in the backend itself or in a file +loaded after the backend ('-m' option of gnetlist)." + (let* ((values (gnetlist:get-all-package-attributes refdes name)) + (value (and (not (null? values)) + (unique-attribute refdes name values +(or value "unknown"))) + ;; ;; Given a uref, returns the device attribute value (unknown if not defined) ;; diff --git a/gnetlist/src/g_netlist.c b/gnetlist/src/g_netlist.c index 14441cc..ef8d5fe 100644 --- a/gnetlist/src/g_netlist.c +++ b/gnetlist/src/g_netlist.c @@ -472,19 +472,34 @@ SCM g_get_pins_nets(SCM scm_uref) } -SCM g_get_package_attribute(SCM scm_uref, SCM scm_wanted_attrib) +/*! \brief Get attribute value(s) from a package with given uref. + * \par Function Description + * This function returns the values of a specific attribute type + * attached to the symbol instances with the given refdes. + * + * Every first attribute value found is added to the return list. A + * Scheme false value is added if the instance has no such attribute. + * + * \note The order of the values in the return list is the order of + * symbol instances within gnetlist (the first element is the value + * associated with the first symbol instance). + * + * \param [in] scm_uref Package reference. + * \param [in] scm_wanted_attrib Attribute name. + * \return A list of attribute values as strings and #f. + */ +SCM g_get_all_package_attributes(SCM scm_uref, SCM scm_wanted_attrib) { -SCM scm_return_value; +SCM ret = SCM_EOL; NETLIST *nl_current; char *uref; char *wanted_attrib; -char *return_value = N