gEDA-user: Building PCB
Hello all,
first of all, thanks to the people helping me to set polygon
clearance. This works, at least for small clearances. Clearances
bigger than about 0.5 mm let pcb die or create very odd results,
though. As the PCB coming with Ubuntu 10.10 is pretty old, I tried to
build from source:
$ sudo apt-get install intltool flex libgd2-xpm-dev
$ git clone git://git.gpleda.org/pcb.git pcb
$ cd pcb
$ ./autogen.sh
Checking autopoint version...
./autogen.sh: 18: autopoint: not found
Running autopoint...
./autogen.sh: 33: autopoint: not found
(no configure created here)
$ autoconf # -- the INSTALL doc says so
configure.ac:6: error: possibly undefined macro: AM_INIT_AUTOMAKE
If this token and others are legitimate, please use
m4_pattern_allow.
See the Autoconf documentation.
configure.ac:8: error: possibly undefined macro: AM_CONFIG_HEADER
(... and a few more ...)
$ ./configure --prefix=${PWD}/../pcb_Installation --disable-doc
./configure: line 2245: syntax error near unexpected token `1.9'
./configure: line 2245: `AM_INIT_AUTOMAKE(1.9)'
$ autoconf --version
autoconf (GNU Autoconf) 2.67
As you can see I'm undecided wether to use ./autogen.sh or autoconf.
Has somebody similar experiences? Perhaps a solution?
Thanks,
Markus
P.S.: Yes, I had the build process working on the previous version of
Ubuntu, but can't see what's different now.
- - - - - - - - - - - - - - - - - - -
Dipl. Ing. (FH) Markus Hitter
http://www.jump-ing.de/
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gEDA-user: PCB antenna pattern
I am designing a zigbee interface, and I am using an inverted F antenna out of PCB pattern. The problem is that the terminals of the antenna pattern are shorted (well not on 2.4GHz), so I don't have any clue what to put to the schematic. So far, I simply grounded the antenna pin of the transceiver, but it can lead to misunderstanding. The other option is to have a two-pin symbol, but the pattern will cause short circuit when running the DRC. Any suggestion? Thanks, Levente -- Kovacs Levente leventel...@gmail.com Voice: +36705071002 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: hiding an element's silk in pcb?
I know you can select an element and hide it's refdes with 'h'. Is there a way to hide all of the silk of an element? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: hiding an element's silk in pcb?
Not on a per-element basis. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Building PCB
Am 13.01.2011 um 16:46 schrieb DJ Delorie: Run autogen.sh; it runs everything else for you. Then run configure with the options you want. autopoint is in gettext autopoint is in a seperate package, but other than that, autogen.sh worked flawlessly. Thanks. Next problem is, there is no longer a dbus-1 package. Stuff is either in dbus or libdbus-1-3. I'll try to figure that on my own. Markus - - - - - - - - - - - - - - - - - - - Dipl. Ing. (FH) Markus Hitter http://www.jump-ing.de/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Building PCB
On Thu, 13 Jan 2011 19:29:53 +0100 Markus Hitter m...@jump-ing.de wrote: Am 13.01.2011 um 16:46 schrieb DJ Delorie: Run autogen.sh; it runs everything else for you. Then run configure with the options you want. autopoint is in gettext autopoint is in a seperate package, but other than that, autogen.sh worked flawlessly. Thanks. Next problem is, there is no longer a dbus-1 package. Stuff is either in dbus or libdbus-1-3. I'll try to figure that on my own. Try installing libdbus-1-dev. Regards, Colin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB antenna pattern
Make a symbol and matching footprint for the antenna. It is a functional element in the design. On Thu, Jan 13, 2011 at 10:57 AM, Kovacs Levente leventel...@gmail.com wrote: I am designing a zigbee interface, and I am using an inverted F antenna out of PCB pattern. The problem is that the terminals of the antenna pattern are shorted (well not on 2.4GHz), so I don't have any clue what to put to the schematic. So far, I simply grounded the antenna pin of the transceiver, but it can lead to misunderstanding. The other option is to have a two-pin symbol, but the pattern will cause short circuit when running the DRC. Any suggestion? Thanks, Levente -- Kovacs Levente leventel...@gmail.com Voice: +36705071002 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user -- http://evanfoss.googlepages.com/ ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Print layout to a file in PCB
I have looked at the PCB documentation but I don't see how to print a layout to a file. I have done this before but it was a while ago and it appears the gui has changed. Can someone tell me how to do this? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB antenna pattern
On 01/13/2011 04:57 PM, Kovacs Levente wrote: I am designing a zigbee interface, and I am using an inverted F antenna out of PCB pattern. The problem is that the terminals of the antenna pattern are shorted (well not on 2.4GHz), so I don't have any clue what to put to the schematic. So far, I simply grounded the antenna pin of the transceiver, but it can lead to misunderstanding. The other option is to have a two-pin symbol, but the pattern will cause short circuit when running the DRC. FYI, I made a loop antenna (for ZigBee too), same problem. I ignore DRC. There was a thread about it, maybe a year ago or more, without any good solution. Any suggestion? Thanks, Levente ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Print layout to a file in PCB
On Thu, 2011-01-13 at 15:37 -0500, Rob Butts wrote: I have looked at the PCB documentation but I don't see how to print a layout to a file. I have done this before but it was a while ago and it appears the gui has changed. Can someone tell me how to do this? File - Export Layout... - PS (or PNG etc..) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Print layout to a file in PCB
Great! Thanks! On Thu, Jan 13, 2011 at 3:43 PM, Peter Clifton [1]pc...@cam.ac.uk wrote: On Thu, 2011-01-13 at 15:37 -0500, Rob Butts wrote: I have looked at the PCB documentation but I don't see how to print a layout to a file. I have done this before but it was a while ago and it appears the gui has changed. Can someone tell me how to do this? File - Export Layout... - PS (or PNG etc..) -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) ___ geda-user mailing list [2]geda-user@moria.seul.org [3]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:pc...@cam.ac.uk 2. mailto:geda-user@moria.seul.org 3. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB antenna pattern
On Fri, Jan 14, 2011 at 7:22 AM, Tamas Szabo sza2k...@freemail.hu wrote: I made a loop antenna (for ZigBee too), same problem. I ignore DRC. There was a thread about it, maybe a year ago or more, without any good solution. I've had similar problems when making low value resistors out of copper tracks and when making SPDT solder jumpers with one side closed by default in copper. The PCB codebase currently has no concept that two nets can be joined by copper and yet still be separate nets. Significant architectural changes would need to be made to support this concept. Such changes would be useful, but would need careful thought in these areas: * how PCB defines two nets to be connected * introduction of the concept of non-connecting copper * changes to file formats to support non-connecting copper * what classes of non conducting copper ? RF delay copper / resistive copper / other ? * how to display non-connecting copper ? * how should DRC handle non-connecting copper ? * how should the find command handle non-connecting copper ? Stephen ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB antenna pattern
On 1/13/2011 10:57 AM, Kovacs Levente wrote: I am designing a zigbee interface, and I am using an inverted F antenna out of PCB pattern. The problem is that the terminals of the antenna pattern are shorted (well not on 2.4GHz), so I don't have any clue what to put to the schematic. So far, I simply grounded the antenna pin of the transceiver, but it can lead to misunderstanding. The other option is to have a two-pin symbol, but the pattern will cause short circuit when running the DRC. Any suggestion? Thanks, Levente Can't you make the antenna in a component as multiple pads? Then it would be connected just like any other component pads. If there is no way to make the antenna out of pads, perhaps you could create pads that are very tiny so that they can be connected by traces without changing the outline. Pad A would need to overlap pad B. Then separate nets could connect to the two pads without the software thinking they are shorted. If the tools won't let you have pads touching inside a part, I guess this won't work. Rick ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Print layout to a file in PCB
Peter Clifton wrote: Can someone tell me how to do this? File - Export Layout... - PS (or PNG etc..) Or from the command line: pcb -x eps foobar.pcb with options: pcb -x eps \ --action-string 'DISPLAY(NameOnPCB)' \ --element-color '#00' \ --pin-color '#cc' \ --layer-color-1 '#ff' \ --layer-color-2 '#ff' \ --layer-color-3 '#ff' \ --as-shown \ --layer-stack outline,comment,elements,top \ --eps-file /tmp/out_ref.eps \ foobar.pcb ---)kaimartin(--- -- Kai-Martin Knaak Email: k...@familieknaak.de Öffentlicher PGP-Schlüssel: http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soft and Hard symbols
On Jan 12, 2011, at 11:29 AM, al davis wrote: Both of these are areas where we could take the lead, but I need help to do that. I can't do it alone, and can't do it if people are fighting it. Does anyone want to help? On Wednesday 12 January 2011, Edward Hennessy wrote: I would like to help with this project. That's great. There is a long list of things that need to be done. Where do you want to start? My preference is to start with netlist translation, using gnucap's translator system that goes both ways. In this case, that's a language plugin, reading and writing the gschem format, then another language plugin for the PCB format. al. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
