Re: gEDA-user: Thermals on Pads
On Sun, 2011-01-30 at 12:54 -0700, asom...@gmail.com wrote: > When I design surface mount boards I make extensive use of planes, and > it is a severe annoyance that I can't automatically connect those > planes to component pads. The standard solutions to this problem seem > to be either: What is wrong with a track segment which you "join" to the polygon with the "j" hotkey? (Were you aware of that one?) When it comes to auto-thermal'ing pads, one has a lot of possible choices of trace thickness, orientation etc.. and it is not obvious whether an auto-thermal would be an easy thing to do. IMO, what we "want" is an auto-join based on connectivity. (Lets presume we can mark the plane as "belonging" to the GND net.. draw a trace which connects to a pad which belongs to that net and it should quite probably join up (by default). NB: Sometimes one deliberately routes a track belonging to the same "net" separately - 4 terminal current sensing springs to mind, where big polygons might make up the power traces. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
On Mon, 2011-01-31 at 13:09 -0700, asom...@gmail.com wrote: > The IPC- table of contents shows that "Thermal Relief in Conductor > Planes" gets only one tenth of a page. I can't imagine any detailed > information in that space. It's sister document, IPC-2221, can be > found for free at > http://www.victronics.cl/Inf_tecnica/Notas%20de%20aplicacion/PCBs/IPC-2221(L).pdf (You're not supposed to though.. IPC charge for their standards!) Thanks to those who've quoted me text from their copies of the standards.. I've the info I was looking for. Basically they suggest web width be about 60% of the minimum acceptable land diameter for the part.. DIVIDED by the number of webs in use. They also stipulate how the webs should SHRINK if you make the pad bigger than the minimum allowable size, and give a limit for the total width of web over all planes. What they don't say is how to calculate the clearance (obviously important for thermal conductivity to the plane), nor whether there is any special relationship between clearance and web width. (Implied not, since they provide explicit guidelines for web width). Clearly attributes are the way forward - let the user fiddle.. but I would also like to see it possible for a thermal to be recognised as "default" in some way.. and scale with other geometry. Perhaps this is me just making things more complex than necessary. The good old-fashioned +,x thermals with no rounding are the nicest in my opinion ;) I'm told by an industry source that some fab's (high end ones perhaps?), don't always produce an exact 1:1 match between the design geometry you send them and what they produce. THEY will know how to do thermals in a way which suits THEIR soldering process, so they may modify things in their own CAD software. Conveying the _intent_ of the design is what you need to do. For the cheap (or DIY) end of the fab market we often serve - I think we should assume that we get what our design files ask for, even if it is silly! For my money, Fully parametrised thermals will basically boil down to arbitrary polygons built up from things we can teach PCB how to do.. such as webs. I want to see support for arbitrary web count, web geometry and web positioning.. (How this works for square.. I don't know). Ideally, square pads would connect coming in at the corner of the square pad, or employ a tear-drop for extra robustness against drill breakout. Since this could get complex quickly - I wonder if we ought to at this stage start doing these by reference.. include the thermal design ONCE, and reference it by name on pads which use it. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: anyway to make rectangular holes such as these?
On Mon, Jan 31, 2011 at 1:29 AM, yamazakir2 wrote: > http://products.cui.com/getPDF.aspx?fileID=4458 > I use large round holes -- http://wiblocks.luciani.org/PICO/PICO1TR-index.html IIRC the footprint is in the gEDA section at luciani.org (* jcl *) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: anyway to make rectangular holes such as these?
Peter Clifton wrote: > It is unfortunate that this info can't be part of the foot-print. You > will have to draw it on the board directly. A work-around may be to make a footprint that comprises two *.fp files. One with the ordinary pins, pads and lines. And another with pads where the holes to be milled should go. Include some kind of alignment mark in both parts. Place the first part the usual way. Do break_buffer_element_into_pieces before you place the second part just on top of the first. Move the mill lines to the dedicated milling layer with the [m] accel. All fabs I know would accept (and expect) additional routing lines in the outline layer. ---<)kaimartin(>--- -- Kai-Martin Knaak Email: k...@familieknaak.de Öffentlicher PGP-Schlüssel: http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: refdes_renum_slots update
On Tue, Feb 1, 2011 at 9:25 AM, Joshua wrote: > Here is an update for refdes_renum_slot. > > New Feature: > The tool now takes into consideration the components x position along with > its y position when assigning a part number. Thus a screen full of > components will be numbered from left to right and then top down. Thank you, sounds useful :-) > Existing Features: > Assigns a refdes values: Converts refdes values from U?, U?, R?, etc to U1, > U2, R1 etc... > Respects slotted components. Slotted components are grouped with the same > refdes number based on their physical proximity to each other. Do be careful with this - it can cause real pain in cases like: * Two LM324 quad op amp chips in the schematic * One powered from +-5V rails, the other from +-12V Great care needs to be taken when swapping slots in this situation ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: refdes_renum_slots update
Here is an update for refdes_renum_slot. New Feature: The tool now takes into consideration the components x position along with its y position when assigning a part number. Thus a screen full of components will be numbered from left to right and then top down. Existing Features: Assigns a refdes values: Converts refdes values from U?, U?, R?, etc to U1, U2, R1 etc... Respects slotted components. Slotted components are grouped with the same refdes number based on their physical proximity to each other. Existing groupings are respected. If components are manually assigned the same refdes, they will end up in the same group even if found on separate pages. Page skipping. The refdes can be prefixed with the page number. U101 for the first component on page 1. U201 for page 2. Gentle renumbering. If --force is not specified, all existing refdes assignments are preserved. The GPLed java code can be downloaded from here: http://public.laserlinc.com/Joshua/refdes_renum_slots.java ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
The IPC- table of contents shows that "Thermal Relief in Conductor Planes" gets only one tenth of a page. I can't imagine any detailed information in that space. It's sister document, IPC-2221, can be found for free at http://www.victronics.cl/Inf_tecnica/Notas%20de%20aplicacion/PCBs/IPC-2221(L).pdf . IPC-2221 has a section on thermal relief, but without any useful details. On Sun, Jan 30, 2011 at 2:20 PM, Peter Clifton wrote: > On Sun, 2011-01-30 at 20:39 +, Peter Clifton wrote: >> I've been looking at some brokenness with our normal thermal shape >> generation recently, so if I get a chance I could look at your patch - >> and possibly work from it. > > The only reference to geometry I've found so far is: > > http://www.pcbwizards.com/Glossary20.htm > > And IPC-. (Which I don't have a copy of). > > Anyone have access to a copy? > > -- > Peter Clifton > > Electrical Engineering Division, > Engineering Department, > University of Cambridge, > 9, JJ Thomson Avenue, > Cambridge > CB3 0FA > > Tel: +44 (0)7729 980173 - (No signal in the lab!) > Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) > > > > ___ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user > > ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
Hi, > -Original Message- > From: geda-user-boun...@moria.seul.org > [mailto:geda-user-boun...@moria.seul.org] On Behalf Of rickman > Sent: Monday, January 31, 2011 5:11 PM > To: gEDA user mailing list > Subject: Re: gEDA-user: Thermals on Pads > > On 1/31/2011 10:33 AM, Martin Kupec wrote: > > On Sun, Jan 30, 2011 at 11:13:27PM -0500, rickman wrote: > >> On 1/30/2011 4:47 PM, Martin Kupec wrote: > >>> On Sun, Jan 30, 2011 at 04:37:17PM -0500, rickman wrote: > What geometry problems do you have? There are plenty of > references > in regard to thermals. I don't recall seeing any other than > bridges that span a uniform gap around the pad. The > only variation I can recall is > the number and rotation angle of the pattern. But > most, if not all > that I have seen use four bars either along the x and y > axes or at > 45 degree angles. I think there are even some built in commands > for this in the RS-274X Gerber file spec. > > Or am I missing something? > >>> We already do support bridges with rounded corners. And > what we do > >>> not support is anything suitable for TSOP package pads(long thin > >>> pads near to each other). > >>> > >>> But the big problem with you current implementations is > the size of > >>> the bridges. The size is somewhat magicaly calculated > from the size > >>> of pin and from the size of clerance. But this is > neighter working > >>> nor probably right. > >>> > >>> With big clerance the shape becomes completly bogus(at > least for the > >>> rounded versions). > >> That surprises me that the bridge width would be calculated rather > >> than specified. What's the idea behind that? Isn't it a simple > >> matter to let the designer pick the dimensions both for > the width of > >> the bridge and the width of the clearance? > > I would not argue against it. > > > > So shall we change the code in a way, that older files gets current > > calculation and newer ones has thermal specification in file? > > > > This opens discussion how/what to specify. > > > > Martin Kupec > > Is there a way to support both compatibly? If the data is to > be specified, it will need to be stored in the design file. > If that info is there, use it, if the info is not present let > the software determine the values be used? I would think the > only issue is determining a file format that would allow the > info to be optional yet compatible with existing formats > without the info. > > Rick > > Maybe use attributes here ? Just my EUR 0.02 Kind regards, Bert Timmerman. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
On 1/31/2011 10:33 AM, Martin Kupec wrote: On Sun, Jan 30, 2011 at 11:13:27PM -0500, rickman wrote: On 1/30/2011 4:47 PM, Martin Kupec wrote: On Sun, Jan 30, 2011 at 04:37:17PM -0500, rickman wrote: What geometry problems do you have? There are plenty of references in regard to thermals. I don't recall seeing any other than bridges that span a uniform gap around the pad. The only variation I can recall is the number and rotation angle of the pattern. But most, if not all that I have seen use four bars either along the x and y axes or at 45 degree angles. I think there are even some built in commands for this in the RS-274X Gerber file spec. Or am I missing something? We already do support bridges with rounded corners. And what we do not support is anything suitable for TSOP package pads(long thin pads near to each other). But the big problem with you current implementations is the size of the bridges. The size is somewhat magicaly calculated from the size of pin and from the size of clerance. But this is neighter working nor probably right. With big clerance the shape becomes completly bogus(at least for the rounded versions). That surprises me that the bridge width would be calculated rather than specified. What's the idea behind that? Isn't it a simple matter to let the designer pick the dimensions both for the width of the bridge and the width of the clearance? I would not argue against it. So shall we change the code in a way, that older files gets current calculation and newer ones has thermal specification in file? This opens discussion how/what to specify. Martin Kupec Is there a way to support both compatibly? If the data is to be specified, it will need to be stored in the design file. If that info is there, use it, if the info is not present let the software determine the values be used? I would think the only issue is determining a file format that would allow the info to be optional yet compatible with existing formats without the info. Rick ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
On Sun, Jan 30, 2011 at 11:13:27PM -0500, rickman wrote: > On 1/30/2011 4:47 PM, Martin Kupec wrote: > > On Sun, Jan 30, 2011 at 04:37:17PM -0500, rickman wrote: > >> What geometry problems do you have? There are plenty of references in > >> regard to thermals. I don't recall seeing any other than bridges that > >> span a uniform gap around the pad. The only variation I can recall is > >> the number and rotation angle of the pattern. But most, if not all > >> that I have seen use four bars either along the x and y axes or at 45 > >> degree angles. I think there are even some built in commands for this > >> in the RS-274X Gerber file spec. > >> > >> Or am I missing something? > > We already do support bridges with rounded corners. And what we > > do not support is anything suitable for TSOP package pads(long thin pads > > near to each other). > > > > But the big problem with you current implementations is the size of the > > bridges. The size is somewhat magicaly calculated from the size of pin > > and from the size of clerance. But this is neighter working nor probably > > right. > > > > With big clerance the shape becomes completly bogus(at least for the > > rounded versions). > > That surprises me that the bridge width would be calculated rather than > specified. What's the idea behind that? Isn't it a simple matter to > let the designer pick the dimensions both for the width of the bridge > and the width of the clearance? I would not argue against it. So shall we change the code in a way, that older files gets current calculation and newer ones has thermal specification in file? This opens discussion how/what to specify. Martin Kupec ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Thermals on Pads
On 1/30/2011 4:47 PM, Martin Kupec wrote: On Sun, Jan 30, 2011 at 04:37:17PM -0500, rickman wrote: What geometry problems do you have? There are plenty of references in regard to thermals. I don't recall seeing any other than bridges that span a uniform gap around the pad. The only variation I can recall is the number and rotation angle of the pattern. But most, if not all that I have seen use four bars either along the x and y axes or at 45 degree angles. I think there are even some built in commands for this in the RS-274X Gerber file spec. Or am I missing something? We already do support bridges with rounded corners. And what we do not support is anything suitable for TSOP package pads(long thin pads near to each other). But the big problem with you current implementations is the size of the bridges. The size is somewhat magicaly calculated from the size of pin and from the size of clerance. But this is neighter working nor probably right. With big clerance the shape becomes completly bogus(at least for the rounded versions). That surprises me that the bridge width would be calculated rather than specified. What's the idea behind that? Isn't it a simple matter to let the designer pick the dimensions both for the width of the bridge and the width of the clearance? Rick ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: anyway to make rectangular holes such as these?
On Mon, 2011-01-31 at 18:43 +1100, Stephen Ecob wrote: > Another approach I've seen is to place a row of overlapping holes very > close together. You can do this by hacking the .PCB file in a text > editor. Many PCB fabricators can handle this approach, some cannot - > check with your board manufacturer first. Yes - and many will say NO WAY, as it can result in snapped drills for them. (And possibly not give a good plated slot). We don't support this (from inside the footprint), but what you need is a mechanical layer which defines the shape of the slot to be routed. You would need to talk to your prospective board vendor(s) to find out what would suit them best. It is unfortunate that this info can't be part of the foot-print. You will have to draw it on the board directly. A plated slots layer might be what is needed - although you may have to kludge what you need in PCB by calling the layer "route" or "outline", so PCB doesn't copy all pin / via pads onto that layer as well. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
