gEDA-user: Strange resistor footprints

2011-02-15 Thread Oliver King-Smith
   I am trying to generate a pcb from my schematic using gsch2pcb.  It is
   generating syntax errors when I try to load it into pcb.  The line in
   question is ).fp(0603.fp,R229,87K).  Here is a snippet of the listing:
   #ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(-1*V1/2) eval(
   V2/2) CYW]
   #ElementLine[eval(-1*V1/2) eval(-1*V2/2) eval(   V1/2)
   eval(-1*V2/2) CYW]
   #ElementLine[eval(   V1/2) eval(   V2/2) eval(   V1/2)
   eval(-1*V2/2) CYW]
   #ElementLine[eval(   V1/2) eval(   V2/2) eval(-1*V1/2) eval(
   V2/2) CYW]
   ).fp(0603.fp,R229,87K)
   # grab the input values and convert to 1/100 mil
   My resistors look like:
   C 50500 46500 1 90 0 resistor-1.sym
   {
   T 50100 46800 5 10 0 0 90 0 1
   device=RESISTOR
   T 50200 47000 5 10 1 1 90 0 1
   refdes=R229
   T 50500 46500 5 10 0 0 90 0 1
   footprint=0603.fp
   T 50700 47000 5 10 1 1 90 0 1
   value=87K
   T 50700 46500 5 10 1 1 90 0 1
   precision=1%
   }
   in the schematic.  What am I doing wrong here?
   Oliver


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Re: gEDA-user: pads, mask and solder paste

2011-02-15 Thread Stephen Ecob
I've added this patch to the corresponding LaunchPad bug, #718342
My opinion is that the patch improves PCB's generation of the solder
paste and has a very low risk of creating undesired side effects.  I
recommend it for early incorporation into GIT head.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> C++ can get a great mess after someone starts using some of its
> nifty features.

And it can be a huge maintenance timesaver if you use it right, which
is why we're doing this.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 11:39:43AM -0500, DJ Delorie wrote:
> 
> > What parts are in C++ ? I have came into only C files. I don't like
> > C++ much, so I would be happy if we stick with C.
> 
> The current code can be compiled with either a C or C++ compiler.  So
> technically, you're already using C++!
Yes. And I am perfectly file with it. But I think it should stay this
way. Having it written in pure C and being able to compile with C++.

C++ can get a great mess after someone starts using some of its nifty
features.

Martin Kupec



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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> Ok, so instead of having sets of different type layers for each
> physical layer, we should have one set with any layer. And when we
> want to put something on some type of layer, we just find the right
> one?

Right.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Stephan Boettcher
DJ Delorie  writes:

> The two words mean two different things in the English language.

sorry, I wasn't clear on these distinctions.  

> Refactoring means changing nonfunctional attributes of the software
> (i.e. rearranging code to be more maintainable).  If we're talking
> about changing functionality (as we were in this case), we need to use
> a different word.
>
> An example of refactoring, in PCB's case, would be changing the
> underlying language from the C/C++ hybrid mess we have now to a clean
> C++ object-oriented structure, without changing the code's
> functionality at all.
>
> An example of redesigning, in PCB's case, would be changing the way
> the user manages the layer stack and what kinds of layers the user can
> describe.

-- 
Stephan



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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> What parts are in C++ ? I have came into only C files. I don't like
> C++ much, so I would be happy if we stick with C.

The current code can be compiled with either a C or C++ compiler.  So
technically, you're already using C++!


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Stephan Boettcher
Martin Kupec  writes:

> On Tue, Feb 15, 2011 at 09:45:40AM -0500, DJ Delorie wrote:
>> 
>> > I am not shure if it is possible to have non-circular drill holes in
>> > gerber files. We can have the "pad" around the hole be of any shape,
>> > but the hole itself probably needs to be circular.
>> 
>> We can have any shape hole we want, if we export it as a gerber file
>> instead of an excellon file.  However, that doesn't mean the fab will
>> manufacture it.
>
> I will stick with the current manufactors abbilities...

Hmmm.  We had requests to express plated slots in this group.  If
somebody defines an extra via layer for slots, and draws polygons or
traces on it, the exporter should recognise that and produce a gerber
instead of a drill file.  The rest is negotiation with the vendor.

PCB will be able to check the connectivity by the via connectivity
attributes.

I'd love to draw square polygons (or better traces without rounded caps)
on a via layer and export to gds2 instead or gerber.

-- 
Stephan


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Re: gEDA-user: Open Source Hardware (OSHW) Definition 1.0

2011-02-15 Thread Ali Moreno
100% agree ;)

2011/2/14 DJ Delorie :
>
> "Ideally, open source hardware uses . . . open-source design tools . . ."
>
> "The license may require that the design files are provided in
> fully-documented, open format(s). "
>
> :-)
>
>
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>


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 10:22:16AM -0600, Andrew Miner wrote:
>  > I am not shure if it is possible to have non-circular drill holes
>  in
>  > gerber files. We can have the "pad" around the hole be of any
>  shape,
>  > but the hole itself probably needs to be circular.
>  We can have any shape hole we want, if we export it as a gerber file
>  instead of an excellon file.  However, that doesn't mean the fab
>  will
>  manufacture it.
> 
>DJ is right in wanting to output arbitrary shapes for holes.
>In Flex boards you can:
> *Mechanically drill them, resulting in circular holes
> *Mechanically route them, resulting in slots
> *Mechanically punch them (in a press), resulting in squares,
>circles, ovals, and other reasonable shapes.
> *Laser drill them, resulting in any shape you can think of
>More than one of these are available for hard boards as well,
>especially the thinner hard boards.

Acknowleadged. When I touch anything with holes, I will keep that
in mind.

Martin



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Andrew Miner
 > I am not shure if it is possible to have non-circular drill holes
 in
 > gerber files. We can have the "pad" around the hole be of any
 shape,
 > but the hole itself probably needs to be circular.
 We can have any shape hole we want, if we export it as a gerber file
 instead of an excellon file.  However, that doesn't mean the fab
 will
 manufacture it.

   DJ is right in wanting to output arbitrary shapes for holes.
   In Flex boards you can:
*Mechanically drill them, resulting in circular holes
*Mechanically route them, resulting in slots
*Mechanically punch them (in a press), resulting in squares,
   circles, ovals, and other reasonable shapes.
*Laser drill them, resulting in any shape you can think of
   More than one of these are available for hard boards as well,
   especially the thinner hard boards.
   Andy Miner


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 09:54:49AM -0500, DJ Delorie wrote:
> An example of refactoring, in PCB's case, would be changing the
> underlying language from the C/C++ hybrid mess we have now to a clean
> C++ object-oriented structure, without changing the code's
> functionality at all.
What parts are in C++ ? I have came into only C files. I don't like C++
much, so I would be happy if we stick with C.

Martin Kupec



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 09:45:40AM -0500, DJ Delorie wrote:
> 
> > I am not shure if it is possible to have non-circular drill holes in
> > gerber files. We can have the "pad" around the hole be of any shape,
> > but the hole itself probably needs to be circular.
> 
> We can have any shape hole we want, if we export it as a gerber file
> instead of an excellon file.  However, that doesn't mean the fab will
> manufacture it.
I will stick with the current manufactors abbilities...

> 
> > Currently it seems that physical layer will contain:
> 
> My thoughts are that you have one or more drawing layers per physical
> layer, and you can add/remove them as needed.  Basically, you have a
> stack of drawing layers, with each assigned to a physical layer (by
> number, I suppose), rather than pre-defining what layers each physical
> layer "needs".

Ok, so instead of having sets of different type layers for each physical layer, 
we
should have one set with any layer. And when we want to put something on
some type of layer, we just find the right one?

> 
> This is not much different than what we do now - we have layer groups
> (which become physical layers) and layers (which become drawing
> sheets), which we put into groups.  I'm suggesting a change of
> semantics to better reflect how groups *should* be used.
I have already suggested change of names for those, so
one has a hint what is he looking at.

Martin



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Kovacs Levente
Hi,


That is very good, that you start working on the layer structure of PCB.

I'd turn the mask layer as a negative layer by definition.

I had hard time when I was designing my first 4 layer board, because there is
no way to switch on an inner layer with the inner pads of components without
displaying all the components on the outer layer.

Yes, I'd implement paste layers and non-conductive mechanical layers.

Yes, get rid of the current grouping mechanism.

I am really supporting this movement.

Thanks,
Levente

-- 
Kovacs Levente 
Voice: +36705071002




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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> When the software consists of a collection of arbitrary "features"
> without a cleanly factored foundation underneath,

This is your opinion, and not relevent to the point I was trying to
make.

> there is no distinction between redesign and refactoring.

The two words mean two different things in the English language.
Refactoring means changing nonfunctional attributes of the software
(i.e. rearranging code to be more maintainable).  If we're talking
about changing functionality (as we were in this case), we need to use
a different word.

An example of refactoring, in PCB's case, would be changing the
underlying language from the C/C++ hybrid mess we have now to a clean
C++ object-oriented structure, without changing the code's
functionality at all.

An example of redesigning, in PCB's case, would be changing the way
the user manages the layer stack and what kinds of layers the user can
describe.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> I am not shure if it is possible to have non-circular drill holes in
> gerber files. We can have the "pad" around the hole be of any shape,
> but the hole itself probably needs to be circular.

We can have any shape hole we want, if we export it as a gerber file
instead of an excellon file.  However, that doesn't mean the fab will
manufacture it.

> Currently it seems that physical layer will contain:

My thoughts are that you have one or more drawing layers per physical
layer, and you can add/remove them as needed.  Basically, you have a
stack of drawing layers, with each assigned to a physical layer (by
number, I suppose), rather than pre-defining what layers each physical
layer "needs".

This is not much different than what we do now - we have layer groups
(which become physical layers) and layers (which become drawing
sheets), which we put into groups.  I'm suggesting a change of
semantics to better reflect how groups *should* be used.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread John Doty

On Feb 15, 2011, at 7:31 AM, DJ Delorie wrote:

> You're talking about redesigning, not refactoring.

When the software consists of a collection of arbitrary "features" without a 
cleanly factored foundation underneath, there is no distinction between 
redesign and refactoring.

John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com




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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> IMHO, vias should be layers as well, with attributes that tell to which
> conductive layers they connect. 

We've talked about this before, too.

The best design we came up with was to create "composites", where a
stackup was built from sub-stackups etc, and each composite contained
one or more layers combined with an "outline".  The outline included
any holes, such as vias.  So a via at the top-level board had a hole
that applied to all layers, but if you put the via at some lower
level, in a composite that contains a subset of the physical layers,
you got a blind/buried via.  This also allowed us to represent flex
cable, where the "outline" of each layer might be different from other
layers.

This design applied well to the process of driling then assembling PCB
layers, but didn't apply well to partially re-drilling an assembled PCB.
I.e. it didn't support this via combination:

--+ +--
  | |
  | | -+ +-
  | |  | |
--+ +---   | |   --
   | |
---+ +-


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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> Those need a major refactoring as well,

You're talking about redesigning, not refactoring.


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Re: gEDA-user: General Layers questions

2011-02-15 Thread DJ Delorie

> Layers should get attributes.

Layers already have attributes.

Edit -> Edit attributes of -> Current Layer


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 01:49:48PM +0100, Stephan Boettcher wrote:
> With different annular rings, and clearance on each layer, and
> non-circular shapes, ...
I am not shure if it is possible to have non-circular drill holes in
gerber files. We can have the "pad" around the hole be of any shape,
but the hole itself probably needs to be circular.
> 
> A via editor HID shall at least provide means to modify annular and
> clearance independently for top, inner, bottom, soldermask top,
> soldermask bottom logical layers.  The file formal shall allow to spec
> this for each physical layer as well.  When we are at that point, a via
> is a stack of structures on various layers.  The hole itself may then be
> just a circle on another layer of type via.

Good point is, that via should have different properties for different
layers. But I would line to keep via as part of the layer. If you would
like to have blind and burried vias, you would need "via" layer for each
physical layer. I want to be as versatile as possible, but also keep
things simple. Having 8 layers just for one physical layer will end up
in a great mess.

Currently it seems that physical layer will contain:
at least one cooper layer
possibly one or more silk layers
at least one mask layer - or should be "inner layers" without mask at all?
possibly one or more past layers

When I get an account on the wiki, I will write my current
implementation thoughts there and we can discuss it here.

Martin



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Stephan Boettcher
Martin Kupec  writes:

> On Tue, Feb 15, 2011 at 11:17:27AM +0100, Stephan Boettcher wrote:
>> And think about vias as well.  Those need a major refactoring as well,
>> to support custom via stacks, blind and burried vias.  
>> 
>> IMHO, vias should be layers as well, with attributes that tell to which
>> conductive layers they connect. 
>> 
>> So maybe it is a good idea to keep vias in mind when redoing they way
>> layers are handled.
>
> I was at the idea, that a via will be assigned set of "physical layers"
> and it will show in each "cooper layer" belonging to that "physical
> layer".
>
> That should be relativly simple to achieve. And by default it will be
> assigned all the "physical layers". Pressing shift or ctrl will make it
> ask what layers you want it to belong. Plus there need to be the
> possibility to change default temporary in order to aid making a lot of
> blind/burried vias at once.

With different annular rings, and clearance on each layer, and
non-circular shapes, ...

A via editor HID shall at least provide means to modify annular and
clearance independently for top, inner, bottom, soldermask top,
soldermask bottom logical layers.  The file formal shall allow to spec
this for each physical layer as well.  When we are at that point, a via
is a stack of structures on various layers.  The hole itself may then be
just a circle on another layer of type via.

-- 
Stephan



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Tue, Feb 15, 2011 at 11:17:27AM +0100, Stephan Boettcher wrote:
> And think about vias as well.  Those need a major refactoring as well,
> to support custom via stacks, blind and burried vias.  
> 
> IMHO, vias should be layers as well, with attributes that tell to which
> conductive layers they connect. 
> 
> So maybe it is a good idea to keep vias in mind when redoing they way
> layers are handled.

I was at the idea, that a via will be assigned set of "physical layers"
and it will show in each "cooper layer" belonging to that "physical
layer".

That should be relativly simple to achieve. And by default it will be
assigned all the "physical layers". Pressing shift or ctrl will make it
ask what layers you want it to belong. Plus there need to be the
possibility to change default temporary in order to aid making a lot of
blind/burried vias at once.

Martin Kupec



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Re: gEDA-user: General Layers questions

2011-02-15 Thread Stephan Boettcher
Steven Michalske  writes:

> Trashing the spam
>
> Layers should get attributes.
> Conductive
> Thickness
> Resistivity
> Material
> Dieletric constant
> Are a few I can think of off the top of my head
>
> So a way to attach arbitrary attributes is a good plan for flexibility.
>
> Need for other kinds of layers. Like keepouts and part outline.  
>
> Perhaps a layer plugin concept.  A layer that says it wants to be
> processed by a drc plugin of type foo.

And think about vias as well.  Those need a major refactoring as well,
to support custom via stacks, blind and burried vias.  

IMHO, vias should be layers as well, with attributes that tell to which
conductive layers they connect. 

So maybe it is a good idea to keep vias in mind when redoing they way
layers are handled.

-- 
Stephan


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Re: gEDA-user: General Layers questions

2011-02-15 Thread Steven Michalske
Trashing the spam

Layers should get attributes.
Conductive
Thickness
Resistivity
Material
Dieletric constant
Are a few I can think of off the top of my head

So a way to attach arbitrary attributes is a good plan for flexibility.

Need for other kinds of layers. Like keepouts and part outline.  

Perhaps a layer plugin concept.  A layer that says it wants to be processed by 
a drc plugin of type foo.


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Re: gEDA-user: Open Collector Error Checking

2011-02-15 Thread Karl Hammar
Bert Timmerman:
...
> Peter Clifton:
> > On Mon, 2011-02-14 at 13:31 -0800, Jared Casper wrote:
> > 
> > > Maybe make an "official" LP tag of "vetted" or something that "junior"
> > > developers can add to a patch, allowing a senior dev to concentrate on 
> > > those first, not spending on time on patches that need work.
> > Sounds like a good idea - call it "patch-tested" or something?
> > 
> > We should probably set up a team as a place-holder to get 
> > assigned as a job-list for patches which are ready to be pushed.
> 
> Maybe add a LP user "geda-push" and/or "pcb-push" (or "geda-dev" and/or
> "pcb-dev"), and assign to this user.

What about "bug-squad", and then we might need a "bug-meister" for 
coordination (and only the bug-meister would need commit permisson).

I can participate in the sense that you can send me a bug to
investigate, and I'll look into that.

I'd nominate Kai-Martin as bug-meister if he is willing.

Regards,
/Karl Hammar

---
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57




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Re: gEDA-user: Open Collector Error Checking

2011-02-15 Thread Karl Hammar
Kai-Martin:
...
> There should probably be more active core developers in the first 
> place. What is the process to become one? Who are candidates?

I'm interested in be able to have sub-layouts, removing the
distinction between footprint/pcb and sym/sch files, and removing
annoying small things that comes in my way, mostly backend things.
I migth be interested in working with the lesstiff hid.

Regards,
/Karl Hammar

---
Aspö Data
Lilla Aspö 148
S-742 94 Östhammar
Sweden
+46 173 140 57




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Re: gEDA-user: General Layers questions

2011-02-15 Thread Martin Kupec
On Mon, Feb 14, 2011 at 10:16:34PM +0100, Stephan Boettcher wrote:
> 
> Kai-Martin Knaak  writes:
> 
> > Martin did not ask for a general pcb wish list, but for an in depth
> > discussion of a single topic. 
> 
> A discussion where most people cannot contribute?  What is wrong with
> this list for discussion?

I am sorry for that. I have not checked before, that it is not
so simple to get an account.

But I am still willing to have a wiki page for that.
We are doing disscution here, but I am going to write to the wiki the
conclusions. So at the end, the wiki page will represent opinion
of the majority and I will use that as reference for writting code.

Using tens of emails from this mailing list as reference is not exactly the
best way to do it right.

Martin Kupec



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