Re: gEDA-user: polygon regression in pcb+gl
On 2/20/11, Stephen Ecob silicon.on.inspirat...@gmail.com wrote: On Mon, Feb 21, 2011 at 1:51 PM, Kai-Martin Knaak k...@lilalaser.de wrote: Congrats to your new status! The geda project got a new dev! This is really good news :-) +1 :-) Thanks to the whole community! ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB: DRC does not correctly check pad clearance
On 2/19/11, Kai-Martin Knaak k...@lilalaser.de wrote:
I can confirm for fairly recent versions of pcb and pcb+gl.
In your example, DRC starts to complain at 7.1 mil. That is, 2 mil
too late. The discrepancy grows as the clearance grows. With an
11 mil gap I had to ask for 14.1 mil minimum distance to receive
DRC errors.
It looks like Bloat in IsLineInPolygon() should be doubled like in the
attachment.
diff --git a/src/find.c b/src/find.c
index 615659d..a819b4a 100644
--- a/src/find.c
+++ b/src/find.c
@@ -2670,7 +2670,7 @@ IsLineInPolygon (LineTypePtr Line, PolygonTypePtr Polygon)
return false;
if (TEST_FLAG(SQUAREFLAG,Line)(Line-Point1.X==Line-Point2.X||Line-Point1.Y==Line-Point2.Y))
{
- BDimension wid = (Line-Thickness + Bloat + 1) / 2;
+ BDimension wid = (Line-Thickness + 1) / 2 + Bloat;
LocationType x1, x2, y1, y2;
x1 = MIN (Line-Point1.X, Line-Point2.X) - wid;
@@ -2684,7 +2684,7 @@ IsLineInPolygon (LineTypePtr Line, PolygonTypePtr Polygon)
Box-Y1 = Polygon-Clipped-contours-ymax + Bloat
Box-Y2 = Polygon-Clipped-contours-ymin - Bloat)
{
- if (!(lp = LinePoly (Line, Line-Thickness + Bloat)))
+ if (!(lp = LinePoly (Line, Line-Thickness + Bloat * 2)))
return FALSE; /* error */
return isects (lp, Polygon, true);
}
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Re: gEDA-user: PCB+GL instructions
On Feb 21 2011, Kai-Martin Knaak wrote: Ethan Swint wrote: I was expecting just to get back git clone -o pcjc2 git://repo.or.cz/geda-pcb/pcjc2.git or some such, but in response Peter has posted what looks to be an excellent guide to his blog at http://pcjc2.blogspot.com/2011/02/pcbgl-repository-instructions.html Is it just me, or is anyone else also having a speed issue with Peters blog? Scrolling takes about two seconds to jump by a screen... (My browser is epiphany, the default with debian) Sarah helped me pick the background image when I was trying to encourage her to set up a blog of her own. I might have to change it back, as it causes performance issues in older Epiphany versions. Firefox doesn't have any issues with it, but I prefer Epiphany myself, so may change it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB+GL instructions
On Feb 21 2011, Ethan Swint wrote: Fairly slow scrolling on Firefox 3.6.13 on Fedora, but it seems faster in the sections without images. I looked at a few of the images and they all seem to be 150kB, even though they are pretty small pixel-wise. Much slower scrolling than other web sites. I think its the background which kills it, but I'll admit to having not done a great deal of optimising of the images I uploaded. I pulled them straight into blogger from my camera (or screen-captures), so they can end up fairly slow. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: polygon regression in pcb+gl
On Feb 21 2011, Ineiev wrote: Pushed to git-head. Thanks, Ineiev Awesome - welcome to the development team. Feel free to ping me if there were any outstanding review issues you wanted me to look at with any of your existing patches. I feel very guilty I've not managed to get more of your work looked at and pushed up until this point - I think we now have the perfect solution to proceed... I look forward to seeing you land the remaining patches ;) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Spice geda
Hello. I'm relatively new to geda but how to make a spice simulation of attached schema with ng spice I'm getting error on first step and that is generating net list for the spice simulator i tried with :~$ gnetlist [OPTIONS] -g spice-sdb filename but it tels me that spice sdb is some kind of error and I get empty netlist Can some one correct my schematics and add what I need to get on pin 7 output frequency(simulation) Sorry because y broken English. HIPAS.sch Description: application/geda-schematic ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Spice geda
On Feb 21, 2011, at 11:23 AM, darko wrote: Hello. I'm relatively new to geda but how to make a spice simulation of attached schema with ng spice I'm getting error on first step and that is generating net list for the spice simulator i tried with :~$ gnetlist [OPTIONS] -g spice-sdb filename [OPTIONS] shouldn't be in the command literally: it represents optional arguments you might provide. And filename represents *your* files's name. So what I used was: gnetlist -o HIPAS.cir -g spice-sdb HIPAS.sch but it tels me that spice sdb is some kind of error and I get empty netlist Can some one correct my schematics and add what I need to get on pin 7 output frequency(simulation) Other problems: You are using pinlabel= attributes incorrectly. They identify individual pins in the symbol. They should not be attached to a component at schematic level. In this case, they may simply be deleted from your schematic: they serve no purpose. The out-1 symbol is for hierarchical netlisting of printed circuit board designs, not for SPICE simulation. It doesn't work the way you are trying to use it. I removed it and attached the netname out to your output net. Now: ngspice HIPAS.cir ac dec 10 1k 1g plot out Shows a nice hipass response. HIPAS.sch Description: Binary data John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Snap to grid preventing selecting/dragging text
On Sun, 20 Feb 2011 00:10:40 -0800 (PST) Oliver King-Smith oliver...@yahoo.com wrote: OK I see the error of my ways. I had to turn off the grid so I could click on the refdes. This brings up a good point. Very often I have difficulty selecting small components and more significantly text in pcb, due to snap-to-grid being enabled. I usually have to go through the menus then and dial in a much finer grid so I can drag the text or component that I want to grab, but it's a pain to do this often. There are certainly many ways to improve this aspect of the user experience, such as a fuzzier picking algorithm (e.g., if the nearest grid point to the mouse cursor isn't exactly on any entity, but text element's bounding box intersects the grid X grid square centered on the grid point, then pick that text element). The recent discussion on improved grid handling would also improve this. For me, I would like keyboard shortcuts that quickly allow more useful grid size changes. I would never user +5 mil/-5 mil since if working on an Imperial grid, I would use only 100 mil, 50 mil, 25 mil, 12.5, etc. Thus useful shortcuts would be either direct selection of the four most common grids, or double/halve grid spacing. Regards, Colin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gsch2pcb cannot find components
Hello,
I am reusing a schematic which I have already made a PC board with it
while back now I want to make some modification without disturbing the
previous one, so I made a new directory made the necessary modifications
and try to generate the PCB file in the usual way. The gsch2pcb does not
find the components the project file is the same I used before, here is
the output
[Vinny@HP1 T14511_1]$ gsch2pcb project
usage: gsch2pcb [options] {project | foo.sch [foo1.sch ...]}
Generate a PCB layout file from a set of gschem schematics.
gnetlist -g PCB is run to generate foo.net from the schematics.
gnetlist -g gsch2pcb is run to get PCB m4 derived elements which
match schematic footprints. For schematic footprints which don't
match
any PCB m4 layout elements, search a set of file element directories
in
an attempt to find matching PCB file elements.
Output to foo.pcb if it doesn't exist. If there is a current
foo.pcb,
output only new elements to foo.new.pcb.
If any elements with a non-empty element name in the current foo.pcb
have no matching schematic component, then remove those elements from
foo.pcb and rename foo.pcb to a foo.pcb.bak sequence.
gnetlist -g pcbpins is run to get a PCB actions file which will
rename all
of the pins in a .pcb file to match pin names from the schematic.
project is a file (not ending in .sch) containing a list of
schematics to process and some options. A schematics line is like:
schematics foo1.sch foo2.sch ...
Options in a project file are like command line args without the -:
output-name myproject
options (may be included in a project file):
-d, --elements-dir D Search D for PCB file elements. These defaults
are searched if they exist: ./packages,
/usr/local/share/pcb/newlib, /usr/share/pcb/newlib,
(old
pcb) /usr/local/lib/pcb_lib, /usr/lib/pcb_lib,
(old pcb) /usr/local/pcb_lib
-o, --output-name N Use output file names N.net, N.pcb, and
N.new.pcb
instead of foo.net, ... where foo is the
basename
of the first command line .sch file.
-f, --use-files Force using file elements over m4 PCB elements
for new footprints even though m4 elements are
searched for first and may have been found.
-r, --remove-unfound Don't include references to unfound elements in
the generated .pcb files. Use if you want PCB
to
be able to load the (incomplete) .pcb file.
This is the default behavior.
-k, --keep-unfoundKeep include references to unfound elements in
the generated .pcb files. Use if you want to
hand
edit or otherwise preprocess the generated .pcb
file
before running pcb.
-p, --preservePreserve elements in PCB files which are not
found
in the schematics. Note that elements with an
empty
element name (schematic refdes) are never
deleted,
so you really shouldn't need this option.
-q, --quiet Don't tell the user what to do next after
running gsch2pcb.
-s, --skip-m4 Skip m4 when looking for footprints. The
default is to use
m4 (which is what previous versions did).
--m4-file F.inc Use m4 file F.inc in addition to the default m4
files ./pcb.inc and ~/.pcb/pcb.inc.
--m4-pcbdir D Use D as the PCB m4 files install directory
instead of the default:
/usr/share/pcb/pcb/m4
--gnetlist backendA convenience run of extra gnetlist -g
commands.
Example: gnetlist partslist3
Creates: myproject.partslist3
--gnetlist-arg argAllows additional arguments to be passed to
gnetlist.
--empty-footprint name See the project.sample file.
options (not recognized in a project file):
--fix-elementsIf a schematic component footprint is not equal
to its PCB element Description, update the
Description instead of replacing the element.
Do this the first time gsch2pcb is used with
PCB files originally created with gschem2pcb.
-v, --verbose Use -v -v for additional file element
debugging.
-V, --version
environment variables:
GNETLIST If set, this specifies the name of the gnetlist
program
to execute.
Additional Resources:
gEDA homepage: http://www.geda.seul.org
PCB homepage: http://pcb.sf.net
gEDA Wiki: http://geda.seul.org/dokuwiki/doku.php?id=geda
[Vinny@HP1 T14511_1]$
Then I found that if load the schematic
Re: gEDA-user: Metric, Imperial, Rounding, DRC, and board houses
On Mon, 2011-02-21 at 15:23 -0700, Russell Dill wrote: I'm starting a new design and all my components are metric based, including a few 1mm pitch BGA components. I'd really like to do the layout in metric, but I'm worried about two factors. The first of which is that PCB does not yet have the option to store things internally in metric (at least from what I understand) so rounding may occur on that end. In addition, my board house rounds everything to 2.4 format (0.1 mil). I can envision several scenarios where my design meets DRC in PCB, but fails when I send it to the board house. What is my best option? Just use imperial units and cope with weird grids? Use metric spacing, but recalculate DRC based on worst case rounding? Some other option? Use metric grid/unit, I guess most of us use that. Internal resolution is 0.01 mil, which is good. Of course nm would be better. One problem for me was, that a few 0.01 mil garbage lines were generated for the layout. Not a big problem. Some not really smart people have tried to use a very very fine grid, 0.01 mm or so. That is like using no grid at all, I call that silly. Try to use a useful basic grid like 0.25mm grid if most of your parts have 0.5mm pitch -- I think that was what I did, I am not sure. Important: Enable snap to pads/pins, so you can make good connections to imperial parts which are not on the metric grid. my board house rounds everything to 2.4 format (0.1 mil). Strange -- so pitch of metric parts may vary from pad to pad a bit. That was a problem in very old days of PCB, when 1mil internal units was used. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: Metric, Imperial, Rounding, DRC, and board houses
I'm starting a new design and all my components are metric based, including a few 1mm pitch BGA components. I'd really like to do the layout in metric, but I'm worried about two factors. The first of which is that PCB does not yet have the option to store things internally in metric (at least from what I understand) so rounding may occur on that end. In addition, my board house rounds everything to 2.4 format (0.1 mil). I can envision several scenarios where my design meets DRC in PCB, but fails when I send it to the board house. What is my best option? Just use imperial units and cope with weird grids? Use metric spacing, but recalculate DRC based on worst case rounding? Some other option? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gsch2pcb cannot find components
On Mon, 2011-02-21 at 17:45 -0500, Vincent wrote: Hello, Can any body help? Thank you in advance. Vinny In your working directory there may exist configuration files called project, gafrc, gschemrc or similar. Ensure that these contain valid information, i.e. paths to symbols, footprints are valid. And try to remember what you have changed in your box. Installed a new developer gEDA, compiled from source? Deleted or moved files? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Metric, Imperial, Rounding, DRC, and board houses
I use mil grids, as many boards houses expect mil units, like yours. PCB layout is engineering, engineering involves tolerances... I start my traces from off grid components so that the stub going from the pin/pad is off grid byt quickly becomes on grid after the first 45 degree bend. Steve On Mon, Feb 21, 2011 at 2:44 PM, Stefan Salewski m...@ssalewski.de wrote: On Mon, 2011-02-21 at 15:23 -0700, Russell Dill wrote: I'm starting a new design and all my components are metric based, including a few 1mm pitch BGA components. I'd really like to do the layout in metric, but I'm worried about two factors. The first of which is that PCB does not yet have the option to store things internally in metric (at least from what I understand) so rounding may occur on that end. In addition, my board house rounds everything to 2.4 format (0.1 mil). I can envision several scenarios where my design meets DRC in PCB, but fails when I send it to the board house. What is my best option? Just use imperial units and cope with weird grids? Use metric spacing, but recalculate DRC based on worst case rounding? Some other option? Use metric grid/unit, I guess most of us use that. Internal resolution is 0.01 mil, which is good. Of course nm would be better. One problem for me was, that a few 0.01 mil garbage lines were generated for the layout. Not a big problem. Some not really smart people have tried to use a very very fine grid, 0.01 mm or so. That is like using no grid at all, I call that silly. Try to use a useful basic grid like 0.25mm grid if most of your parts have 0.5mm pitch -- I think that was what I did, I am not sure. Important: Enable snap to pads/pins, so you can make good connections to imperial parts which are not on the metric grid. my board house rounds everything to 2.4 format (0.1 mil). Strange -- so pitch of metric parts may vary from pad to pad a bit. That was a problem in very old days of PCB, when 1mil internal units was used. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Metric, Imperial, Rounding, DRC, and board houses
Russell Dill wrote: In addition, my board house rounds everything to 2.4 format (0.1 mil). I can envision several scenarios where my design meets DRC in PCB, but fails when I send it to the board house. What is my best option? Time to change the board house? Just use imperial units and cope with weird grids? Use metric spacing, but recalculate DRC based on worst case rounding? I'd choose the second option. PCB internal units are 0.01 mil. This adds maximum 10% to the rounding error, the board house introduces anyway. If you do grids that fit the board house metric the rounding error will still happen. The 1mm pitch will make some balls off by 0.05 mill. The internal units are 254 nm. I sincerely doubt that a design better to be etched in 35 µm copper can be that critical. ---)kaimartin(--- -- Kai-Martin Knaak Email: k...@familieknaak.de Öffentlicher PGP-Schlüssel: http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Snap to grid preventing selecting/dragging text
Colin D Bennett wrote: This brings up a good point. Very often I have difficulty selecting small components and more significantly text in pcb, due to snap-to-grid being enabled. Did you try Only Names from the settings menu? I found that I I usually have to go through the menus then and dial in a much finer grid so I can drag the text or component that I want to grab, Maybe, you already know this. If not, it may enhance your experience: Grabbing in pcb does not need a selection. Just let the mouse hover over the object in question and drag. The recent discussion on improved grid handling would also improve this. For me, I would like keyboard shortcuts that quickly allow more useful grid size changes. My wish in this context would be, to bind increase/decrease by predefined values to the same keys as in gschem: [ and ] I would use only 100 mil, 50 mil, 25 mil, 12.5 I would prefer: 0.1 mm, 0.2 mm, 0.5 mm, 1 mm, 2 mm, ... Same values as for European money, for the same reasons :-) ---)kaimartin(--- -- Kai-Martin Knaak Email: k...@familieknaak.de Öffentlicher PGP-Schlüssel: http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: gschem slots with different symbols
Is it possible to let gschem know two different symbols are the same type component so auto-slotting works? Alternatively, is there any way to hide some pins on some instances of a symbol? I always show power pins, and for those components where slotting makes sense, I'd like to be able to only show the power pins on one instance per package. At the moment I'm letting the power pins show on all slots and only connecting them up on one per package, which doesn't seem to cause any problems, but it doesn't meet my aesthetic requirements. allan -- Allan N. Hessenflow all...@kallisti.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem slots with different symbols
I have done something like this by using multiple symbols for a single device rather than slotting. From memory all that was required was to ensure the pinseq are correct and the symbols are given the same refdes. I'm sure someone will correct me if I have missed something :P On Tue, Feb 22, 2011 at 2:38 PM, Allan Hessenflow [1]allanh-g...@kallisti.com wrote: Is it possible to let gschem know two different symbols are the same type component so auto-slotting works? Alternatively, is there any way to hide some pins on some instances of a symbol? I always show power pins, and for those components where slotting makes sense, I'd like to be able to only show the power pins on one instance per package. At the moment I'm letting the power pins show on all slots and only connecting them up on one per package, which doesn't seem to cause any problems, but it doesn't meet my aesthetic requirements. allan -- Allan N. Hessenflow [2]all...@kallisti.com ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:allanh-g...@kallisti.com 2. mailto:all...@kallisti.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Snap to grid preventing selecting/dragging text
The recent discussion on improved grid handling would also improve this. I work on new friendly grids in PCB. Currently i almost done and now try to prepare a patch, i will post it in next days or hours. I also need some help to regenerate documentation: main pdf is regenerated after toplevel 'make', but my changes made via inlined %start-doc not appear in it (even version displayed at first page is not changes). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Snap to grid preventing selecting/dragging text
On Tue, 22 Feb 2011 02:52:01 +0100 Kai-Martin Knaak k...@lilalaser.de wrote: Colin D Bennett wrote: This brings up a good point. Very often I have difficulty selecting small components and more significantly text in pcb, due to snap-to-grid being enabled. Did you try Only Names from the settings menu? Yes, it helps avoid non-text entities from inadvertently being picked instead, but doesn't help select text when the snap-to-grid decides that the nearest grid point isn't on the text anyway. You might think of Only Names as preventing false positives but not helping prevent false negatives. I found that I I usually have to go through the menus then and dial in a much finer grid so I can drag the text or component that I want to grab, Maybe, you already know this. If not, it may enhance your experience: Grabbing in pcb does not need a selection. Just let the mouse hover over the object in question and drag. Yes, thanks. I do appreciate that feature of pcb; it's how I as a user expect it to work. In contrast, I find that gschem's requirements if you want to move a symbol to be really tiresome and it really slows down my schematic editing. How to move a symbol in gschem: 1. Press and release the mouse button over the symbol you wish to move, in order to cause it to become selected. (Hopefully it wasn't already selected or you might have just selected an attribute like the refdes or value instead!) 2. Wait for about 0.5 second. This is necessary or gschem thinks it's a double-click. Waste of time! Twiddle thumbs, etc. (It really adds up quickly when you have a lot of editing to do.) 3. Press the mouse button, hold it, and drag the symbol. 4. If you're trying to be quick, you might not have waited long enough before proceeding to step 3! Press Close on the attributes dialog and GOTO 2. The recent discussion on improved grid handling would also improve this. For me, I would like keyboard shortcuts that quickly allow more useful grid size changes. My wish in this context would be, to bind increase/decrease by predefined values to the same keys as in gschem: [ and ] Excellent idea. I would use only 100 mil, 50 mil, 25 mil, 12.5 I would prefer: 0.1 mm, 0.2 mm, 0.5 mm, 1 mm, 2 mm, ... Same values as for European money, for the same reasons :-) I've been enthusiastically supporting the SI since 2006 http://gibibit.com/Join_the_world. Don't get me started... :-) I could rant for hours on end about the ridiculousness of the U.S. customary system of units. My Imperial unit example was just an example of how 5 mil increment is a fairly useless feature; the same goes for 0.05 mm increment. Regards, Colin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
