Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-19 Thread Andy Fierman
Ooops,

Just missed the Undo Send window ...

Typo in (i):

if the source has a peak to peak swing of x volts but a dc offset of y
then (neglecting the diode drops) vcc = x/2+y and vss = x/2-y.

:)

         Andy



On 19 June 2011 11:01, Andy Fierman andyfier...@signality.co.uk wrote:
 Rick is spot on.

 However, there are more things you need to consider:

 i) Does your signal source have a mean DC level of zero? Without C1,
 if the source has a peak to peak swing of x volts but a dc offset of y
 then (neglecting the diode drops) vcc = x+y and vss = x-y.

 If you have to remove a DC offset then you'll have to put a
 transformer between C1 and the recirfiers. Then C1 keeps DC out of the
 transformer primary and the transformer secondary provides the
 necessary dc path for the rectifiers to work as required.

 ii) I note that C1 and L1 form a series resonant circuit with a centre
 frequency at about 22.9kHz. So is your source really bandlimited 15kHz
 - 28kHz by the time it gets to your circuit or are you trying to do
 the bandpass filtering as part of your circuit? If the latter then you
 will have to keep C1, L1 but add the transformer as described in (i)
 above.

 The you will have to model that transformer to include at least the
 leakage inductance to get the bandpass response right.

 Such transformers are not difficult to design and source.

 iii) What is the source impedance? Does the 8 ohms represent all of
 your source impedance or is there more hidden in the source itself?
 You will need to allow for all of it to see how the rectified outputs
 drop and ripple increases with load current.

 iv) Don't forget that a SMPS represents a constant power or negative
 resistance load. As the input voltage drops the current it draws from
 the source increases. The actual behaviour of a real SMPS is
 complicated by any input undervoltage lockout and soft start features.
 This may or may not play well with your source.

 I'd like to make a general point here.

 This isn't a criticism but an important observation: when asking a
 question about how to do something, it saves everyone a lot of time,
 guesswork and blind alleys if the problem that is to be solved is
 clearly stated alongside whatever attempt at a solution that the
 specific question may be about.

 Essentially, include the design specification in the original question
 otherwise no-one knows the whole story so the question doesn't get a
 proper answer in a timely manner.

 Clearly in some instances the design spec may not be something that
 can be given openly but usually the part relevant to a question can be
 reframed so as to not give away too much. However, there has to be
 enough information so that the boundaries of the problem in question
 can be understood.

 This question is a classic example. Several people have discussed
 removing a part of the circuit that I now strongly suspect (C1 and L1)
 is an essential (if inappropriately implemented) part of the circuit
 because it wasn't clear what the overall function or scope of the
 circuit was.

 Cheers,

          Andy.

 signality.co.uk



 On 18 June 2011 21:19, rickman gnuarm.g...@arius.com wrote:
 What is the purpose of C1 and L1?  If you want to filter anything, it should
 be AFTER you rectify the signal to DC.  A series cap is going to remove low
 frequencies... like DC which is attenuated very highly.  So much in fact
 that you can't draw a DC signal through a capacitor.  That is why your
 circuit is not working.

 If you remove C1 and L1 the circuit will work the way you want it to I
 believe.   Also, with an input frequency of 15 kHz or higher, you won't be
 needing 100 uF output filter capacitors for a light load.  How many mA  is
 your load?  How much ripple can you allow?  Use those two values to
 calculate the value of output filter capacitor you need.  Once I fix your
 circuit by removing the input filter I measure 19.14 volts out and 38.2 mA
 of current into a 500 ohm load.  Is that what you are shooting for?  The 100
 uF cap gives around 10 mV of ripple.  With lighter loads or more ripple the
 cap can be smaller.

 Rick


 On 6/17/2011 4:44 AM, myken wrote:

 Yeap, it should be a very low power power supply. Vx is not important Vcc
 and Vss are.
 Vin can be anything from 15Khz to 28Khz so a transformer is not the most
 desired option.
 I have designed two SMPS for Vcc and Vss but there load to the rectifier
 are not the same, with the described result.
 I will try the options suggested in this list today.
 Robert.

 On 17/06/11 04:13, gene glick wrote:

 On 06/16/2011 02:30 PM, myken wrote:

 Hello all,

 I would appreciate some expert advice.

 Are you trying to make a low current power supply?

 I agree with DJ - the unequal loading on + and - cycle will average to
 something other than zero (unequal capacitors, unequal diodes, etc) If Vx
 must always be average zero - you'll need to do something else.

 If you can handle a little voltage drop, don't care what happens to 

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-19 Thread myken
Hello all,

As a remark on your observation Andy I would like to say in my defence
that I simplified and reduced the problem/information simply to avoid
wasting anyone’s time with details and (in my opinion) irrelevant side
effects. That the two load resistors are in fact a representation of two
complete sub-systems is in my opinion not relevant to the question I was
asking.  But maybe that was a mistake.

Nevertheless I got very very great and useful feedback from this list with
the information I provided. I decided that I need C1 to eliminate any DC
component from the input signal and the hits for using a transformer has
let me to understand my error in thinking.

It was never my intention to waste anyone time by holding back information
but it was my intention not to waste anyone's time by reducing the number
of details ;-)

What I should do in the future is be more clear about the kind of
information I would like to get from this list.
a. complete design
b. detailed design solution
c. tutorial on electronics
d. coffee-machine feedback

I was looking for the last one, just some feedback from other
professionals to get me on track to a solution.
And that's what I got, in our situation the solution is to use a
transformer, thanks everyone!

Cheers, Robert.





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Re: gEDA-user: skpi_drc patch

2011-06-19 Thread Levente Kovacs
On Fri, 17 Jun 2011 17:30:22 -0400
DJ Delorie d...@delorie.com wrote:

 You want the (already global) AttributeGet() function.
 
   l-no_drc = AttributeGet (l, PCB::skip-drc) != NULL;
 
 This does assume that the attribute has *some* value, even if the
 value is the empty string.

Thanks for pointing this out.

Attached is the new patch.

Levente 
 


-- 
Levente Kovacs
http://levente.logonex.eu
diff --git a/src/find.c b/src/find.c
index eb4cac2..c5159ba 100644
--- a/src/find.c
+++ b/src/find.c
@@ -822,6 +822,8 @@ LookupLOConnectionsToPVList (bool AndRats)
   /* now all lines, arcs and polygons of the several layers */
   for (layer = 0; layer  max_copper_layer; layer++)
 {
+  if (LAYER_PTR (layer)-no_drc)
+ continue;
   info.layer = layer;
   /* add touching lines */
   if (setjmp (info.env) == 0)
@@ -1169,6 +1171,8 @@ LookupPVConnectionsToLOList (bool AndRats)
   /* loop over all layers */
   for (layer = 0; layer  max_copper_layer; layer++)
 {
+  if (LAYER_PTR (layer)-no_drc)
+   continue;
   /* do nothing if there are no PV's */
   if (TotalP + TotalV == 0)
 {
@@ -2901,6 +2905,21 @@ ListsEmpty (bool AndRats)
   return (empty);
 }
 
+static void
+reassign_no_drc_flags (void)
+{
+  int layer;
+
+  for (layer = 0; layer  max_copper_layer; layer++)
+{
+  LayerTypePtr l = LAYER_PTR (layer);
+  l-no_drc = AttributeGet (l, PCB::skip-drc) != NULL;
+}
+}
+
+
+
+
 /* ---
  * loops till no more connections are found 
  */
@@ -2908,6 +2927,7 @@ static bool
 DoIt (bool AndRats, bool AndDraw)
 {
   bool newone = false;
+  reassign_no_drc_flags ();
   do
 {
   /* lookup connections; these are the steps (2) to (4)
@@ -3350,6 +3370,7 @@ LookupConnection (LocationType X, LocationType Y, bool AndDraw,
 
   /* check if there are any pins or pads at that position */
 
+	reassign_no_drc_flags ();
 
   type
 = SearchObjectByLocation (LOOKUP_FIRST, ptr1, ptr2, ptr3, X, Y, Range);
@@ -3366,8 +3387,8 @@ LookupConnection (LocationType X, LocationType Y, bool AndDraw,
   int laynum = GetLayerNumber (PCB-Data,
(LayerTypePtr) ptr1);
 
-  /* don't mess with silk objects! */
-  if (laynum = max_copper_layer)
+  /* don't mess with non-conducting objects! */
+  if (laynum = max_copper_layer || ((LayerTypePtr)ptr1)-no_drc)
 return;
 }
 }
diff --git a/src/global.h b/src/global.h
index daa82a9..08abbb8 100644
--- a/src/global.h
+++ b/src/global.h
@@ -303,6 +303,7 @@ typedef struct			/* holds information about one layer */
   char *Color,			/* color */
*SelectedColor;
   AttributeListType Attributes;
+  int no_drc; /* whether to ignore the layer when checking the design rules */
 }
 LayerType, *LayerTypePtr;
 


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Re: gEDA-user: skpi_drc patch

2011-06-19 Thread DJ Delorie

Applied.  Thanks!

Can you work on some documentation for it too?


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