gEDA-user: some pcb patches...
Spent some time this week on pushing/fixing LP patches... LP 699291 - Silk lines were created with the FOUND flag if auto-DRC is on LP 699251 - XRender is disabled if Xinerama is detected (lesstif) LP 699161 - All the header file guard macros changed to be ISO compliant LP 699494 - switch Windows build scripts from cygwin to minipack (probably not the most recent mpk scripts, though) LP 699472 - Use XmStringCreateLtoR for multi-line strings LP 699478 - Fix up font metrics after loading so refdes's can be moved when the default font is used. LP 699483 - Make toggling the HOLE flag reversible (use PIN_SIZE() instead of Thickness, keeps mask gap constant). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
On 08/13/2011 06:10 PM, Kai-Martin Knaak wrote: Who are the people, who are in the position to do so? What effort is needed? Not me. I'm hoping to do some work on gnetlist scheme programming to get verilogAMS netlists to connect well with gnucap, but have to spend time doing housing construction work instead to counter the downward trend of the USA to be like Argentina was debt-wise. So, I can't spend any time scheme programming, even though I've done Cadence Skill lang. (LISP) programming to do EDA automation before. Tip money would speed that up. JG ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
> Who are the people, who are in the position to do so? Well, I'm one, and I'm trying to put effort into it. > What effort is needed? I'm not sure. Launchpad needs to be checked, bugs confirmed, patches updated if needed. Controversial patches need to be discussed and resolved. We need to decide what the cutoff for bugs/features will be, and if any need to still be fixed/implemented. Etc. Mostly, my point was, "I don't know, it depends on when people have time to work on it." We don't set deadlines, it just gets done when it gets done. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
DJ Delorie wrote: >> BTW, when can we eyxpect an official release, so that openGL >> trickles down to distro packages? > > When people put the effort into it. > Who are the people, who are in the position to do so? What effort is needed? ---<)kaimartin(>--- -- Kai-Martin Knaak Email: k...@familieknaak.de http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 not happy with moderation of geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
On Aug 13, 2011, at 4:37 PM, Peter Clifton wrote: > There is also the 3D board view stuff and "SpaceNavigator" 6-DOF > controller support, which has not made it to git HEAD. Please make sure this is properly protected in an autoconfig option. I have to apply a patch to rip it out on mac OS X Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
On Sat, 2011-08-13 at 22:19 +0200, michalwd1979 wrote: > > > > Yes. > > Since about two months > > clone git://git.gpleda.org/pcb.git > > will give you transparent tracks and polygons :-) > > > > BTW, when can we eyxpect an official release, so that openGL trickles > > down to distro packages? > > > > Thanks for reply. > I've tried git://git.gpleda.org/pcb.git and compare it to > http://repo.or.cz/w/geda-pcb/pcjc2.git (Peter Clifton's branch). > The "main" version is a bit slower then Peter's (but I expect that this > depends on PC), while Peter's has some problems with rendering silk screen on > far side. My branches still have many of speed-improvements (and rendering algorithm changes) which are not yet in git HEAD. They need further clean-up and QA before merging, and I'm hoping to get around to it when I have some free time. There is also the 3D board view stuff and "SpaceNavigator" 6-DOF controller support, which has not made it to git HEAD. > Normally components that are on the far side are drawn with grey colour, > but now I can see only pins, SMD pads (drown as expected in grey) but no > silk screen. The layout looks the same when I use TAB to flip the board or > 3D "control window". > > I've tried to fix it modifying src/draw.c but no success, now far side is > drawn on top :-). If I can reproduce it, I'll try to get it fixed. I've not noticed it myself, but then I probably haven't been working on boards which had back-silk recently. Best wishes, -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
> > Yes. > Since about two months > clone git://git.gpleda.org/pcb.git > will give you transparent tracks and polygons :-) > > BTW, when can we eyxpect an official release, so that openGL trickles > down to distro packages? > Thanks for reply. I've tried git://git.gpleda.org/pcb.git and compare it to http://repo.or.cz/w/geda-pcb/pcjc2.git (Peter Clifton's branch). The "main" version is a bit slower then Peter's (but I expect that this depends on PC), while Peter's has some problems with rendering silk screen on far side. Normally components that are on the far side are drawn with grey colour, but now I can see only pins, SMD pads (drown as expected in grey) but no silk screen. The layout looks the same when I use TAB to flip the board or 3D "control window". I've tried to fix it modifying src/draw.c but no success, now far side is drawn on top :-). Best Regards, Michael Widlok ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
> BTW, when can we eyxpect an official release, so that openGL > trickles down to distro packages? When people put the effort into it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB opengl?
michalwd1979 wrote: > Is the pcb opengl branch in the main repository now? Is there any "official" > version of the opengl branch? Yes. Since about two months clone git://git.gpleda.org/pcb.git will give you transparent tracks and polygons :-) BTW, when can we eyxpect an official release, so that openGL trickles down to distro packages? ---<)kaimartin(>--- -- Kai-Martin Knaak Email: k...@familieknaak.de http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 not happy with moderation of geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Layer selective DRC
On Sat, 13 Aug 2011 19:34:38 +0200 Levente Kovacs wrote: > On Fri, 5 Aug 2011 17:36:25 + (UTC) > Sparky wrote: > > > For my outline layer I did the following to add the attribute: > > Edit->Edit attribute of->CurrentLayer > > Left box: PCB::skip-drc > > Right box: 1 > > I'm sorry for the late answer. > > I'm not sure if you need this for the layer called "outline". > > For the others, thank you for taking time playing with it. I didn't > experienced any trouble with the feature. However, I'm not a heavy > DRC user. I get "line too narrow" errors for my outline layer, due to the 1 mil lines with which I draw the outline. Also, and not completely related in the current DRC implementation, my outline layer makes pcb think there are unintended connections when it intersects vias near the edge (e.g., castellated vias) creating what appears to pcb to be a circuit from a net on another layer, to the outline, to another net on a non-outline layer. Regards, Colin ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Tag-Connect TC2030-MCP(NL) footprint, expert review
On Fri, 12 Aug 2011 11:04:54 -0700 Colin D Bennett wrote: > I've created gEDA/pcb footprints for the Tag-Connect I've done that before. I thought I made it public. I sent the footprints to the company, I received a tag connector for free, but my footprints didn't made to their homepage. :-) http://git.logonex.eu/?p=library.git;a=tree;f=electronic/footprint;h=1850fa21028a1f1e69284f1f6b67849e41fe4763;hb=HEAD tag_connector_*.fp Cheers, Levente -- Levente Kovacs http://levente.logonex.eu ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Layer selective DRC
On Fri, 5 Aug 2011 17:36:25 + (UTC) Sparky wrote: > For my outline layer I did the following to add the attribute: > Edit->Edit attribute of->CurrentLayer > Left box: PCB::skip-drc > Right box: 1 I'm sorry for the late answer. I'm not sure if you need this for the layer called "outline". For the others, thank you for taking time playing with it. I didn't experienced any trouble with the feature. However, I'm not a heavy DRC user. Levente -- Levente Kovacs http://levente.logonex.eu ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: tragesym error - help please!
Hi Werner: Thank you for pointing out the error, however, I am using Open Office and from what I can see, there is no way to "save as text". In open office, if I say File->Save As, the options are: Text CSV, with options to change the Character set (Unicode UTF8 is the default), Field Delimiter, options are , ; : tab space, and Text Delimiter, options are:" ' I tried Field delimiters of: tab and space, with text delimiter options of " and ' (all combinations), and none of them worked. I looked at M$ Excel (2007) and it indeed has the save as text file (tab delimited) option (I did not try this approach. (I found this somewhat strange in that using open sources tools to construct the symbols would not have the proper format (e.g. open office spreadsheet) but M$ Excel does. ) I did copy the open office spreadsheet file into gedit, saved it, and it worked. Thank you! John On Sat, Aug 13, 2011 at 1:47 AM, Werner Hoch <[1]werner...@gmx.de> wrote: Hi John, On Samstag, 13. August 2011, John Hudak wrote: > The file is attached. Thank you for taking the time to look at it. The cells in the csv-file has a comma s seperator. tragesym expects a tab as seperator. You should use "save as txt" and not "save as csv". It's the step5 in the tutorial: [2]http://www.geda.seul.org/wiki/geda:tragesym_tutorial > > > BTW, there is an error in the tragesym error statement...It > > > should be 'attribute' and not 'attribut'...hey, i should be > > > lucky I even get this much..lol It's just a typo or missing translation (attribute in english is Attribut in german). Regards Werner ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:werner...@gmx.de 2. http://www.geda.seul.org/wiki/geda:tragesym_tutorial 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: tragesym error - help please!
> The cells in the csv-file has a comma s seperator. > tragesym expects a tab as seperator. > > You should use "save as txt" and not "save as csv". If the Tab is the separator, should that not be "save as tsv"? Tab-Separated-Value. Excel exports files as tsv. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PCB opengl?
Hello, Is the pcb opengl branch in the main repository now? Is there any "official" version of the opengl branch? I am using http://repo.or.cz/w/geda-pcb/pcjc2.git to download and build pcb from there, but I don't know if this is the right place. I prefer using opengl branch mainly because of very nice rendering of overlapping traces & polygons. Very best Regards, Michael W. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB nanometer git tree
Andrew Poelstra: ... > Cool, I see it now when compiling on a 32-bit system. It is Oh, I should have said that I tested this on a 32-bit system. > caused by the BoundingBox attribute of the .eps files, which > is written in 1/72". > > To do this, the code multiplies by 72 and then outputs in inches > -- as you can imagine, storing 72 or 144 inches in nanometers > causes overflows! > > Fixed in pcb-andrew/coord7. Yes, I can confirm that. Regards, /Karl Hammar --- Aspö Data Lilla Aspö 148 S-742 94 Östhammar Sweden +46 173 140 57 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Automatically start wire placement when you press the hotkey?
John Doty: > You have no idea what that is, and you can't have any idea without > spending a lot of time actually watching a lot of people use the > software. What people report is miserably unreliable as to what the > *right thing* really is. > ... > Go and assist an observer for a few nights, see how it really works. > Then you'll know what to write." ... Amen. Regards, /Karl Hammar --- Aspö Data Lilla Aspö 148 S-742 94 Östhammar Sweden +46 173 140 57 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
