gEDA-user: Foss-pcb Proposed plan from CERN

2011-08-21 Thread John Griessen

I'm swamped.

CERN might come up with tip money for developers.
Anyone have the time to be in a committee?

John Griessen

 Original Message 
Subject: [Fwd: Proposed plan]
Date: Mon, 22 Aug 2011 01:24:46 +0200
From: Javier Serrano javier.serr...@cern.ch
To: John Griessen j...@industromatic.com

Hi John,

Would you like to join this discussion?

Cheers,

Javier


 Forwarded Message 
From: Javier Serrano javier.serr...@cern.ch
To: foss-...@ohwr.org
Subject: Proposed plan
Date: Mon, 22 Aug 2011 01:00:14 +0200

Dear all,

As most of you know, the purpose of this mailing list is to propose a
roadmap to bring FOSS PCB design tools to a level of quality and
features comparable with other non-open options.

I think it would make sense to split this effort in three phases:

1. Make a list of features for the ultimate PCB design tool.
2. Discuss current FOSS projects and (hopefully) pick one which can
evolve into what we define in phase 1.
3. Generate work package descriptions to have the project selected in
phase 2 cover all items of phase 1.

I would keep track of the results of discussion in
http://www.ohwr.org/projects/ohr-meta/wiki/Foss-pcb

If all this takes place in the coming month or so, then the work package
list can be published and advertised in a number of fora (the OH
workshop in October, FSCONS...) so that potential contributors can pick
one WP and start working.

If you have any suggestions or remarks concerning this plan, let's
discuss them here. Otherwise, I propose we move straight away into phase
1. I am looking forward to many interesting discussions with all of you.

Cheers!

Javier




--
Ecosensory  1218 W 39th St.  Austin TX 78756


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Re: gEDA-user: Layer button backgrounds - summary

2011-08-21 Thread Colin D Bennett
On Sat, 20 Aug 2011 08:09:37 -0700
Andrew Poelstra as...@sfu.ca wrote:

 On Fri, Aug 19, 2011 at 01:46:24PM -0700, Steven Michalske wrote:
  
  On Aug 19, 2011, at 1:39 PM, Vanessa Ezekowitz wrote:
  
   On Fri, Aug 19, 2011 at 12:41:58PM -0400, DJ Delorie wrote:
   [...]
   Though, I am still unsure how to indicate that the last 4
   layers can't be used for drawing.
   
   Put the item names in parenthesis.
   
  A little padlock icon is universal as a locked thingy.
 
 I will play with this idea. Probably I can fit a small padlock
 onto the bottom-right corner of the swatches. How clear this
 will be from a user perspective, I will not know until I try it.

I'm wondering if users will think the padlock icon should function as a
button to toggle the “locked” state of a layer, as in the GIMP.  In
this case, the layer is not so much locked as it is a “virtual” layer
that is computed based on other data.

Perhaps italicized text would be enough to at least indicate there is
something special about those layers.

Regards,
Colin


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gEDA-user: Layers and Buried/Blind Vias in gEDA

2011-08-21 Thread Gus Fantanas

Hello all,

While following the discussion about layers, I wondered if the 
capability to handle buried/blind vias could be implemented in gEDA.  I 
would think that not only a buried/blind via should know which layers 
it spans, but also each layer should be aware which layer it is 
above.  While submitting gEDA layouts to Sunstone Circuits, I was asked 
about layer mapping (and I presume that other PCB fab houses have 
similar requirements).  I think that if I interchange two inner layers 
when declaring the mapping of gerber files to actual layers, the board 
will still come out alright (although its EMC performance may be 
compromised) because the vias span all physical layers.  That might NOT 
be the case if buried/blind vias were used because (inner) layer 
transposition may disturb the continuity of a buried /blind via.  (The 
outer layers cannot be interchanged with other layers because physical 
components are soldered on them.)


I thought that discussing buried/blind vias in gEDA is very much related 
to the lively discussion about layers.



Regards,

Gus Fantanas



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Re: gEDA-user: Has anyone in this group seriously used KiCAD?

2011-08-21 Thread John Hudak
   On Fri, Aug 19, 2011 at 4:43 PM, Colin D Bennett [1]co...@gibibit.com
   wrote:

   On Fri, 19 Aug 2011 11:55:31 -0400
   John Hudak [2]jjhu...@gmail.com wrote:
Pros/cons?  and please, no philosphy about integrated vs independent
tools...I am interested in aspects such as what things work? what
doesn't? user experiences such as strengths and weakness (again
actual/functional and not philosophy)

 I've not seriously used it, but I was just today frustrated when I
 tried to download and open the Maple Mini KiCad project ([1]) and my
 KiCad version (from Ubuntu 11.04 repositories) says the layout and
 schematic files are unrecognized types.
 More specifically, trying to open the .brd file says Unknown file
 type and trying to open the schematic says file.sch is NOT an
 EESchema file!  See screenshot at [2].
 A version incompatibility?  Maybe, but you would hope KiCad would at
 least tell the user that the file is the wrong version, rather than
 such
 cryptic errors.  User error?  Maybe, but how hard can it be to open
 a
 board file or schematic file?
 Oh another note, I like how gEDA puts its symbols and footprints in
 separate files -- it is great for version control and for
 browsing/searching with standard file management tools or directly
 on a
 GitHub repository view, etc.
 Regards,
 Colin
 References
 --
 [1] Maple Mini schematics and layout
[3]https://github.com/leaflabs/maplemini.
 [2] Screen shots of attempting to open Maple Mini schematic with
 KiCad.

 [4]http://gibibit.com/upload/2011-08-19_KiCad_MapleMini_error.png
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   Oh another note, I like how gEDA puts its symbols and footprints in
   separate files -- it is great for version control and for
   browsing/searching with standard file management tools or directly on a
   GitHub repository view, etc.
   So does KiCAD, separate files for symbols and footprints.

   -J

References

   1. mailto:co...@gibibit.com
   2. mailto:jjhu...@gmail.com
   3. https://github.com/leaflabs/maplemini
   4. http://gibibit.com/upload/2011-08-19_KiCad_MapleMini_error.png
   5. mailto:geda-user@moria.seul.org
   6. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user


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Re: gEDA-user: Layer button backgrounds - summary

2011-08-21 Thread Kai-Martin Knaak
Steven Michalske wrote:

 Put the item names in parenthesis.
 
 A little padlock icon is universal as a locked thingy.
 
 (name)  can mean anything..

A lock can mislead, too. Locking implies the ability to be unlocked.
I like the parenthesis proposal. 
(And I generally dislike tiny icons. They tend to look like a random
batch of pixels if the resolution is not that good ;-)

---)kaimartin(---
-- 
Kai-Martin Knaak
Email: k...@familieknaak.de
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
not happy with moderation of geda-user



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Re: gEDA-user: Layer button backgrounds - summary

2011-08-21 Thread Kai-Martin Knaak
Andrew Poelstra wrote:

 This might work. So might coloring the text. But this has the
 same problem as putting text in parentheses: at first glance,
 this visual indicator might mean -anything-.

At first glane a lock means something that is not the case here. 
Pins/pads, farside and mask are not unlockable. I doubt, that 
this is any better for newbie initiation.


 What we need to do with the treeview/swatch widget, is to indicate
 that the swatch still works for toggling visibility, but you can't
 actually select the layer for drawing.

Complex relationships cannot be indicated by simple graphical means.
What can easily be done, is an optical hint that these layers do not
belong to the same class as the upper layers. Simply add some separating
space between them. 

Tiny icons add to visual clutter and should only be used for compelling
reasons. I don't see such a compelling reason here.

---)kaimartin(---
-- 
Kai-Martin Knaak
Email: k...@familieknaak.de
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
not happy with moderation of geda-user



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Re: gEDA-user: Commandline option --menu-file

2011-08-21 Thread Kai-Martin Knaak
Andrew Poelstra wrote:

 The gtk gui needs to be completely revamped. There are many individual
 things to be done, but we don't have enough developers to get to them
 all soon.

If the number of active devs is the reason for stagnation, then a
plan to foster future developer generations should be a priority.
Any activity in that direction?

IMHO, positive feedback is the one, most influetial aspect. After all, 
contributers don't do it for any material profit. Getting patches 
into geda projects as a user prooved to be a steep uphill battle in 
the past. Patches were rotting in the BTS until they did not apply 
gracefully anymore. Has this changed significantly?

Regardings the GUI: Are there were clearly formulated goals somewhere 
on the webpage? Goal, that need not be discussesd if someone comes 
up with a patch. If there, is it properly linked to? I for one would 
not invest days or weeks of spare time if I have reason to believe 
that the devs are happy with the current state of the GUI. 

---)kaimartin(---
-- 
Kai-Martin Knaak
Email: k...@familieknaak.de
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
not happy with moderation of geda-user



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gEDA-user: Shadows for selected symbols?

2011-08-21 Thread Stefan Salewski
As you may know some time ago I had the idea of using shadow effects for
highlighting of selected symbols in schematics. I put a picture on my
page:

http://www.ssalewski.de/PetEd.html.en

(Picture may be too large for the page, you may have to use something
like show picture in your browser to get a clear view.) 

I am using shadow, lighter color and thicker lines when elements are
selected or the mouse pointer hovers over it. The effect is additive,
strongest result when pointer hovers over an already selected element.
It looks fine when zoomed in, but unfortunately it is not very easy to
find all selected elements when the display is small. The largest
disadvantage is, that we are limited with useful colors.

What I like is the clamping of lower linewidth, and the ability to move
elements without the need of first selecting it.

Best wishes,

Stefan Salewski
 



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gEDA-user: pcb segmentation fault

2011-08-21 Thread kqt4at5v

I am using version 1.99z that I compiled a few days ago
If I press control-r while the mouse is over a component name I get a 
segmentation fault

Richard


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gEDA-user: slotting question

2011-08-21 Thread Dave McGuire


  I think I'm doing something dumb.  I've never used gschem's slotting 
functionality before; I've always drawn my schematics with the entire 
package.  But I'm trying it now, it's doing something unexpected, and 
I'm sure it's just me doing something wrong.


  I open up a new schematic, place two instances of 7404-1, edit the 
attributes of the second one, promote the slot attribute, edit the 
newly-accessible one, change it to 2, save it, save the sheet, exit 
gschem, restart, and load the sheet.


  My inverter symbols have now been replaced with entire package 
(i.e., 14-pin rectangular) 7404 symbols.


  I can't imagine this being the expected behavior.  What did I do 
wrong?  Can someone slap me with the great fish of clue?


Thanks,
-Dave

--
Dave McGuire
Port Charlotte, FL


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gEDA-user: Preventing elements from appearing in BOM

2011-08-21 Thread Matthew Lewis
Is there a way to prevent a device from appearing in the BOM and in the 
XYRS file? The problem I'm trying to solve is that I have a pin defined 
in my schematic for attaching a wire to the PCB. There is no actual 
device to be installed. In order to get the pin to show up on PCB's 
rat's nest, I defined a dummy device with a hole for a footprint. This 
allows the rat's nest to show that there's something that needs to be 
added to the PCB layout. The problem now is that the dummy device shows 
up in the BOM and is also being placed in the gerber XYRS file. So the 
question is how do I get the hole to be recognized by the rat's nest on 
PCB, but get omitted from the BOM and the XYRS exports?


I've also noticed that the BOM generated by the export function of PCB 
is showing the device's footprint rather than the device name for the 
description. Is this correct?



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Re: gEDA-user: Has anyone in this group seriously used KiCAD?

2011-08-21 Thread Atommann
2011/8/20 Colin D Bennett co...@gibibit.com:
 On Fri, 19 Aug 2011 11:55:31 -0400
 John Hudak jjhu...@gmail.com wrote:

 Pros/cons?  and please, no philosphy about integrated vs independent
 tools...I am interested in aspects such as what things work? what
 doesn't? user experiences such as strengths and weakness (again
 actual/functional and not philosophy)

 I've not “seriously” used it, but I was just today frustrated when I
 tried to download and open the Maple Mini KiCad project ([1]) and my
 KiCad version (from Ubuntu 11.04 repositories) says the layout and
 schematic files are unrecognized types.

 More specifically, trying to open the .brd file says “Unknown file
 type” and trying to open the schematic says “file.sch is NOT an
 EESchema file!”  See screenshot at [2].

 A version incompatibility?  Maybe, but you would hope KiCad would at
 least tell the user that the file is the wrong version, rather than such
 cryptic errors.  User error?  Maybe, but how hard can it be to open a
 board file or schematic file?

The Maple Mini was not designed with KiCAD, it was designed with Eagle.

-- 
Best regards,
Atommann


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gEDA-user: pcb segmentation fault

2011-08-21 Thread kqt4at5v

I am using version 1.99z that I compiled a few days ago
If I press control-r while the mouse is over a component name I get a 
segmentation fault

Richard



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Re: gEDA-user: Layer button backgrounds - summary

2011-08-21 Thread Andrew Poelstra
On Sat, Aug 20, 2011 at 04:41:05PM +0200, Kai-Martin Knaak wrote:
 
 Complex relationships cannot be indicated by simple graphical means.
 What can easily be done, is an optical hint that these layers do not
 belong to the same class as the upper layers. Simply add some separating
 space between them. 


Sounds like this is the general consensus. I will add a separator
and italicize these layers. The swatch will work, but clicking to
select will do nothing.

-- 
Andrew Poelstra
Email: asp11 at sfu.ca OR apoelstra at wpsoftware.net
Web:   http://www.wpsoftware.net/andrew/



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Re: gEDA-user: pcb segmentation fault

2011-08-21 Thread Andrew Poelstra
On Sat, Aug 20, 2011 at 08:04:03AM -0500, kqt4a...@comcast.net wrote:
 I am using version 1.99z that I compiled a few days ago
 If I press control-r while the mouse is over a component name I get a 
 segmentation fault


What kind of component? What does git log -1 show? 

-- 
Andrew Poelstra
Email: asp11 at sfu.ca OR apoelstra at wpsoftware.net
Web:   http://www.wpsoftware.net/andrew/



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