Re: gEDA-user: Foss-pcb Proposed plan from CERN

[John Griessen]

On 08/22/2011 11:29 AM, Kai-Martin Knaak wrote:

The commercial package he wants to keep up with seems to be altium designer.


Oh,  I guess that's why I referred his request to others.  I like the
"radical flexibility" of gEDA tools without getting evangelical about it,
and KiCAD is closer to Altium already, so gEDA-PCB is unlikely to get CERN's
approval.

On 08/23/2011 11:47 PM, John Hudak wrote:
> No offense, but from all the stuff I've read from the gEDA base,
> various blog postings, and freelance how-tos, a common topic that
> always seems to come up is that with these tools and a knowledge of
> scripting languages, one can do just about anything.  Well, pardon my
> bluntness, but, I've forgotten more scripting languages than I know,
> and I don't necessarily want to learn another one to make gEDA tools
> work for me.

This is an old concept discussed many times on this list. gEDA is not near
to a windows app and is not likely to get there soon.  Unless Peter C. gets
hired as a top gun Altium conversion translation consultant...

On 08/24/2011 04:17 AM, Stephen Ecob wrote:
> It
> could benefit the gEDA community to adopt Altium refugees - they're
> used to spending $4K per year

Maybe Peter C. will be a hired gun after all...

On 08/24/2011 09:33 AM, Jared Casper wrote:
>  From my own experience, above the certain level of PCB
> complexity the intuitiveness and efficiency of the GUI become a
> paramount. "

I'd have to disagree.  Chips are complex.  Chips and dense boards depend on
some automation and a lot of complexity handling by humans.  The algorithms
kicked off by simple GUI check boxes are more important than GUI flamboyance.


JG


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Re: gEDA-user: howto pin size

[Andrew Poelstra]

On Wed, Aug 24, 2011 at 04:31:23PM +0200, Kai-Martin Knaak wrote:
> kqt4a...@comcast.net wrote:
> 
> > I have a component with a pin that info shows copper width = 72
> > I want to set copper width to 70 so I go to File->Preferneces->Increments 
> > and set Size Increment/Decrement to 1 and press OK
>
> 
> This feature is currently broken (and has been for quite some time)
> 
> There is a bug report in the tracker. It contains a patch from spring 2009, 
> that has been bit-rotten, rebased in autumn 2010 and probably needs some 
> love again, if it is to apply to cuurent head. 
>   https://bugs.launchpad.net/pcb/+bug/699464
>

There is no way that patch will apply. I have fundamentally
changed the way that increments are managed in pcb -- the old
code had separate cases for mm and mils, but we no longer
give special treatment to those units.

The old code also let you change the increments for mm, and
not affect the increments for mil. Given that we now support
a dozen or so different units, this is clearly impractical.

So some design work (i.e., discussion) needs to happen before
I can fix the UI.
 
-- 
Andrew Poelstra
Email: asp11 at sfu.ca OR apoelstra at wpsoftware.net
Web:   http://www.wpsoftware.net/andrew/



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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[DJ Delorie]

> A decent graphics card capable of driving them is not though.. and it
> needs to have working GL drivers under Linux too ;)

Two cheap dual-dvi nvidia cards is all it takes.

The problem is when you want a single desktop across two cards, then X
starts tripping over itself.


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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[Peter Clifton]

On Wed, 2011-08-24 at 13:53 -0400, DJ Delorie wrote:
> > eh, one of the reasons I really like having two monitors is so I can
> 
> I have four monitors (monitors are cheap!).  layout on the main
> monitor, menus and dialogs on the left, pdfs on the right, schematic
> on the upper.

A decent graphics card capable of driving them is not though.. and it
needs to have working GL drivers under Linux too ;)

(I'm limited by my laptop, so just 1 or 2 monitors here).

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: canvas of openGL enabled PCB temporarily goes confetti

[Peter Clifton]

On Wed, 2011-08-24 at 01:24 +0200, Kai-Martin Knaak wrote:
> The canvas of the openGL enabled version of PCB temporarily goes confetti 
> on resize. To reproduce:
> 
> 1) open a layout
> 2) grab the lower right corner of the window with the mouse, drag up to 
> half the window height and drag down again without lifting the mouse button.
> 
> The contents of the canvas get garbled. See the attached screen shot. 
> Everything is fine again on release of the mose button.

> My graphics hardware is radeon HD-4670 and I use the fglrx driver.


Thanks for the screen-shot. I can't reproduce it here on Intel HW. Does
it happen for any other GL applications, such as glxgears?


-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[Peter Clifton]

On Wed, 2011-08-24 at 20:28 +0200, Stefan Salewski wrote:
> On Wed, 2011-08-24 at 13:53 -0400, DJ Delorie wrote:
> > > eh, one of the reasons I really like having two monitors is so I can
> > 
> > I have four monitors (monitors are cheap!).  layout on the main
> > monitor, menus and dialogs on the left, pdfs on the right, schematic
> > on the upper.
> > 
> 
> More or less related:
> 
> Gimp seems to prefer (default to) one large window now, as reported by
> heise yesterday.
> 
> http://www.h-online.com/open/news/item/GIMP-2-7-3-arrives-with-single-window-mode-1328585.html

Oh dear goodness do I _love_ this new mode in GIMP.

I've been using it since it was first out in the gimp devel PPA, and it
is superb. You can still undock things as you want, but it stops the
damned floaty tool-palettes getting all over the place and either lost,
or in your way.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Peter Clifton]

On Wed, 2011-08-24 at 22:14 +0100, Peter Clifton wrote:
> On Wed, 2011-08-24 at 15:01 +0200, Kai-Martin Knaak wrote:
> > Peter Clifton wrote:
> 
> > > Unpacking the container format, separating out individual footprints
> > > from a library, identifying most of the binary record types within those
> > > footprints. It would take time and examples to verify we can know the
> > > meaning of each field in the format, but that is only a time + effort
> > > job.
> > 
> > Cool. Any chance, you can fan out part of the job to volunteeers?
> 
> Possibly. The caveats is that it requires access to a copy of Altium,
> and a LOT of patience ;).

And - for the record, I do not have access to Altium myself. I've never
actually sat in front of it and driven either, but I do have some guys
helping who can produce me test files to play with.

This is probably best from a "clean room" POV anyway. I have never
signed any Altium EULA, so if there were any conditions there about not
reverse engineering file-formats, I am not bound by them.

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Peter Clifton]

On Wed, 2011-08-24 at 15:01 +0200, Kai-Martin Knaak wrote:
> Peter Clifton wrote:

> > Unpacking the container format, separating out individual footprints
> > from a library, identifying most of the binary record types within those
> > footprints. It would take time and examples to verify we can know the
> > meaning of each field in the format, but that is only a time + effort
> > job.
> 
> Cool. Any chance, you can fan out part of the job to volunteeers?

Possibly. The caveats is that it requires access to a copy of Altium,
and a LOT of patience ;).

> > I'll get hold of the guys I was working for and see if I can make a
> > preliminary release of the findings made. (This was all done in the
> > support of gEDA anyway).
> 
> What was the plan for the final product? Any license strings attached,
> that would prevent distribution by super correct distros like Debian?

It was being done in general support of gEDA, sponsored by an outfit who
use Altium to make open hardware, but wanted a path to start making
things with gEDA as well.

The intention was to release the work under an appropriate open license,
probably some version of GPL / LGPL, or both, depending on how the final
code was structured.

>  ---<)kaimartin(>---
> 
> >> PS: Why did none of my todays posts hit the list, yet? (While others seem 
> >> to have no problem to get through within minutes)
> 
> Any answers to this one?

Not a clue. Mailman fail?

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: howto pin size

[kqt4at5v]

On Wed, 24 Aug 2011, Colin D Bennett wrote:


On Wed, 24 Aug 2011 14:14:23 -0700
Andrew Poelstra  wrote:


On Wed, Aug 24, 2011 at 05:14:43AM -0500, kqt4a...@comcast.net wrote:

I have a component with a pin that info shows copper width = 72
I want to set copper width to 70 so I go to
File->Preferneces->Increments and set Size Increment/Decrement to 1
and press OK
Now put cursor over pin and press shift-s
Info shows copper width = 67
How do I increment/decrement size by smaller values


Richard, the Increments tab is completely non-functional right now.


Should it be hidden, or “grayed out” by disabling its widgets until it
is fixed?  Let's try not to confuse users.


If you would like to change copper width, click on the "Route Style"
button on the bottom-left of pcb, and manually enter the new
width.


That won't change the pin on his component, however, will it?
I think he needs to select the component pin, and then type
“:ChangeSize(Selected, 70mil)” and press Enter.


That worked thanks
I had resorted to using vi to edit the pcb file

Richard

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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[Stefan Salewski]

On Wed, 2011-08-24 at 13:53 -0400, DJ Delorie wrote:
> > eh, one of the reasons I really like having two monitors is so I can
> 
> I have four monitors (monitors are cheap!).  layout on the main
> monitor, menus and dialogs on the left, pdfs on the right, schematic
> on the upper.
> 

More or less related:

Gimp seems to prefer (default to) one large window now, as reported by
heise yesterday.

http://www.h-online.com/open/news/item/GIMP-2-7-3-arrives-with-single-window-mode-1328585.html





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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Colin D Bennett]

On Wed, 24 Aug 2011 08:42:26 +0100
Peter Clifton  wrote:

> For converting "legacy" designs, an import from gerber might be more
> generally useful to our user base, and doesn't require decyphering
> unknown file formats. Admittedly this looses footprint information,
> but perhaps that isn't always an issue.

Also, a gerber import feature for pcb would be generally useful for
other purposes in addition to supporting Altium import.  It would of
course support import from any other PCB layout package.  It could also
be used for panelizing boards given a bunch of boards each as a set of
gerbers. (I'm thinking along the lines of Laen's DorkbotPDX PCB order.)

Regards,
Colin


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Re: gEDA-user: How to do PCB Autorouting with non-plated holes

[Colin D Bennett]

On Tue, 23 Aug 2011 22:53:23 +0200
Kai-Martin Knaak  wrote:

> Cory Papenfuss wrote:
> 
> > I thought about that... making different footprints that don't 
> > have copper on the component side of the pins.  Since that would
> > require making new footprints for pretty much everything,
> 
> Well, you could do the heavy lifting with an awk script: 
> 
>  If the current line is a pin,
> set the diameter of the pin to zero and add a hole flag
> ouput a round pad with the diameter of the pins annular ring
>  else, 
> output the current line unchanged.   

Could you do this on the layout (.pcb file) after all elements are
placed so he would not even need to create new footprint files?

> > I was hoping for a 
> > different solution... :)  It seems like it would be a relatively
> > common thing for hobbyists to want (whether it's a milled or
> > home-etched board), so I thought there might be a setting on the
> > autorouter config to "ignore component hold plating" or something.
> 
> IMHO, the copperless pin solution is superior. It models the layout
> like it is in reality.

Besides the autorouter, I have made the same errors with manual routing
on self-fabricated double-sided printed circuit boards, which did not
have plated through-holes, so that is a significant and practical
reason that modeling the board as it is in reality is ideal (rather
than only fooling with the autorouter).

Regards,
Colin


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Re: gEDA-user: gschem vs. PCB diode pin numbering - anode/cathode definition

[Colin D Bennett]

On Wed, 24 Aug 2011 08:21:17 -0400
Ethan Swint  wrote:

> On 08/23/2011 08:47 PM, Matthew Lewis wrote:
> > I was double checking a pcb layout today and I discovered a rather 
> > nasty gotcha. It seems that gschem and PCB don't agree on which end
> > of a diode should be pin 1. Gschem views pin 1 as the anode and PCB 
> > considers pin 1 to be the cathode. It doesn't prevent you from
> > laying out a board correctly, but it does cause the silkscreen
> > polarity to be printed backwards (for the SOD devices at least).
>
> I've defined my own symbols and footprints to use 'A' and 'K' instead
> of 1 and 2.

That's a good idea.  Anything you can do to error-proof yourself is
a Good Thing.

However, I refuse to use “anode” and “cathode” for diode symbols, since
these terms refer to electron flow and are _incorrect_ when the diode is
reverse-biased (most obvious for common Zener diode circuits).

I understand that it is electrical convention to name diode terminal
anode and cathode, but I reject it as a confusing and ambiguous naming
convention.

For my diode symbols and footprints, I choose to name the terminals
“P” and “N“ (for the p-type doped side and the n-type doped side).
This models the structure of the device in an unambiguous way.  This
works perfectly for all types of diode (including LEDs), no matter how
the device is used in the circuit.

John Denker describes the most obvious problem with anode/cathode
for Zener diodes [1]:

You should never apply the terms anode or cathode to a Zener
diode, because the potential for confusion is too great.
Instead you should refer to the P-doped side and the N-doped
side, and you should insist that others do the same.

Note that reversing the labeling convention for Zener diode
arrays would not solve the problem in any fundamental sense,
because there are perfectly reasonable circuits in which –
part of the time – a Zener diode is forward biased, so that
it conducts just like any other diode. This is the same
situation we encounter in connection with rechargeable
batteries: if you attach permanent anode/cathode labels to
the structure, you will be wrong at least part of the time.

The terms “anode” and “cathode” properly apply to function,
not structure.

Rechargeable batteries are another place where the terms anode and
cathode can cause confusion due to the fact that current can flow
either direction between the battery terminals [2].  User PaulW had an
interesting insight in comment #8 regarding the fact that “anode” and
“cathode” are important from a battery chemistry standpoint, but
“positive” and “negative” terminals are more useful from an electric
perspective.

Regards,
Colin

REFERENCES


[1] John Denker. “How to Define Anode and Cathode.”
.

[2] candlepowerforums.com thread started by Clifton Arnold.
“anode is it positive or negetive” (sic).

.



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Re: gEDA-user: howto pin size

[Colin D Bennett]

On Wed, 24 Aug 2011 14:14:23 -0700
Andrew Poelstra  wrote:

> On Wed, Aug 24, 2011 at 05:14:43AM -0500, kqt4a...@comcast.net wrote:
> > I have a component with a pin that info shows copper width = 72
> > I want to set copper width to 70 so I go to
> > File->Preferneces->Increments and set Size Increment/Decrement to 1
> > and press OK
> > Now put cursor over pin and press shift-s
> > Info shows copper width = 67
> > How do I increment/decrement size by smaller values
> 
> Richard, the Increments tab is completely non-functional right now.

Should it be hidden, or “grayed out” by disabling its widgets until it
is fixed?  Let's try not to confuse users.

> If you would like to change copper width, click on the "Route Style"
> button on the bottom-left of pcb, and manually enter the new
> width.

That won't change the pin on his component, however, will it?
I think he needs to select the component pin, and then type
“:ChangeSize(Selected, 70mil)” and press Enter.

Regards,
Colin


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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[John Doty]

On Aug 24, 2011, at 8:33 AM, Jared Casper wrote:

> I chuckled at what this community would think of the comment, in
> response to "There are users who prefer separate dedicated
> applications to an integrated design environment.", "BTW. How many of
> these users have ever designed a PCB with more than 4 layers and, say,
> 300 components? From my own experience, above the certain level of PCB
> complexity the intuitiveness and efficiency of the GUI become a
> paramount. "

I think that's exactly backwards. The "intuitiveness and efficiency" of the GUI 
make for comfort, but not productivity. In a big design, the key is to break it 
down into modules, and then use the automation to put the modules together. 
This is especially true when you recognize that a big design encompasses not 
just EDA, but documentation, software, and possibly other things. The toolkit 
approach allows you to combine these things in a maximally automated flow.

I've seen the difference starkly in software. I personally don't care what 
tools a programmer uses as long as they get the job done: this should be a 
matter of individual preference. Except, it is my experience that programmers 
who prefer toolkits are much more productive than programmers who prefer IDE. 
They plan better, they factor better, and they exploit the power of the 
computer better. One serious problem is that IDE encourages very inefficient 
debugging practices: it's much better to trap bugs with assertions, logs, and 
analysis than to fish for bugs interactively.

Yes, it takes more thought and planning to use a toolkit. For simple jobs, a 
nice intuitive GUI is fine (I'm typing this to the Mac "Mail" app). But 
planning is more important for big jobs, and a toolkit rewards planning better. 
Spending time to adapt your processes to the job is a big time saver for big 
jobs.

A flexible, extensible, toolkit is especially superior for jobs that have 
characteristics that fall outside the limits of the application designers' 
imaginations. Try exporting KiCad designs to a computer algebra system for 
symbolic analysis (but the Mathematica back end for gnetlist only took me an 
afternoon to write).

The important thing to recognize is that there is room for, and a need for, 
both toolkits and integrated tools. AWK and spreadsheets are both effective at 
processing tabular data in their own ways, but a merged tool with the 
characteristics of both would be incomprehensible. I think the same is true in 
EDA.

It is my opinion that gEDA's developers and users should embrace its strengths 
as a powerful, flexible toolkit. Keep the tools separate. Keep the interfaces 
clean and simple. Maximize the rewards that those who can do a little scripting 
can earn. Let KiCad cover the integrated app space.

It would be useful to be able to import KiCad schematics, so that when users 
are ready for the more powerful toolkit we could offer them an upgrade path.

John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com




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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Kai-Martin Knaak]

Peter Clifton wrote:

> For converting "legacy" designs, an import from gerber might be more
> generally useful to our user base, and doesn't require decyphering
> unknown file formats. Admittedly this looses footprint information, but
> perhaps that isn't always an issue.

Sometimes I would like to import eagle designs done at other intitutes. 
In that case I need full access to schematic and footprints. A gerber 
import would not do the trick.


> 
>> How far did you advance on this road?
> 
> Unpacking the container format, separating out individual footprints
> from a library, identifying most of the binary record types within those
> footprints. It would take time and examples to verify we can know the
> meaning of each field in the format, but that is only a time + effort
> job.

Cool. Any chance, you can fan out part of the job to volunteeers?


> I'll get hold of the guys I was working for and see if I can make a
> preliminary release of the findings made. (This was all done in the
> support of gEDA anyway).

What was the plan for the final product? Any license strings attached,
that would prevent distribution by super correct distros like Debian?

 ---<)kaimartin(>---

>> PS: Why did none of my todays posts hit the list, yet? (While others seem 
>> to have no problem to get through within minutes)

Any answers to this one?
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
-> not happy with moderation of geda-user mailinglist



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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[Kai-Martin Knaak]

Colin D Bennett wrote:

>> The lesstif tear-off model isn't so hot either.  I've been considering
>> writing my own from scratch to work around some of the weirdisms.
> 
> I used the tear-offs for grid size when it worked, so I could quickly
> switch back and forth between fine and coarse, imperial and metric grids
> while working.
> 
> A more ideal solution than tear-off menus is a customized non-modal
> dialog, window, or dockable toolbar of some sort that provides better
> control for specific features.

Inkscape features detachable toolbars and dialogs that can be placed off 
window, anywhere on any monitor. Surely, they put al ot of thought in it. 
Maybe, we can do as they do.


> For instance, instead of the predefined
> grid items on the Grid Size submenu, it could have the user-defined
> grids (see “new grids for pcb” feature that I REALLY WANT TO SEE) and
> it could use better widgets rather than being stuck with a linear list
> of menu items.

ack.
I like the fly-out widgets used by many mechanical cads. They can deliver 
lots of functions in little space.

---<)kaimartin(>---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
-> not happy with moderation of geda-user mailinglist



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Re: gEDA-user: slotting question

[Kai-Martin Knaak]

Dave McGuire wrote:

>> You should promote the slot attribute for both instances.
> 
>Even though slot #1 defaults to 1?
> 
>In any event, I've tried all combinations, and I still get the same 
> behavior.  This is with v1.6.2.20110115.  This is repeatable here, using 
> symbol 7404-1 from the default installed library.

Can you compile a step-by-step description of what you do to reproduce 
the problem? Meaning, each mouse click and every dialog.


>This seems like a pretty serious issue; can anyone shed a little 
> light on it?

I use slotting all the time and did not run into what you describe. So 
there seems to be a difference the way we do it. 


---<)kaimartin(>---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
-> not happy with moderation of geda-user mailinglist



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Re: gEDA-user: howto pin size

[Kai-Martin Knaak]

kqt4a...@comcast.net wrote:

> I have a component with a pin that info shows copper width = 72
> I want to set copper width to 70 so I go to File->Preferneces->Increments 
> and set Size Increment/Decrement to 1 and press OK
   

This feature is currently broken (and has been for quite some time)

There is a bug report in the tracker. It contains a patch from spring 2009, 
that has been bit-rotten, rebased in autumn 2010 and probably needs some 
love again, if it is to apply to cuurent head. 
  https://bugs.launchpad.net/pcb/+bug/699464


> How do I increment/decrement size by smaller values

You can use the action ChangeSize() the command interface
  http://pcb.gpleda.org/pcb-cvs/pcb.html#ChangeSize-Action
Enter the command interface with a colon.

---<)kaimartin(>---
-- 
Kai-Martin Knaak  tel: +49-511-762-2895
Universität Hannover, Inst. für Quantenoptik  fax: +49-511-762-2211 
Welfengarten 1, 30167 Hannover   http://www.iqo.uni-hannover.de
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Re: gEDA-user: Is it required to use hierarchy for multi-page schematics ?

[Dan Roganti]

   On Tue, Aug 23, 2011 at 10:35 PM, DJ Delorie <[1]d...@delorie.com> wrote:

   > I wouldn't know how to tell PCB that it should look at several
   > schematics for the import action. Maybe, DJ can add a comment.

 Layout-level Attributes:
 import::src0 = file1.sch
 import::src1 = file2.sch
 etc
 It's documented in the Import() action in pcb.pdf.

   thanks for the help everyone !!
   =Dan

References

   1. mailto:d...@delorie.com


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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[DJ Delorie]

> No offense, but from all the stuff I've read from the gEDA base, various
> blog postings, and freelance how-tos, a common topic that always seems to
> come up is that with these tools and a knowledge of scripting languages, one
> can do just about anything.

There are two "camps" here.  One pushes the strengths of the toolkit
aspects of gEDA, the other pushes the ease-of-use factors.  You can
use it either way.  Most of the time when I'm using gEDA, for example,
I rarely use a terminal - everything is done with the gui.  But I have
some Makefiles that automate pushing designs out to my web server,
generating etch films, fab files, digikey orders, etc.

I did some labs at DevCon using gEDA/PCB/GerbV on Fedora, for Windows
users, and the terminal was not used *at all*.  The biggest complaint
I got was that there wasn't enough "play time" at the end :-)


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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[DJ Delorie]

> eh, one of the reasons I really like having two monitors is so I can

I have four monitors (monitors are cheap!).  layout on the main
monitor, menus and dialogs on the left, pdfs on the right, schematic
on the upper.


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Re: gEDA-user: gschem vs. PCB diode pin numbering

[Steven Michalske]

On Aug 24, 2011, at 5:21 AM, Ethan Swint wrote:

> On 08/23/2011 08:47 PM, Matthew Lewis wrote:
>> I was double checking a pcb layout today and I discovered a rather nasty 
>> gotcha. It seems that gschem and PCB don't agree on which end of a diode 
>> should be pin 1. Gschem views pin 1 as the anode and PCB considers pin 1 to 
>> be the cathode. It doesn't prevent you from laying out a board correctly, 
>> but it does cause the silkscreen polarity to be printed backwards (for the 
>> SOD devices at least).
> I've defined my own symbols and footprints to use 'A' and 'K' instead of 1 
> and 2.
> 
> 
This is what we do at my work as well.

Steve



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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Jared Casper]

On Tue, Aug 23, 2011 at 2:29 PM, Kai-Martin Knaak  wrote:
>
> > Indeed.  The posts to the list that I woke up to this morning took a
> > frighteningly KiCad-centric turn.
> >
> Well, this is, because apparently one of the kicad developers showed up.
> Is any of the geda devs going to join the OHR mailinglist?
>

The guy from cern seemed equally leaning towards kicad and a
kicad-like toolset.  Especially with comments like "I bet KiCad will
gain more developers quite soon."  Depending on how influential he is,
the "battle" may be over before it even begins.

I chuckled at what this community would think of the comment, in
response to "There are users who prefer separate dedicated
applications to an integrated design environment.", "BTW. How many of
these users have ever designed a PCB with more than 4 layers and, say,
300 components? From my own experience, above the certain level of PCB
complexity the intuitiveness and efficiency of the GUI become a
paramount. "  As someone who only does relatively simple boards, I
wasn't in a position to respond.  Maybe some of our power users could
step in?

Jared


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Re: gEDA-user: howto pin size

[Andrew Poelstra]

On Wed, Aug 24, 2011 at 05:14:43AM -0500, kqt4a...@comcast.net wrote:
> $ pcb --version
> PCB version 1.99z
> 
> $ git log -1
> commit 87572b48e0d58b8f69d4aece6e22c4a5d89a16c5
> Author: Andrew Poelstra 
> Date:   Mon Aug 22 17:10:23 2011 -0700
> 
> Fix segfault in report.c text report output
> 
> I have a component with a pin that info shows copper width = 72
> I want to set copper width to 70 so I go to
> File->Preferneces->Increments and set Size Increment/Decrement to 1
> and press OK
> Now put cursor over pin and press shift-s
> Info shows copper width = 67
> How do I increment/decrement size by smaller values
>


Richard, the Increments tab is completely non-functional right now.
If you would like to change copper width, click on the "Route Style"
button on the bottom-left of pcb, and manually enter the new
width.

 
-- 
Andrew Poelstra
Email: asp11 at sfu.ca OR apoelstra at wpsoftware.net
Web:   http://www.wpsoftware.net/andrew/



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Re: gEDA-user: Symbols with Multiple Heterogeneous Gates in Gschem

[Ethan Swint]

On 08/24/2011 12:34 AM, Gus Fantanas wrote:

Hello All,

How does gschem handle cases of different "gates" in the same 
package?  For example, I am trying to create a symbol for On 
Semiconductor's NTZD3155C complementary PMOS-NMOS MOSFET pair.  Unlike 
the dual/quad NAND/NOR gates in the gschem tutorials, this package 
contains two heterogeneous (non-interchangeable) and totally separate 
gates.  I can put the whole thing in one big symbol, but I like the 
elegance of using each of the two complementary MOSFETs separately by 
itself in the schematic.
I believe that the accepted way to do this is similar to separating 
power and logic pins - just simply define two separate symbols and make 
sure that they have the same refdes.



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Re: gEDA-user: gschem vs. PCB diode pin numbering

[Ethan Swint]

On 08/23/2011 08:47 PM, Matthew Lewis wrote:
I was double checking a pcb layout today and I discovered a rather 
nasty gotcha. It seems that gschem and PCB don't agree on which end of 
a diode should be pin 1. Gschem views pin 1 as the anode and PCB 
considers pin 1 to be the cathode. It doesn't prevent you from laying 
out a board correctly, but it does cause the silkscreen polarity to be 
printed backwards (for the SOD devices at least).
I've defined my own symbols and footprints to use 'A' and 'K' instead of 
1 and 2.



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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[John Hudak]

   dont ya love moderated lists?  lol
   on a more serious note, yes, a path from altium would be huge, but in
   all honesty, having tools that work and inter-operate would be much
   better.  After playing with KiCAD for a bit, they have a very nice
   integrated tool suite that all works...and it has import (and export?)
   for packages like Eagle, and it runs on different OSs, quite nicely.
   No offense, but from all the stuff I've read from the gEDA base,
   various blog postings, and freelance how-tos, a common topic that
   always seems to come up is that with these tools and a knowledge of
   scripting languages, one can do just about anything.  Well, pardon my
   bluntness, but, I've forgotten more scripting languages than I know,
   and I don't necessarily want to learn another one to make gEDA tools
   work for me. You are severely limiting your adoption base if you make
   this as a pre-requisite for user satisfaction.  As developers, you may
   be enamored with your coding cleverness and undocumented design
   decisions, but from a user perspective, you lost them from "download
   and then make."  and then use these magic scripts whos only hint of
   functionality is in the name
   From what the folks at CERN seem to be asking, I think gEDA is, in many
   respects a long way from providing it.  If one is going to make the
   upgrade effort worth it, one has to know their strengths and
   weaknesses.
   I could be wrong in my point of view, as I haven't pushed a board out
   to completeness,  however the challenges I've encountered along the way
   have been quite surprising.
   -J

   On Tue, Aug 23, 2011 at 7:42 PM, Kai-Martin Knaak
   <[1]k...@familieknaak.de> wrote:

   Peter Clifton wrote:
   > Even conversion of old legacy Altium designs could be done given
   access

 ^
 Is this a serious restriction?
 Would it be possible for a user of a current altium license to
 export
 to this "old legacy" format?

   > to known sample files and developer time (e.g. money). I was working
   on
   > a funded project to reverse engineer those file-format at while back,
   > and the only reason it has stalled so far is a lack of my time. The
   > formats aren't so bad to understand once you've had some luck
   figuring
   > out the binary compression scheme.

 A transition path from altium to geda would be huge!
 How far did you advance on this road?
 ---<)kaimartin(>---
 PS: Why did none of my todays posts hit the list, yet? (While others
 seem
 to have no problem to get through within minutes)

   --
   Kai-Martin Knaak
   Email: [2]k...@familieknaak.de
   [3]http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53

   increasingly unhappy with moderation of geda-user

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References

   1. mailto:k...@familieknaak.de
   2. mailto:k...@familieknaak.de
   3. http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
   4. mailto:geda-user@moria.seul.org
   5. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user


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gEDA-user: Symbols with Multiple Heterogeneous Gates in Gschem

[Gus Fantanas]

Hello All,

How does gschem handle cases of different "gates" in the same package?  
For example, I am trying to create a symbol for On Semiconductor's 
NTZD3155C complementary PMOS-NMOS MOSFET pair.  Unlike the dual/quad 
NAND/NOR gates in the gschem tutorials, this package contains two 
heterogeneous (non-interchangeable) and totally separate gates.  I can 
put the whole thing in one big symbol, but I like the elegance of using 
each of the two complementary MOSFETs separately by itself in the schematic.


Regards,

Gus Fantanas



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gEDA-user: howto pin size

[kqt4at5v]

$ pcb --version
PCB version 1.99z

$ git log -1
commit 87572b48e0d58b8f69d4aece6e22c4a5d89a16c5
Author: Andrew Poelstra 
Date:   Mon Aug 22 17:10:23 2011 -0700

Fix segfault in report.c text report output

I have a component with a pin that info shows copper width = 72
I want to set copper width to 70 so I go to File->Preferneces->Increments 
and set Size Increment/Decrement to 1 and press OK

Now put cursor over pin and press shift-s
Info shows copper width = 67
How do I increment/decrement size by smaller values

Thanks
Richard



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Re: gEDA-user: slotting question

[John Doty]

On Aug 23, 2011, at 8:45 PM, Dave McGuire wrote:

> On 08/22/2011 07:45 AM, Kovacs Levente wrote:
>>>I open up a new schematic, place two instances of 7404-1, edit the
>>> attributes of the second one, promote the "slot" attribute, edit the
>>> newly-accessible one, change it to "2", save it, save the sheet, exit
>>> gschem, restart, and load the sheet.
>> 
>> I am guessing that you edit the symbol too. You don't have to.  You just have
>> to save the sheet, not the symbol.
> 
>  Oh nono, I didn't do that...I was tired when I typed that.  Where I said 
> "save it, save the sheet" I just meant "save the sheet".  I do not edit the 
> symbols alone, other than double-clicking on them and promoting/modifying the 
> slot attribute.
> 
>> You should promote the slot attribute for both instances.
> 
>  Even though slot #1 defaults to 1?
> 
>  In any event, I've tried all combinations, and I still get the same 
> behavior.  This is with v1.6.2.20110115.  This is repeatable here, using 
> symbol 7404-1 from the default installed library.
> 
>  This seems like a pretty serious issue; can anyone shed a little light on it?

Absolutely mysterious. I've never seen behavior like this and I cannot 
reproduce it using your procedure.

John Doty  Noqsi Aerospace, Ltd.
http://www.noqsi.com/
j...@noqsi.com




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Re: gEDA-user: gschem vs. PCB diode pin numbering

[Kai-Martin Knaak]

Matthew Lewis wrote:

> but the change had no effect since the older m4 
> lib is being used when you import a schematic. You have to go back and 
> manually replace the footprints if you want newlib.

This is why I habitually move the m4 lib out of the way, so gnetlist
does not find it even if it tries. Users have been struggling with 
this m4 persistency at least since 2005. 

---<)kaimartin(>---
-- 
Kai-Martin Knaak
Email: k...@familieknaak.de
http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53
increasingly unhappy with moderation of geda-user



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Re: gEDA-user: PCB+GL rebased to git HEAD (with nanometers) - bugwith arcs?

[michalwd1979]

Andrew and Kai-Martin,

I've saved the broken (with wrong Q42) board using pcb+gl_experimantal.stgit 
branch. 
No problems with with pcb+gl, but I did not try to open broken file there. 
Anyway I remember that there was a situation when one version (after some 
moving/dragging components) showed wrong and one right arcs on the same file.
My fault that I forgot to check if the error is only on screen or in file also, 
sorry.

Anyway now it is all over, thanks Andrew!

Best regards,
Michael Widlok


Dnia 23 sierpnia 2011 4:57 Andrew Poelstra  napisał(a):

> On Mon, Aug 22, 2011 at 05:31:26PM -0700, Andrew Poelstra wrote:
> > On Sat, Aug 20, 2011 at 01:57:08PM +0200, michalwd1979 wrote:
> > > Dear Peter,
> > > 
> > > I'm using newest version of pcb opengl from git and I found strange 
> > > behaviour with arcs.
> > >
> > 
> > This was caused by my commit:
> >
> 
> Fixed by commit 7b590a61.
> 
> 



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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Stephen Ecob]

> Even conversion of old legacy Altium designs could be done given access

I expect there will be a growing demand for exit options for Altium
users once the full impact of their recent upheaval settles in.  It
could benefit the gEDA community to adopt Altium refugees - they're
used to spending $4K per year for their layout software, perhaps they
could funnel some of that into improving gEDA.


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Re: gEDA-user: Foss-pcb Proposed plan from CERN

[Peter Clifton]

On Wed, 2011-08-24 at 01:42 +0200, Kai-Martin Knaak wrote:
> Peter Clifton wrote:
> 
> > Even conversion of old legacy Altium designs could be done given access
>  ^
> Is this a serious restriction? 
> Would it be possible for a user of a current altium license to export 
> to this "old legacy" format?

Sorry, I was meaning "legacy" as in "their old designs". It was a
current file-format I was working on. I didn't bother with their old
ACSII format, as not so many designs / versions can export it.

> A transition path from altium to geda would be huge!

I think so. Actually, a path back from gEDA to Altium would probably
give as much of a boost in confidence for people to try gEDA it as well.
(Assuming an incumbent Altium user).

The main sticking points for people converting so far, seem to be:

1. Confidence in the tool reliability and feature set
2. Taking their existing footprint / symbol libraries with them to gEDA
3. (Can't recall a No. 3).

Certainly migration of existing designs was not a huge concern to the
people I've spoken too, since at the early transition stage, I would
expect people to keep a copy of Altium around.

For converting "legacy" designs, an import from gerber might be more
generally useful to our user base, and doesn't require decyphering
unknown file formats. Admittedly this looses footprint information, but
perhaps that isn't always an issue.

> How far did you advance on this road?

Unpacking the container format, separating out individual footprints
from a library, identifying most of the binary record types within those
footprints. It would take time and examples to verify we can know the
meaning of each field in the format, but that is only a time + effort
job.

I had similar tentative progress with the PCB format its self, and
verified that it would be a similar job to parse the schematic and
schematic symbol contents.

I'll get hold of the guys I was working for and see if I can make a
preliminary release of the findings made. (This was all done in the
support of gEDA anyway).

> ---<)kaimartin(>---
> 
> PS: Why did none of my todays posts hit the list, yet? (While others seem 
> to have no problem to get through within minutes)

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)
Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me)


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Re: gEDA-user: pcb HID GUI options: gtk, lesstif?

[Russell Dill]

> One of my "dream projects" is to do a GUI for pcb that uses two or
> more monitors, with one monitor heavy on the toolbars and showing an
> overview "thumber" window, and the other monitor being 100% layout.

eh, one of the reasons I really like having two monitors is so I can
have reference information on one screen, and my design, schematic, or
layout on the other. I suppose while deep into just routing it might
be helpful.


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