Re: gEDA-user: OT: 4 Conductor Cable
Sounds like you want service cord ... Avalable from any electricians suppl locally. Also available in any gauge and number of conductors. Price from $0.49 to $1.80 for your needs depending on the type of jacket mayerial. Signature On Jul 6, 2011, at 8:23 AM, Rob Butts r.but...@gmail.com wrote: Can anyone suggest where I can get 4 conductor round cable for max load of 7 amps 4.2 volts where I don't have to buy 100 feet costing gazzillions? Thanks ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Remove solder mask from polygons
On 6/29/2011 9:23 AM, George Boudreau wrote: I am working on a micro-stripline layout and the presence of the soldermask on portions of the board will cause problems. With gEDA/pcb micro-stripline work is a drafting task consisting of numerous polygons. Is there a method/switch that will allow me to remove blocks of the solder mask. You could create footprints in your text editor of copper free pads with the appropriate mask clearance to suit your needs. A small set of rectangular parts ought to work. I've done this for other parts, but thinking about it there has always been some copper there to grab onto in PCB. So I'm not sure you'll have anything to select in PCB if there is no copper but the approach has worked for me in other similar situations. Phil Taylor ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem add net problem
On 6/24/2011 4:06 PM, Tim Holmes wrote: But if I try moving the middle resistor, it does not rubberband like the two outside ones. This happens whenever I try to install a symbol on a net. I can get it to work by moving the part off the line and connecting another net to it manually. But as soon as I try to move it back into position, the connection goes away, and it will not rubberband. Gschem will convert net segments into a single line segment if they are drawn, or moved to, a straight line. If you only drew one line segment to start with, it will be only editable by the handles on its endpoints (it is a line segment). Hope it helps, Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem add net problem
I usually draw net stubs coming off any long net for the visual safety of seeing each one fully drawn. The risks of not doing it this way seem to great. It also makes different sized symbols fit in parallel without issue. So for three parallel symbols sharing one net there would be at least four net line segments graphically. (one stem and three stubs). Compared to the effort one takes to create a full schematic, this small extra bit of drawing matters little. Regards, Phil Signature On Jun 24, 2011, at 7:25 PM, Tim Holmes holmes...@gmail.com wrote: OK, I think I finally see it. In the example below, I would need to place a net from the pin of the middle resistor to the net connecting the outer two resistors. I can't just drop the pin of a part on an existing net. Tim On 06/24/2011 06:48 PM, Phil Taylor wrote: On 6/24/2011 4:06 PM, Tim Holmes wrote: But if I try moving the middle resistor, it does not rubberband like the two outside ones. This happens whenever I try to install a symbol on a net. I can get it to work by moving the part off the line and connecting another net to it manually. But as soon as I try to move it back into position, the connection goes away, and it will not rubberband. Gschem will convert net segments into a single line segment if they are drawn, or moved to, a straight line. If you only drew one line segment to start with, it will be only editable by the handles on its endpoints (it is a line segment). Hope it helps, Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PCB DRC accuracy?
On 6/21/2011 6:53 AM, Richard Rasker wrote: So I wonder what tolerance PCB's DRC has? I realize that 0.006 mm (6 micron) is a tiny distance, but it can make all the difference between an accepted and rejected board -- and thus delay in the manufacturing process. I wonder too. I've often set my DRC clearance to 4+/-.1 mils to get it through Advanced Circuits 4 mil spec. I would consider this a known bug. Of course I don't know if anyone indeed knows about it.(!) The code for DRC may round up and down for mathematical precision, but should not be rounding but padding all 'rounded' computations in preference of more clearance. Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: pcb: mounting hole, copper diameter parameter?
On 5/19/2011 2:40 PM, Colin D Bennett wrote: I don't want any copper, so can I set thickness to 0? Or, should I set it to exactly the drill size? zero works. I have the 'hole' flag set so it won't be plated. Most board shops default to all holes plated and their process is set up for that. It is an added step to drill the hole out after plating. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PGA 100 footprint
On Feb 12, 2011, at 10:37 AM, Oliver King-Smith oliver...@yahoo.com wrote: Does anyone have a PGA100 foot If I layout the footprint would folks recommend using PCB or is there a better way to do this style of footprint? Use a script, a spreadsheet or a text editor or a combination of these based on what comes easy to you. Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Soldering iron tip turns black
On 2/4/2011 1:42 PM, Rob Butts wrote: high? How can I get it to that shiny silver solder sticking to it condition? The oxidation on your tip can be polished off with fine sandpaper (400 and higher). It was expected with older irons that the tip would be filed back as it corrodes. This is generally a bad idea today, because your tip metal contaminates the solder alloy, leaving solder composition and properties you can't be sure are stable. A new tip is a joy to use and should hold up well to the fluxes and alloys used today. In a jam, polish the tip you have under running water (so you're not breathing lead dust) and be sure to flux and tin this tip as soon as you get it hot the first time. This routine also works when you get the tip otherwise contaminated (burned plastic, etc.). The common assumption that you need higher temps with lead-free solder may be wrong. These solders don't flow as well, but they also contaminate easily. Hotter temperatures make this second factor a serious concern. If you're doing lead free, you have to have excellent flux or your iron will always be a mess, and you joints unpredictable. Phil Taylor ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: gschem: directly connecting two nets?
you must also connect the two pins in the schematic, or DRC will complain about a short circuit. Ive had good luck giving multiple coppper pins and pads the same number in the footprint file. This only works for pins/pads that overlap. If not PCB will only enforce a connection to one copper item. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Wiki cleanup?
On 1/4/2011 5:14 PM, Kai-Martin Knaak wrote: pcb#is_it_true_that_pcb_has_no_way_to_make_a_mechanical_layer_to_show_the_physical_outline_of_the_board_and_its_dimensions I'd prefer: How do I define the physical outline of my layout? By the way: If gsch2pcb were to include the outline layer in the initial layer stack, this source of newbie confusion would be defused. http://geda.seul.org/wiki/geda:pcb-quick_reference#pcb_physical_layer_reference I started this two weeks ago. Let's work on this and remove this backwards FAQ. Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Wiki cleanup?
On 1/4/2011 3:10 PM, Stefan Salewski wrote: Do we really need this in the wiki: http://geda.seul.org/wiki/geda:faq-pcb#is_it_true_that_pcb_has_no_way_to_make_a_mechanical_layer_to_show_the_physical_outline_of_the_board_and_its_dimensions The FAQ should be kept as a mode of support of last resort, otherwise I would like to see it de-emphasized. Unfortunately PCB:tips (geda:pcb_tips) currently takes the form of an FAQ ... which is the biggest reason it's a semi-useless page which continues to defy structure, organization, or meaningful sustained contribution. I recommend de-emphasizing this page as well. Why isn't there a user-guide ... equal parts reference and how-to instruction? This is what we need, and need to spend time on -- in distinction from the junkyard of information that FAQ:PCB and PCB:TIPS are presently. Phil ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Wiki cleanup?
On 1/4/2011 6:06 PM, DJ Delorie wrote: Why isn't there a user-guide? Uh, am I missing something? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
