Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Tue, 17 Feb 2009 06:31:57 -0500, John Doty wrote: We concluded that Sage isn't quite ready to support this Would one of the following be fit for the job: gap ginac maxima mathomatic yacas ---(kaimartin)--- -- Kai-Martin Knaak http://lilalaser.de/blog ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Kai-Martin Knaak wrote: On Tue, 17 Feb 2009 06:31:57 -0500, John Doty wrote: We concluded that Sage isn't quite ready to support this Would one of the following be fit for the job: gap ginac maxima mathomatic yacas ---(kaimartin)--- maybe octave would be useful (www.octave.org), it works also with ngspice, on the ngspice site is a demo. best regards Felix ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Felix Maier wrote: Kai-Martin Knaak wrote: On Tue, 17 Feb 2009 06:31:57 -0500, John Doty wrote: We concluded that Sage isn't quite ready to support this Would one of the following be fit for the job: gap ginac maxima mathomatic yacas ---(kaimartin)--- ok just missed you're looking for a cas, sorry. best regards Felix ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Kai-Martin Knaak wrote: On Tue, 17 Feb 2009 06:31:57 -0500, John Doty wrote: We concluded that Sage isn't quite ready to support this Would one of the following be fit for the job: gap ginac maxima mathomatic yacas Don't know. It takes work to find out. Can any of these associate a value with a *pattern* (not just a function or variable)? Mathematica's capabilities here are helpful. ---(kaimartin)--- ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Feb 17, 2009, at 2:12 AM, al davis wrote: Another interesting type of analysis that Spice doesn't have is a semi-symbolic analysis, where the result is a transfer function, in S, that has some values carried through as symbols. I would have to help you a lot, but it would be a real accomplishment, and I think I know of a few places where you could get a paper out of it. .. at least a conference paper, maybe two, maybe even a journal paper. There's an existing netlister that I wrote, distributed with gEDA, that produces Mathematica equations for this purpose. I think this kind of analysis really needs a computer algebra system behind it to do the manipulations. See: http://www.noqsi.com/images/gEDAmath.nb.pdf Now the trouble is that Mathematica is rather pricey proprietary software, so it would be nice to have a similar implementation for a free CAS. Back at the last code sprint, my math grad student son and I sat at Ales' table and attempted to port this approach to Sage, and we spent some more time the next day. We concluded that Sage isn't quite ready to support this: it seemed like we were rather sloppily extending Sage (whose internals we don't understand very well) rather than focusing on the problem at hand. There may be another path that will get better results, but I doubt it makes sense to implement a computer algebra system inside gnucap. Personally, I'd rather see the gnucap effort put into noise analysis: that just might persuade me to abandon ngspice. John Doty Noqsi Aerospace, Ltd. http://www.noqsi.com/ j...@noqsi.com ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Tue, 17 Feb 2009 02:12:47 -0500, al davis wrote: People spend lots of time trying to make a GUI, when there are problems underneath. Is this true in this special case? (Doing gnucap sims with schematics designed with gschem) I got the impression, that all the infrastructure is there, but no GUI way to use it. What needs to be done until the user can send a selected part of a schematic to the simulator and press a simulate-now button? Is there more to it than GUI integration of already working procedures? ---(kaimartin)--- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key:http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmkop=get ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
al davis wrote: Another interesting type of analysis that Spice doesn't have is a semi-symbolic analysis, where the result is a transfer function, in S, that has some values carried through as symbols. I would have to help you a lot, but it would be a real accomplishment, and I think I know of a few places where you could get a paper out of it. .. at least a conference paper, maybe two, maybe even a journal paper. anyone remember the program xfunc which did exactly this? I have tried to track down the author a few times over the years with no luck. The manual says: XFUNC 1.2 Transfer Function Symbolic Calculator Copyright 1991 - YY Corporation The program was distributed with sources and a DOS binary. The programmer is listed as Henry Yiu. History shows 1989 as the original release date and 1991 as the most recent. I do not see any sort of license anywhere. Just the copyright notice. The tool worked and really my primary complaint was that you quickly ended up with an expression that a) was not at all a low entropy expression (see various papers by Middlebrook or the textbook by Vorperian) b) represented polynomials as the coefficients like 1 + a1*s + a2*s^2 + a3*s^3 which of course tends to be a poor way to represent polynomials from both a numerical sense and an insight sense. That said, it was still useful from time to time. If anyone would have a clue on how to contact Henry Yiu it might be interesting to see if he would provide a license that allows for redistribution. GPL would work. The program is in C and doesn't take much to build on modern systems. If he were willing, I'd volunteer to get it into a version control system (probably git) and provide a build system other than the DOS build system. -Dan -Dan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
If anyone would have a clue on how to contact Henry Yiu it might be interesting to see if he would provide a license that allows for redistribution. Did you try the addr on this web page? http://www.geocities.com/hyiu00/ Stuart ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Dan - On Tue, Feb 17, 2009 at 10:01:57PM -0500, Dan McMahill wrote: The tool worked and really my primary complaint was that you quickly ended up with an expression that a) was not at all a low entropy expression (see various papers by Middlebrook or the textbook by Vorperian) Hey! I still remember getting back homework stamped by Middlebrook (yes he had the stamp custom made) that said Unilluminating Form. No credit. You learn real fast in that environment. Thirty years later, it's as clear as ever that Middlebrook was absolutely right. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Monday 16 February 2009, Stephen Williams wrote: Icarus Verilog provides an API for writing code generators. This API is described by the ivl_target.h header file. There are example code generators specifically intended to demonstrate the API use: the tgt-null/ directory has a null code generator, and the tgt-stub/ directory has a stub code generator. The null code generator simply connects to the API and does noting. The stub code generator scans the entire design, displaying what it finds in human-readable form. There's also a VHDL generator, done as a SoC project last year, and an old generator that makes flat Verilog. That might be closer. A lot of work is done, just change the syntax. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Saturday 14 February 2009, Aanjhan R wrote: Thank you all for the feedbacks. I looked a bit deeper into the projects and my interests and figured that , I am not into GUI stuff but would love to get my hands more dirty with things even down. People spend lots of time trying to make a GUI, when there are problems underneath. I am not opposed to GUI's, but it is important to make what is behind it work well first, and to keep the user interface separate from the action. On Thu, Feb 12, 2009 at 9:56 AM, al davis ad...@freeelectron.net wrote: 3. Porting of missing analysis, (noise, pz, disto, hb, etc.) from other free simulators (under gnucap) All good projects .. There is someone now working on noise and hb. pz and disto would be good summer projects. pz is fairly easy, if it is based on AC analysis, because the whole model interface is already working. disto is harder because of the model interface. You will learn a lot. Looks interesting now for me. I will look at the current codebase. Is this noise and hb implementation that someone is doing already available in the VCS for me to have a look at and check the pattern of implementation? No .. and I am not sure how it will develop. You can look at the AC, DC, tran, and Fourier analysis to see how it fits. Everything is plugins, so it is easy to experiment with it. pz (spice method) is to ac as fourier is to tran. Another possibility is to make a pz that looks at saved data, as a postprocessor, and add the ability to do go anywhere on the S plane to AC, as opposed to the usual of traversing the j-omega axis. Another interesting type of analysis that Spice doesn't have is a semi-symbolic analysis, where the result is a transfer function, in S, that has some values carried through as symbols. I would have to help you a lot, but it would be a real accomplishment, and I think I know of a few places where you could get a paper out of it. .. at least a conference paper, maybe two, maybe even a journal paper. It may sound intimidating, but there are some features of C++ that make it a lot easier than in other languages. Any further discussion of it will be over the head of most people here, so ask about it on the gnucap-devel list, where it is absolutely on topic, if you want to know more. That is the place to ask more about things like the pz analysis too. Again, it is over the head of most people here, but a good match there. On Wednesday 11 February 2009, Stephen Williams wrote: Given the apparent bent towards analog in your selection of candidate projects, might I suggest you take a look at the gnucap Code Generator on the Icarus Verilog projects page? This is something that Al has been wanting, and also puts to use some of the nascent analog support in Icarus Verilog proper. I like this one too. It is an enabler that will make other enhancements easier, and something that is desperately needed as a model compiler. There are lots of people who want it and some real experts who can help. This sounds exciting too. But I am highly unsure about the things that I need to learn before taking this project up. The Icarus Project page says this project remains clear of the Iverilog core. It states that one might require knowledge of how to compile models for gnucap. Can some more light be thrown here please? Any nice starting pointers? I can then catch on and start rolling. Unsure???... you say you are doing a masters .. The projects we are talking about are beyond what I would expect an undergrad to do, but it should be ok for someone doing a masters, especially if you are considering a research oriented career. You will need to learn a lot, but that's the way it is supposed to be. It may be too late to do this, but if you can, I recommend a course in compilers. In this case, the parser is done. What is needed is a code generator, and that is similar to others that are done. So, you have a good starting point. The interface is well defined. A lot of the code generation is just copying with a different syntax. You can do a lot of that just by text substitution. Then the hard part is generating code for all of the partial derivatives. This means analyzing an expression, figuring out what partial derivatives to generate, and generating them. Usually, they are based on the chain rule. If you are interested in this one, again you can ask some of the harder questions on the gnucap-devel list, and also the Icarus Verilog developer list. You should probably subscribe to both. As to getting papers out of it, I think you could get a conference paper, but not a journal paper, from this one. Any of these are good projects. They are all challenging, and will really keep you busy all summer. Some of them could also be used for a master's thesis. It is possible that you could use it as a start for a Ph.D.
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Thank you all for the feedbacks. I looked a bit deeper into the projects and my interests and figured that , I am not into GUI stuff but would love to get my hands more dirty with things even down. On Thu, Feb 12, 2009 at 9:56 AM, al davis ad...@freeelectron.net wrote: 3. Porting of missing analysis, (noise, pz, disto, hb, etc.) from other free simulators (under gnucap) All good projects .. There is someone now working on noise and hb. pz and disto would be good summer projects. pz is fairly easy, if it is based on AC analysis, because the whole model interface is already working. disto is harder because of the model interface. You will learn a lot. Looks interesting now for me. I will look at the current codebase. Is this noise and hb implementation that someone is doing already available in the VCS for me to have a look at and check the pattern of implementation? On Wednesday 11 February 2009, Stephen Williams wrote: Given the apparent bent towards analog in your selection of candidate projects, might I suggest you take a look at the gnucap Code Generator on the Icarus Verilog projects page? This is something that Al has been wanting, and also puts to use some of the nascent analog support in Icarus Verilog proper. I like this one too. It is an enabler that will make other enhancements easier, and something that is desperately needed as a model compiler. There are lots of people who want it and some real experts who can help. This sounds exciting too. But I am highly unsure about the things that I need to learn before taking this project up. The Icarus Project page says this project remains clear of the Iverilog core. It states that one might require knowledge of how to compile models for gnucap. Can some more light be thrown here please? Any nice starting pointers? I can then catch on and start rolling. Thank you once again. With Best Regards, Aanjhan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Welcome ... they are all good ones, but I like the one Steve suggested the best. On Wednesday 11 February 2009, Aanjhan R wrote: 1. Usability improvements for ngspice/Gnucap - Under gaf There is certainly lots of room for improvement, but I must warn you that there have been lots of failed attempts at this in the past. To be successful, you need to not think of it as a GUI project. The biggest problem is seamlessly moving the data around, in all directions. (I mean all, not both.) If you want to tackle the data movement, with a new translator system, that would help a lot, and build the base that is needed for the GUI and other things. 2. More interesting integrations with other tools. The new Tcl interface adds a bunch of possibilities. I know one guy is using it to allow remote control from emacs through a bridge server. (Under GTKWAVE - I would like to know if htere are specific interesting integrations as I am not getting the whole picture behind this project proposal) That points to seamlessly moving the data around again. This keeps coming up. 3. Porting of missing analysis, (noise, pz, disto, hb, etc.) from other free simulators (under gnucap) All good projects .. There is someone now working on noise and hb. pz and disto would be good summer projects. pz is fairly easy, if it is based on AC analysis, because the whole model interface is already working. disto is harder because of the model interface. You will learn a lot. 4. Add uwire (unresolved net) support - Under Icarus Steve can comment on this one. On Wednesday 11 February 2009, Stephen Williams wrote: Given the apparent bent towards analog in your selection of candidate projects, might I suggest you take a look at the gnucap Code Generator on the Icarus Verilog projects page? This is something that Al has been wanting, and also puts to use some of the nascent analog support in Icarus Verilog proper. I like this one too. It is an enabler that will make other enhancements easier, and something that is desperately needed as a model compiler. There are lots of people who want it and some real experts who can help. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
On Wed, 11 Feb 2009 10:50:58 +0100, Aanjhan R wrote: The projects that am interested in are as follows (not in any specific order): 1. Usability improvements for ngspice/Gnucap - Under gaf From all the projects you mentioned, this one would have a the largest impact. An easy to use interface would be a major step forward from a user point of view. ---(kaimartin)--- ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Google SoC : Potential Candidate seeking Info
Aanjhan R wrote: The projects that am interested in are as follows (not in any specific order): 1. Usability improvements for ngspice/Gnucap - Under gaf 2. More interesting integrations with other tools. The new Tcl interface adds a bunch of possibilities. I know one guy is using it to allow remote control from emacs through a bridge server. (Under GTKWAVE - I would like to know if htere are specific interesting integrations as I am not getting the whole picture behind this project proposal) 3. Porting of missing analysis, (noise, pz, disto, hb, etc.) from other free simulators (under gnucap) 4. Add uwire (unresolved net) support - Under Icarus The uwire support is listed as moderate on our Projects page, but is probably too small for a GSoC project. Given the apparent bent towards analog in your selection of candidate projects, might I suggest you take a look at the gnucap Code Generator on the Icarus Verilog projects page? This is something that Al has been wanting, and also puts to use some of the nascent analog support in Icarus Verilog proper. -- Steve WilliamsThe woods are lovely, dark and deep. steve at icarus.com But I have promises to keep, http://www.icarus.com and lines to code before I sleep, http://www.picturel.com And lines to code before I sleep. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
