Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
Kai-Martin Knaak k...@lilalaser.de writes: Colin D Bennett wrote: +1000 for a patch to make I/O pin symbols visually clean without requiring maintaining duplicate attributes as at present. While I am all in favor to get rid of the :1, this is how I currently deal with net names: * For nets that jump inside a sheet I attach an attribute to a short net line stub. I copy/paste this stub to where ever the net should go. * For nets that enter the sheet from a higher level of hierarchy, I use in.sym and out.sym and set the refdes to the desired net name (without a :1 appendix). dito, plus: * For power/ground nets I create a symbol with a label and hidden net= attribute. * For small projects I use the generic power symbol and live with the ugly :1 at the end of the netname, when the standard Vcc, Vdd, Vee, Vss, and GND symbols are not sufficient. -- Stephan ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On Mon, 02 May 2011 01:49:57 +0100 Peter Clifton pc...@cam.ac.uk wrote: On Sun, 2011-05-01 at 19:23 -0500, David W. Schultz wrote: On 05/01/2011 07:01 PM, Stephen Ecob wrote: Are there any gschem oldtimers around who can explain the rational for the :1 requirement ? If there's no good reason for it I'd be happy to write a patch that removes it. I am not an old timer but I believe that this is required to attach that net name to pin 1 of the symbol. The net name doesn't actually include the :1. Exactly right - and there is a reluctance (certainly from me) to create special cases where that attribute can be dropped for single pin symbols. As a user of gschem, I don't consider this a special case at all. On contrary, it's the normal case of creating named pin connections or power rails. I never even use the net= attribute for hidden power/ground so the :1 doesn't buy me anything. +1000 for a patch to make I/O pin symbols visually clean without requiring maintaining duplicate attributes as at present. Regards, Colin signature.asc Description: PGP signature ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
Colin D Bennett wrote: +1000 for a patch to make I/O pin symbols visually clean without requiring maintaining duplicate attributes as at present. While I am all in favor to get rid of the :1, this is how I currently deal with net names: * For nets that jump inside a sheet I attach an attribute to a short net line stub. I copy/paste this stub to where ever the net should go. * For nets that enter the sheet from a higher level of hierarchy, I use in.sym and out.sym and set the refdes to the desired net name (without a :1 appendix). ---)kaimartin(--- -- Kai-Martin Knaak Email: k...@familieknaak.de Öffentlicher PGP-Schlüssel: http://pool.sks-keyservers.net:11371/pks/lookup?search=0x6C0B9F53 ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On Mon, May 2, 2011 at 8:49 AM, Rob Butts r.but...@gmail.com wrote: I'm using out and in symbols in gschem to label nets in a schematic and tie nets together without traces running everywhere. I set the net attribute of the corresponding out and in symbols in the schematic to the same value (clk for example) and connect these symbols to various pins of various chips. When I run gsch2pcb and look at the netlist I don't see those nets listed which makes me feel the pins of all the chips I tie the out and in symbols to are not connected. How do I use these symbols correctly? Thanks For some reason gschem insists that all nets end in the two characters :1 So a net that I would normally call VCC I call VCC:1 in gschem I don't know why, but that's the way it is. Failure to add the :1 results in behaviour like what you describe. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
Really? So now instead of having a nice clean schematic with net names like clk, _clk, reset and _reset I have to have clk:1, _clk:1... Is the way around that making the net attribute not visible and making the value attribute visible giving it the net name I want to show up on the schematic? On Sun, May 1, 2011 at 7:00 PM, Stephen Ecob [1]silicon.on.inspirat...@gmail.com wrote: On Mon, May 2, 2011 at 8:49 AM, Rob Butts [2]r.but...@gmail.com wrote: I'm using out and in symbols in gschem to label nets in a schematic and tie nets together without traces running everywhere. I set the net attribute of the corresponding out and in symbols in the schematic to the same value (clk for example) and connect these symbols to various pins of various chips. When I run gsch2pcb and look at the netlist I don't see those nets listed which makes me feel the pins of all the chips I tie the out and in symbols to are not connected. How do I use these symbols correctly? Thanks For some reason gschem insists that all nets end in the two characters :1 So a net that I would normally call VCC I call VCC:1 in gschem I don't know why, but that's the way it is. Failure to add the :1 results in behaviour like what you describe. ___ geda-user mailing list [3]geda-user@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. mailto:silicon.on.inspirat...@gmail.com 2. mailto:r.but...@gmail.com 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On Sun, May 1, 2011 at 3:49 PM, Rob Butts r.but...@gmail.com wrote: I'm using out and in symbols in gschem to label nets in a schematic and tie nets together without traces running everywhere. I set the net attribute of the corresponding out and in symbols in the schematic to the same value (clk for example) and connect these symbols to various pins of various chips. When I run gsch2pcb and look at the netlist I don't see those nets listed which makes me feel the pins of all the chips I tie the out and in symbols to are not connected. How do I use these symbols correctly? Thanks Just put the attribute on the net and drag the attribute name over to the in/out symbol ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On Mon, May 2, 2011 at 9:16 AM, Rob Butts r.but...@gmail.com wrote: Really? So now instead of having a nice clean schematic with net names like clk, _clk, reset and _reset I have to have clk:1, _clk:1... Is the way around that making the net attribute not visible and making the value attribute visible giving it the net name I want to show up on the schematic? That would work, but then you have the burden of strictly keeping your net attributes and name attributes synchronised. Failure to keep them synchronised would result in nasty inconsistencies between your human readable schematic and the machine output netlist. Are there any gschem oldtimers around who can explain the rational for the :1 requirement ? If there's no good reason for it I'd be happy to write a patch that removes it. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On May 1, 2011, at 6:01 PM, Stephen Ecob wrote: Are there any gschem oldtimers around who can explain the rational for the :1 requirement ? If there's no good reason for it I'd be happy to write a patch that removes it. It's the pin number. If you want to connect pin 2 to a net, it's :2. There's a patch to have it default to :1, but there's some resistance to it among the developers. I suggested recently that indexed attributes should attach the index to the name rather than the value, thus net:1=Vcc (and I think this would help with some other problems). That suggestion was well received, but it's a considerably more drastic change. --- John Doty Noqsi Aerospace, Ltd. This message contains technical discussion involving difficult issues. No personal disrespect or malice is intended. If you perceive such, your perception is simply wrong. I'm a busy person, and in my business go along to get along causes mission failures and sometimes kills people, so I tend to be a bit blunt. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On 05/01/2011 07:01 PM, Stephen Ecob wrote: Are there any gschem oldtimers around who can explain the rational for the :1 requirement ? If there's no good reason for it I'd be happy to write a patch that removes it. I am not an old timer but I believe that this is required to attach that net name to pin 1 of the symbol. The net name doesn't actually include the :1. You can see other examples of this in symbols that don't bring out power and ground to visible symbols: net=Vcc:28 T 300 6750 5 10 0 0 0 0 1 net=GND:14 T 300 5750 9 10 1 0 0 0 1 -- David W. Schultz http://home.earthlink.net/~david.schultz Pooh just is. Tao of Pooh ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: Out and In symbols in gschem getting net names to come out in PCB
On Sun, 2011-05-01 at 19:23 -0500, David W. Schultz wrote: On 05/01/2011 07:01 PM, Stephen Ecob wrote: Are there any gschem oldtimers around who can explain the rational for the :1 requirement ? If there's no good reason for it I'd be happy to write a patch that removes it. I am not an old timer but I believe that this is required to attach that net name to pin 1 of the symbol. The net name doesn't actually include the :1. Exactly right - and there is a reluctance (certainly from me) to create special cases where that attribute can be dropped for single pin symbols. I'm quite keen to see John Dotty's suggestion (or a variant of it) implemented though. -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) Tel: +44 (0)1223 748328 - (Shared lab phone, ask for me) signature.asc Description: This is a digitally signed message part ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
