Re: gEDA-user: split plane gaps
Ok, I added power/ground polys on the whole bottom, and ground polys on parts of the top (the top has more stuff, so polys are less useful). I think I'm on the verge of overkill for this project ;-) Board so far: http://www.delorie.com/pcb/m3a-exp-board.pcb PDF of the layout: http://www.delorie.com/pcb/m3a-exp-board.pdf Note: the board uses ten layers (to keep all the signal/ground/vcc, top/bottom, poly/trace combinations organized), and may need a bugfix to pcb that I checked in today that lets it draw vias with solid connections to polygons. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: split plane gaps
> Unless the board is sparsely populated I usually do 10mils > A rule of thumb that I read in a Littelfuse app-note was to leave > 18mils for 1KV isolation on an outer layer. Well, I wasn't worried about 5v sparking ;-) Mostly I was thinking about the risk of shorts, either due to defects or soldering. 10 mils is also the clearance I'm using for everything else though. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: split plane gaps
On 22 Aug 2006 12:34:34 -0400, DJ Delorie <[EMAIL PROTECTED]> wrote: For 8 mil rules, what's a good gap between +5v and ground polys, when you have both on the same side? I'm waffling between 10 mils (closest to 8 while still being a multiple of 5 for the grid) or 25 (my usual grid setting, and a little "safer" but I can't prove it). Unless the board is sparsely populated I usually do 10mils (closest to 8 while still being a multiple of 5). A rule of thumb that I read in a Littelfuse app-note was to leave 18mils for 1KV isolation on an outer layer. (* jcl *) -- http://www.luciani.org ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
