Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
On Fri, Mar 27, 2009 at 03:57:18PM -0400, Ormund Williams wrote: Hi All I'm designing a circuit and needed a few gates, 8 3-input AND, 4 2-input XOR, 10 inputs and 8 outputs, it seemed to me that this would fit perfectly into a 16v8. Now the last time I used SPLDs was '98 and it annoyed me back then that no open-source tools existed to support development now it looks like this segment of semiconductors is dieing. I just went through the latest issue of Circuit Cellar and there isn't a single add for a universal device programmer (nice article DJ). None of the few manufacturers left seem to be making any improvements to these devices, like chip scale packaging or low voltage (3.3v). Am I correct in thinking that it would be unwise to use these in new designs? Unless you want to pay outrageous prices at Rochester or similar. It also depends on your needs: if you think that you are going to produce a large series, avoid them. For a one time run of a few units, why not if you find them through www.findchips.com or similar. Do you use SPLD? What do you use to program them? How about the ISP versions? Have you had a look at Lattice (www.latticesemi.com), they still sell them on their online store (apparently through Mouser) and there are quite a few in stock. There are even some low power models still available at Mouser. ISP versions are nice for somewhat complex designs, when you already have a JTAG chain on your board and think that you might need reprogramming them to fix bugs; obviously real hardware designers never need this, bugs are purely a software concept :-) Besides that, at least from Lattice, only the ispGAL22V10A is worth considering, the non-A need over 100mA even when idle. The A version exists at 1.8, 2.5, and 3.3V supplies in a 32 pin QFN package (5x5mm). Mouser has some of them in stock. Thanks for indulging my rant. No problem, I'm also a bit fed up that there is virtually nothing left between bus buffers and multimillion gate FPGA which need 3 power supplies. I don't mind occasionally using a hammer to kill a fly, but using a nuke is too much and users complain from radioactive fallout :-). For very simple things (a Schmitt-trigger to drive a status LED here and there in the middle of an analog design) I use 1G series but they are not dense in terms of supply/ground pin per gate so routing becomes a nightmare or 4 layers+ are needed. Gabriel ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
On Mon, 2009-03-30 at 18:29 +0200, Gabriel Paubert wrote: It also depends on your needs: if you think that you are going to produce a large series, avoid them. For a one time run of a few units, why not if you find them through www.findchips.com or similar. Do you use SPLD? What do you use to program them? How about the ISP versions? Have you had a look at Lattice (www.latticesemi.com), they still sell them on their online store (apparently through Mouser) and there are quite a few in stock. There are even some low power models still available at Mouser. I'm familiar with the Lattice parts but I like the Atmel ATF16V8BQL better, 5mA idle, 20mA active at 5v. ISP versions are nice for somewhat complex designs, when you already have a JTAG chain on your board and think that you might need reprogramming them to fix bugs; obviously real hardware designers never need this, bugs are purely a software concept :-) Besides that, at least from Lattice, only the ispGAL22V10A is worth considering, the non-A need over 100mA even when idle. The A version exists at 1.8, 2.5, and 3.3V supplies in a 32 pin QFN package (5x5mm). Mouser has some of them in stock. Atmel and Lattice seem to be the only ones left, just looking at the date of the last revision of the data sheets tells you that nothing has happened in that sector since the late '90s. No problem, I'm also a bit fed up that there is virtually nothing left between bus buffers and multimillion gate FPGA which need 3 power supplies. I don't mind occasionally using a hammer to kill a fly, but using a nuke is too much and users complain from radioactive fallout :-). For very simple things (a Schmitt-trigger to drive a status LED here and there in the middle of an analog design) I use 1G series but they are not dense in terms of supply/ground pin per gate so routing becomes a nightmare or 4 layers+ are needed. I lost some of the space I had set aside to put the quad gates so I'll use the 16V8 because I don't have the time to redo the entire layout. This will probably be the last design I do with SPLDs, all I needed was some logic to prevent shoot-through in the H-bridges and some way to disable all the transistors even if the processor has gone of into the weeds. Change is inevitable, progress is not. __ Ormund ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
What article? DJ in CC again - this month's Circuit Cellar includes a photo of the JTAG adapter as part of my pod's module collection, next month's goes into the construction and use of it. tj DJ Delorie wrote: I don't know, I built my own JTAG programmer (see the article). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
Hi All I'm designing a circuit and needed a few gates, 8 3-input AND, 4 2-input XOR, 10 inputs and 8 outputs, it seemed to me that this would fit perfectly into a 16v8. Now the last time I used SPLDs was '98 and it annoyed me back then that no open-source tools existed to support development now it looks like this segment of semiconductors is dieing. I just went through the latest issue of Circuit Cellar and there isn't a single add for a universal device programmer (nice article DJ). None of the few manufacturers left seem to be making any improvements to these devices, like chip scale packaging or low voltage (3.3v). Am I correct in thinking that it would be unwise to use these in new designs? Do you use SPLD? What do you use to program them? How about the ISP versions? Thanks for indulging my rant. __ Ormund ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
Am I correct in thinking that it would be unwise to use these in new designs? Do you use SPLD? What do you use to program them? How about the ISP versions? Look at the XC9536XL from xilinx. It's $1, runs on 3.3v, and ISP-able or you can program them externally (they're flash based). http://www.delorie.com/electronics/bin2seven/ Still huge compared to a 16v8, though, but once you have the bitstream files (xilinx runs with Makefiles on Linux) you can program them with open source or home-brew toools. You probably also want to see http://www.dataman.com/ (nice article DJ) Thanks! Next month's article covers programming the XC9572XL from Linux ;-) ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
DJ - On Fri, Mar 27, 2009 at 04:29:12PM -0400, DJ Delorie wrote: [the XC9536XL is] huge compared to a 16v8, though, but once you have the bitstream files (xilinx runs with Makefiles on Linux) you can program them with open source or home-brew toools. Funny, I was just trying to hack my Xilinx-on-Linux Makefiles (actually the script called by the Makefile) that work with FPGAs, to make it target an XC9536XL. I've posted my xil_syn script here before, has anyone else put something together like it for an XC95xx? - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
Funny, I was just trying to hack my Xilinx-on-Linux Makefiles (actually the script called by the Makefile) that work with FPGAs, to make it target an XC9536XL. I've posted my xil_syn script here before, has anyone else put something together like it for an XC95xx? Here's my Makefile for the bin2seven project: # Makefile for bin-to-sevensegment CPLD on XC9500XL VERILOG = bcd.v sevenseg.v top.v BASE = bin7 CHIP = XC9572XL-10-VQ44 TMP = tmp LOG = logs all : dirs $(BASE).xsvf flash : $(BASE).xsvf sudo ../host/xsvf/xsvf $(BASE).xsvf # # ISE commands $(BASE).ngc : $(TMP)/$(BASE).xst $(TMP)/$(BASE).prj $(VERILOG) xst \ -ifn $(TMP)/$(BASE).xst \ -ofn $(LOG)/$(BASE).xst.log \ -intstyle silent $(BASE).ngd : $(BASE).ngc $(BASE).ucf ngdbuild \ -p $(CHIP) \ -dd $(TMP) \ -intstyle silent \ -uc $(BASE).ucf \ $(BASE).ngc $(BASE).ngd $(BASE).vm6 : $(BASE).ngd cpldfit \ -p $(CHIP) \ -intstyle silent \ -log $(LOG)/$(BASE).fit.log \ -optimize density \ -nomlopt \ -ignoretspec \ $(BASE).ngd $(BASE).jed : $(BASE).vm6 hprep6 \ -i $(BASE).vm6 \ -intstyle silent $(BASE).xsvf : $(BASE).jed $(BASE).ibat impact \ -batch $(BASE).ibat # # Bookkeeping and other targets .PHONY: dirs dirs : $(TMP)/.here $(LOG)/.here $(TMP)/.here : @test -d $(TMP) || mkdir $(TMP) @true $(TMP)/.here $(LOG)/.here : @test -d $(LOG) || mkdir $(LOG) @true $(LOG)/.here $(TMP)/$(BASE).prj : $(TMP)/.here Makefile @true $...@.tmp @for i in $(VERILOG); do \ echo verilog work $$i $...@.tmp; \ done @cmp -s $@ $...@.tmp || mv $...@.tmp $@ $(TMP)/$(BASE).xst : $(TMP)/.here $(BASE).xst Makefile @echo set -$(TMP)dir $(TMP) $...@.tmp @sed 's/PART/$(CHIP)/' $(BASE).xst \ | sed 's/BASE/$(BASE)/' \ $...@.tmp @echo -ifn $(TMP)/$(BASE).prj $...@.tmp @echo -ofn $(BASE).ngc $...@.tmp @echo -p $(CHIP) $...@.tmp @cmp -s $@ $...@.tmp || mv $...@.tmp $@ clean : @rm -rf $(TMP) $(LOG) @rm -f *~ *.err # xst @rm -f *.ngc *.srp *.lso @rm -rf xst # ngdbuild @rm -f *.ngd *.bld # cpldfit @rm -f *.xml *.vm6 *.rpt *.pnx *.pad *.mfd *.gyd *_pad.csv *_build.xml # hprep6 @rm -f *.jed # impact @rm -f _impact* distclean : clean @rm -f *.xsvf ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
On Fri, 2009-03-27 at 16:29 -0400, DJ Delorie wrote: Am I correct in thinking that it would be unwise to use these in new designs? Do you use SPLD? What do you use to program them? How about the ISP versions? Look at the XC9536XL from xilinx. It's $1, runs on 3.3v, and ISP-able or you can program them externally (they're flash based). http://www.delorie.com/electronics/bin2seven/ Still huge compared to a 16v8, though, but once you have the bitstream files (xilinx runs with Makefiles on Linux) you can program them with open source or home-brew toools. I've used the XCs before, for this project though the 20 pin TSSOP barely fit, no room for a tqfp-44, actually the space I have is 8x17mm so I used standard quad gates in 4 TVSOP packages from TI. About an hour gate-swapping to route but it fits. You probably also want to see http://www.dataman.com/ (nice article DJ) Thanks! Next month's article covers programming the XC9572XL from Linux ;-) I'll watch for it. __ Ormund ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
actually the space I have is 8x17mm gak! Yeah, you'd need a PAL to fit it in there. An R8C would fit, but wouldn't do the job. I can see the status reports: I had an extra 8x14mm so I added another CPU. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
On Fri, 27 Mar 2009, DJ Delorie wrote: Thanks! Next month's article covers programming the XC9572XL from Linux ;-) Do you know if they fixed the parallel programming in Xilinx ISE with the most recent version? The last version required a *kernel* driver for parallel port programming (!!) although there is a workaround from a 3rd party that makes it all userland. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
I don't know, I built my own JTAG programmer (see the article). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: PALs GALs and SPLDs going the way of the Dodo?
What article? tj DJ Delorie wrote: I don't know, I built my own JTAG programmer (see the article). ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
