Re: gEDA-user: TO-92 Best Practices

2010-03-04 Thread Kai-Martin Knaak
On Wed, 03 Mar 2010 10:22:53 -0500, Dave McGuire wrote:

For really tiny stuff, I use a Bausch  Lomb wide field
 stereomicroscope.

Yesterday, I received a used Leica MZ6 microscope head from ebay. 
Boy, the view is awesome at 10x magnification! There is approx. 10 cm 
distance object to lens -- plenty of space for the solder iron :-)  

Now, I need to adapt a microscope holder from the institutes scrap 
container to my new toy. 

---(kaimartin)---
-- 
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Greg Cunningham
On Tue, 2010-03-02 at 21:21 -0800, Donald Tillman wrote:
 On Mar 2, 2010, at 2:35 AM, Peter TB Brett wrote:
 
  The usual approach is to buy SMT packages containing 2 or 4  
  transistors on
  a single piece of silicon (i.e. literally back-to-back on the wafer).
  They're invariably well-matched enough for all but the most ultra- 
  precise
  applications, in my experience.
 
 
 Which dual/quad transistors are these?  Who makes them?
 
 (And back-to-back?  Are you sure?  That doesn't sound right.  That  
 would have to involve separate processes for each side, and so the  
 transistors wouldn't be matched.)
 
 Most dual transistors I've seen have the transistors on separate  
 dies.  And so there's no matching and no offset spec; it's just like  
 picking up 2 or 4 individual transistors.
 
-- Don
 
 --
 Don Tillman
 Palo Alto, California
 d...@till.com
 http://www.till.com
 
 
 
 
 
 
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...me thinks Pete had a long-tail-pair schematic in his head at the
time.  Probably meant side-by-side on the die.
-- 
Greg



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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Gabriel Paubert
On Tue, Mar 02, 2010 at 09:21:25PM -0800, Donald Tillman wrote:

 On Mar 2, 2010, at 2:35 AM, Peter TB Brett wrote:

 The usual approach is to buy SMT packages containing 2 or 4  
 transistors on
 a single piece of silicon (i.e. literally back-to-back on the wafer).
 They're invariably well-matched enough for all but the most ultra- 
 precise
 applications, in my experience.


 Which dual/quad transistors are these?  Who makes them?

For example Diodes/Zetex, navigate a bit the site and you'll
find at:

 http://www.diodes.com/products/catalog/list.php?parent-id=28

that they are: Built with adjacent die from a single wafer: 
DC Current Gain, hFE, VCE(sat), VBE(sat) are matched to a 2% 
maximum tolerance.

Besides being at the same temperature. 

Unfortunately Analog's SSM2210 is obsolete. But even random
dual transistor pairs (I've used BC857BS dual PNP) have very 
good matching on average. It's not guaranteed and some may
stand out as being much worse than average, but often temperature
tracking (I'm repeating myself) dominates the variations between
individual transistors in actual circuits. 




 (And back-to-back?  Are you sure?  That doesn't sound right.  That would 
 have to involve separate processes for each side, and so the transistors 
 wouldn't be matched.)

No, they are side by side.


 Most dual transistors I've seen have the transistors on separate dies.

Huh? We must live on different planets. 
The ones I've seen are diffused as neighbours on the same wafer.
  
 And so there's no matching and no offset spec; it's just like picking up 
 2 or 4 individual transistors.

Some have specs, some have not. But they are diffused together 
in close vicinity, and that's the important point that guarantees
similarity and temperature tracking.

Gabriel


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Peter TB Brett
On Wednesday 03 March 2010 11:57:36 Greg Cunningham wrote:
 On Tue, 2010-03-02 at 21:21 -0800, Donald Tillman wrote:
  On Mar 2, 2010, at 2:35 AM, Peter TB Brett wrote:
   The usual approach is to buy SMT packages containing 2 or 4
   transistors on
   a single piece of silicon (i.e. literally back-to-back on the wafer).
   They're invariably well-matched enough for all but the most ultra-
   precise
   applications, in my experience.
  
  Which dual/quad transistors are these?  Who makes them?

Well, just about everybody who makes transistors makes them.  NXP have the 
BCM847, for example.  Admittedly quads are much rarer than duals.

  (And back-to-back?  Are you sure?  That doesn't sound right.  That
  would have to involve separate processes for each side, and so the
  transistors wouldn't be matched.)
  
  Most dual transistors I've seen have the transistors on separate
  dies.  And so there's no matching and no offset spec; it's just like
  picking up 2 or 4 individual transistors.

 ...me thinks Pete had a long-tail-pair schematic in his head at the
 time.  Probably meant side-by-side on the die.

Correct.

  Peter

-- 
Peter Brett pe...@peter-b.co.uk
Remote Sensing Research Group
Surrey Space Centre


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Jim

timecop wrote:

Why woudl someone use to92 in 2010.

  
Maybe they are like me and don't have the eyesight, equipment or 
dexterity to solder anything smaller than TO92 parts?


Jim.


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Dave McGuire

On Mar 3, 2010, at 8:58 AM, Jim wrote:

Why woudl someone use to92 in 2010.


Maybe they are like me and don't have the eyesight, equipment or  
dexterity to solder anything smaller than TO92 parts?


  We've had these neat things called magnifying glasses on the  
market for at least a few months now.  And when the proper equipment  
can be had for less than $100..


 -Dave

--
Dave McGuire
Port Charlotte, FL



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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread al davis
On Wednesday 03 March 2010, Dave McGuire wrote:
  Maybe they are like me and don't have the eyesight,
  equipment or   dexterity to solder anything smaller than
  TO92 parts?
 
We've had these neat things called magnifying glasses on
  the   market for at least a few months now.  And when the
  proper equipment can be had for less than $100..

Along that line ...  You could get what they call reading 
glasses from a supermarket.  Get the strongest ones they have.  
They make great magnifying glasses.

You really should wear eye protection while soldering anyway.


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Larry Doolittle
Al -

On Wed, Mar 03, 2010 at 10:18:59AM -0500, al davis wrote:
 Along that line ...  You could get what they call reading 
 glasses from a supermarket.  Get the strongest ones they have.  
 They make great magnifying glasses.

I didn't need them in college, but I sure need them now!

 You really should wear eye protection while soldering anyway.

Right.  Funny story.  We had a big safety audit here a few
months ago.  Lots of new work practices, including mandated
eye protection -- safety glasses -- when soldering.  So ..
I start doing some rework on a particularly tricky section
of an 0603-scale board.  A flock of managers cruised by and
said -- Hey! you don't have safety glasses on!  I show them
that I don't get any benefit from safety glasses when I'm
soldering under a 10X microscope.

- Larry


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Dave McGuire

On Mar 3, 2010, at 10:18 AM, al davis wrote:

Maybe they are like me and don't have the eyesight,
equipment or   dexterity to solder anything smaller than
TO92 parts?


   We've had these neat things called magnifying glasses on
 the   market for at least a few months now.  And when the
 proper equipment can be had for less than $100..


Along that line ...  You could get what they call reading
glasses from a supermarket.  Get the strongest ones they have.
They make great magnifying glasses.

You really should wear eye protection while soldering anyway.


  Hmm yes, that's a really good idea.

  Personally I use a ring-light magnifier, with the circular  
fluorescent bulb around about a 5 magnifying lens.  The one I'm  
using now was purchased new on eBay around 2002 for about $35.00.


  For really tiny stuff, I use a Bausch  Lomb wide field  
stereomicroscope.


  -Dave





--
Dave McGuire
Port Charlotte, FL



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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Dave McGuire

On Mar 3, 2010, at 10:22 AM, Larry Doolittle wrote:

You really should wear eye protection while soldering anyway.


Right.  Funny story.  We had a big safety audit here a few
months ago.  Lots of new work practices, including mandated
eye protection -- safety glasses -- when soldering.  So ..
I start doing some rework on a particularly tricky section
of an 0603-scale board.  A flock of managers cruised by and
said -- Hey! you don't have safety glasses on!  I show them
that I don't get any benefit from safety glasses when I'm
soldering under a 10X microscope.


  ROFL!!

--
Dave McGuire
Port Charlotte, FL



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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Gene Heskett
On Wednesday 03 March 2010, Larry Doolittle wrote:
Al -

On Wed, Mar 03, 2010 at 10:18:59AM -0500, al davis wrote:
 Along that line ...  You could get what they call reading
 glasses from a supermarket.  Get the strongest ones they have.
 They make great magnifying glasses.

I didn't need them in college, but I sure need them now!

 You really should wear eye protection while soldering anyway.

Right.  Funny story.  We had a big safety audit here a few
months ago.  Lots of new work practices, including mandated
eye protection -- safety glasses -- when soldering.  So ..
I start doing some rework on a particularly tricky section
of an 0603-scale board.  A flock of managers cruised by and
said -- Hey! you don't have safety glasses on!  I show them
that I don't get any benefit from safety glasses when I'm
soldering under a 10X microscope.

- Larry

Nice, if there is room for the microscope, the soldering iron and the solder, 
all in the field of view.  Panasonic, 10 years ago, didn't succeed in doing 
that, so I was stuck using about a 6 magnifying lens, in a parallelogram 
suspension system, with the smallest circular hot cathode fl lamp wrapped 
around it.  Mostly replacing bypass caps on digital boards, using a GC 
'tweezer' style double soldering iron plugged into a powerstat and turned 
down to about 60 volts to control the temp.  These caps were surface mounted, 
and crap.  The size of a lead pencil eraser and smaller, I started dumping 
the old ones into a 3 pound coffee can thinking they might be recyclable alu 
at some point.  By the time I'd retired, we had the 3rd can started...

Panasonic of course made their own caps, and few if any of the quality 
replacements could be parked on their footprint, so it was a severe 
stretching of the definition to call 30 hours a week doing that 'fun'.  I get 
a back ache between my shoulder blades from hunching up to that glass just 
thinking about it.  But when the alternative is replacement boards from the 
Russian Mafia in New Jersey at many hundreds each, or replace the $4k to $13k 
machine at 6 month intervals, it only had up to 27 such boards in it.  Their 
tech in the New Jersey shop was a guy named Alex, from Russia, and it wasn't 
unusual to bypass the phone menu by saving time  asking to for the 'Russian 
Mafia', it was simpler than trying to figure how to pronounce his last name 
using an accent the New Jersey girls understood.  They had more than one Alex 
it seemed.

-- 
Cheers, Gene
There are four boxes to be used in defense of liberty:
 soap, ballot, jury, and ammo. Please use in that order.
-Ed Howdershelt (Author)

Typo in the code


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread John Luciani
   I have been using the Bausch  Lomb Magna Visor Magnifying Visor
   81-42-00
   It is $40 from Amazon and comes with three lenses. Works very well.
   I keep one in the garage (woodshop) and one on my bench.
   I also use the Luxo 17113 (magnifier + light).
   (* jcl *)
   --
   You can't create open hardware with closed EDA tools.
   twitter: [1]http://twitter.com/jluciani
   blog:[2]http://www.luciani.org

References

   1. http://twitter.com/jluciani
   2. http://www.luciani.org/


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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Donald Tillman


On Mar 3, 2010, at 5:00 AM, Gabriel Paubert wrote:


For example Diodes/Zetex, navigate a bit the site and you'll
find at:

http://www.diodes.com/products/catalog/list.php?parent-id=28

that they are: Built with adjacent die from a single wafer:
DC Current Gain, hFE, VCE(sat), VBE(sat) are matched to a 2%
maximum tolerance.


Hey, sweet; I didn't know about those!  Thanks for the pointer.  That  
does make surface mount a win for my application.


Anybody know of any other sources of surface mount transistor pairs on  
the same die?


(I'm still going to need to hand-match some JFETs because I'm using  
them in an unusual configuration.  And I'll probably need TO-92  
footprints for those, but I'll look into it some more. )



--
Don Tillman
Palo Alto, California
d...@till.com
http://www.till.com






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Re: gEDA-user: TO-92 Best Practices

2010-03-03 Thread Stephen Ecob
On Wed, Mar 3, 2010 at 3:35 PM, Donald Tillman d...@till.com wrote:

 On Mar 3, 2010, at 5:00 AM, Gabriel Paubert wrote:

 For example Diodes/Zetex, navigate a bit the site and you'll
 find at:

 http://www.diodes.com/products/catalog/list.php?parent-id=28

 that they are: Built with adjacent die from a single wafer:
 DC Current Gain, hFE, VCE(sat), VBE(sat) are matched to a 2%
 maximum tolerance.

 Hey, sweet; I didn't know about those!  Thanks for the pointer.  That does
 make surface mount a win for my application.

 Anybody know of any other sources of surface mount transistor pairs on the
 same die?

Searching at Farnell shows 422 parts from 20 manufacturers:

http://au.farnell.com/jsp/search/browse.jsp?N=51+1002723Ntk=gensearch_001Ntt=transistorNtx=mode+matchallpartial

Searcing at other big stockists like RS should give similar results.

Steve Ecob


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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Gabriel Paubert
On Tue, Mar 02, 2010 at 02:01:51AM -0500, DJ Delorie wrote:
 
  Do they even make SOT-23 sockets?
 
 For matching, can you just press them onto a pcb carrier?  Something
 that plugs into a breadboard, and gives you three big copper pads to
 contact?  Assuming holding them down with your finger or even just
 letting gravity do the work, it might be sufficient.

From my experience, gravity is insufficient. The contact quality 
is too poor if you don't have anything to press the device against
the pads.

I was testing at ~1GHz, but it should not affect that much,
except that you need some plastic stick insted of a finger
(too much disturbance, probably stray capacitance). 

Gabriel


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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Peter TB Brett
On Mon, 1 Mar 2010 22:50:29 -0800, Donald Tillman d...@till.com wrote:

 This particular project uses some analog IC design styles implemented  
 with hand-matched discrete transistors; diff amps, current mirrors and  
 so forth.  So I'd need an efficient way to hand-match surface mount  
 transistors.  With TO-92's I can just slap them into a rig and collect  
 them into batches.  Surface mount?  I dunno.  Do they even make SOT-23  
 sockets?

The usual approach is to buy SMT packages containing 2 or 4 transistors on
a single piece of silicon (i.e. literally back-to-back on the wafer).
They're invariably well-matched enough for all but the most ultra-precise
applications, in my experience.

These devices are used in designs for mass production, where manually
matching the transistors wouldn't be practical.

Peter

-- 
Peter Brett pe...@peter-b.co.uk
Remote Sensing Research Group
Surrey Space Centre


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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Gabriel Paubert
On Tue, Mar 02, 2010 at 10:35:22AM +, Peter TB Brett wrote:
 On Mon, 1 Mar 2010 22:50:29 -0800, Donald Tillman d...@till.com wrote:
 
  This particular project uses some analog IC design styles implemented  
  with hand-matched discrete transistors; diff amps, current mirrors and  
  so forth.  So I'd need an efficient way to hand-match surface mount  
  transistors.  With TO-92's I can just slap them into a rig and collect  
  them into batches.  Surface mount?  I dunno.  Do they even make SOT-23  
  sockets?
 
 The usual approach is to buy SMT packages containing 2 or 4 transistors on
 a single piece of silicon (i.e. literally back-to-back on the wafer).
 They're invariably well-matched enough for all but the most ultra-precise
 applications, in my experience.

Indded. Another important point is that you won't end up with devices
operating at different temperatures which is crucial for differential
circuits (Vbe of a bipolar transistor drops at about 1.5 to 2mV per
degree, even cheap op-amps have offset drifts in the few µV/° range,
thanks to the input transistors being close on the same substrate).

Gabriel


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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread John Luciani
   On Tue, Mar 2, 2010 at 1:25 AM, Donald Tillman [1]...@till.com wrote:

   On Feb 27, 2010, at 3:57 PM, John Luciani wrote:

  I use two different footprints. Both footprints have the pins
 inline.
  One footprint spaces the leads 1.39mm the other 2.60mm.
  The 2.60mm is the common formed lead pattern. I believe
  I used the spec from On-Semi.
  I use a finished hole size of 29mils. The fab tolerance is +-4mils.

 Hey John,
 Thanks for that.
 Researching this a little more...  Fairchild's TO-92 spec says that
 the leads are rectangular, 0.46mm by 0.38mm, and the diagonal there
 works out to 23.5 mils.  With a little extra room for tolerance,
 yeah, a 29 mil hole sounds good.
 But with 29 mil holes spaced 50 mils apart, that doesn't leave
 enough room for the pads and the space between.  Maybe 7 mils each.
  So breaking away from the 50 mil grid by just a little bit and
 moving the outer legs 5 mils beyond allows the DRC to work.

   I use 1.39mm for the non-formed leads (apx 55mils).
   (* jcl *)

   --
   You can't create open hardware with closed EDA tools.
   twitter: [2]http://twitter.com/jluciani
   blog:[3]http://www.luciani.org

References

   1. mailto:d...@till.com
   2. http://twitter.com/jluciani
   3. http://www.luciani.org/


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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Martin Maney
On Tue, Mar 02, 2010 at 11:38:00AM +0100, Gabriel Paubert wrote:

 On Tue, Mar 02, 2010 at 02:01:51AM -0500, DJ Delorie wrote:
  For matching, can you just press them onto a pcb carrier?  Something
  that plugs into a breadboard, and gives you three big copper pads to
  contact?  Assuming holding them down with your finger or even just
  letting gravity do the work, it might be sufficient.

 From my experience, gravity is insufficient. The contact quality 
 is too poor if you don't have anything to press the device against
 the pads.
 
 I was testing at ~1GHz, but it should not affect that much,
 except that you need some plastic stick insted of a finger
 (too much disturbance, probably stray capacitance). 

And at the DC extreme, the heat of the finger will make any attempt to
match offset a joke (other parameters maybe not so much).  So, no,
usually fingers need to stay away from the DUT.

-- 
There's one way to find out if a man is honest: ask him;
if he says yes, you know he's crooked.  -- Twain



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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Steven Michalske

On Mar 1, 2010, at 7:12 PM, Mark Rages wrote:


On Sat, Feb 27, 2010 at 5:27 PM, Donald Tillman d...@till.com wrote:

Hey folks,

What's considered Best Practices for TO-92 packages?



Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.


Agreed!

And really easy to hand solder too!

Steve



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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Steven Michalske


On Mar 1, 2010, at 10:50 PM, Donald Tillman wrote:



On Mar 1, 2010, at 7:12 PM, Mark Rages wrote:


On Sat, Feb 27, 2010 at 5:27 PM, Donald Tillman d...@till.com wrote:

Hey folks,

What's considered Best Practices for TO-92 packages?



Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.


Sheeshe...

I probably will go to surface mount at some point.  But for now I'm  
kicking it olde school.


If it is for yourself, you might want to try DJ's soldering challenge  
boards.

http://www.delorie.com/pcb/smd-challenge/instructions.pdf

I also practiced on broken motherboards, for rework and such.



This particular project uses some analog IC design styles  
implemented with hand-matched discrete transistors; diff amps,  
current mirrors and so forth.  So I'd need an efficient way to hand- 
match surface mount transistors.  With TO-92's I can just slap them  
into a rig and collect them into batches.  Surface mount?  I dunno.   
Do they even make SOT-23 sockets?




I recall hand matching transistors at various times, and found it  
rather ineffective, let your parts warm up to operating temperature!   
The suggestions about using matched pairs in a single package are  
going to help you get much better results. I had to do my matching to  
build op-amps and and diff amps from scratch.  We matched our  
transistors really close near perfect but it still was not as good  
as the matched pairs we put in to the circuit as the next step.


As for the statements that we were being elitist in suggesting  
SOT-23,  I did not intend that, in my experience to-92 in a  
manufacturing environment today is an avoid.


From maneuverability if you have lots of components to populate then  
your going to need to determine the capabilities of the manufacture  
house, and those through holes are most likely going to drive your  
costs up, as a pick and place machine will be able to do the surface  
mount parts really quickly.


I know that our quick turn houses hand solder the through hole  
components and like charging extra ;-)




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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Kai-Martin Knaak
On Tue, 02 Mar 2010 13:46:31 -0800, Steven Michalske wrote:

 As for the statements that we were being elitist in suggesting SOT-23, 
 I did not intend that, in my experience to-92 in a manufacturing
 environment today is an avoid.

It proves to be easy for the newbie, too. 
Every once in a while I need to teach completely uninitiated physics 
students how to solder. I get the impression, that decent thru hole 
solder joints need at least as much practice as the basic variants of SMD 
(0805, SOT23, SO8, ...)

---(kaimartin)---
-- 
Kai-Martin Knaak
Öffentlicher PGP-Schlüssel:
http://pgp.mit.edu:11371/pks/lookup?op=getsearch=0x6C0B9F53



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Re: gEDA-user: TO-92 Best Practices

2010-03-02 Thread Mark Rages
On Tue, Mar 2, 2010 at 6:39 PM, Kai-Martin Knaak k...@familieknaak.de wrote:
 On Tue, 02 Mar 2010 13:46:31 -0800, Steven Michalske wrote:

 As for the statements that we were being elitist in suggesting SOT-23,
 I did not intend that, in my experience to-92 in a manufacturing
 environment today is an avoid.

 It proves to be easy for the newbie, too.
 Every once in a while I need to teach completely uninitiated physics
 students how to solder. I get the impression, that decent thru hole
 solder joints need at least as much practice as the basic variants of SMD
 (0805, SOT23, SO8, ...)


Right.  This has been my experience too.  SMT soldering isn't really
harder than through-hole, it is just different.  I don't think it is a
big help to beginners to teach them obsolete technology.

Of course the tiny 0402 and such are harder, but they are just harder
to see and pick up, not harder to solder.  Maybe beginners should
learn point-to-point wiring of vacuum tube circuits.  Those are really
easy to see!  You can see them operate and even feel the voltages.
Once.

Back on topic though.  I can see where TO-92 would still have a place
for testing in a socket.  (Although there are SOT23 sockets made, for
PIC10 and EEPROMs in SOT23-6.  These sockets are about $75.)

I have found it essential when using matched pairs of TO-92, to
physically attach the pair together to reduce thermal gradients.  Heat
shrink is OK, epoxy better.  Even then, the match is not as good as a
dual transistor in SMT.

Regards,
Mark
markra...@gmail
-- 
Mark Rages, Engineer
Midwest Telecine LLC
markra...@midwesttelecine.com


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Paul Probert

Donald Tillman wrote:

Hey folks,

What's considered Best Practices for TO-92 packages?

I'm working on a project that involves a lot of discrete transistors in 
TO-92 packages -- the regular style, 3 in-line, no fancy triangular 
pinouts or lead forming or anything.


The TO92 package in pcblib-newlib seems to be larger than necessary, in 
pin spacing, pad size, and hole size.


Pin spacing: The actual package has the pins 50 mils apart. Is this used 
in practice?  Or is it too problematic, and maybe it's more practical to 
just spread the leads a little by hand?  Are there machine insertion 
issues?  (Not that I care right now, but I'd like to be as uptown about 
it as possible.)


The TO-92 leads are 20 mils diameter.   Would a 24 mil hole be fine 
then?  And maybe a 35 mil pad?


Anybody have success (or failure) stories or advice?

  -- Don
Well, I had a disaster once where I used a footprint with the triangular 
hole pattern, but my transistors all had straight leads, like yours. We 
just spread the leads a little by hand and then pushed the transistors 
in. As they went in, the holes acted like lathe tools and machined curly 
chips off the leads that then shorted about 10 percent of the 
transistors. So the next time I ordered transistors that had the leads 
already bent out into the triangular pattern. Maybe there's a tool that 
will bend them properly so that you can use your existing stock.


Paul Probert
University of Wisconsin



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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Mark Rages
On Sat, Feb 27, 2010 at 5:27 PM, Donald Tillman d...@till.com wrote:
 Hey folks,

 What's considered Best Practices for TO-92 packages?


Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.

Regards,
Mark
markra...@gmail
-- 
Mark Rages, Engineer
Midwest Telecine LLC
markra...@midwesttelecine.com


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Geoff Swan
 What's considered Best Practices for TO-92 packages?


 Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.

+1


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Windell H. Oskay

On Mar 1, 2010, at 7:15 PM, Geoff Swan wrote:

 What's considered Best Practices for TO-92 packages?
 
 
 Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.
 
 +1

Yeah, you guys are helpful. 

Next up: Q: How do I stop my dog from barking?  A: Get a goldfish.

:P


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread timecop
Why woudl someone use to92 in 2010.

On Tue, Mar 2, 2010 at 12:18 PM, Windell H. Oskay wind...@oskay.net wrote:

 On Mar 1, 2010, at 7:15 PM, Geoff Swan wrote:

 What's considered Best Practices for TO-92 packages?


 Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.

 +1

 Yeah, you guys are helpful.

 Next up: Q: How do I stop my dog from barking?  A: Get a goldfish.

 :P


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Windell H. Oskay
On Mar 1, 2010, at 7:19 PM, timecop wrote:

 Why woudl someone use to92 in 2010.


Up to now, it's been because I design soldering kits for beginners.  But from 
now on, I'll do it just to piss you off.

Why does Don use them?  I don't know.  Perhaps he has a low-noise JFET that 
doesn't come in SOT-23.   Or perhaps he's just checking to see whether the 
folks on this mailing list are helpful or are just a bunch of elitist assholes 
that give gEDA the wide install base that it has today.  


Don-- I have a couple of footprints that work well, if you'd like them.  
They've been tested by thousands of people.

-Windell




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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Dave McGuire

On Mar 1, 2010, at 10:19 PM, timecop wrote:

Why woudl someone use to92 in 2010.


  What does the year have to do with it??

  -Dave





--
Dave McGuire
Port Charlotte, FL



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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread DJ Delorie

 Up to now, it's been because I design soldering kits for beginners.
 But from now on, I'll do it just to piss you off.

:-)

I hate it when you ask for help with one thing, and people suggest you
do something else.

Folks, when someone asks how to deal with TO-92, don't suggest they
use something else.  Either help them with their problem, or refrain
from commenting on their choices.


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Vanessa Ezekowitz
On Tue, 2 Mar 2010 12:19:22 +0900
timecop time...@gmail.com wrote:

 Why woudl someone use to92 in 2010.

One could ask why I use TO-18's in this day and age, and I'd answer because I 
can.  Really though, most of my projects are retro in nature, so TO-18 just 
fits that look.

-- 
There are some things in life worth obsessing over.  Most
things aren't, and when you learn that, life improves.
http://starbase.globalpc.net/~ezekowitz
Vanessa Ezekowitz vanessaezekow...@gmail.com


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Geoff Swan
Ignoring the response(s) from timecop, I don't believe the suggestion
to try sot-23 was intended to be either elitist or unhelpful. *if* the
option to use a different footprint is available then in many cases
there is a great deal of advantage to using the sot-23 layout. If the
work is being done by someone familiar with the pointy end of a
soldering iron then it is as Mark points out potentially faster and
easier to populate. I concede that in Windell's scenario that through
hole components are much better for beginners rendering the suggestion
moot, likewise if the part is not available or usable due to some
other constraint.

I hate it when you ask for help with one thing, and people suggest you do 
something else.

Without a lot of background information as to why a job *has* to be
done a particular way there is sometimes value in trying a different
approach. Although because it doesn't answer the original question the
suggestion is not always helpful... oh well...


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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Donald Tillman


On Feb 27, 2010, at 3:57 PM, John Luciani wrote:

  I use two different footprints. Both footprints have the pins  
inline.

  One footprint spaces the leads 1.39mm the other 2.60mm.
  The 2.60mm is the common formed lead pattern. I believe
  I used the spec from On-Semi.
  I use a finished hole size of 29mils. The fab tolerance is +-4mils.



Hey John,

Thanks for that.

Researching this a little more...  Fairchild's TO-92 spec says that  
the leads are rectangular, 0.46mm by 0.38mm, and the diagonal there  
works out to 23.5 mils.  With a little extra room for tolerance, yeah,  
a 29 mil hole sounds good.


But with 29 mil holes spaced 50 mils apart, that doesn't leave enough  
room for the pads and the space between.  Maybe 7 mils each.  So  
breaking away from the 50 mil grid by just a little bit and moving the  
outer legs 5 mils beyond allows the DRC to work.


  -- Don

--
Don Tillman
Palo Alto, California
d...@till.com
http://www.till.com






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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread Donald Tillman


On Mar 1, 2010, at 7:12 PM, Mark Rages wrote:


On Sat, Feb 27, 2010 at 5:27 PM, Donald Tillman d...@till.com wrote:

Hey folks,

What's considered Best Practices for TO-92 packages?



Redesign with SOT-23.  Easier to solder, faster than stuffing TO-92.


Sheeshe...

I probably will go to surface mount at some point.  But for now I'm  
kicking it olde school.


This particular project uses some analog IC design styles implemented  
with hand-matched discrete transistors; diff amps, current mirrors and  
so forth.  So I'd need an efficient way to hand-match surface mount  
transistors.  With TO-92's I can just slap them into a rig and collect  
them into batches.  Surface mount?  I dunno.  Do they even make SOT-23  
sockets?


  -- Don

--
Don Tillman
Palo Alto, California
d...@till.com
http://www.till.com






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Re: gEDA-user: TO-92 Best Practices

2010-03-01 Thread DJ Delorie

 Do they even make SOT-23 sockets?

For matching, can you just press them onto a pcb carrier?  Something
that plugs into a breadboard, and gives you three big copper pads to
contact?  Assuming holding them down with your finger or even just
letting gravity do the work, it might be sufficient.

http://www.delorie.com/electronics/adapters/


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gEDA-user: TO-92 Best Practices

2010-02-27 Thread Donald Tillman

Hey folks,

What's considered Best Practices for TO-92 packages?

I'm working on a project that involves a lot of discrete transistors  
in TO-92 packages -- the regular style, 3 in-line, no fancy triangular  
pinouts or lead forming or anything.


The TO92 package in pcblib-newlib seems to be larger than necessary,  
in pin spacing, pad size, and hole size.


Pin spacing: The actual package has the pins 50 mils apart. Is this  
used in practice?  Or is it too problematic, and maybe it's more  
practical to just spread the leads a little by hand?  Are there  
machine insertion issues?  (Not that I care right now, but I'd like to  
be as uptown about it as possible.)


The TO-92 leads are 20 mils diameter.   Would a 24 mil hole be fine  
then?  And maybe a 35 mil pad?


Anybody have success (or failure) stories or advice?

  -- Don

--
Don Tillman
Palo Alto, California
d...@till.com
http://www.till.com






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Re: gEDA-user: TO-92 Best Practices

2010-02-27 Thread John Luciani
   On Sat, Feb 27, 2010 at 6:27 PM, Donald Tillman [1]...@till.com
   wrote:

 Hey folks,
 What's considered Best Practices for TO-92 packages?

   I use two different footprints. Both footprints have the pins inline.
   One footprint spaces the leads 1.39mm the other 2.60mm.
   The 2.60mm is the common formed lead pattern. I believe
   I used the spec from On-Semi.
   I use a finished hole size of 29mils. The fab tolerance is +-4mils.
   (* jcl *)

   --
   You can't create open hardware with closed EDA tools.
   twitter: [2]http://twitter.com/jluciani
   blog:[3]http://www.luciani.org

References

   1. mailto:d...@till.com
   2. http://twitter.com/jluciani
   3. http://www.luciani.org/


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