Re: gEDA-user: analog/digital partitioning
On Thu, Jul 22, 2010 at 8:29 PM, Geoff Swan wrote: I came across this ( http://www.tentlabs.com/InfoSupport/page35/files/Supply_decoupling.pdf) some time ago. I would be interested to hear peoples thoughts as there are clearly many differing views on correct grounding and supply decoupling. The article certainly made a lot of sense to me and until proven otherwise it's the approach I follow. I understand why multiple ground planes seem attractive with the idea of somehow partitioning different current flows - but I have yet to see an implementation where this worked as intended. I have debugged circuits where there were as many as 4 separate ground planes and this certainly did not help the noise problems. I recognise that this is not enough to rule out the approach - just that the person designing didn't understand what they were doing. If someone has a design/layout that has *correctly* implemented split grounds etc I would be keen to have a look. Better yet if the design approach can be explained. This is one of those elements of practical electronic design that seems to be glossed over as assumed knowledge, and not necessarily very well taught. regards, Geoff This is a huge topic, Geoff. There are a whole lot of rules of thumb that have been written to help people get to the finish line without spending too much time thinking about it. In the specific case, the best answer is it depends, and you have to excercise some brain cells, assuming you understand the basic reasons for making a design/layout decistion. Also, what works at audio doesn't necessarily work at 1 GHz. Edge rates are just as important as clock rates in the SI world. For some good info, you can check out stuff from Howard Johnson, Henry Ott, Eric Bogatin, Doug Smith, Lee Ritchey to name just a few (there are many more). In my case (this thread) I was concerned about slots. Having been taught they are not good (rule of thumb) I was having a tough time allowing it - even though it looks like a pretty good solution. Here's some info from Henry Ott on this subject: http://www.hottconsultants.com/techtips/tips-slots.html Some info from Lee Ritchey apparently backs up the notion as well (I don't have any reference to it though) good luck gene ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, 2010-07-22 at 02:13 -0400, gene glick wrote: I'm throwing this out to the list for opinions. . . This design has mixed analog and digital circuits. I do not know much about that, but I have seen a few discussions about that topic in Internet. My conclusion: General discussion makes not too much sense. You have to show your schematic and intended layout to smart experts, than they can tell you how to improve it. Often stupid partitioning of GND in digital and analog can generate much trouble, so one single low impedance ground plane can be a simple and not too bad solution. For my DAD/DSO board I used a 4 layer board with one ground plane, divided into analog and digital part, joined near the ADCs. I think that should be OK, but radiated noise (by air) may be a problem, ie. from FPGA and switching voltage regulators to analog amplifiers. So I have to shield the sensitive analog amplifiers by a tin cup. I think I will build the board in a few months, so I will learn more about noise coupling. Best regards Stefan Salewski ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
Often stupid partitioning of GND in digital and analog can generate much trouble, so one single low impedance ground plane can be a simple and not too bad solution. Yep. But a single plane *may* lead to stray currents flowing near sensitive analog stuff, like ADC and DAC. I don't want to degrade the performance of these parts. In fact, my analog gnd plane is sectioned as well, in order to isolate the high-current section from the low signal portion. Now that it's not 2 AM, and maybe I'm thinking a little more clearly, the ADC and DAC can be contained in one area, where the digital and analog gnd plane connects. Don't know why I didn't think of that before - that takes care of most of the high speed digital signals that transition between the two domains. That leaves some others, like I2C and pseudo-static control lines, which I am at a loss on the best routing methodology. Good luck with your design. The addage follow the currents works pretty well in figuring out if you will have trouble. Sort of like pretending your the electron, and see where you go. gene ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. I've used this approach on some relatively high-speed digital/analog/RF boards. Seems to work pretty well. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Jul 22, 2010, at 9:50 AM, Eric Brombaugh ebrombau...@cox.net wrote: On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. I've used this approach on some relatively high-speed digital/analog/RF boards. Seems to work pretty well. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, Jul 22, 2010 at 09:57:11AM -0700, Steven Michalske wrote: On Jul 22, 2010, at 9:50 AM, Eric Brombaugh ebrombau...@cox.net wrote: On 07/22/2010 09:37 AM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Now each side of this debate can call you a heretic -- that's a good thing! I'm generally on the single-ground-plane side of this fence, and the one time I ran into trouble, the solution was just as you describe. Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) If you have _any_ signals crossing the slots, you're doing it wrong. - Larry ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On 07/22/2010 09:57 AM, Steven Michalske wrote: Just make sure that if you've got high-speed digital lines that cross into the 'cubicles' they have gnd plane underneath them where they enter - don't let fast signals cross the cuts because then the return currents have to take a different path and that will screw up the signal integrity. The question is how fast?. Because you loops may not even matter. But just remember to keep them small. :-) Good point - that's left as an exercise for the engineer. In my case these were 16-bit DAC data buses running at 250MHz, so a few extra inches in the return path could cause some noticeable distortion in the higher harmonics and splatter the edges. OTOH, this board has a 5-bit async attenuator control bus that pops about once an hour and we didn't give those any priority. Eric ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
On Thu, Jul 22, 2010 at 12:37 PM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P Yeah, Dilbert calls them 'anti-productivity pods' :D Seriously though, I like your idea except that sloted planes are generally frowned upon in the SI world - there's an opportunity for eddy currents to flow around the slot, and that will radiate. As long as no signals cross the slots on any other layers, maybe this is ok. ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Re: gEDA-user: analog/digital partitioning
I came across this ([1]http://www.tentlabs.com/InfoSupport/page35/files/Supply_decoupling. pdf) some time ago. I would be interested to hear peoples thoughts as there are clearly many differing views on correct grounding and supply decoupling. The article certainly made a lot of sense to me and until proven otherwise it's the approach I follow. I understand why multiple ground planes seem attractive with the idea of somehow partitioning different current flows - but I have yet to see an implementation where this worked as intended. I have debugged circuits where there were as many as 4 separate ground planes and this certainly did not help the noise problems. I recognise that this is not enough to rule out the approach - just that the person designing didn't understand what they were doing. If someone has a design/layout that has *correctly* implemented split grounds etc I would be keen to have a look. Better yet if the design approach can be explained. This is one of those elements of practical electronic design that seems to be glossed over as assumed knowledge, and not necessarily very well taught. regards, Geoff On Fri, Jul 23, 2010 at 3:56 AM, myjunk stuff [2]carzr...@optonline.net wrote: On Thu, Jul 22, 2010 at 12:37 PM, DJ Delorie wrote: One idea to consider is to start with a solid plane, and cut slots around the sensitive analog parts, like big C shaped moats, squares open on one side. You retain the big ground plane conductivity, but you prevent stray currents from using your analog area as a short-cut. Each analog chunk can have it's own moat this way, too. If they're near the edge, just cut a thin slot from the edge in. Hmmm... this reminds me of the cubicle I used to work in :-P Yeah, Dilbert calls them 'anti-productivity pods' :D Seriously though, I like your idea except that sloted planes are generally frowned upon in the SI world - there's an opportunity for eddy currents to flow around the slot, and that will radiate. As long as no signals cross the slots on any other layers, maybe this is ok. ___ geda-user mailing list [3]geda-u...@moria.seul.org [4]http://www.seul.org/cgi-bin/mailman/listinfo/geda-user References 1. http://www.tentlabs.com/InfoSupport/page35/files/Supply_decoupling.pdf 2. mailto:carzr...@optonline.net 3. mailto:geda-user@moria.seul.org 4. http://www.seul.org/cgi-bin/mailman/listinfo/geda-user ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
