[gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick
scons: *** [build/ALPHA/mem/ruby/structures/RubyMemoryControl.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/ruby/structures/RubyMemoryControl.do'. scons: *** [build/ALPHA/mem/protocol/DMARequestMsg.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/DMARequestMsg.do'. scons: *** [build/ALPHA/mem/protocol/DMA_Controller.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/DMA_Controller.do'. scons: *** [build/ALPHA/mem/protocol/DMA_Wakeup.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/DMA_Wakeup.do'. scons: *** [build/ALPHA/mem/protocol/DMA_Transitions.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/DMA_Transitions.do'. scons: *** [build/ALPHA/mem/protocol/Directory_Controller.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/Directory_Controller.do'. scons: *** [build/ALPHA/mem/protocol/Directory_TBE.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/Directory_TBE.do'. scons: *** [build/ALPHA/mem/protocol/Directory_Transitions.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/Directory_Transitions.do'. scons: *** [build/ALPHA/mem/protocol/Directory_Wakeup.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/Directory_Wakeup.do'. scons: *** [build/ALPHA/mem/protocol/L1Cache_Controller.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/L1Cache_Controller.do'. scons: *** [build/ALPHA/mem/protocol/L1Cache_Transitions.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/L1Cache_Transitions.do'. scons: *** [build/ALPHA/mem/protocol/L1Cache_Wakeup.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/L1Cache_Wakeup.do'. scons: *** [build/ALPHA/mem/protocol/MachineType.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/MachineType.do'. scons: *** [build/ALPHA/mem/protocol/MemoryMsg.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/MemoryMsg.do'. scons: *** [build/ALPHA/mem/protocol/RequestMsg.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/RequestMsg.do'. scons: *** [build/ALPHA/mem/protocol/ResponseMsg.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/mem/protocol/ResponseMsg.do'. scons: *** [build/ALPHA/python/m5/internal/param_RubyMemoryControl_wrap.cc] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/python/m5/internal/param_RubyMemoryControl_wrap.cc'. scons: *** [build/ALPHA/python/m5/internal/param_DMA_Controller_wrap.cc] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/python/m5/internal/param_DMA_Controller_wrap.cc'. scons: *** [build/ALPHA/python/m5/internal/param_Directory_Controller_wrap.cc] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/python/m5/internal/param_Directory_Controller_wrap.cc'. scons: *** [build/ALPHA/python/m5/internal/param_L1Cache_Controller_wrap.cc] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/python/m5/internal/param_L1Cache_Controller_wrap.cc'. scons: *** [build/ALPHA_MOESI_hammer/mem/ruby/structures/RubyMemoryControl.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA_MOESI_hammer/mem/ruby/structures/RubyMemoryControl.do'. scons: *** [build/ALPHA_MOESI_hammer/mem/protocol/DMARequestMsg.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA_MOESI_hammer/mem/protocol/DMARequestMsg.do'. scons: *** [build/ALPHA_MOESI_hammer/mem/protocol/DMA_Controller.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA_MOESI_hammer/mem/protocol/DMA_Controller.do'. scons: *** [build/ALPHA_MOESI_hammer/mem/protocol/DMA_Transitions.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not found, needed by target
Re: [gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick
Tony (or someone, Could you fry the build diretory as Nilay¹s changes from yesterday seem to confuse scons. Thanks, Andreas On 9/2/14, 8:34 AM, Cron Daemon via gem5-ev gm5-...@gem5.org wrot: scons: *** [build/ALPHA/mem/ruby/structures/ubyMemoryControl.do]Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by target `build/ALPHA/em/ruby/structures/RubyMemoryControl.do'. scons: *** [build/ALHA/mem/potocol/DMARequestMsg.do] Implicit dependency `build/ALPHA/mem/rby/system/MachineID.hh' nt found, needed by targe `build/ALPHA/mem/protocol/DMARequestMsg.do'. scons: *** [build/ALPHA/mm/protocol/DMA_Controller.do] Implicit dependency `buid/ALPHA/mem/ruby/system/MachineID.hh' not found, needed b target `buildALPHA/mem/protocol/DMA_Cotroller.do'. scons: *** [build/APHA/mem/protocol/DMA_Wakeup.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found needed bytarget `bild/ALPHA/mem/protocol/DMA_Wakeup.do'. scons: *** [build/ALPH/mem/potocol/DMA_Transitions.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed y target `build/ALPHA/mem/protocol/DMA_Transitions.do'. cons: *** [build/LPHA/mem/protocol/Directory_Controller.do] Implicit deendency `build/ALPHA/mem/uby/system/TBETable.hh' not found, needed by target `uild/ALPHA/mem/protocol/Directory_Controller.do'. scons: *** [build/APHA/mem/proocol/Directory_TBE.do Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not fund, needed bytarget `build/ALPHA/mem/protocol/Directory_TBE.do'. scons: *** [buildALPHA/mem/protocol/Directory_Transitions.do] Implicit dependecy `build/ALPHA/mem/rby/system/TBETable.hh' not found, neded by target `build/ALPHA/mem/potocol/Directory_Transitions.do'. scns: *** [build/ALPHA/mem/protocol/Directory_Wakeup.do] Implicit dependency `build/ALPHA/mem/ruby/system/TBETable.h' not foun, needed by target `build/ALPHA/mem/protocol/Directory_Wakep.do'. scon: *** [build/ALPHA/mem/prtocol/L1Cache_Controller.do] Implicit dependency `build/ALPHA/mem/ruby/ystem/TBETable.hh' not found, needed by target `build/ALPHA/mem/potocol/1Cache_Controler.do'. scons: *** [build/ALPHA/mem/protocol/L1Cache_Transitions.do Implicit dependency `build/ALPHA/mem/ruby/systm/TBETable.hh' not found, needed by target `build/ALPHA/mem/protocol/1Cache_Transitions.do'. scons *** [build/ALPHA/memprotocol/L1Cache_Wakeup.do] Implicit dependency `build/ALPHA/em/rub/system/TBETable.hh' not found, needed by target `build/ALPHA/mem/rotocol/L1Cache_Wakeup.do'. scons: *** [build/ALPHA/mem/protocol/MachineTye.do] Implicit dependncy `build/ALPHA/mem/ruby/ystem/TBETable.hh' not found, needed by taget `build/ALPHA/mem/protocol/achineType.do'. scons: *** [build/ALPHA/mem/protocol/MemoryMsg.do] Implicit dependency `build/ALPHA/mem/rubysystem/MacineID.hh' ot found, needed by target `build/ALPHA/mem/protocol/MemoryMsgdo'. cons: *** [build/ALPHA/mem/protocol/RequestMsg.do] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' no found, needed by target build/ALPHA/mem/protool/RequestMsg.do'. scons:*** [build/ALPHA/mem/protocol/ResponseMsg.d] Implicit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found, needed by arget `build/ALPHA/mem/protocol/ResponseMsg.do'. scons: *** [buil/ALPHA/python/m5/internal/parm_RubyMemoryControl_wrap.cc] Implicit dependency `build/ALPHA/mem/ruby/sysem/MachineI.hh' not found, needed by target `build/ALPHA/python/m5/internal/pram_RubyMemoryControl_wrap.cc'. scons: *** [build/ALPHA/python/m5/internal/param_DMA_Controller_wrap.cc Implcit dependency `build/ALPHA/mem/ruby/system/MachineID.hh' not found neded by target `build/APHA/python/m5/internal/param_DMA_Controller_wrap.cc'. scons: *** [build/ALPHA/pyton/m5/internal/param_Directory_Controller_wrap.cc] Implicit dpendency`build/ALPHAmem/ruby/system/TBETable.hh' not found, needed by target `build/ALPHA/pthon/m5/internal/param_Diectory_Controller_wrap.cc'. scons: *** [build/ALPHA/python/m5/interal/param_L1Cache_Controller_wrap.cc] Implicit dependency `buil/ALPHA/mem/ruby/syste/TBETable.hh' not found, needd by target `build/ALPHA/python/m5/internl/param_L1Cache_Controller_wrapcc'. scons: *** [build/ALPHA_MOESI_hammer/mem/ruby/structures/RubyMemoryControl.do] Implicit dependency `build/ALPHA_MOESI_hammerem/ruby/system/MachinID.hh' not found, needed by target `build/ALPH_MOESI_hammer/mem/ruby/sructures/RubyMemoryControl.do'. scons: *** [build/ALPHA_MOESI_hammer/mem/protocol/DMARequestsg.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/systemMachineID.hh' ot found, needed by target `build/ALPHA_MOESI_hammer/mem/protocol/DMARequetMsg.do'. scons: *** [build/LHA_MOESI_hammer/mem/protocol/DMA_Controller.do] Implicit dependency build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not found, needed by taget `build/ALPHA_MOES_hammer/mem/proocol/DMA_Controller.do'. scons: *** [build/ALPHA_MOESI_hamer/mem/protcol/DMA_Transitions.do] Implicit dependency `build/ALPHA_MOESI_hammer/mem/ruby/system/MachineID.hh' not
[gem5-dev] workaround: Ruby functional read failed error
Hi all,
when running parsec dedup benchmark in SE mode (gem5-stable, x86 simple
timing + ruby MESI_CMP_directory), the simulation ends: Ruby functional
read failed error.
Digging into protocol traces I've found two cpu trying modify the same cache
block, data was just sent from L1 to L2, while a third cpu tried to access
the same block using functional read initiated by a syscall. So the only
valid data block cannot be found in any cache controller, because it is in
the message queued to be delivered to the L2 , as it is described in the
communication two years ago.
This bug is easy reproducible using attached code.
As it was already mentioned in the mailing list, the right solution should
be to inspect all queued packets and to find the message containing the data
block (in the RubySystem::functionalRead implementation in
src/mem/ruby/system/System.cc).
But as I don't know how to find all queues and packets, I've implemented
this workaround:
Every DataBlk in any message is registered in a circular buffer before the
message is enqueued (enqueue generate in slicc).
Then the data can be found and read by RubySystem::functionalRead even
though they are not available in controllers.
I tried to put changes to a repository (changesets 10006:7a645dc20a80 and
10007:d9d8bb691e64), but I don't know if they are correctly submited. Sorry,
I've never worked with versioning sw before. Can I ask for help with it ?
Regards,
Jiri Kaspar
BTW, in the scenario above, the functionalWrite will not work correctly,
data updated by functionalWrite in controllers will be replaced with old
data from a queued packet several ticks later.
---
#include pthread.h
#include unistd.h
#include stdlib.h
#include stdio.h
char buffer[32] = 123456789012345678901234567890;
char *cnt = buffer[0];
long long ii;
void* counter(void *arg) {
for (;;) __sync_fetch_and_add(cnt,1);
}
int main(int argc, char **argv) {
pthread_t thread[2];
if ( pthread_create(thread[0], NULL, counter, (void *) ii) != 0 ) {
printf(pthread_create() error);
exit(1);
}
if ( pthread_create(thread[1], NULL, counter, (void *) ii) != 0 ) {
printf(pthread_create() error);
exit(1);
}
for (;;) {
FILE *f;
f = fopen(buffer[1],r);
}
}
___
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Re: [gem5-dev] Review Request 2301: config, x86: add ethernet support for x86 fullsystem
On July 18, 2014, 1:39 p.m., Andreas Sandberg wrote: LGTM. Thanks for fixing this! Hi, Have you ever tried to boot system or use Ethernet device with O3 cpu model? With O3 cpu I get this error: gem5.opt: build/X86/dev/i8254xGBe.cc:182: virtual Tick IGbE::read(PacketPtr): Assertion `pkt-getSize() == 4' failed. Program aborted at tick 131516086224500 Aborted The problem is that 'pkt-getSize()' returns 64 with O3 cpu model ... Any idea how to fix it? Thanks, Mohammad - Mohammad --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2301/#review5213 --- On July 18, 2014, 12:29 a.m., Jiuyue Ma wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2301/ --- (Updated July 18, 2014, 12:29 a.m.) Review request for Default. Repository: gem5 Description --- config, x86: add ethernet support for x86 fullsystem This patch add a IGbE_e1000 ethernet device to x86 fs system, it does the followings: 1) add IGbE_e1000 to x86_sys.pc.ethernet, 2) connect x86_sys.pc.ethernet.pio/config/dma to x86_sys.iobus, 3) add interrupt assignment for x86_sys.pc.ethernet in MP table. Diffs - configs/common/FSConfig.py 878f2f30b12d38f619b80b5d80d52498946f6ad1 Diff: http://reviews.gem5.org/r/2301/diff/ Testing --- Thanks, Jiuyue Ma ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Ruby regression tests and null isa
On Mon, 1 Sep 2014, Andreas Hansson wrote: Hi Nilay, That is a very good point, and thanks for spending some cycles on this. I¹m not pushing for a transition, I merely thought it made more sense, but I forgot about the hello world tests. Does the ³hello world² actually add any value to the regressions? Would it not be better to: 1) run a more extensive regression using Ruby + an o3 CPU model (linux boot etc), or 2) use a more extensive synthetic tester (e.g. memtester with actual sharing, which is something we¹re working on...) for some of these protocols? I am fine with adding more tests. I do sometimes test by booting Linux so as to ensure things are in a working state. I am not sure if we would like to see the time for regressions going up. I am unable to recall the inner workings of the testers that we use for ruby, but I am sure they test sharing. As a side note, I¹ve managed to make the memory system (src/mem) completely ISA independent, so we could compile the entire memory directory once for all ISAs. Unfortunately we also need to compile it once for every coherency protocol in Ruby. I¹m not sure there is any sensible way around it, but it would be good to get your thoughts on this. If I remember correctly, there is one particular file (MachineType.hh) that is the stumbling block in compiling all protocols together. I might look at this again once I am done with another ruby thing I am working on currently. Thanks Nilay ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 2372: style: add .clang-format file
--- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2372/ --- (Updated Sept. 3, 2014, 4:50 a.m.) Review request for Default. Repository: gem5 Description (updated) --- Changeset 10318:34b549ec182b --- style: add .clang-format file The format specified in this file is used by clang-format to fix the formatting of a given file. Hopefully, this will ease the burden on the developers as they no longer need to manually format things. Diffs (updated) - .clang-format PRE-CREATION Diff: http://reviews.gem5.org/r/2372/diff/ Testing --- Thanks, Nilay Vaish ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 2372: style: add .clang-format file
On Sept. 1, 2014, 5:14 p.m., Andreas Sandberg wrote: .clang-format, line 18 http://reviews.gem5.org/r/2372/diff/1/?file=41128#file41128line18 Has this changed name? The clang documentation lists DerivePointerAlignment, but not DerivePointerBinding. Documentation for version 3.4 lists DerivePointerBinding. On Sept. 1, 2014, 5:14 p.m., Andreas Sandberg wrote: .clang-format, line 46 http://reviews.gem5.org/r/2372/diff/1/?file=41128#file41128line46 ?? The file was originally file generated using clang-format and the ellipsis came with it. - Nilay --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2372/#review5321 --- On Sept. 3, 2014, 4:50 a.m., Nilay Vaish wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2372/ --- (Updated Sept. 3, 2014, 4:50 a.m.) Review request for Default. Repository: gem5 Description --- Changeset 10318:34b549ec182b --- style: add .clang-format file The format specified in this file is used by clang-format to fix the formatting of a given file. Hopefully, this will ease the burden on the developers as they no longer need to manually format things. Diffs - .clang-format PRE-CREATION Diff: http://reviews.gem5.org/r/2372/diff/ Testing --- Thanks, Nilay Vaish ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Review Request 2372: style: add .clang-format file
On Mon, 1 Sep 2014, Andreas Sandberg wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.gem5.org/r/2372/#review5321 --- I looked into this tool a couple of months ago. At the time, I encountered some issues relating to indentation (IIRC, the way we indent case labels by 2 spaces wasn't supported). My conclusion at the time was that it wasn't possible to configure clang-format to adhere to the gem5 style. Has this changed? If not, I'd suggest that we don't commit this for now and wait while clang-format matures. I am not in a hurry to commit the patch. But I don't think waiting for clang-format to change is the right thing either. -- Nilay ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] changeset in gem5: build opts: add MI_example to NULL ISA
On Mon, 1 Sep 2014, Andreas Hansson via gem5-dev wrote: Hi Nilay, I merely wanted to point out that this has significantly increased the compile time of the NULL ISA. I¹m not sure what we can do about it at this point, but I like the idea of not being forced to build Ruby and buy the farm. Any ideas? I think there is very clunky way of getting rid of the problem. It would require duplicating some of the code present in one of the .sm files (RubySlicc_Exports.sm) in a C++ header file. As I mentioned in the comment, AbstractController's header is now included in the file pyobject.cc. This header depends on a generated header file AccessPermission.hh, which requires a protocol. Now that I think about it, may be we should generate this file irrespective of whether or not a protocol is specified, then we should be able to get rid of the problem. This should be possible since the file contains code that is independent of the protocol itself. -- Nilay ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
