[gem5-dev] Change in gem5/gem5[master]: mem-cache: Support for page crossing prefetches
Hello Jason Lowe-Power, Nikos Nikoleris, Daniel Carvalho, Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/14620 to look at the new patch set (#7). Change subject: mem-cache: Support for page crossing prefetches .. mem-cache: Support for page crossing prefetches Prefetchers can now issue hardware prefetch requests that go beyond the boundaries of the system page. Page crossing references will need to look up the TLBs to be able to compute the physical address to be prefetched. Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b --- M src/arch/arm/tlb.hh M src/arch/generic/tlb.cc M src/arch/generic/tlb.hh M src/mem/cache/prefetch/Prefetcher.py M src/mem/cache/prefetch/base.cc M src/mem/cache/prefetch/base.hh M src/mem/cache/prefetch/queued.cc M src/mem/cache/prefetch/queued.hh 8 files changed, 385 insertions(+), 109 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14620 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib56374097e3b7dc87414139d210ea9272f96b06b Gerrit-Change-Number: 14620 Gerrit-PatchSet: 7 Gerrit-Owner: Javier Bueno Hedo Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Javier Bueno Hedo Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: cpu: Added the Multiperspective Perceptron Predictor (8KB and 64KB)
Hello Ilias Vougioukas, Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/15495 to look at the new patch set (#6). Change subject: cpu: Added the Multiperspective Perceptron Predictor (8KB and 64KB) .. cpu: Added the Multiperspective Perceptron Predictor (8KB and 64KB) Described by the following article: Jiménez, D. "Multiperspective perceptron predictor." Championship Branch Prediction (CBP-5) (2016). Change-Id: Iaa68ead7696e0b6ba05b4417d0322e8053e10d30 --- M src/cpu/pred/BranchPredictor.py M src/cpu/pred/SConscript A src/cpu/pred/multiperspective_perceptron.cc A src/cpu/pred/multiperspective_perceptron.hh A src/cpu/pred/multiperspective_perceptron_64KB.cc A src/cpu/pred/multiperspective_perceptron_64KB.hh A src/cpu/pred/multiperspective_perceptron_8KB.cc A src/cpu/pred/multiperspective_perceptron_8KB.hh 8 files changed, 2,169 insertions(+), 0 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15495 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Iaa68ead7696e0b6ba05b4417d0322e8053e10d30 Gerrit-Change-Number: 15495 Gerrit-PatchSet: 6 Gerrit-Owner: Javier Bueno Hedo Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Ilias Vougioukas Gerrit-Reviewer: Javier Bueno Hedo Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Added the STeMS prefetcher
Javier Bueno Hedo has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/16423
Change subject: mem-cache: Added the STeMS prefetcher
..
mem-cache: Added the STeMS prefetcher
Reference:
Stephen Somogyi, Thomas F. Wenisch, Anastasia Ailamaki, and
Babak Falsafi. 2009. Spatio-temporal memory streaming.
In Proceedings of the 36th annual international symposium on
Computer architecture (ISCA '09). ACM, New York, NY, USA, 69-80.
Change-Id: I58cea1a7faa9391f8aa4469eb4973feabd31097a
---
M src/mem/cache/prefetch/Prefetcher.py
M src/mem/cache/prefetch/SConscript
A src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc
A src/mem/cache/prefetch/spatio_temporal_memory_streaming.hh
4 files changed, 474 insertions(+), 0 deletions(-)
diff --git a/src/mem/cache/prefetch/Prefetcher.py
b/src/mem/cache/prefetch/Prefetcher.py
index 2e070e3..31231ca 100644
--- a/src/mem/cache/prefetch/Prefetcher.py
+++ b/src/mem/cache/prefetch/Prefetcher.py
@@ -338,3 +338,39 @@
sp_address_map_cache_replacement_policy = Param.BaseReplacementPolicy(
LRURP(),
"Replacement policy of the Structural-to-Physical Address Map
Cache")
+
+class STeMSPrefetcher(QueuedPrefetcher):
+type = "STeMSPrefetcher"
+cxx_class = "STeMSPrefetcher"
+cxx_header = "mem/cache/prefetch/spatio_temporal_memory_streaming.hh"
+
+spatial_region_size = Param.MemorySize("2kB",
+"Memory covered by a hot zone")
+active_generation_table_entries = Param.MemorySize("64",
+"Number of entries in the active generation table")
+active_generation_table_assoc = Param.Unsigned(64,
+"Associativity of the active generation table")
+active_generation_table_indexing_policy = Param.BaseIndexingPolicy(
+SetAssociative(entry_size = 1,
+assoc = Parent.active_generation_table_assoc,
+size = Parent.active_generation_table_entries),
+"Indexing policy of the active generation table")
+active_generation_table_replacement_policy =
Param.BaseReplacementPolicy(
+LRURP(), "Replacement policy of the active generation table")
+
+pattern_sequence_table_entries = Param.MemorySize("64",
+"Number of entries in the pattern sequence table")
+pattern_sequence_table_assoc = Param.Unsigned(64,
+"Associativity of the pattern sequence table")
+pattern_sequence_table_indexing_policy = Param.BaseIndexingPolicy(
+SetAssociative(entry_size = 1,
+assoc = Parent.pattern_sequence_table_assoc,
+size = Parent.pattern_sequence_table_entries),
+"Indexing policy of the pattern sequence table")
+pattern_sequence_table_replacement_policy =
Param.BaseReplacementPolicy(
+LRURP(), "Replacement policy of the pattern sequence table")
+
+region_miss_order_buffer_entries = Param.Unsigned(131072,
+"Number of entries of the Region Miss Order Buffer")
+reconstruction_entries = Param.Unsigned(256,
+"Number of reconstruction entries")
diff --git a/src/mem/cache/prefetch/SConscript
b/src/mem/cache/prefetch/SConscript
index 4af6d24..09492b5 100644
--- a/src/mem/cache/prefetch/SConscript
+++ b/src/mem/cache/prefetch/SConscript
@@ -40,5 +40,6 @@
Source('queued.cc')
Source('signature_path.cc')
Source('signature_path_v2.cc')
+Source('spatio_temporal_memory_streaming.cc')
Source('stride.cc')
Source('tagged.cc')
diff --git a/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc
b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc
new file mode 100644
index 000..df2c68f
--- /dev/null
+++ b/src/mem/cache/prefetch/spatio_temporal_memory_streaming.cc
@@ -0,0 +1,261 @@
+/**
+ * Copyright (c) 2018 Metempsy Technology Consulting
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
[gem5-dev] Change in gem5/gem5[master]: mem-cache: Added the Indirect Memory Prefetcher
Hello Nikos Nikoleris, Daniel Carvalho, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/16223 to look at the new patch set (#3). Change subject: mem-cache: Added the Indirect Memory Prefetcher .. mem-cache: Added the Indirect Memory Prefetcher Reference: Xiangyao Yu, Christopher J. Hughes, Nadathur Satish, and Srinivas Devadas. 2015. IMP: indirect memory prefetcher. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 178-190. DOI: https://doi.org/10.1145/2830772.2830807 Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 --- M src/mem/cache/base.cc M src/mem/cache/base.hh M src/mem/cache/prefetch/Prefetcher.py M src/mem/cache/prefetch/SConscript M src/mem/cache/prefetch/associative_set.hh M src/mem/cache/prefetch/base.cc M src/mem/cache/prefetch/base.hh A src/mem/cache/prefetch/indirect_memory.cc A src/mem/cache/prefetch/indirect_memory.hh 9 files changed, 562 insertions(+), 5 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/16223 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I52790f69c13ec55b8c1c8b9396ef9a1fb1be9797 Gerrit-Change-Number: 16223 Gerrit-PatchSet: 3 Gerrit-Owner: Javier Bueno Hedo Gerrit-Assignee: Nikos Nikoleris Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Javier Bueno Hedo Gerrit-Reviewer: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
Pau Cabre has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/14855 )
Change subject: cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
..
cpu: Added 8KB and 64KB TAGE-SC-L branch predictor
The original paper of the branch predictor can be found here:
http://www.jilp.org/cbp2016/paper/AndreSeznecLimited.pdf
Change-Id: I684863752407685adaacedebb699205c3559c528
Reviewed-on: https://gem5-review.googlesource.com/c/14855
Reviewed-by: Sudhanshu Jha
Reviewed-by: Andreas Sandberg
Maintainer: Andreas Sandberg
---
M src/cpu/pred/BranchPredictor.py
M src/cpu/pred/SConscript
M src/cpu/pred/loop_predictor.cc
M src/cpu/pred/loop_predictor.hh
M src/cpu/pred/ltage.cc
M src/cpu/pred/ltage.hh
A src/cpu/pred/statistical_corrector.cc
A src/cpu/pred/statistical_corrector.hh
M src/cpu/pred/tage.cc
M src/cpu/pred/tage.hh
M src/cpu/pred/tage_base.cc
M src/cpu/pred/tage_base.hh
A src/cpu/pred/tage_sc_l.cc
A src/cpu/pred/tage_sc_l.hh
A src/cpu/pred/tage_sc_l_64KB.cc
A src/cpu/pred/tage_sc_l_64KB.hh
A src/cpu/pred/tage_sc_l_8KB.cc
A src/cpu/pred/tage_sc_l_8KB.hh
18 files changed, 2,541 insertions(+), 56 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Sudhanshu Jha: Looks good to me, approved
diff --git a/src/cpu/pred/BranchPredictor.py
b/src/cpu/pred/BranchPredictor.py
index 1d5fd5e..85b225c 100644
--- a/src/cpu/pred/BranchPredictor.py
+++ b/src/cpu/pred/BranchPredictor.py
@@ -118,7 +118,7 @@
logUResetPeriod = Param.Unsigned(18,
"Log period in number of branches to reset TAGE useful counters")
numUseAltOnNa = Param.Unsigned(1, "Number of USE_ALT_ON_NA counters")
-useAltOnNaBits = Param.Unsigned(4, "Size of the USE_ALT_ON_NA counter")
+useAltOnNaBits = Param.Unsigned(4, "Size of the USE_ALT_ON_NA
counter(s)")
maxNumAlloc = Param.Unsigned(1,
"Max number of TAGE entries allocted on mispredict")
@@ -185,6 +185,96 @@
optionalAgeReset = Param.Bool(True,
"Reset age bits optionally in some cases")
+class TAGE_SC_L_TAGE(TAGEBase):
+type = 'TAGE_SC_L_TAGE'
+cxx_class = 'TAGE_SC_L_TAGE'
+cxx_header = "cpu/pred/tage_sc_l.hh"
+abstract = True
+tagTableTagWidths = [0]
+numUseAltOnNa = 16
+pathHistBits = 27
+maxNumAlloc = 2
+logUResetPeriod = 10
+useAltOnNaBits = 5
+# TODO No speculation implemented as of now
+speculativeHistUpdate = False
+
+# This size does not set the final sizes of the tables (it is just used
+# for some calculations)
+# Instead, the number of TAGE entries comes from shortTagsTageEntries
and
+# longTagsTageEntries
+logTagTableSize = Param.Unsigned("Log size of each tag table")
+
+shortTagsTageFactor = Param.Unsigned(
+"Factor for calculating the total number of short tags TAGE
entries")
+
+longTagsTageFactor = Param.Unsigned(
+"Factor for calculating the total number of long tags TAGE
entries")
+
+shortTagsSize = Param.Unsigned(8, "Size of the short tags")
+
+longTagsSize = Param.Unsigned("Size of the long tags")
+
+firstLongTagTable = Param.Unsigned("First table with long tags")
+
+truncatePathHist = Param.Bool(True,
+"Truncate the path history to its configured size")
+
+
+class TAGE_SC_L_TAGE_64KB(TAGE_SC_L_TAGE):
+type = 'TAGE_SC_L_TAGE_64KB'
+cxx_class = 'TAGE_SC_L_TAGE_64KB'
+cxx_header = "cpu/pred/tage_sc_l_64KB.hh"
+nHistoryTables = 36
+
+minHist = 6
+maxHist = 3000
+
+tagTableUBits = 1
+
+logTagTableSizes = [13]
+
+# This is used to handle the 2-way associativity
+# (all odd entries are set to one, and if the corresponding even entry
+# is set to one, then there is a 2-way associativity for this pair)
+# Entry 0 is for the bimodal and it is ignored
+# Note: For this implementation, some odd entries are also set to 0 to
save
+# some bits
+noSkip = [0,0,1,0,0,0,1,0,0,1,1,1,1,1,1,1,1,1,1,
+1,1,1,1,0,1,0,1,0,1,0,0,0,1,0,0,0,1]
+
+logTagTableSize = 10
+shortTagsTageFactor = 10
+longTagsTageFactor = 20
+
+longTagsSize = 12
+
+firstLongTagTable = 13
+
+class TAGE_SC_L_TAGE_8KB(TAGE_SC_L_TAGE):
+type = 'TAGE_SC_L_TAGE_8KB'
+cxx_class = 'TAGE_SC_L_TAGE_8KB'
+cxx_header = "cpu/pred/tage_sc_l_8KB.hh"
+
+nHistoryTables = 30
+
+minHist = 4
+maxHist = 1000
+
+logTagTableSize = 7
+shortTagsTageFactor = 9
+longTagsTageFactor = 17
+longTagsSize = 12
+
+logTagTableSizes = [12]
+
+firstLongTagTable = 11
+
+truncatePathHist = False
+
+noSkip =
[0,0,1,0,1,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,1,0,1,0,1,0,1,0,1]
+
+tagTableUBits = 2
# LTAGE branch predictor as described in
# https://www.irisa.fr/caps/people/seznec/L-TAGE.pdf
@@ -196,4 +286,177 @@
cxx_header = "cpu/pred/ltage.hh"
tage = LTAGE_TAGE()
+
[gem5-dev] Change in gem5/gem5[master]: sim-se: add a pseudo-filesystem
Brandon Potter has uploaded a new patch set (#10). ( https://gem5-review.googlesource.com/c/public/gem5/+/12119 ) Change subject: sim-se: add a pseudo-filesystem .. sim-se: add a pseudo-filesystem This change introduce the concept of a pseudo-filesystem in gem5. The pseudo-filesystm works by creating a directory structure in m5out (or whichever output dir the user specifies) that system calls may be redirected to. This is useful for cases where SE mode would introduce some non-determinism due to reading files with varying path names (e.g., variation from run to run if your gem5 job is scheduled on a cluster where paths may change). It is also useful for opening files that have information specific to the host CPU, such as cache hierarchy or CPU information. This is useful when running runtimes in SE mode in the absence of a real OS kernel since many runtime layers provide system-level services to user space applications. Change-Id: I90821b3b403168b904a662fa98b85def1628621c --- A configs/common/FileSystemConfig.py M configs/common/Options.py M configs/example/se.py M src/kern/linux/linux.cc A src/sim/RedirectPath.py M src/sim/SConscript M src/sim/System.py M src/sim/process.cc M src/sim/process.hh A src/sim/redirect_path.cc A src/sim/redirect_path.hh M src/sim/syscall_emul.cc M src/sim/syscall_emul.hh M src/sim/system.cc M src/sim/system.hh 15 files changed, 582 insertions(+), 96 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12119 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I90821b3b403168b904a662fa98b85def1628621c Gerrit-Change-Number: 12119 Gerrit-PatchSet: 10 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Brandon Potter Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: change syscall function signature
Hello Jason Lowe-Power, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12299 to look at the new patch set (#8). Change subject: sim-se: change syscall function signature .. sim-se: change syscall function signature The system calls had four parameters. One of the parameters is ThreadContext and another is Process. The ThreadContext holds the value of the current process so the Process parameter is redundant since the system call functions already have indirect access. With the old API, it is possible to call into the functions with the wrong supplied Process which could end up being a confusing error. This patch removes the redundancy by forcing access through the ThreadContext field within each system call. Change-Id: Ib43d3f65824f6d425260dfd9f67de1892b6e8b7c --- M src/arch/alpha/linux/process.cc M src/arch/arm/freebsd/process.cc M src/arch/arm/linux/process.cc M src/arch/mips/linux/process.cc M src/arch/power/linux/process.cc M src/arch/riscv/linux/process.cc M src/arch/sparc/linux/syscalls.cc M src/arch/sparc/solaris/process.cc M src/arch/x86/linux/process.cc M src/gpu-compute/cl_driver.cc M src/gpu-compute/cl_driver.hh M src/sim/emul_driver.hh M src/sim/process.cc M src/sim/syscall_desc.cc M src/sim/syscall_desc.hh M src/sim/syscall_emul.cc M src/sim/syscall_emul.hh 17 files changed, 372 insertions(+), 383 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12299 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib43d3f65824f6d425260dfd9f67de1892b6e8b7c Gerrit-Change-Number: 12299 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: const for loader's loadSection param
Hello Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12301 to look at the new patch set (#8). Change subject: sim-se: const for loader's loadSection param .. sim-se: const for loader's loadSection param The port proxy can be declared as a reference to a const proxy rather than just a reference to a proxy. Change-Id: I4640b0c5f33e2334c1e7630131f78607ced40a34 --- M src/base/loader/elf_object.cc M src/base/loader/elf_object.hh M src/base/loader/object_file.cc M src/base/loader/object_file.hh 4 files changed, 9 insertions(+), 7 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12301 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I4640b0c5f33e2334c1e7630131f78607ced40a34 Gerrit-Change-Number: 12301 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Andreas Sandberg Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: do not redirect for /proc/self/exe
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12312 ) Change subject: sim-se: do not redirect for /proc/self/exe .. sim-se: do not redirect for /proc/self/exe Change-Id: I38286282759963f479efe97db5818a32b3a7dd73 --- M src/sim/syscall_emul.cc 1 file changed, 2 insertions(+), 3 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12312 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I38286282759963f479efe97db5818a32b3a7dd73 Gerrit-Change-Number: 12312 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: small refactor on pipe syscall
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12308 ) Change subject: sim-se: small refactor on pipe syscall .. sim-se: small refactor on pipe syscall Change-Id: I02ffb1c4af980554ff12ac7d11d32ba80fe261c5 --- M src/sim/syscall_emul.cc 1 file changed, 7 insertions(+), 5 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12308 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I02ffb1c4af980554ff12ac7d11d32ba80fe261c5 Gerrit-Change-Number: 12308 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: remove comment for code that moved
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12300 ) Change subject: sim-se: remove comment for code that moved .. sim-se: remove comment for code that moved The page table code must have moved from this class, because the comment no longer accurately reflects upon any of the surrounding code. Change-Id: If08a4298c1237a541d9875ddeaf3d3ecfd98e9db --- M src/arch/x86/process.hh 1 file changed, 0 insertions(+), 7 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12300 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: If08a4298c1237a541d9875ddeaf3d3ecfd98e9db Gerrit-Change-Number: 12300 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: remove Process initVirtMem member
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12304 ) Change subject: sim-se: remove Process initVirtMem member .. sim-se: remove Process initVirtMem member The MemState class has a reference to a virtual memory proxy that can be used to access the simulated address space. There is no need for the Process class to have a duplicate reference. Remove the Process initVirtMem member and use the one provided in MemState instead. Change-Id: Ifcc00759423e18975bb488bb44661d2545fd30b3 --- M src/arch/alpha/process.cc M src/arch/arm/process.cc M src/arch/mips/process.cc M src/arch/power/process.cc M src/arch/riscv/process.cc M src/arch/sparc/process.cc M src/arch/x86/process.cc M src/sim/process.cc M src/sim/process.hh 9 files changed, 107 insertions(+), 105 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12304 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ifcc00759423e18975bb488bb44661d2545fd30b3 Gerrit-Change-Number: 12304 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: generate /proc/self/maps file
Hello Alexandru Duțu, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12311 to look at the new patch set (#8). Change subject: sim-se: generate /proc/self/maps file .. sim-se: generate /proc/self/maps file This change generates /proc/self/maps for the currently running process. It assummes a system with one process and one thread per process. This is needed by the OpenCL runtime, as it calls pthread_getattr_np. Change-Id: Iee0f35842ef5571f6b0717194bc746a585a945e6 --- M configs/common/FileSystemConfig.py M src/arch/alpha/process.cc M src/arch/x86/linux/process.cc M src/arch/x86/process.cc M src/kern/linux/linux.cc M src/kern/linux/linux.hh M src/mem/vma.hh M src/sim/mem_state.cc M src/sim/mem_state.hh M src/sim/syscall_emul.hh 10 files changed, 90 insertions(+), 22 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12311 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Iee0f35842ef5571f6b0717194bc746a585a945e6 Gerrit-Change-Number: 12311 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Alexandru Duțu Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: support lazy physical page allocs
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12307 ) Change subject: sim-se: support lazy physical page allocs .. sim-se: support lazy physical page allocs This patch introduces Virtual Memory Areas (VMAs) to the Process class. Instead of binding virtual pages to physical pages during mmap/remap, we instead create a VMA that covers the region. Physical pages are allocated only if the virtual page is actually touched by the program. The binding occurs in fixupStackFault, renamed to fixupFault. Delaying the binding allows SE mode to support sparse usages of mmap. Change-Id: I2caa0f3c9622d810474ea1b1ad717820b2de9437 --- M src/base/addr_range.hh A src/base/mapped_buf.hh M src/mem/SConscript A src/mem/vma.cc A src/mem/vma.hh M src/sim/mem_state.cc M src/sim/mem_state.hh M src/sim/process.cc M src/sim/syscall_emul.cc M src/sim/syscall_emul.hh 10 files changed, 494 insertions(+), 167 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12307 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I2caa0f3c9622d810474ea1b1ad717820b2de9437 Gerrit-Change-Number: 12307 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: remove /sys from special paths
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12127 ) Change subject: sim-se: remove /sys from special paths .. sim-se: remove /sys from special paths Currently, the open system call implementation in SE mode treats /sys/ as a special path that is opened using a special open handler. The ROC runtime, however, reads several files in /sys/ that are supported via path redirection. Here we remove /sys/ from the special files so that the necessary files may be read via path redirection. Change-Id: Ifdab38ea1e6cc486ad43aec96b6e032fe63f137d --- M src/sim/syscall_emul.hh 1 file changed, 1 insertion(+), 2 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12127 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ifdab38ea1e6cc486ad43aec96b6e032fe63f137d Gerrit-Change-Number: 12127 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: add const qualifier to copy funcs
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12302 ) Change subject: sim-se: add const qualifier to copy funcs .. sim-se: add const qualifier to copy funcs The reference parameters do not need modification access so tack on the const qualifier. Change-Id: I281ba42438fd672b5bfbb1b9f7fb16aa7273d14a --- M src/sim/syscall_emul.hh 1 file changed, 3 insertions(+), 3 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12302 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I281ba42438fd672b5bfbb1b9f7fb16aa7273d14a Gerrit-Change-Number: 12302 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: add const to syscall_emul_buf params
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12303 ) Change subject: sim-se: add const to syscall_emul_buf params .. sim-se: add const to syscall_emul_buf params The parameter usage does not require the ability to modify the port proxy. Change-Id: I8c47926048bb14ed429b0656e09da3f53c941ab8 --- M src/sim/syscall_emul_buf.hh 1 file changed, 2 insertions(+), 2 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12303 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I8c47926048bb14ed429b0656e09da3f53c941ab8 Gerrit-Change-Number: 12303 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: add eventfd system call
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12125 ) Change subject: sim-se: add eventfd system call .. sim-se: add eventfd system call Change-Id: I7aeb4fe808d0c8f2fb8041e3662d330d8458f09c --- M src/arch/x86/linux/process.cc M src/sim/fd_entry.hh M src/sim/syscall_emul.hh 3 files changed, 48 insertions(+), 3 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12125 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I7aeb4fe808d0c8f2fb8041e3662d330d8458f09c Gerrit-Change-Number: 12125 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: move members of Process to MemState
Brandon Potter has uploaded a new patch set (#8). ( https://gem5-review.googlesource.com/c/public/gem5/+/12306 ) Change subject: sim-se: move members of Process to MemState .. sim-se: move members of Process to MemState This changeset moves memory-related functionality from the Process class to the MemState class. The goal is to create an object to manage the memory for Syscall Emulation Mode; ideally, that object has as much cohesion as possible. Change-Id: I5e6afecbd47e9c46998c4d6a1091d1f4fb698a71 --- M src/arch/alpha/faults.cc M src/arch/alpha/process.cc M src/arch/alpha/process.hh M src/arch/arm/linux/process.cc M src/arch/arm/process.cc M src/arch/arm/remote_gdb.cc M src/arch/arm/tlb.cc M src/arch/generic/tlb.cc M src/arch/mips/process.cc M src/arch/mips/remote_gdb.cc M src/arch/mips/tlb.cc M src/arch/power/process.cc M src/arch/power/remote_gdb.cc M src/arch/power/tlb.cc M src/arch/riscv/process.cc M src/arch/riscv/process.hh M src/arch/riscv/remote_gdb.cc M src/arch/riscv/tlb.cc M src/arch/sparc/faults.cc M src/arch/sparc/process.cc M src/arch/sparc/process.hh M src/arch/sparc/remote_gdb.cc M src/arch/x86/process.cc M src/arch/x86/process.hh M src/arch/x86/remote_gdb.cc M src/arch/x86/tlb.cc M src/cpu/thread_context.hh M src/gpu-compute/compute_unit.cc M src/gpu-compute/gpu_tlb.cc M src/gpu-compute/shader.cc M src/mem/se_translating_port_proxy.cc M src/mem/se_translating_port_proxy.hh M src/sim/SConscript M src/sim/faults.cc A src/sim/mem_state.cc M src/sim/mem_state.hh R src/sim/mem_state_impl.hh M src/sim/process.cc M src/sim/process.hh M src/sim/syscall_emul.hh 40 files changed, 893 insertions(+), 385 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12306 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I5e6afecbd47e9c46998c4d6a1091d1f4fb698a71 Gerrit-Change-Number: 12306 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: add a pseudo-filesystem
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12119 ) Change subject: sim-se: add a pseudo-filesystem .. sim-se: add a pseudo-filesystem This change introduce the concept of a pseudo-filesystem in gem5. The pseudo-filesystm works by creating a directory structure in m5out (or whichever output dir the user specifies) that system calls may be redirected to. This is useful for cases where SE mode would introduce some non-determinism due to reading files with varying path names (e.g., variation from run to run if your gem5 job is scheduled on a cluster where paths may change). It is also useful for opening files that have information specific to the host CPU, such as cache hierarchy or CPU information. This is useful when running runtimes in SE mode in the absence of a real OS kernel since many runtime layers provide system-level services to user space applications. Change-Id: I90821b3b403168b904a662fa98b85def1628621c --- A configs/common/FileSystemConfig.py M configs/common/Options.py M configs/example/se.py M src/kern/linux/linux.cc A src/sim/RedirectPath.py M src/sim/SConscript M src/sim/System.py M src/sim/process.cc M src/sim/process.hh A src/sim/redirect_path.cc A src/sim/redirect_path.hh M src/sim/syscall_emul.cc M src/sim/syscall_emul.hh M src/sim/system.cc M src/sim/system.hh 15 files changed, 593 insertions(+), 96 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12119 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I90821b3b403168b904a662fa98b85def1628621c Gerrit-Change-Number: 12119 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Andreas Sandberg Gerrit-CC: Giacomo Travaglini Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: arch-arm, sim-se: cleanup arm auxv fields
Hello Nikos Nikoleris, Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12118 to look at the new patch set (#9). Change subject: arch-arm, sim-se: cleanup arm auxv fields .. arch-arm, sim-se: cleanup arm auxv fields Change-Id: Ib4047dd3bd51ce0d0ac71d802b16085ba040e9bd --- M src/arch/arm/process.cc 1 file changed, 60 insertions(+), 62 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12118 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib4047dd3bd51ce0d0ac71d802b16085ba040e9bd Gerrit-Change-Number: 12118 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Brandon Potter Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Nikos Nikoleris Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: fix a few bugs/warns from GCC 6
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12126 ) Change subject: sim-se: fix a few bugs/warns from GCC 6 .. sim-se: fix a few bugs/warns from GCC 6 Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0 --- M src/sim/syscall_emul.cc 1 file changed, 4 insertions(+), 6 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12126 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib2ad860324fd234b23262d141be3e82628ff61f0 Gerrit-Change-Number: 12126 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: use DPRINTF_SYSCALL for ioctl/wait4
Hello Jason Lowe-Power, Alexandru Duțu, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12124 to look at the new patch set (#9). Change subject: sim-se: use DPRINTF_SYSCALL for ioctl/wait4 .. sim-se: use DPRINTF_SYSCALL for ioctl/wait4 Change-Id: I4fbaf1a0653f13ae964a2574cc26bbaac2dc0686 --- M src/sim/syscall_emul.hh 1 file changed, 3 insertions(+), 4 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12124 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I4fbaf1a0653f13ae964a2574cc26bbaac2dc0686 Gerrit-Change-Number: 12124 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Alexandru Duțu Gerrit-Reviewer: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: add socket ioctls
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12123 ) Change subject: sim-se: add socket ioctls .. sim-se: add socket ioctls The OpenMPI 1.8.2 runtime needs the ioctl code included in this patch to issue socket operations on the host machine. Change-Id: I687b31f375a846f0bab2debd9b9472605a4d2c7d --- M src/sim/syscall_emul.hh 1 file changed, 53 insertions(+), 10 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12123 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I687b31f375a846f0bab2debd9b9472605a4d2c7d Gerrit-Change-Number: 12123 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: configs: use pseudo fs with classic mem se mode
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12120 ) Change subject: configs: use pseudo fs with classic mem se mode .. configs: use pseudo fs with classic mem se mode These changes are needed so that the config scripts can report cache hierarchy information to the pseudo file-system. This is useful for the ROCm runtime when it reads special files about the HW from /proc/. Change-Id: I51af4d41c49dcf719a4a540346fe3e17b2eb95f7 --- M configs/common/CacheConfig.py M configs/example/se.py 2 files changed, 37 insertions(+), 3 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12120 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I51af4d41c49dcf719a4a540346fe3e17b2eb95f7 Gerrit-Change-Number: 12120 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Giacomo Travaglini Gerrit-CC: Jason Lowe-Power Gerrit-CC: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: configs: use pseudo fs with ruby memory in se mode
Brandon Potter has uploaded a new patch set (#9). ( https://gem5-review.googlesource.com/c/public/gem5/+/12121 ) Change subject: configs: use pseudo fs with ruby memory in se mode .. configs: use pseudo fs with ruby memory in se mode These changes are needed so that the config scripts can report cache hierarchy information to the pseudo file-system. This is useful for the ROCm runtime when it reads special files about the HW from /proc/. Change-Id: Iad3e6c088d47c9b93979f584de748367eae8259b --- M configs/ruby/MESI_Three_Level.py M configs/ruby/MESI_Two_Level.py M configs/ruby/MI_example.py M configs/ruby/MOESI_CMP_directory.py M configs/ruby/MOESI_CMP_token.py M configs/ruby/MOESI_hammer.py M configs/ruby/Ruby.py M configs/topologies/BaseTopology.py M configs/topologies/Cluster.py M configs/topologies/Crossbar.py M configs/topologies/CrossbarGarnet.py M configs/topologies/MeshDirCorners_XY.py M configs/topologies/Mesh_XY.py M configs/topologies/Mesh_westfirst.py M configs/topologies/Pt2Pt.py 15 files changed, 231 insertions(+), 10 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12121 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Iad3e6c088d47c9b93979f584de748367eae8259b Gerrit-Change-Number: 12121 Gerrit-PatchSet: 9 Gerrit-Owner: Brandon Potter Gerrit-CC: Giacomo Travaglini Gerrit-CC: Jason Lowe-Power Gerrit-CC: Nikos Nikoleris Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: sim-se: cleanup architecture specific auxv
Hello Nikos Nikoleris, Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/12118 to look at the new patch set (#8). Change subject: sim-se: cleanup architecture specific auxv .. sim-se: cleanup architecture specific auxv Change-Id: Ib4047dd3bd51ce0d0ac71d802b16085ba040e9bd --- M src/arch/arm/process.cc 1 file changed, 60 insertions(+), 62 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/12118 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: Ib4047dd3bd51ce0d0ac71d802b16085ba040e9bd Gerrit-Change-Number: 12118 Gerrit-PatchSet: 8 Gerrit-Owner: Brandon Potter Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Nikos Nikoleris Gerrit-CC: Jason Lowe-Power Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: arch-generic: Making base TLB class a MemObject
Hello Nikos Nikoleris, Giacomo Travaglini, Andreas Sandberg, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/14117 to look at the new patch set (#3). Change subject: arch-generic: Making base TLB class a MemObject .. arch-generic: Making base TLB class a MemObject Allow configuring a TLB hierarchy using ports Change-Id: I1f791829d4e072a9104e67eacf69a69de9543634 --- M src/arch/generic/BaseTLB.py M src/arch/generic/tlb.hh 2 files changed, 11 insertions(+), 5 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14117 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I1f791829d4e072a9104e67eacf69a69de9543634 Gerrit-Change-Number: 14117 Gerrit-PatchSet: 3 Gerrit-Owner: Ivan Pizarro Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Ivan Pizarro Gerrit-Reviewer: Nikos Nikoleris Gerrit-CC: Anthony Gutierrez Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Cron /z/m5/regression/do-regression quick
* build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/minor-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing-ruby: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-atomic: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/simple-timing: FAILED! * build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64f/o3-timing: FAILED! * build/ALPHA/tests/opt/quick/se/01.hello-2T-smt/alpha/linux/o3-timing-mt: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-two-level: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/minor-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing: CHANGED! * build/ALPHA/tests/opt/quick/se/03.learning-gem5/alpha/linux/learning-gem5-p1-simple: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing: CHANGED! * build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-simple: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/o3-timing: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-atomic: CHANGED! * build/MIPS/tests/opt/quick/se/03.learning-gem5/mips/linux/learning-gem5-p1-two-level: CHANGED! * build/MIPS/tests/opt/quick/se/00.hello/mips/linux/simple-timing-ruby: CHANGED! * build/ALPHA/tests/opt/quick/fs/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic: CHANGED! * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-simple-mem: CHANGED! * build/NULL/tests/opt/quick/se/80.dram-openpage/null/none/dram-lowp: CHANGED! * build/NULL/tests/opt/quick/se/80.dram-closepage/null/none/dram-lowp: CHANGED! * build/NULL/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby: CHANGED! * build/NULL/tests/opt/quick/se/70.tgen/null/none/tgen-dram-ctrl: CHANGED! * build/NULL_MOESI_hammer/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_hammer: CHANGED! * build/NULL_MESI_Two_Level/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MESI_Two_Level: CHANGED! * build/NULL_MOESI_CMP_directory/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_directory: CHANGED! * build/NULL_MOESI_CMP_token/tests/opt/quick/se/60.rubytest/null/none/rubytest-ruby-MOESI_CMP_token: CHANGED! * build/POWER/tests/opt/quick/se/00.hello/power/linux/simple-atomic: CHANGED! * build/POWER/tests/opt/quick/se/00.hello/power/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-two-level: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/03.learning-gem5/sparc/linux/learning-gem5-p1-simple: CHANGED! * build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/simple-atomic-mp: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/o3-timing: CHANGED! * build/SPARC/tests/opt/quick/se/02.insttest/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/40.m5threads-test-atomic/sparc/linux/o3-timing-mp: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/10.mcf/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic: CHANGED! * build/SPARC/tests/opt/quick/se/50.vortex/sparc/linux/simple-timing: CHANGED! * build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-atomic: CHANGED! * build/X86/tests/opt/quick/se/00.hello/x86/linux/simple-timing-ruby: CHANGED! *
[gem5-dev] Change in gem5/gem5[master]: mem-cache: A Best-Offset Prefetcher
Hello Nikos Nikoleris, krishnendra nathella, Dam Sunwoo, Daniel Carvalho, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/14820 to look at the new patch set (#5). Change subject: mem-cache: A Best-Offset Prefetcher .. mem-cache: A Best-Offset Prefetcher Michaud, P. (2015, June). A best-offset prefetcher. In 2nd Data Prefetching Championship. Change-Id: I61bb89ca5639356d54aeb04e856d5bf6e8805c22 --- M src/mem/cache/prefetch/Prefetcher.py M src/mem/cache/prefetch/SConscript A src/mem/cache/prefetch/bop.cc A src/mem/cache/prefetch/bop.hh 4 files changed, 431 insertions(+), 0 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/14820 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I61bb89ca5639356d54aeb04e856d5bf6e8805c22 Gerrit-Change-Number: 14820 Gerrit-PatchSet: 5 Gerrit-Owner: Ivan Pizarro Gerrit-Assignee: Nikos Nikoleris Gerrit-Reviewer: Dam Sunwoo Gerrit-Reviewer: Daniel Carvalho Gerrit-Reviewer: Ivan Pizarro Gerrit-Reviewer: Nikos Nikoleris Gerrit-Reviewer: krishnendra nathella Gerrit-CC: Andreas Sandberg Gerrit-CC: Juha Jäykkä Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: scons: Marshal Python sources using the same Python as gem5
Hello Gabe Black, Giacomo Travaglini, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/16422 to look at the new patch set (#2). Change subject: scons: Marshal Python sources using the same Python as gem5 .. scons: Marshal Python sources using the same Python as gem5 We currently use the Python version used by scons to marshal Python code. This doesn't work when building gem5 with Python 3 support since scons typically runs in Python 2.7. Add a custom marshal helper that links with the same library as gem5 to generate byte code that is guaranteed to work in gem5's Python interpreter. Change-Id: I665b0f2078726d4c055d74a3e668a580fc613b59 Signed-off-by: Andreas Sandberg --- M SConstruct A site_scons/site_tools/SConscript A site_scons/site_tools/marshall.cc M src/SConscript 4 files changed, 122 insertions(+), 6 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/16422 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I665b0f2078726d4c055d74a3e668a580fc613b59 Gerrit-Change-Number: 16422 Gerrit-PatchSet: 2 Gerrit-Owner: Andreas Sandberg Gerrit-Assignee: Gabe Black Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: scons: Add support for specifying Python version
Hello Gabe Black, Jason Lowe-Power, Juha Jäykkä, Giacomo Travaglini, Ciro Santilli, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/16003 to look at the new patch set (#6). Change subject: scons: Add support for specifying Python version .. scons: Add support for specifying Python version Add a sticky variable (PYTHON_CONFIG) to select which python-config version to use. This can, for example, be used to build with Python 3 or with Python 2.7 in a custom location. Change-Id: I1f4c00d66f85a9c99f50fe4d746b69dd82b60b4b Signed-off-by: Andreas Sandberg --- M SConstruct 1 file changed, 24 insertions(+), 7 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/16003 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I1f4c00d66f85a9c99f50fe4d746b69dd82b60b4b Gerrit-Change-Number: 16003 Gerrit-PatchSet: 6 Gerrit-Owner: Andreas Sandberg Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Ciro Santilli Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Juha Jäykkä Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: scons: Marshal Python sources using the same Python as gem5
Andreas Sandberg has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/16422
Change subject: scons: Marshal Python sources using the same Python as gem5
..
scons: Marshal Python sources using the same Python as gem5
We currently use the Python version used by scons to marshal Python
code. This doesn't work when building gem5 with Python 3 support since
scons typically runs in Python 2.7. Add a custom marshal helper that
links with the same library as gem5 to generate byte code that is
guaranteed to work in gem5's Python interpreter.
Change-Id: I665b0f2078726d4c055d74a3e668a580fc613b59
Signed-off-by: Andreas Sandberg
---
M src/SConscript
A src/marshall.cc
2 files changed, 76 insertions(+), 6 deletions(-)
diff --git a/src/SConscript b/src/SConscript
index a99624b..ab18494 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -1126,6 +1126,9 @@
Transform("VER TAGS")))
env.AlwaysBuild(tags)
+py_marshall = env.Program(target='marshall',
+ source=[File('marshall.cc'), ])
+
# Embed python files. All .py files that have been indicated by a
# PySource() call in a SConscript need to be embedded into the M5
# library. To do that, we compile the file to byte code, marshal the
@@ -1137,15 +1140,15 @@
return "0"
return '"%s"' % string
+from m5.util import compareVersions, readCommand
+
'''Action function to compile a .py into a code object, marshal
it, compress it, and stick it into an asm file so the code appears
as just bytes with a label in the data section'''
-src = file(str(source[0]), 'r').read()
-
+helper = File(py_marshall)
pysource = PySource.tnodes[source[0]]
-compiled = compile(src, pysource.abspath, 'exec')
-marshalled = marshal.dumps(compiled)
+marshalled = readCommand([helper[0].abspath, str(source[0])])
compressed = zlib.compress(marshalled)
data = compressed
sym = pysource.symname
@@ -1174,8 +1177,9 @@
code.write(str(target[0]))
for source in PySource.all:
-env.Command(source.cpp, source.tnode,
-MakeAction(embedPyFile, Transform("EMBED PY")))
+c = env.Command(source.cpp, source.tnode,
+MakeAction(embedPyFile, Transform("EMBED PY")))
+env.Depends(c, py_marshall)
Source(source.cpp, tags=source.tags, add_tags='python')
diff --git a/src/marshall.cc b/src/marshall.cc
new file mode 100644
index 000..2c9a753
--- /dev/null
+++ b/src/marshall.cc
@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2019 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+#include
+
+#include
+
+namespace py = pybind11;
+using namespace pybind11::literals;
+
+int
+main(int argc, char **argv) {
[gem5-dev] Change in gem5/gem5[master]: configs: simpoint-profile usable with NonCachingCPUs only
Giacomo Travaglini has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15935 )
Change subject: configs: simpoint-profile usable with NonCachingCPUs only
..
configs: simpoint-profile usable with NonCachingCPUs only
NonCachingCPU is replacing the Atomic+fastmem option.
Change-Id: I66f5c8a880d1b3fd1331871d89e8d6a229938e57
Signed-off-by: Giacomo Travaglini
Reviewed-by: Andreas Sandberg
Reviewed-on: https://gem5-review.googlesource.com/c/15935
Reviewed-by: Daniel Carvalho
Maintainer: Andreas Sandberg
---
M configs/common/CpuConfig.py
M configs/example/fs.py
M configs/example/se.py
3 files changed, 3 insertions(+), 2 deletions(-)
Approvals:
Andreas Sandberg: Looks good to me, approved; Looks good to me, approved
Daniel Carvalho: Looks good to me, approved
diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py
index f0d009e..1524b16 100644
--- a/configs/common/CpuConfig.py
+++ b/configs/common/CpuConfig.py
@@ -70,6 +70,7 @@
is_kvm_cpu = _cpu_subclass_tester("BaseKvmCPU")
is_atomic_cpu = _cpu_subclass_tester("AtomicSimpleCPU")
+is_noncaching_cpu = _cpu_subclass_tester("NonCachingSimpleCPU")
def get(name):
"""Get a CPU class from a user provided class name or alias."""
diff --git a/configs/example/fs.py b/configs/example/fs.py
index 05eca87..6be9ba2 100644
--- a/configs/example/fs.py
+++ b/configs/example/fs.py
@@ -189,7 +189,7 @@
# Sanity check
if options.simpoint_profile:
-if not CpuConfig.is_atomic_cpu(TestCPUClass):
+if not CpuConfig.is_noncaching_cpu(TestCPUClass):
fatal("SimPoint generation should be done with atomic cpu")
if np > 1:
fatal("SimPoint generation not supported with more than
one CPUs")
diff --git a/configs/example/se.py b/configs/example/se.py
index 8403066..fa9e897 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -215,7 +215,7 @@
# Sanity check
if options.simpoint_profile:
-if not CpuConfig.is_atomic_cpu(CPUClass):
+if not CpuConfig.is_noncaching_cpu(CPUClass):
fatal("SimPoint/BPProbe should be done with an atomic cpu")
if np > 1:
fatal("SimPoint generation not supported with more than one CPUs")
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15935
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I66f5c8a880d1b3fd1331871d89e8d6a229938e57
Gerrit-Change-Number: 15935
Gerrit-PatchSet: 3
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: python: Add __bool__ helpers in addition to __nonzero__
Hello Gabe Black, Jason Lowe-Power, Juha Jäykkä, Giacomo Travaglini, I'd like you to reexamine a change. Please visit https://gem5-review.googlesource.com/c/public/gem5/+/15996 to look at the new patch set (#6). Change subject: python: Add __bool__ helpers in addition to __nonzero__ .. python: Add __bool__ helpers in addition to __nonzero__ Python 3 uses __bool__ instead of __nonzero__ when performing a Boolean comparison. Change-Id: I85185bbe136ecae67346fa23569e24edd7329222 Signed-off-by: Andreas Sandberg --- M src/python/m5/params.py M src/python/m5/util/smartdict.py 2 files changed, 11 insertions(+), 3 deletions(-) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15996 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: master Gerrit-Change-Id: I85185bbe136ecae67346fa23569e24edd7329222 Gerrit-Change-Number: 15996 Gerrit-PatchSet: 6 Gerrit-Owner: Andreas Sandberg Gerrit-Assignee: Ciro Santilli Gerrit-Reviewer: Andreas Sandberg Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Juha Jäykkä Gerrit-CC: Ciro Santilli Gerrit-MessageType: newpatchset ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[master]: python: Remove uses of tuple unpacking in function params
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15991 )
Change subject: python: Remove uses of tuple unpacking in function params
..
python: Remove uses of tuple unpacking in function params
Python 3 doesn't support tuple unpacking in function parameters and
lambdas.
Change-Id: I36c72962e33a9ad37145089687834be76adb
Signed-off-by: Andreas Sandberg
Reviewed-on: https://gem5-review.googlesource.com/c/15991
Reviewed-by: Gabe Black
---
M src/python/m5/SimObject.py
1 file changed, 2 insertions(+), 2 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/src/python/m5/SimObject.py b/src/python/m5/SimObject.py
index f553fd6..20bb5fa 100644
--- a/src/python/m5/SimObject.py
+++ b/src/python/m5/SimObject.py
@@ -681,7 +681,7 @@
# the object itself, not including inherited params (which
# will also be inherited from the base class's param struct
# here). Sort the params based on their key
-params = map(lambda (k, v): v, sorted(cls._params.local.items()))
+params = map(lambda k_v: k_v[1], sorted(cls._params.local.items()))
ports = cls._ports.local
code('''#include "pybind11/pybind11.h"
@@ -777,7 +777,7 @@
# the object itself, not including inherited params (which
# will also be inherited from the base class's param struct
# here). Sort the params based on their key
-params = map(lambda (k, v): v, sorted(cls._params.local.items()))
+params = map(lambda k_v: k_v[1], sorted(cls._params.local.items()))
ports = cls._ports.local
try:
ptypes = [p.ptype for p in params]
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/15991
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I36c72962e33a9ad37145089687834be76adb
Gerrit-Change-Number: 15991
Gerrit-PatchSet: 7
Gerrit-Owner: Andreas Sandberg
Gerrit-Assignee: Ciro Santilli
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Juha Jäykkä
Gerrit-CC: Ciro Santilli
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: python: Replace deprecated repr syntax
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15989 )
Change subject: python: Replace deprecated repr syntax
..
python: Replace deprecated repr syntax
Change-Id: I5f9538cf2ca5ee17c51e7c5388d3aef363fcfa54
Signed-off-by: Andreas Sandberg
Reviewed-on: https://gem5-review.googlesource.com/c/15989
Reviewed-by: Giacomo Travaglini
---
M src/python/m5/util/grammar.py
M src/python/m5/util/multidict.py
M src/python/m5/util/sorteddict.py
3 files changed, 4 insertions(+), 4 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/src/python/m5/util/grammar.py b/src/python/m5/util/grammar.py
index fcd8df2..2d9e82c 100644
--- a/src/python/m5/util/grammar.py
+++ b/src/python/m5/util/grammar.py
@@ -134,5 +134,5 @@
def t_error(self, t):
msg = "Illegal character %s @ %d:%d" % \
-(`t.value[0]`, t.lineno, t.lexpos)
+(repr(t.value[0]), t.lineno, t.lexpos)
raise ParseError(msg, t)
diff --git a/src/python/m5/util/multidict.py
b/src/python/m5/util/multidict.py
index 58898a5..5cc13ee 100644
--- a/src/python/m5/util/multidict.py
+++ b/src/python/m5/util/multidict.py
@@ -40,7 +40,7 @@
return str(dict(self.items()))
def __repr__(self):
-return `dict(self.items())`
+return repr(dict(list(self.items(
def __contains__(self, key):
return key in self.local or key in self.parent
@@ -175,7 +175,7 @@
test2.setdefault('b', 'blah')
print(test1)
print(test2)
-print(`test2`)
+print(repr(test2))
print(len(test2))
diff --git a/src/python/m5/util/sorteddict.py
b/src/python/m5/util/sorteddict.py
index abe2837..dd534b3 100644
--- a/src/python/m5/util/sorteddict.py
+++ b/src/python/m5/util/sorteddict.py
@@ -214,7 +214,7 @@
d['y'] = 26
display(d)
-print(`d`)
+print(repr(d))
print(d.copy())
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I5f9538cf2ca5ee17c51e7c5388d3aef363fcfa54
Gerrit-Change-Number: 15989
Gerrit-PatchSet: 7
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Juha Jäykkä
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: python: Switch from using compare to key in list sort
Andreas Sandberg has submitted this change and it was merged. (
https://gem5-review.googlesource.com/c/public/gem5/+/15995 )
Change subject: python: Switch from using compare to key in list sort
..
python: Switch from using compare to key in list sort
Python 3 has deprecated the use of a comparison function in favour of
a key extraction function.
Change-Id: I4b7eab791ecbdfbf7147f57fdbc7cbe8f1de20dd
Signed-off-by: Andreas Sandberg
Reviewed-on: https://gem5-review.googlesource.com/c/15995
Reviewed-by: Gabe Black
Reviewed-by: Giacomo Travaglini
---
M src/python/m5/stats/__init__.py
1 file changed, 1 insertion(+), 6 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
Andreas Sandberg: Looks good to me, approved
diff --git a/src/python/m5/stats/__init__.py
b/src/python/m5/stats/__init__.py
index ba91f22..acb62f1 100644
--- a/src/python/m5/stats/__init__.py
+++ b/src/python/m5/stats/__init__.py
@@ -169,12 +169,7 @@
if not (stat.flags & flags.display):
stat.name = "__Stat%06d" % stat.id
-def less(stat1, stat2):
-v1 = stat1.name.split('.')
-v2 = stat2.name.split('.')
-return v1 < v2
-
-stats_list.sort(less)
+stats_list.sort(key=lambda s: s.name.split('.'))
for stat in stats_list:
stats_dict[stat.name] = stat
stat.enable()
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I4b7eab791ecbdfbf7147f57fdbc7cbe8f1de20dd
Gerrit-Change-Number: 15995
Gerrit-PatchSet: 7
Gerrit-Owner: Andreas Sandberg
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Ciro Santilli
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: Juha Jäykkä
Gerrit-MessageType: merged
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