[gem5-dev] Change in gem5/gem5[develop]: systemc: Fix verify.py and make it python 3 compatible
Yu-hsin Wang has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/44465 )
Change subject: systemc: Fix verify.py and make it python 3 compatible
..
systemc: Fix verify.py and make it python 3 compatible
1. The logger behavior change breaks verify.py.
commit 8deb205ea10d6cee0b58c46e097be46c784ed345
Author: Daniel Carvalho
Date: Wed Mar 3 16:49:05 2021 -0300
base: Add LOC to Loggers
Printing the line and the file that triggered a log
is useful for debugging.
Change-Id: I74e0637b2943049134bd3e9a4bc6cab3766591a9
Signed-off-by: Daniel R. Carvalho
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/42141
Reviewed-by: Giacomo Travaglini
Maintainer: Giacomo Travaglini
Tested-by: kokoro
2. Use bytes diff in LogChecker.
In Python3, string is required to be in a certain encoding, while in
Python2,
it is not. In the testcase, misc/cae_test/general/bitwise/or/datatypes,
it contains some invalid codepoint of utf-8, we need diff the log with
bytes in Pyhton3.
3. Python3 compatible.
* dict.iteritems -> dict.items
* remove object base class
* use `except as` when catching exceptions
* handle map and filter behavior change
Test with
src/systemc/tests/verify.py --update-json build/ARM -j `nproc` \
--filter-file src/systemc/tests/working.filt --result-file
Change-Id: Ibf5b99d08a948387cf6162c476c294c49a7dac0f
---
M src/systemc/tests/verify.py
1 file changed, 47 insertions(+), 30 deletions(-)
diff --git a/src/systemc/tests/verify.py b/src/systemc/tests/verify.py
index 6b4cf5c..95812f4 100755
--- a/src/systemc/tests/verify.py
+++ b/src/systemc/tests/verify.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python2.7
+#!/usr/bin/env python
#
# Copyright 2018 Google, Inc.
#
@@ -58,14 +58,14 @@
-class Test(object):
+class Test():
def __init__(self, target, suffix, build_dir, props):
self.target = target
self.suffix = suffix
self.build_dir = build_dir
self.props = {}
-for key, val in props.iteritems():
+for key, val in props.items():
self.set_prop(key, val)
def set_prop(self, key, val):
@@ -107,7 +107,7 @@
super(TestPhaseMeta, cls).__init__(name, bases, d)
-class TestPhaseBase(object, metaclass=TestPhaseMeta):
+class TestPhaseBase(metaclass=TestPhaseMeta):
abstract = True
def __init__(self, main_args, *args):
@@ -169,7 +169,7 @@
os.makedirs(test.m5out_dir())
try:
subprocess.check_call(cmd, cwd=os.path.dirname(test.dir()))
-except subprocess.CalledProcessError, error:
+except subprocess.CalledProcessError as error:
returncode = error.returncode
else:
returncode = 0
@@ -180,14 +180,14 @@
runnable = filter(lambda t: not t.compile_only, tests)
if j == 1:
-map(run_test, runnable)
+list(map(run_test, runnable))
else:
tp = multiprocessing.pool.ThreadPool(j)
-map(lambda t: tp.apply_async(run_test, (t,)), runnable)
+list(map(lambda t: tp.apply_async(run_test, (t,)), runnable))
tp.close()
tp.join()
-class Checker(object):
+class Checker():
def __init__(self, ref, test, tag):
self.ref = ref
self.test = test
@@ -215,6 +215,13 @@
super(DiffingChecker, self).__init__(ref, test, tag)
self.out_dir = out_dir
+def is_bytes_mode(self):
+return False
+
+def do_diff(self, ref_lines, test_lines, ref_file, test_file):
+return difflib.unified_diff(ref_lines, test_lines,
+fromfile=ref_file, tofile=test_file)
+
def diffing_check(self, ref_lines, test_lines):
test_file = os.path.basename(self.test)
ref_file = os.path.basename(self.ref)
@@ -222,11 +229,10 @@
diff_file = '.'.join([ref_file, 'diff'])
diff_path = os.path.join(self.out_dir, diff_file)
if test_lines != ref_lines:
-with open(diff_path, 'w') as diff_f:
-for line in difflib.unified_diff(
-ref_lines, test_lines,
-fromfile=ref_file,
-tofile=test_file):
+flag = 'wb' if self.is_bytes_mode() else 'w'
+with open(diff_file, flag) as diff_f:
+for line in self.do_diff(ref_lines, test_lines,
+ ref_file, test_file):
diff_f.write(line)
return False
else:
@@ -238,7 +244,17 @@
def merge_filts(*filts):
filts = map(lambda f: '(' + f + ')', filts)
filts = '|'.join(filts)
-return re.compile(filts, flags=re.MULTILINE)
+return re.compile(filts.encode('utf-8'), flags=re.MULTILINE)
+
+def is_bytes_mode(self):
+
[gem5-dev] Change in gem5/gem5[develop]: scons,systemc: In clang <= 6, -Wno-self-assign-overloaded doesn't exist.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/44385 )
Change subject: scons,systemc: In clang <= 6, -Wno-self-assign-overloaded
doesn't exist.
..
scons,systemc: In clang <= 6, -Wno-self-assign-overloaded doesn't exist.
In those versions of clang, use -Wno-self-assign.
Change-Id: Ic4f2fba6881f65fd40d0a4f3d3fb76574614b29a
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44385
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Daniel Carvalho
---
M src/systemc/core/SConscript
1 file changed, 9 insertions(+), 2 deletions(-)
Approvals:
Daniel Carvalho: Looks good to me, approved
Gabe Black: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/systemc/core/SConscript b/src/systemc/core/SConscript
index b5d0ea9..9e367ca 100644
--- a/src/systemc/core/SConscript
+++ b/src/systemc/core/SConscript
@@ -23,6 +23,10 @@
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+from m5.util import compareVersions
+
+import gem5_scons
+
Import('*')
if env['USE_SYSTEMC']:
@@ -63,6 +67,9 @@
Source('python.cc')
Source('sc_main_python.cc')
append = {}
-if env['CLANG']:
-append['CCFLAGS'] = '-Wno-self-assign-overloaded'
+with gem5_scons.Configure(main) as conf:
+for flag in
('-Wno-self-assign-overloaded', '-Wno-self-assign'):
+if conf.CheckCxxFlag(flag, autoadd=False):
+append['CCFLAGS'] = [flag]
+break
Source('sc_time_python.cc', append=append)
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Ic4f2fba6881f65fd40d0a4f3d3fb76574614b29a
Gerrit-Change-Number: 44385
Gerrit-PatchSet: 4
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: scons: Convert gem5_scons.Configure to a context manager.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/44389 )
Change subject: scons: Convert gem5_scons.Configure to a context manager.
..
scons: Convert gem5_scons.Configure to a context manager.
This has two purposes. First, SCons assumes that once you call
Configure, you won't set up the environment the Configure is based on
until after you get the environment back from it again with
conf.Finish(). We get away with this when the cache mode for config
tests is not "force", since Configure just reuses the environment we
pass in, and any changes we make are immediately communicated between
the two.
If the cache mode *is* "force" though, SCons modifies the decider so
that everything the conf environment goes to build looks like it's out
of date. It does that by cloning the original environment, and then
using that clone to do its tests. That causes a problem because we have
a long lived "conf" object and make further changes to main, and since
the two environments are now separate the one in conf doesn't see those
updates.
Second, and more subtly, we export our "main" and "env" environments so
that other SConsopts and SConscript files can use them and define things
in them. The way Configure is designed, if the config caching mode is
"force", then it will create a new environment, and then that
environment will replace what the, for instance, "main" variable points
to when "main = conf.Finish()" is executed.
Unfortunately, if we've already Export()-ed main, we've exported what
the "main" variable pointed to at that time. Our view of "main" will
track with the value that conf.Finish() returned, but since that
construction environment is mearly derived from the main we Exported and
not actually the same thing, they have diverged at that point and will
behave independently.
To solve both of these problems, this change modifies the
gem5_scons.Configure() method so that it's a context manager instead of
a regular function. As before, it will call Configure for us and create
a configuration context, which it will yield as the "with" value. When
the context exits, all the variables in the context Finish() returns
will be shoved back into the original context with Replace(). This isn't
perfect since variables which were deleted in the environment (probably
very rare in practice) will not exist and so will not overwrite the
still existent variable in the original dict.
This has several advantages. The environment never splits into two
copies which continue on independently. It makes the lifetime of a
configuration context short, which is good because behavior during that
time is tricky and unintuitive. It also makes the scope of the context
very clear, so that you won't miss the fact that you're in a special
setting and need to pay attention to what environment you're modifying.
Also, this keeps the conceptual overhead of configuration localized to
where the configuration is happening. In parts of the SConscripts which
are not doing anything with conf, etc, they don't have to modify their
behavior since no configuration context is active.
This change is based on this change from Hanhwi Jang who identified this
problem and proposed an initial solution:
https://gem5-review.googlesource.com/c/public/gem5/+/44265
Change-Id: Iae0a292d6b375c5da98619f31392ca1de6216fcd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44389
Reviewed-by: Daniel Carvalho
Reviewed-by: Hanhwi Jang
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M SConstruct
M ext/systemc/SConscript
M site_scons/gem5_scons/configure.py
M src/base/SConsopts
M src/base/stats/SConsopts
M src/cpu/kvm/SConsopts
M src/dev/net/SConsopts
M src/proto/SConsopts
M src/sim/SConsopts
9 files changed, 165 insertions(+), 178 deletions(-)
Approvals:
Hanhwi Jang: Looks good to me, approved
Daniel Carvalho: Looks good to me, but someone else must approve
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/SConstruct b/SConstruct
index b99ecdb..021883b 100755
--- a/SConstruct
+++ b/SConstruct
@@ -289,10 +289,6 @@
# compiler we're using.
main['TCMALLOC_CCFLAGS'] = []
-# Platform-specific configuration. Note again that we assume that all
-# builds under a given build root run on the same host platform.
-conf = gem5_scons.Configure(main)
-
CXX_version = readCommand([main['CXX'], '--version'], exception=False)
main['GCC'] = CXX_version and CXX_version.find('g++') >= 0
@@ -320,7 +316,8 @@
# On FreeBSD we need libthr.
main.Append(LIBS=['thr'])
-conf.CheckLinkFlag('-Wl,--as-needed')
+with gem5_scons.Configure(main) as conf:
+conf.CheckLinkFlag('-Wl,--as-needed')
if GetOption('gold_linker'):
main.Append(LINKFLAGS='-fuse-ld=gold')
@@ -379,8 +376,9 @@
main[var] = ['-flto']
# clang has a few additional warnings that we disable.
-
[gem5-dev] Change in gem5/gem5[develop]: util: Add missing parameter for print_insts
Hoa Nguyen has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/8 ) Change subject: util: Add missing parameter for print_insts .. util: Add missing parameter for print_insts JIRA: https://gem5.atlassian.net/browse/GEM5-949 Change-Id: I74fe7adc06124d193f17d682882766484ac18528 Signed-off-by: Hoa Nguyen --- M util/o3-pipeview.py 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/util/o3-pipeview.py b/util/o3-pipeview.py index 11e86a7..630c536 100755 --- a/util/o3-pipeview.py +++ b/util/o3-pipeview.py @@ -129,7 +129,8 @@ if fields[1] == 'fetch': if ((stop_tick > 0 and int(fields[2]) > stop_tick+insts['tick_drift']) or (stop_sn > 0 and int(fields[5]) > (stop_sn+insts['max_threshold']))): -print_insts(outfile, cycle_time, width, color, timestamps, 0) +print_insts(outfile, cycle_time, width, color, timestamps, +store_completions, 0) return (curr_inst['pc'], curr_inst['upc']) = fields[3:5] curr_inst['sn'] = int(fields[5]) -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/8 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I74fe7adc06124d193f17d682882766484ac18528 Gerrit-Change-Number: 8 Gerrit-PatchSet: 1 Gerrit-Owner: Hoa Nguyen Gerrit-MessageType: newchange ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: util: Make o3-pipeview Python3 compatible
Hoa Nguyen has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/7 )
Change subject: util: Make o3-pipeview Python3 compatible
..
util: Make o3-pipeview Python3 compatible
Change-Id: I48cb0bfb784eafe2057eb1095e6aad7abf9a1bc9
Signed-off-by: Hoa Nguyen
---
M util/o3-pipeview.py
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/util/o3-pipeview.py b/util/o3-pipeview.py
index 2401e8f..11e86a7 100755
--- a/util/o3-pipeview.py
+++ b/util/o3-pipeview.py
@@ -148,10 +148,6 @@
fields = line.split(':')
-#Sorts out instructions according to sequence number
-def compare_by_sn(a, b):
-return cmp(a['sn'], b['sn'])
-
# Puts new instruction into the print queue.
# Sorts out and prints instructions when their number reaches threshold
value
def queue_inst(outfile, inst, cycle_time, width, color, timestamps,
store_completions):
@@ -164,7 +160,8 @@
# Sorts out and prints instructions in print queue
def print_insts(outfile, cycle_time, width, color, timestamps,
store_completions, lower_threshold):
global insts
-insts['queue'].sort(compare_by_sn)
+# sort the list of insts by sequence numbers
+insts['queue'].sort(key=lambda inst: inst['sn'])
while len(insts['queue']) > lower_threshold:
print_item=insts['queue'].pop(0)
# As the instructions are processed out of order the main loop
starts
@@ -223,7 +220,7 @@
# Print
time_width = width * cycle_time
-base_tick = (inst['fetch'] / time_width) * time_width
+base_tick = (inst['fetch'] // time_width) * time_width
# Find out the time of the last event - it may not
# be 'retire' if the instruction is not comlpeted.
@@ -237,7 +234,7 @@
if ((last_event_time - inst['fetch']) < time_width):
num_lines = 1 # compact form
else:
-num_lines = ((last_event_time - base_tick) / time_width) + 1
+num_lines = ((last_event_time - base_tick) // time_width) + 1
curr_color = termcap.Normal
@@ -267,7 +264,7 @@
if (stages[event[2]]['name'] == 'dispatch' and
inst['dispatch'] == inst['issue']):
continue
-outfile.write(curr_color + dot * ((event[0] / cycle_time) -
pos))
+outfile.write(curr_color + dot * ((event[0] // cycle_time) -
pos))
outfile.write(stages[event[2]]['color'] +
stages[event[2]]['shorthand'])
@@ -276,7 +273,7 @@
else:
curr_color = termcap.Normal
-pos = (event[0] / cycle_time) + 1
+pos = (event[0] // cycle_time) + 1
outfile.write(curr_color + dot * (width - pos) + termcap.Normal +
']-(' + str(base_tick + i * time_width).rjust(15)
+ ') ')
if i == 0:
--
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Gerrit-Change-Id: I48cb0bfb784eafe2057eb1095e6aad7abf9a1bc9
Gerrit-Change-Number: 7
Gerrit-PatchSet: 1
Gerrit-Owner: Hoa Nguyen
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[gem5-dev] Change in gem5/gem5[develop]: tests: Use MatchFileRegex vierifier for realview regressions
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/6 )
Change subject: tests: Use MatchFileRegex vierifier for realview regressions
..
tests: Use MatchFileRegex vierifier for realview regressions
We have seen cases where the primary CPU was not able to bootstrap the
secondary CPUs in multicore tests (dual). The Linux booting process
"quietly" gives up (no panic) and it completes the booting without
bringing up the seondary CPU(s). This makes the dual test useless as it
is supposed to test SMP setups.
By adding a MatchFileRegex verifier, we make sure we are able to catch
these cases, correctly raising an error if not all CPUs are available.
We do this by inspecting the kernel log for the following print:
"CPU1: Booted secondary processor"
There are probably more resilient alternatives to a regex based check,
but those require a less minimal rootfs (the current
m5_exit.squashfs.arm64 FS has a single /sbin/init binary executing a
simple m5 exit operation)
Signed-off-by: Giacomo Travaglini
Change-Id: I37e0882967443449d5fedfe3963bd25528a030f8
---
M tests/gem5/fs/linux/arm/test.py
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/tests/gem5/fs/linux/arm/test.py
b/tests/gem5/fs/linux/arm/test.py
index 4167426..de35b9c 100644
--- a/tests/gem5/fs/linux/arm/test.py
+++ b/tests/gem5/fs/linux/arm/test.py
@@ -41,6 +41,8 @@
from testlib import *
+import re
+
arm_fs_kvm_tests = [
'realview64-kvm',
'realview64-kvm-dual',
@@ -102,6 +104,15 @@
def support_kvm():
return os.access("/dev/kvm", os.R_OK | os.W_OK)
+def verifier_list(name):
+verifiers=[]
+if "dual" in name:
+verifiers.append(verifier.MatchFileRegex(
+re.compile(r'.*CPU1: Booted secondary processor.*'),
+["system.terminal"]))
+
+return verifiers
+
for name in arm_fs_quick_tests:
if name in arm_fs_kvm_tests:
# The current host might not be supporting KVM
@@ -121,7 +132,7 @@
]
gem5_verify_config(
name=name,
-verifiers=(), # Add basic stat verifiers
+verifiers=verifier_list(name), # Add basic stat verifiers
config=joinpath(filepath, 'run.py'),
config_args=args,
valid_isas=(constants.arm_tag,),
@@ -138,7 +149,7 @@
]
gem5_verify_config(
name=name,
-verifiers=(), # TODO: Add basic stat verifiers
+verifiers=verifier_list(name), # TODO: Add basic stat verifiers
config=joinpath(filepath, 'run.py'),
config_args=args,
valid_isas=(constants.arm_tag,),
--
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Gerrit-Change-Number: 6
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[gem5-dev] Change in gem5/gem5[develop]: tests: Define a MatchFileRegex verifier
Giacomo Travaglini has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/5 )
Change subject: tests: Define a MatchFileRegex verifier
..
tests: Define a MatchFileRegex verifier
Using it as a base class for MatchRegex.
While the latter is using a regex to scan the stdout and stderr files,
MatchFileRegex is more generically allowing you to specify which file to
scan at __init__ time.
Signed-off-by: Giacomo Travaglini
Change-Id: I2a64dab9c88a632b0a6b400ba02aafe473b3e62d
---
M tests/gem5/verifier.py
1 file changed, 43 insertions(+), 18 deletions(-)
diff --git a/tests/gem5/verifier.py b/tests/gem5/verifier.py
index 60d44f3..b539a67 100644
--- a/tests/gem5/verifier.py
+++ b/tests/gem5/verifier.py
@@ -1,3 +1,15 @@
+# Copyright (c) 2021 Arm Limited
+# All rights reserved
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
# Copyright (c) 2017 Mark D. Hill and David A. Wood
# All rights reserved.
#
@@ -161,34 +173,47 @@
re.compile(r'''^\s*"(cwd|input|codefile)":'''),
)
-class MatchRegex(Verifier):
-def __init__(self, regex, match_stderr=True, match_stdout=True):
-super(MatchRegex, self).__init__()
+class MatchFileRegex(Verifier):
+"""
+Looking for a match between a regex pattern and the content of a list
+of files. Verifier will pass as long as the pattern is found in at
least
+one of the files.
+"""
+def __init__(self, regex, filenames):
+super(MatchFileRegex, self).__init__()
self.regex = _iterable_regex(regex)
-self.match_stderr = match_stderr
-self.match_stdout = match_stdout
+self.filenames = filenames
+
+def parse_file(self, fname):
+with open(fname, 'r') as file_:
+for line in file_:
+for regex in self.regex:
+if re.match(regex, line):
+return True
def test(self, params):
fixtures = params.fixtures
# Get the file from the tempdir of the test.
tempdir = fixtures[constants.tempdir_fixture_name].path
-def parse_file(fname):
-with open(fname, 'r') as file_:
-for line in file_:
-for regex in self.regex:
-if re.match(regex, line):
-return True
-if self.match_stdout:
-if parse_file(joinpath(tempdir,
- constants.gem5_simulation_stdout)):
+for fname in self.filenames:
+if self.parse_file(joinpath(tempdir, fname)):
return # Success
-if self.match_stderr:
-if parse_file(joinpath(tempdir,
- constants.gem5_simulation_stderr)):
-return # Success
+
test_util.fail('Could not match regex.')
+class MatchRegex(MatchFileRegex):
+"""
+Looking for a match between a regex pattern and stdout/stderr.
+"""
+def __init__(self, regex, match_stderr=True, match_stdout=True):
+filenames = list()
+if match_stdout:
+filenames.append(constants.gem5_simulation_stdout)
+if match_stderr:
+filenames.append(constants.gem5_simulation_stderr)
+super(MatchRegex, self).__init__(regex, filenames)
+
_re_type = type(re.compile(''))
def _iterable_regex(regex):
if isinstance(regex, _re_type) or isinstance(regex, str):
--
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Gerrit-Change-Number: 5
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Gerrit-Owner: Giacomo Travaglini
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[gem5-dev] Change in gem5/gem5[develop]: tests: Add realview-kvm-dual regression
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/44326 )
Change subject: tests: Add realview-kvm-dual regression
..
tests: Add realview-kvm-dual regression
This is to test multiple KVM vCPUs
Signed-off-by: Giacomo Travaglini
Change-Id: Ied4f578bcf8d30f9c1738aa1c4265220e78589e9
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44326
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
A tests/gem5/configs/realview64-kvm-dual.py
M tests/gem5/fs/linux/arm/test.py
2 files changed, 48 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/tests/gem5/configs/realview64-kvm-dual.py
b/tests/gem5/configs/realview64-kvm-dual.py
new file mode 100644
index 000..c97240a
--- /dev/null
+++ b/tests/gem5/configs/realview64-kvm-dual.py
@@ -0,0 +1,46 @@
+# Copyright (c) 2020, 2021 Arm Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+from m5.objects import *
+from arm_generic import *
+from m5.ticks import fixGlobalFrequency, fromSeconds
+
+root = LinuxArmFSSystem(mem_mode='atomic_noncaching',
+machine_type='VExpress_GEM5_V1',
+mem_class=SimpleMemory,
+cpu_class=ArmV8KvmCPU,
+num_cpus=2).create_root()
+fixGlobalFrequency()
+root.sim_quantum = fromSeconds(m5.util.convert.anyToLatency("1ms"))
diff --git a/tests/gem5/fs/linux/arm/test.py
b/tests/gem5/fs/linux/arm/test.py
index b02d1af..4167426 100644
--- a/tests/gem5/fs/linux/arm/test.py
+++ b/tests/gem5/fs/linux/arm/test.py
@@ -1,4 +1,4 @@
-# Copyright (c) 2019-2020 ARM Limited
+# Copyright (c) 2019-2021 Arm Limited
# All rights reserved
#
# The license below extends only to copyright in the software and shall
@@ -43,6 +43,7 @@
arm_fs_kvm_tests = [
'realview64-kvm',
+'realview64-kvm-dual',
]
arm_fs_quick_tests = [
--
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Gerrit-Change-Id: Ied4f578bcf8d30f9c1738aa1c4265220e78589e9
Gerrit-Change-Number: 44326
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Bobby R. Bruce
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: tests: Allow multi-KvmCPU regressions
Giacomo Travaglini has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/44325 ) Change subject: tests: Allow multi-KvmCPU regressions .. tests: Allow multi-KvmCPU regressions Signed-off-by: Giacomo Travaglini Change-Id: I3207074e794385528b680e54eaa9a536aef9eb43 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44325 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M tests/gem5/configs/base_config.py 1 file changed, 24 insertions(+), 4 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/gem5/configs/base_config.py b/tests/gem5/configs/base_config.py index b18cecf..80bfa2d 100644 --- a/tests/gem5/configs/base_config.py +++ b/tests/gem5/configs/base_config.py @@ -125,6 +125,26 @@ cpu.connectAllPorts(sha_bus if sha_bus != None else system.membus, system.membus) +def init_kvm_cpus(self, cpus): +""" +Assign KVM CPUs to their own event queues / threads. This +has to be done after creating caches and other child objects +since these mustn't inherit the CPU event queue. + +Arguments: + cpus -- List of cpus +""" +if len(cpus) > 1: +device_eq = 0 +first_cpu_eq = 1 +for idx, cpu in enumerate(cpus): +# Child objects usually inherit the parent's event +# queue. Override that and use the same event queue for +# all devices. +for obj in cpu.descendants(): +obj.eventq_index = device_eq +cpu.eventq_index = first_cpu_eq + idx + def init_kvm(self, system): """Do KVM-specific system initialization. @@ -142,10 +162,6 @@ self.create_clk_src(system) system.cpu = self.create_cpus(system.cpu_clk_domain) -if _have_kvm_support and \ -any([isinstance(c, BaseKvmCPU) for c in system.cpu]): -self.init_kvm(system) - if self.use_ruby: # Add the ruby specific and protocol specific options parser = optparse.OptionParser() @@ -181,6 +197,10 @@ for cpu in system.cpu: self.init_cpu(system, cpu, sha_bus) +if _have_kvm_support and \ +any([isinstance(c, BaseKvmCPU) for c in system.cpu]): +self.init_kvm(system) +self.init_kvm_cpus(system.cpu) def create_clk_src(self,system): # Create system clock domain. This provides clock value to every -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/44325 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I3207074e794385528b680e54eaa9a536aef9eb43 Gerrit-Change-Number: 44325 Gerrit-PatchSet: 2 Gerrit-Owner: Giacomo Travaglini Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list -- gem5-dev@gem5.org To unsubscribe send an email to gem5-dev-le...@gem5.org %(web_page_url)slistinfo%(cgiext)s/%(_internal_name)s
[gem5-dev] Change in gem5/gem5[develop]: fastmodel: Call the base class initFromIrisInstance in the R52.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/43545 )
Change subject: fastmodel: Call the base class initFromIrisInstance in the
R52.
..
fastmodel: Call the base class initFromIrisInstance in the R52.
In the CortexR52 model in the initFromIrisInstance method, call into
the base classes version of that function to ensure some basic, common
setup is performed.
Change-Id: I43198578ce1057d63d8e72d66b5370bf4d1ccd4d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/43545
Reviewed-by: Giacomo Travaglini
Maintainer: Giacomo Travaglini
Tested-by: kokoro
---
M src/arch/arm/fastmodel/CortexR52/thread_context.cc
1 file changed, 2 insertions(+), 0 deletions(-)
Approvals:
Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/fastmodel/CortexR52/thread_context.cc
b/src/arch/arm/fastmodel/CortexR52/thread_context.cc
index e8e0aa7..fbf6b03 100644
--- a/src/arch/arm/fastmodel/CortexR52/thread_context.cc
+++ b/src/arch/arm/fastmodel/CortexR52/thread_context.cc
@@ -82,6 +82,8 @@
void
CortexR52TC::initFromIrisInstance(const ResourceMap )
{
+ThreadContext::initFromIrisInstance(resources);
+
pcRscId = extractResourceId(resources, "R15");
extractResourceMap(intReg32Ids, resources, intReg32IdxNameMap);
--
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Gerrit-Change-Id: I43198578ce1057d63d8e72d66b5370bf4d1ccd4d
Gerrit-Change-Number: 43545
Gerrit-PatchSet: 2
Gerrit-Owner: Gabe Black
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Sudhanshu Jha
Gerrit-Reviewer: kokoro
Gerrit-CC: Earl Ou
Gerrit-CC: Yu-hsin Wang
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: dev: Fix compilation errors
Daniel Carvalho has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/44366 )
Change subject: dev: Fix compilation errors
..
dev: Fix compilation errors
'backing' was initialized after being used.
'buffer' was initialized after its data() was used
by the constructor.
Change-Id: I0f8d0f6efb5d4b7abc5fc6c2c3ecca2c9b0a2eaf
Signed-off-by: Daniel R. Carvalho
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44366
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/dev/reg_bank.hh
M src/dev/reg_bank.test.cc
2 files changed, 27 insertions(+), 7 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/dev/reg_bank.hh b/src/dev/reg_bank.hh
index 7abe02c..5dee49e 100644
--- a/src/dev/reg_bank.hh
+++ b/src/dev/reg_bank.hh
@@ -30,6 +30,8 @@
#include
#include
+#include
+#include
#include
#include
#include
@@ -432,6 +434,21 @@
// The buffer's owner is responsible for serializing it.
void serialize(std::ostream ) const override {}
bool unserialize(const std::string ) override { return true; }
+
+ protected:
+/**
+ * This method exists so that derived classes that need to
initialize
+ * their buffers before they can be set can do so.
+ *
+ * @param buf The pointer to the backing buffer.
+ */
+void
+setBuffer(void *buf)
+{
+assert(_ptr == nullptr);
+assert(buf != nullptr);
+_ptr = buf;
+}
};
// Same as above, but which keeps its storage locally.
@@ -442,8 +459,10 @@
std::array buffer;
RegisterLBuf(const std::string _name) :
-RegisterBuf(new_name, buffer.data(), BufBytes)
-{}
+RegisterBuf(new_name, nullptr, BufBytes)
+{
+this->setBuffer(buffer.data());
+}
void
serialize(std::ostream ) const override
diff --git a/src/dev/reg_bank.test.cc b/src/dev/reg_bank.test.cc
index 78fc9e6..088f1f3 100644
--- a/src/dev/reg_bank.test.cc
+++ b/src/dev/reg_bank.test.cc
@@ -244,16 +244,17 @@
protected:
static constexpr size_t RegSize = 4;
-RegisterBankLE::RegisterBuf reg;
-
std::array buf;
std::array backing;
+RegisterBankLE::RegisterBuf reg;
+
public:
-RegisterBufTest() : reg("buf_reg", backing.data() + RegSize, RegSize),
-buf{0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa, 0xb, 0xc},
+RegisterBufTest()
+ : buf{0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa, 0xb, 0xc},
backing{0x10, 0x20, 0x30, 0x40, 0x50, 0x60,
-0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0}
+0x70, 0x80, 0x90, 0xa0, 0xb0, 0xc0},
+reg("buf_reg", backing.data() + RegSize, RegSize)
{}
};
// Needed by C++14 and lower
--
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Gerrit-Change-Number: 44366
Gerrit-PatchSet: 3
Gerrit-Owner: Daniel Carvalho
Gerrit-Reviewer: Daniel Carvalho
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: Jason Lowe-Power
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-x86: Fixed locked cmpxchg8b allows reordering
Eduardo José Gómez Hernández has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/44166 )
Change subject: arch-x86: Fixed locked cmpxchg8b allows reordering
..
arch-x86: Fixed locked cmpxchg8b allows reordering
Locked versions of cmpxcgh8b (and cmpxcgh16b) should
be guarded by mfences to prevent reordering from
surrounding memory instructions.
Change-Id: I4a04bb871b4f9a38efd78df194b43f785d5d2236
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/44166
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/arch/x86/isa/insts/general_purpose/semaphores.py
1 file changed, 6 insertions(+), 0 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/x86/isa/insts/general_purpose/semaphores.py
b/src/arch/x86/isa/insts/general_purpose/semaphores.py
index de7c6ef..aae67fa 100644
--- a/src/arch/x86/isa/insts/general_purpose/semaphores.py
+++ b/src/arch/x86/isa/insts/general_purpose/semaphores.py
@@ -132,6 +132,7 @@
def macroop CMPXCHG8B_%(suffix)s {
.adjust_env clampOsz
%(rdip)s
+%(mfence)s
lea t1, seg, %(sib)s, disp, dataSize=asz
ldsplit%(l)s (t2, t3), seg, [1, t0, t1], disp=0
@@ -150,20 +151,25 @@
# Write to memory
stsplit%(ul)s (t2, t3), seg, [1, t0, t1], disp=0
+%(mfence)s
};
'''
microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
"l": "", "ul": "",
+ "mfence": "",
"suffix": "M"}
microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
"l": "", "ul": "",
+ "mfence": "",
"suffix": "P"}
microcode += cmpxchg8bCode % {"rdip": "", "sib": "sib",
"l": "l", "ul": "ul",
+ "mfence": "mfence",
"suffix": "LOCKED_M"}
microcode += cmpxchg8bCode % {"rdip": "rdip t7", "sib": "riprel",
"l": "l", "ul": "ul",
+ "mfence": "mfence",
"suffix": "LOCKED_P"}
#let {{
--
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Gerrit-Change-Number: 44166
Gerrit-PatchSet: 3
Gerrit-Owner: Eduardo José Gómez Hernández
Gerrit-Reviewer: Eduardo José Gómez Hernández
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: systemc: Elimnate ClockTick duplicated name warning
Yu-hsin Wang has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/44425 )
Change subject: systemc: Elimnate ClockTick duplicated name warning
..
systemc: Elimnate ClockTick duplicated name warning
In systemc, a module name is consist of hierarchy names with dot
separated. The basename is the last part of the module name. Because
lack of hierarchy information, it's a chance that the basename is
duplicated. Although, ClockTick is using sc_gen_unique_name to solve
this, the warning from sc_gen_unique_name is annoying. To solve this
completely, we should use the full module name to construct the name of
ClockTick.
Change-Id: Ie664fe4757a05f72860be49c3a9d1172f824eb2e
---
M src/systemc/channel/sc_clock.cc
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/systemc/channel/sc_clock.cc
b/src/systemc/channel/sc_clock.cc
index 137a7a1..bf48b82 100644
--- a/src/systemc/channel/sc_clock.cc
+++ b/src/systemc/channel/sc_clock.cc
@@ -54,7 +54,7 @@
ClockTick(::sc_core::sc_clock *clock, bool to,
::sc_core::sc_time _period) :
ScEvent([this]() { tick(); }),
-_period(_period), name(clock->basename()), p(nullptr),
+_period(_period), name(clock->name()), p(nullptr),
funcWrapper(clock, to ? &::sc_core::sc_clock::tickUp :
&::sc_core::sc_clock::tickDown)
{
--
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Gerrit-PatchSet: 1
Gerrit-Owner: Yu-hsin Wang
Gerrit-MessageType: newchange
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