[gem5-dev] Change in gem5/gem5[develop]: configs: Improve error message of missing files

[Hoa Nguyen (Gerrit) via gem5-dev]

Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45105 )


Change subject: configs: Improve error message of missing files
..

configs: Improve error message of missing files

In PathSearchFunc.__call__(), filename is the name of the file
while filepath contains the relative path to the missing file
relative to $M5_PATH.

Outputing the filepath in the error message makes the error
message more useful as it provides the expected location of
the file as well as the name of the file.

Change-Id: I5f1fdb9e48ac9ae59a26d1a4a40bc9ff9acd
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45105
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M configs/common/SysPaths.py
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/configs/common/SysPaths.py b/configs/common/SysPaths.py
index 2b2fca3..762efaf 100644
--- a/configs/common/SysPaths.py
+++ b/configs/common/SysPaths.py
@@ -70,7 +70,7 @@
 return next(p for p in paths if os.path.exists(p))
 except StopIteration:
 raise IOError("Can't find file '{}' on {}."
-.format(filename, self.environment_variable))
+.format(filepath, self.environment_variable))

 disk = PathSearchFunc('disks')
 binary = PathSearchFunc('binaries')



1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the  
submitted one.

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5f1fdb9e48ac9ae59a26d1a4a40bc9ff9acd
Gerrit-Change-Number: 45105
Gerrit-PatchSet: 3
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: sim: Add serialization for host backed files

[Tom Rollet (Gerrit) via gem5-dev]

Tom Rollet has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46619 )



Change subject: sim: Add serialization for host backed files
..

sim: Add serialization for host backed files

Change-Id: I4d0c7cd614a8abaffcae9aba1a28c9fdbc023c5a
---
M src/sim/fd_array.cc
M src/sim/fd_array.hh
M src/sim/fd_entry.cc
M src/sim/fd_entry.hh
M src/sim/process.cc
M src/sim/syscall_emul.hh
6 files changed, 132 insertions(+), 18 deletions(-)



diff --git a/src/sim/fd_array.cc b/src/sim/fd_array.cc
index 364bd10..d0eb9e0 100644
--- a/src/sim/fd_array.cc
+++ b/src/sim/fd_array.cc
@@ -348,3 +348,84 @@

 return status;
 }
+
+void
+FDArray::serialize(CheckpointOut ) const {
+ScopedCheckpointSection sec(cp, "fdarray");
+paramOut(cp, "size", _fdArray.size());
+for (int tgt_fd = 0; tgt_fd < _fdArray.size(); tgt_fd++) {
+auto fd = _fdArray[tgt_fd];
+ScopedCheckpointSection sec(cp, csprintf("Entry%d", tgt_fd));
+if (!fd) {
+paramOut(cp, "class", FDEntry::FDClass::fd_null);
+continue;
+}
+paramOut(cp, "class", fd->getClass());
+fd->serialize(cp);
+}
+}
+
+void
+FDArray::unserialize(CheckpointIn ) {
+ScopedCheckpointSection sec(cp, "fdarray");
+uint64_t size;
+paramIn(cp, "size", size);
+assert(_fdArray.size() == size &&
+"FDArray sizes do not match at unserialize!");
+
+for (int tgt_fd = 0; tgt_fd < _fdArray.size(); tgt_fd++) {
+if (tgt_fd == STDIN_FILENO || tgt_fd == STDOUT_FILENO ||
+tgt_fd == STDERR_FILENO)
+continue;
+ScopedCheckpointSection sec(cp, csprintf("Entry%d", tgt_fd));
+FDEntry::FDClass fd_class;
+paramIn(cp, "class", fd_class);
+std::shared_ptr fdep;
+
+switch (fd_class) {
+case FDEntry::FDClass::fd_base:
+panic("Abstract fd entry was serialized");
+break;
+case FDEntry::FDClass::fd_hb:
+fdep = std::make_shared(0, 0);
+break;
+case FDEntry::FDClass::fd_file:
+fdep = std::make_shared(0, 0, "", 0, 00);
+break;
+case FDEntry::FDClass::fd_device:
+fdep = std::make_shared(nullptr, "");
+break;
+case FDEntry::FDClass::fd_pipe:
+fdep = std::make_shared(
+0, 0, PipeFDEntry::EndType::read);
+break;
+case FDEntry::FDClass::fd_socket:
+fdep = std::make_shared(0, 0, 0, 0);
+break;
+case FDEntry::FDClass::fd_null:
+continue;
+default:
+panic("Unrecognized fd class");
+break;
+}
+
+fdep->unserialize(cp);
+
+auto this_ffd = std::dynamic_pointer_cast(fdep);
+if (!this_ffd)
+continue;
+setFDEntry(tgt_fd, fdep);
+
+mode_t mode = this_ffd->getFileMode();
+std::string const& path = this_ffd->getFileName();
+int flags = this_ffd->getFlags();
+
+// Re-open the file and assign a new sim_fd
+int sim_fd = openFile(path, flags, mode);
+this_ffd->setSimFD(sim_fd);
+
+// Restore the file offset to the proper value
+uint64_t file_offset = this_ffd->getFileOffset();
+lseek(sim_fd, file_offset, SEEK_SET);
+}
+}
diff --git a/src/sim/fd_array.hh b/src/sim/fd_array.hh
index 5295566..e80673f 100644
--- a/src/sim/fd_array.hh
+++ b/src/sim/fd_array.hh
@@ -40,8 +40,9 @@
 #include 

 #include "sim/fd_entry.hh"
+#include "sim/serialize.hh"

-class FDArray
+class FDArray : public Serializable
 {
   public:
 /**
@@ -111,6 +112,12 @@
  */
 int closeFDEntry(int tgt_fd);

+/*
+ * Serialization methods for file descriptors
+ */
+void serialize(CheckpointOut ) const override;
+void unserialize(CheckpointIn ) override;
+
   private:
 /**
  * Help clarify our intention when opening files in the init and
diff --git a/src/sim/fd_entry.cc b/src/sim/fd_entry.cc
index 02677d6..6861a94 100644
--- a/src/sim/fd_entry.cc
+++ b/src/sim/fd_entry.cc
@@ -54,6 +54,7 @@
 SERIALIZE_SCALAR(_flags);
 SERIALIZE_SCALAR(_fileName);
 SERIALIZE_SCALAR(_fileOffset);
+SERIALIZE_SCALAR(_mode);
 }

 void
@@ -63,6 +64,7 @@
 UNSERIALIZE_SCALAR(_flags);
 UNSERIALIZE_SCALAR(_fileName);
 UNSERIALIZE_SCALAR(_fileOffset);
+UNSERIALIZE_SCALAR(_mode);
 }

 void
diff --git a/src/sim/fd_entry.hh b/src/sim/fd_entry.hh
index c24710d..50a9e60 100644
--- a/src/sim/fd_entry.hh
+++ b/src/sim/fd_entry.hh
@@ -42,6 +42,7 @@

 class EmulatedDriver;

+
 /**
  * Holds a single file descriptor mapping and that mapping's data for
  * processes running in syscall emulation mode.
@@ -49,14 +50,28 @@
 class FDEntry : public Serializable
 {
   public:
+
+enum 

[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: fix dispatch assert triggering on debug mode

[Tom Rollet (Gerrit) via gem5-dev]

Tom Rollet has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46600 )



Change subject: cpu-o3: fix dispatch assert triggering on debug mode
..

cpu-o3: fix dispatch assert triggering on debug mode

On configs with renameWidth > dispatchWidth, on receiving
renameWidth number of only squashed instructions:
the dispatch stage will not be able to treat all instructions.
Some squashed instructions will then remain in the 'inst' buffer
after the dispatch stage.

'validInstsFromRename' function don't take into account squashed
instructions, thus the remaining squashed instructions are
not moved to the skid buffer.

The cycle after, the assert in sortInsts will trigger(on debug mode)
because the 'inst' buffer is not empty.

Change-Id: I1a1ed5a7f040041363bd1b2c7bf10c85eb7febaf
---
M src/cpu/o3/iew.cc
M src/cpu/o3/iew.hh
2 files changed, 6 insertions(+), 10 deletions(-)



diff --git a/src/cpu/o3/iew.cc b/src/cpu/o3/iew.cc
index b53e389..4c97e2d 100644
--- a/src/cpu/o3/iew.cc
+++ b/src/cpu/o3/iew.cc
@@ -591,14 +591,12 @@
 }

 unsigned
-IEW::validInstsFromRename()
+IEW::instsFromRename()
 {
 unsigned inst_count = 0;

-for (int i=0; isize; i++) {
-if (!fromRename->insts[i]->isSquashed())
-inst_count++;
-}
+for (int i = 0; i < fromRename->size; i++)
+inst_count++;

 return inst_count;
 }
@@ -875,7 +873,7 @@

 ++iewStats.unblockCycles;

-if (validInstsFromRename()) {
+if (instsFromRename()) {
 // Add the current inputs to the skid buffer so they can be
 // reprocessed when this stage unblocks.
 skidInsert(tid);
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh
index 5049eb4..d4e50e4 100644
--- a/src/cpu/o3/iew.hh
+++ b/src/cpu/o3/iew.hh
@@ -271,10 +271,8 @@
  */
 void writebackInsts();

-/** Returns the number of valid, non-squashed instructions coming from
- * rename to dispatch.
- */
-unsigned validInstsFromRename();
+/** Returns the number of instructions coming from rename to dispatch.  
*/

+unsigned instsFromRename();

 /** Checks if any of the stall conditions are currently true. */
 bool checkStall(ThreadID tid);

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I1a1ed5a7f040041363bd1b2c7bf10c85eb7febaf
Gerrit-Change-Number: 46600
Gerrit-PatchSet: 1
Gerrit-Owner: Tom Rollet 
Gerrit-MessageType: newchange
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[gem5-dev] Change in gem5/gem5[develop]: cpu: fix commit DPRINTF ROB arguments order

[Tom Rollet (Gerrit) via gem5-dev]

Tom Rollet has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46599 )



Change subject: cpu: fix commit DPRINTF ROB arguments order
..

cpu: fix commit DPRINTF ROB arguments order

Change-Id: I7a2bacc5d7e3d8bab47adb762d3f88f2b2fd6e1d
---
M src/cpu/o3/commit.cc
1 file changed, 1 insertion(+), 1 deletion(-)



diff --git a/src/cpu/o3/commit.cc b/src/cpu/o3/commit.cc
index 4647adb..2cec2b4 100644
--- a/src/cpu/o3/commit.cc
+++ b/src/cpu/o3/commit.cc
@@ -1342,7 +1342,7 @@
 changedROBNumEntries[tid] = true;

 DPRINTF(Commit, "[tid:%i] [sn:%llu] Inserting PC %s into  
ROB.\n",

-inst->seqNum, tid, inst->pcState());
+tid, inst->seqNum, inst->pcState());

 rob->insertInst(inst);


--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7a2bacc5d7e3d8bab47adb762d3f88f2b2fd6e1d
Gerrit-Change-Number: 46599
Gerrit-PatchSet: 1
Gerrit-Owner: Tom Rollet 
Gerrit-MessageType: newchange
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[gem5-dev] Jenkins build is back to normal : compiler-checks #87

[jenkins-no-reply--- via gem5-dev]

See 

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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Rename WriteMask::cmpMask to containsMask

[Gabriel Busnot (Gerrit) via gem5-dev]

Gabriel Busnot has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46560 )


Change subject: mem-ruby: Rename WriteMask::cmpMask to containsMask
..

mem-ruby: Rename WriteMask::cmpMask to containsMask

Avoids confusion as the function tests for inclusions and not for equality.

Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46560
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Tiago Mück 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/ruby/common/WriteMask.hh
M src/mem/ruby/protocol/GPU_VIPER-TCP.sm
M src/mem/ruby/protocol/RubySlicc_Exports.sm
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
5 files changed, 5 insertions(+), 5 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Tiago Mück: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/ruby/common/WriteMask.hh  
b/src/mem/ruby/common/WriteMask.hh

index 895584a..1cb3f46 100644
--- a/src/mem/ruby/common/WriteMask.hh
+++ b/src/mem/ruby/common/WriteMask.hh
@@ -126,7 +126,7 @@
 }

 bool
-cmpMask(const WriteMask ) const
+containsMask(const WriteMask ) const
 {
 bool tmp = true;
 assert(mSize == readMask.mSize);
diff --git a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm  
b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm

index 5e987c8..a231da4 100644
--- a/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
+++ b/src/mem/ruby/protocol/GPU_VIPER-TCP.sm
@@ -362,7 +362,7 @@

   action(norl_issueRdBlkOrloadDone, "norl", desc="local load done") {
 peek(mandatoryQueue_in, RubyRequest){
-  if (cache_entry.writeMask.cmpMask(in_msg.writeMask)) {
+  if (cache_entry.writeMask.containsMask(in_msg.writeMask)) {
   if (use_seq_not_coal) {
 sequencer.readCallback(address, cache_entry.DataBlk, false,  
MachineType:L1Cache);

   } else {
diff --git a/src/mem/ruby/protocol/RubySlicc_Exports.sm  
b/src/mem/ruby/protocol/RubySlicc_Exports.sm

index 7706f57..cea6c04 100644
--- a/src/mem/ruby/protocol/RubySlicc_Exports.sm
+++ b/src/mem/ruby/protocol/RubySlicc_Exports.sm
@@ -54,7 +54,7 @@

 structure(WriteMask, external="yes", desc="...") {
   void clear();
-  bool cmpMask(WriteMask);
+  bool containsMask(WriteMask);
   bool isEmpty();
   bool isFull();
   bool isOverlap(WriteMask);
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm  
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm

index 40f33ce..adf4e1c 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@

   WriteMask test_mask := mask;
   test_mask.orMask(read_mask);
-  if ((mask.cmpMask(test_mask) == false) || dirty) {
+  if ((mask.containsMask(test_mask) == false) || dirty) {
 if (from_tbe) {
   if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
 DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",  
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm  
b/src/mem/ruby/protocol/chi/CHI-msg.sm

index 22fc508..19cf343 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
 assert(bitMask.isEmpty() == false);
 WriteMask test_mask := mask;
 test_mask.orMask(bitMask);
-if ((mask.cmpMask(test_mask) == false) || is_dirty) {
+if ((mask.containsMask(test_mask) == false) || is_dirty) {
   if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
 mask.orMask(bitMask);
 return true;

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I4cd10e08af46f69feed26afc2d6c7f809bc5192b
Gerrit-Change-Number: 46560
Gerrit-PatchSet: 2
Gerrit-Owner: Gabriel Busnot 
Gerrit-Reviewer: Gabriel Busnot 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Tiago Mück 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Giacomo Travaglini 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix wrong test in CHI functional reads

[Gabriel Busnot (Gerrit) via gem5-dev]

Gabriel Busnot has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46559 )


Change subject: mem-ruby: Fix wrong test in CHI functional reads
..

mem-ruby: Fix wrong test in CHI functional reads

A bad write mask inclusion test in CHI cache functionalRead and CHI data  
message
functionalRead was causing clean data not to be read in some cases. The  
issue is

detailed in issue GEM5-1002.

Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46559
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Tiago Mück 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
M src/mem/ruby/protocol/chi/CHI-msg.sm
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, but someone else must approve; Looks  
good to me, approved

  Tiago Mück: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm  
b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm

index db008b0..40f33ce 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-funcs.sm
@@ -215,7 +215,7 @@

   WriteMask test_mask := mask;
   test_mask.orMask(read_mask);
-  if ((test_mask.cmpMask(mask) == false) || dirty) {
+  if ((mask.cmpMask(test_mask) == false) || dirty) {
 if (from_tbe) {
   if(testAndReadMask(addr, tbe.dataBlk, read_mask, pkt)) {
 DPRINTF(RubySlicc, "functionalRead tbe %x %s dirty=%d %s %s\n",  
addr, tbe.dataBlk, tbe.dataDirty, read_mask, mask);
diff --git a/src/mem/ruby/protocol/chi/CHI-msg.sm  
b/src/mem/ruby/protocol/chi/CHI-msg.sm

index d51fb76..22fc508 100644
--- a/src/mem/ruby/protocol/chi/CHI-msg.sm
+++ b/src/mem/ruby/protocol/chi/CHI-msg.sm
@@ -217,7 +217,7 @@
 assert(bitMask.isEmpty() == false);
 WriteMask test_mask := mask;
 test_mask.orMask(bitMask);
-if ((test_mask.cmpMask(mask) == false) || is_dirty) {
+if ((mask.cmpMask(test_mask) == false) || is_dirty) {
   if (testAndReadMask(addr, dataBlk, bitMask, pkt)) {
 mask.orMask(bitMask);
 return true;

--
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Gerrit-Branch: develop
Gerrit-Change-Id: I91254fa87636e8d22a8b2f27ad375f68f997932d
Gerrit-Change-Number: 46559
Gerrit-PatchSet: 2
Gerrit-Owner: Gabriel Busnot 
Gerrit-Reviewer: Gabriel Busnot 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Tiago Mück 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Giacomo Travaglini 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: mem-ruby: Fix RubySystem::functionalRead with partial data

[Gabriel Busnot (Gerrit) via gem5-dev]

Gabriel Busnot has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46561 )


Change subject: mem-ruby: Fix RubySystem::functionalRead with partial data
..

mem-ruby: Fix RubySystem::functionalRead with partial data

Some protocol other than CHI require the read-write and/or read-only and/or
backing-store controller's buffers to be checked if the system is busy.

More details in issue GEM5-1000

Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46561
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/mem/ruby/system/RubySystem.cc
1 file changed, 10 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/mem/ruby/system/RubySystem.cc  
b/src/mem/ruby/system/RubySystem.cc

index 239b652..caee770 100644
--- a/src/mem/ruby/system/RubySystem.cc
+++ b/src/mem/ruby/system/RubySystem.cc
@@ -651,13 +651,21 @@
 for (auto ctrl : ctrl_ro)
 ctrl->functionalRead(line_address, pkt, bytes);

-ctrl_bs->functionalRead(line_address, pkt, bytes);
+if (ctrl_bs)
+ctrl_bs->functionalRead(line_address, pkt, bytes);

 // if there is any busy controller or bytes still not set, then a  
partial

 // and/or dirty copy of the line might be in a message buffer or the
 // network
 if (!ctrl_busy.empty() || !bytes.isFull()) {
-DPRINTF(RubySystem, "Reading from busy controllers and network\n");
+DPRINTF(RubySystem, "Reading from remaining controllers, "
+"buffers and networks\n");
+if (ctrl_rw != nullptr)
+ctrl_rw->functionalReadBuffers(pkt, bytes);
+for (auto ctrl : ctrl_ro)
+ctrl->functionalReadBuffers(pkt, bytes);
+if (ctrl_bs != nullptr)
+ctrl_bs->functionalReadBuffers(pkt, bytes);
 for (auto ctrl : ctrl_busy) {
 ctrl->functionalRead(line_address, pkt, bytes);
 ctrl->functionalReadBuffers(pkt, bytes);

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0ad6385ad5a88fc158e68e4c63c540504b817ccb
Gerrit-Change-Number: 46561
Gerrit-PatchSet: 4
Gerrit-Owner: Gabriel Busnot 
Gerrit-Reviewer: Gabriel Busnot 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: arch-riscv: Update the way a valid virtual address is computed

[Ayaz Akram (Gerrit) via gem5-dev]

Ayaz Akram has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/45920 )


Change subject: arch-riscv: Update the way a valid virtual address is  
computed

..

arch-riscv: Update the way a valid virtual address is computed

According to privileged ISA specs, a valid 64 bit virtual address should
have bit 63-39 same as bit 38 (for Sv39). Without this change, kernel page
fault handler does not seem to work correctly. For example, while running
a program, the kernel was segfaulting complaining that it cannot handle
kernel paging request at some virtual address (which is the faulting
address returned by gem5 currently, with all bits after first 39 cleared).
With this change, that error goes away.

Change-Id: Iae7c9d0af19e29214e14a0db08d7c0ac122122bc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/45920
Reviewed-by: Jason Lowe-Power 
Reviewed-by: Nils Asmussen 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/riscv/pagetable_walker.cc
M src/arch/riscv/tlb.cc
2 files changed, 3 insertions(+), 3 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  Nils Asmussen: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/riscv/pagetable_walker.cc  
b/src/arch/riscv/pagetable_walker.cc

index d3c3905..8dadd96 100644
--- a/src/arch/riscv/pagetable_walker.cc
+++ b/src/arch/riscv/pagetable_walker.cc
@@ -418,7 +418,7 @@
 void
 Walker::WalkerState::setupWalk(Addr vaddr)
 {
-vaddr &= (static_cast(1) << VADDR_BITS) - 1;
+vaddr = Addr(sext(vaddr));

 Addr shift = PageShift + LEVEL_BITS * 2;
 Addr idx = (vaddr >> shift) & LEVEL_MASK;
@@ -486,7 +486,7 @@
  * well.
  */
 Addr vaddr = req->getVaddr();
-vaddr &= (static_cast(1) << VADDR_BITS) - 1;
+vaddr = Addr(sext(vaddr));
 Addr paddr = walker->tlb->translateWithTLB(vaddr, satp.asid,  
mode);

 req->setPaddr(paddr);
 walker->pma->check(req);
diff --git a/src/arch/riscv/tlb.cc b/src/arch/riscv/tlb.cc
index a5e4107..1ec848e 100644
--- a/src/arch/riscv/tlb.cc
+++ b/src/arch/riscv/tlb.cc
@@ -277,7 +277,7 @@
 {
 delayed = false;

-Addr vaddr = req->getVaddr() & ((static_cast(1) << VADDR_BITS) -  
1);

+Addr vaddr = Addr(sext(req->getVaddr()));
 SATP satp = tc->readMiscReg(MISCREG_SATP);

 TlbEntry *e = lookup(vaddr, satp.asid, mode, false);

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: Iae7c9d0af19e29214e14a0db08d7c0ac122122bc
Gerrit-Change-Number: 45920
Gerrit-PatchSet: 6
Gerrit-Owner: Ayaz Akram 
Gerrit-Reviewer: Ayaz Akram 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Nils Asmussen 
Gerrit-Reviewer: kokoro 
Gerrit-CC: Gabe Black 
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: util: Make sorted includes verifier less confusing

[Hoa Nguyen (Gerrit) via gem5-dev]

Hoa Nguyen has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/46580 )


Change subject: util: Make sorted includes verifier less confusing
..

util: Make sorted includes verifier less confusing

verifiers.py complains about unordered includes where there is
more than one empty line under the #include region, even if
the includes are sorted.

This change adds a note about the fact.

Change-Id: I7a8dbc12fd82db0f0cadcfec270e42f6e0de4aea
Signed-off-by: Hoa Nguyen 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/46580
Reviewed-by: Jason Lowe-Power 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M util/style/verifiers.py
1 file changed, 4 insertions(+), 2 deletions(-)

Approvals:
  Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass



diff --git a/util/style/verifiers.py b/util/style/verifiers.py
index efc347e..7ab7344 100644
--- a/util/style/verifiers.py
+++ b/util/style/verifiers.py
@@ -361,8 +361,10 @@

 if modified:
 if not silent:
-self.ui.write("invalid sorting of includes in %s\n"
-% (filename))
+self.ui.write("invalid sorting of includes in %s. Note:  
If "
+  "there is more than one empty line under  
the "

+  "#include region, please reduce it to one.\n"
+  % (filename))
 if self.ui.verbose:
 for start, end in modified.regions:
 self.ui.write("bad region [%d, %d)\n" % (start,  
end))


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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I7a8dbc12fd82db0f0cadcfec270e42f6e0de4aea
Gerrit-Change-Number: 46580
Gerrit-PatchSet: 2
Gerrit-Owner: Hoa Nguyen 
Gerrit-Reviewer: Gabe Black 
Gerrit-Reviewer: Hoa Nguyen 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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