Re: [gem5-dev] Review Request 3800: x86: fix Mul1u instruction

2017-05-15 Thread Joe Gross 


> On Feb. 4, 2017, 10:21 a.m., Jason Lowe-Power wrote:
> > Lol, that code is hard to understand. But, LGTM.
> > 
> > What are you using to test this? Any chance you can commit the test so we 
> > don't accidentally break this again in the future?
> 
> Tony Gutierrez wrote:
> This bug was manifesting in the ROCr runtime while it is loading 
> libraries, it manifested as a segfualt (unmapped addr panic) because an 
> address calculation was corrupted due to this instruction. I manually tested 
> this instruction by comparing its output to the result of 64b multiplication 
> using __uint128_t. This is a perfect example of where instruction tests would 
> be useful. It only seemed to give bad output with certain inputs, which gave 
> the error the appearance of being non-deterministic.
> 
> Jason Lowe-Power wrote:
> Resurecting this from the grave... does anyone have any objections to me 
> just pushing this? I spent all day tracking down a bug, which was fixed by 
> this patch.

This is an important patch for x86, I say push it. Also it would be nice if we 
were eventually able to use the CheckerCpu for x86 (I believe it's ARM-only 
right now), as there might be more hard-to-find bugs like this one.


- Joe


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On Feb. 3, 2017, 6:13 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3800/
> ---
> 
> (Updated Feb. 3, 2017, 6:13 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11778:c76b78110490
> ---
> x86: fix Mul1u instruction
> 
> the Mul1uFlags and Mul1u instructions perform
> the 64b multiplication using only 64b registers, however the
> method used causes the high 64b to be corrupted for certain
> inputs. here we fix the computation.
> 
> 
> Diffs
> -
> 
>   src/arch/x86/isa/microops/regop.isa 
> ed89cb178ecd7586296d2a2e83595174474db554 
> 
> Diff: http://reviews.gem5.org/r/3800/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3779: proto: Fix warnings for protoc v3

2017-01-19 Thread Joe Gross 

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Ship it!


This is similar to the fix I locally apply on my local CentOS machine.

- Joe Gross


On Jan. 10, 2017, 5:01 a.m., Nikos Nikoleris wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3779/
> ---
> 
> (Updated Jan. 10, 2017, 5:01 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11793:9e7dc6807c35
> ---
> proto: Fix warnings for protoc v3
> 
> protoc v3 introduces a new syntax for proto files and warns when the
> syntax is not explicitly stated.
> 
> protoc relies on the fact that undefined preprocessor symbols are
> explanded to 0 but since we use -Wundef they end up generating
> warnings.
> 
> Change-Id: If07abeb54e932469c8f2c4d38634a97fdae40f77
> Reviewed-by: Andreas Hansson 
> Reviewed-by: Andreas Sandberg 
> 
> 
> Diffs
> -
> 
>   src/proto/SConscript 494ab5474716 
>   src/proto/inst.proto 494ab5474716 
>   src/proto/inst_dep_record.proto 494ab5474716 
>   src/proto/packet.proto 494ab5474716 
> 
> Diff: http://reviews.gem5.org/r/3779/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Nikos Nikoleris
> 
>

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Re: [gem5-dev] Review Request 3778: Fix order of object construction in the CxxConfigManager

2017-01-18 Thread Joe Gross 

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Ship it!


Tested this and saving/loading checkpoints still seems to work just fine.

- Joe Gross


On Jan. 9, 2017, 7:53 a.m., Christian Menard wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3778/
> ---
> 
> (Updated Jan. 9, 2017, 7:53 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> There is a bug in the CxxConfig manager that may lead to Objects beeing 
> created in the wrong order. I noted the issue, when a System Object used a 
> wrong FullSystem Flag because it was constructed before the Root object. This 
> happens when the system has a name that comes before 'root' in aplhabetical 
> order. Since findObject(name) creates the Object if not yet present, all 
> objects are constructed in alphabetical order. This may break object 
> dependencies.
> 
> 
> This patch fixes the bug by removing the alphabetical ordering.
> 
> 
> Diffs
> -
> 
>   src/sim/cxx_manager.cc c10c50cb8ac9 
> 
> Diff: http://reviews.gem5.org/r/3778/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Christian Menard
> 
>

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Re: [gem5-dev] Review Request 3771: ruby: guard usage of GPUCoalescer code in Profiler

2016-12-21 Thread Joe Gross 

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Ship it!


A good intermediate solution!

- Joe Gross


On Dec. 20, 2016, 5:55 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3771/
> ---
> 
> (Updated Dec. 20, 2016, 5:55 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11779:06c8d1e32685
> ---
> ruby: guard usage of GPUCoalescer code in Profiler
> 
> the GPUCoalescer code is used in the ruby profiler regardless of
> whether or not the coalescer code has been compiled, which can
> lead to link/run time errors. here we add #ifdefs to guard the
> usage of GPUCoalescer code. eventually we should refactor this
> code to use probe points.
> 
> 
> Diffs
> -
> 
>   SConstruct dccdf4e12a0b5814b5e5ed9c7ddf2d272aedc13c 
>   src/mem/ruby/profiler/Profiler.cc dccdf4e12a0b5814b5e5ed9c7ddf2d272aedc13c 
> 
> Diff: http://reviews.gem5.org/r/3771/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3769: python: Don't use Swig to cast stats

2016-12-21 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Dec. 20, 2016, 2:08 a.m., Andreas Sandberg wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3769/
> ---
> 
> (Updated Dec. 20, 2016, 2:08 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11769:b930c2c20e93
> ---
> python: Don't use Swig to cast stats
> 
> Call the stat visitor from the stat itself rather than casting stats
> in Python. This reduces the number of ways visitors are called.
> 
> Change-Id: Ic4d0b7b32e3ab9897b9a34cd22d353f4da62d738
> Signed-off-by: Andreas Sandberg 
> Reviewed-by: Sascha Bischoff 
> Reviewed-by: Curtis Dunham 
> 
> 
> Diffs
> -
> 
>   src/python/m5/stats/__init__.py 6ef6e5dbff2d 
>   src/python/swig/stats.i 6ef6e5dbff2d 
> 
> Diff: http://reviews.gem5.org/r/3769/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Andreas Sandberg
> 
>

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Re: [gem5-dev] Review Request 3768: sim: Remove redundant export_method_cxx_predecls

2016-12-21 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Dec. 20, 2016, 2:07 a.m., Andreas Sandberg wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3768/
> ---
> 
> (Updated Dec. 20, 2016, 2:07 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11768:e22181336f15
> ---
> sim: Remove redundant export_method_cxx_predecls
> 
> The headers declared in export_method_cxx_predecls are redundant since a
> SimObject's main header is automatically included.
> 
> Change-Id: Ied9e84630b36960e54efe91d16f8c66fba7e0da0
> Signed-off-by: Andreas Sandberg 
> Reviewed-by: Curtis Dunham 
> 
> 
> Diffs
> -
> 
>   src/arch/arm/ArmSystem.py 6ef6e5dbff2d 
>   src/cpu/kvm/BaseKvmCPU.py 6ef6e5dbff2d 
>   src/python/m5/SimObject.py 6ef6e5dbff2d 
>   src/sim/System.py 6ef6e5dbff2d 
> 
> Diff: http://reviews.gem5.org/r/3768/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Andreas Sandberg
> 
>

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[gem5-dev] changeset in gem5: scons: fix sanitizer flags with multiple sani...

2016-11-28 Thread Joe Gross 
changeset 09f8fda798bc in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=09f8fda798bc
description:
scons: fix sanitizer flags with multiple sanitizers

There has been some problem when using address and undefined-behavior
sanitizers at the same time. This patch will look for the special case
where both are enabled at once and change the flags passed to the 
compiler
to reflect this.

diffstat:

 src/SConscript |  30 +-
 1 files changed, 21 insertions(+), 9 deletions(-)

diffs (55 lines):

diff -r 27622f94fdcc -r 09f8fda798bc src/SConscript
--- a/src/SConscriptFri Nov 25 10:33:15 2016 +
+++ b/src/SConscriptMon Nov 28 12:44:54 2016 -0500
@@ -1085,19 +1085,26 @@
  '-Wno-maybe-uninitialized',
  '-Wno-type-limits'])
 
+
+# The address sanitizer is available for gcc >= 4.8
+if GetOption('with_asan'):
+if GetOption('with_ubsan') and \
+compareVersions(env['GCC_VERSION'], '4.9') >= 0:
+new_env.Append(CCFLAGS=['-fsanitize=address,undefined',
+'-fno-omit-frame-pointer'])
+new_env.Append(LINKFLAGS='-fsanitize=address,undefined')
+else:
+new_env.Append(CCFLAGS=['-fsanitize=address',
+'-fno-omit-frame-pointer'])
+new_env.Append(LINKFLAGS='-fsanitize=address')
 # Only gcc >= 4.9 supports UBSan, so check both the version
 # and the command-line option before adding the compiler and
 # linker flags.
-if GetOption('with_ubsan') and \
+elif GetOption('with_ubsan') and \
 compareVersions(env['GCC_VERSION'], '4.9') >= 0:
 new_env.Append(CCFLAGS='-fsanitize=undefined')
 new_env.Append(LINKFLAGS='-fsanitize=undefined')
 
-# The address sanitizer is available for gcc >= 4.8
-if GetOption('with_asan'):
-new_env.Append(CCFLAGS=['-fsanitize=address',
-'-fno-omit-frame-pointer'])
-new_env.Append(LINKFLAGS='-fsanitize=address')
 
 if env['CLANG']:
 swig_env.Append(CCFLAGS=['-Wno-sometimes-uninitialized',
@@ -1107,10 +1114,15 @@
 # We require clang >= 3.1, so there is no need to check any
 # versions here.
 if GetOption('with_ubsan'):
-new_env.Append(CCFLAGS='-fsanitize=undefined')
-new_env.Append(LINKFLAGS='-fsanitize=undefined')
+if GetOption('with_asan'):
+new_env.Append(CCFLAGS=['-fsanitize=address,undefined',
+'-fno-omit-frame-pointer'])
+new_env.Append(LINKFLAGS='-fsanitize=address,undefined')
+else:
+new_env.Append(CCFLAGS='-fsanitize=undefined')
+new_env.Append(LINKFLAGS='-fsanitize=undefined')
 
-if GetOption('with_asan'):
+elif GetOption('with_asan'):
 new_env.Append(CCFLAGS=['-fsanitize=address',
 '-fno-omit-frame-pointer'])
 new_env.Append(LINKFLAGS='-fsanitize=address')
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[gem5-dev] Review Request 3745: scons: fix how flags are passed to the compiler when more than one sanitizer at a time is enabled

2016-11-23 Thread Joe Gross 

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---

Review request for Default and Tony Gutierrez.


Repository: gem5


Description
---

scons: fix sanitizer flags with multiple sanitizers

There has been some problem when using address and undefined-behavior 
sanitizers at the same time.
This patch will look for the special case where both are enabled at once and 
change the flags passed
to the compiler to reflect this.


Diffs
-

  src/SConscript 9e5050028323260c6d2211d7158ac4a4145ed8bc 

Diff: http://reviews.gem5.org/r/3745/diff/


Testing
---

local build


Thanks,

Joe Gross

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Re: [gem5-dev] Review Request 3741: ruby: add default ctor for MachineID type

2016-11-21 Thread Joe Gross 

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---

Ship it!


Ship It!

- Joe Gross


On Nov. 21, 2016, 1:24 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3741/
> ---
> 
> (Updated Nov. 21, 2016, 1:24 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11903:5fc941f6049b
> ---
> ruby: add default ctor for MachineID type
> 
> not all uses of MachineID initialize its fields, so here we add a default
> ctor.
> 
> 
> Diffs
> -
> 
>   src/mem/ruby/common/MachineID.hh 9e5050028323260c6d2211d7158ac4a4145ed8bc 
> 
> Diff: http://reviews.gem5.org/r/3741/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3742: ruby: Fix overflow reported by ASAN in MessageBuffer.

2016-11-21 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Nov. 21, 2016, 4:32 p.m., Matthew Poremba wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3742/
> ---
> 
> (Updated Nov. 21, 2016, 4:32 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11711:7a987e64e013
> ---
> ruby: Fix overflow reported by ASAN in MessageBuffer.
> 
> In MessageBuffer the m_not_avail_count member is incremented but not used.
> This causes an overflow reported by ASAN. This patch changes from an int to
> Stats::Scalar, since the count is useful in debugging finite MessageBuffers.
> 
> 
> Diffs
> -
> 
>   src/mem/ruby/network/MessageBuffer.hh 
> 9e5050028323260c6d2211d7158ac4a4145ed8bc 
>   src/mem/ruby/network/MessageBuffer.cc 
> 9e5050028323260c6d2211d7158ac4a4145ed8bc 
> 
> Diff: http://reviews.gem5.org/r/3742/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Matthew Poremba
> 
>

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Re: [gem5-dev] Review Request 3739: gpu-compute: init valid field of GpuTlbEntry in default ctor

2016-11-21 Thread Joe Gross 

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Ship it!


This fixed a ubsan error I was seeing.

- Joe Gross


On Nov. 21, 2016, 12:46 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3739/
> ---
> 
> (Updated Nov. 21, 2016, 12:46 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11902:877b71cb546d
> ---
> gpu-compute: init valid field of GpuTlbEntry in default ctor
> 
> valid field for GpuTlbEntry is not set in the default ctor, which can
> lead to strange behavior, and is also flagged by UBSAN.
> 
> 
> Diffs
> -
> 
>   src/gpu-compute/gpu_tlb.hh 9e5050028323260c6d2211d7158ac4a4145ed8bc 
> 
> Diff: http://reviews.gem5.org/r/3739/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3721: x86: fix issue with casting in Cvtf2i

2016-11-21 Thread Joe Gross 

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---

Ship it!


This fixes some errors I was seeing when running with sanitizers.

- Joe Gross


On Nov. 17, 2016, 2:54 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3721/
> ---
> 
> (Updated Nov. 17, 2016, 2:54 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11892:35849c921444
> ---
> x86: fix issue with casting in Cvtf2i
> 
> UBSAN flags this operation because it detects that arg is being cast directly
> to an unsigned type, argBits. this patch fixes this by first casting the
> value to a signed int type, then reintrepreting the raw bits of the signed
> int into argBits.
> 
> 
> Diffs
> -
> 
>   src/arch/x86/isa/microops/mediaop.isa 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3721/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3709: ruby: Fix potential bugs in garnet2.0

2016-11-17 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Nov. 17, 2016, 12:39 a.m., Jieming Yin wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3709/
> ---
> 
> (Updated Nov. 17, 2016, 12:39 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11705:44fd1b68b23a
> ---
> ruby: Fix potential bugs in garnet2.0
> 
> 1. Delete unused variable from struct LinkEntry
> 2. Correct GarnetExtLink and GarnetIntLink inheritance
> 
> 
> Diffs
> -
> 
>   src/mem/ruby/network/Topology.hh c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/GarnetLink.hh 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/mem/ruby/network/garnet2.0/GarnetLink.cc 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3709/diff/
> 
> 
> Testing
> ---
> 
> not yet
> 
> 
> Thanks,
> 
> Jieming Yin
> 
>

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[gem5-dev] Review Request 3657: configs: add an option to set the deadlock timeouts for the TCPs and SQCs

2016-11-11 Thread Joe Gross 

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---

Review request for Default and Tony Gutierrez.


Repository: gem5


Description
---

configs: add an option to set the deadlock timeouts for the TCPs and SQCs

These can be useful options when using high bandwidth workloads that can 
cause long latencies and create deadlock timeouts.


Diffs
-

  configs/ruby/GPU_RfO.py b29aca3fcb75f5ad92429001ab11c65b2f9635b0 
  configs/ruby/GPU_VIPER.py b29aca3fcb75f5ad92429001ab11c65b2f9635b0 
  configs/ruby/GPU_VIPER_Baseline.py b29aca3fcb75f5ad92429001ab11c65b2f9635b0 
  configs/ruby/GPU_VIPER_Region.py b29aca3fcb75f5ad92429001ab11c65b2f9635b0 

Diff: http://reviews.gem5.org/r/3657/diff/


Testing
---


Thanks,

Joe Gross

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Re: [gem5-dev] Review Request 3692: gpu-compute: fix segfault when constructing GPUExecContext

2016-11-11 Thread Joe Gross 

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Ship it!


This fixed some problems I've seen when running.

- Joe Gross


On Nov. 1, 2016, 5:55 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3692/
> ---
> 
> (Updated Nov. 1, 2016, 5:55 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11889:b236bb4bd2ce
> ---
> gpu-compute: fix segfault when constructing GPUExecContext
> 
> the GPUExecContext context currently stores a reference to its parent WF's
> GPUISA object, however there are some special instructions that do not have
> an associated WF. when these objects are constructed they set their WF pointer
> to null, which causes the GPUExecContext to segfault when trying to 
> dereference
> the WF pointer to get at the WF's GPUISA object. here we change the GPUISA
> reference in the GPUExecContext class to a pointer so that it may be set to
> null.
> 
> 
> Diffs
> -
> 
>   src/gpu-compute/gpu_exec_context.hh 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
>   src/gpu-compute/gpu_exec_context.cc 
> c38fcdaa5fe508dbb18cc084e758ad0ce8e2e2f4 
> 
> Diff: http://reviews.gem5.org/r/3692/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3446: hsail, gpu-compute: fixes to appease clang++

2016-10-24 Thread Joe Gross 

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Ship it!


This fixed a bunch of ubsan warnings with gcc6.1.0 for me.

- Joe Gross


On April 13, 2016, 10:09 a.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3446/
> ---
> 
> (Updated April 13, 2016, 10:09 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11443:c90af82c70e4
> ---
> hsail,gpu-compute: fixes to appease clang++
> 
> fixes to appease clang++. tested on:
> 
> Ubuntu clang version 3.5.0-4ubuntu2~trusty2
> (tags/RELEASE_350/final) (based on LLVM 3.5.0)
> 
> Ubuntu clang version 3.6.0-2ubuntu1~trusty1
> (tags/RELEASE_360/final) (based on LLVM 3.6.0)
> 
> the fixes address the following five issues:
> 
> 1) the exec continuations in gpu_static_inst.hh were marked
>as protected when they should be public. here we mark
>them as public
> 
> 2) the Abs instruction uses std::abs() in its execute method.
>because Abs is templated, it can also operate on U32 and U64,
>types, which cause Abs::execute() to pass uint32_t and uint64_t
>types to std::abs() respectively. this triggers a warning
>because std::abs() has no effect in this case. to rememdy this
>we add template specialization for the execute() method of Abs
>when its template paramter is U32 or U64.
> 
> 3) Some potocols that utilize the code in cprintf.hh were missing
>includes to BoolVec.hh, which defines operator<< for the BoolVec
>type. This would cause issues when the generated code would try
>to pass a BoolVec type to a method in cprintf.hh that used
>operator<< on an instance of a BoolVec.
> 
> 4) Surprise, clang doesn't like it when you clobber all the bits
>in a newly allocated object. I.e., this code:
> 
>tlb = new GpuTlbEntry[size];
>std::memset(tlb, 0, sizeof(GpuTlbEntry) * size);
> 
>Let's use std::vector to track the TLB entries in the GpuTlb now...
> 
> 5) There were a few variables used only in DPRINTFs, so we mark them
>with M5_VAR_USED.
> 
> 
> Diffs
> -
> 
>   src/arch/hsail/gen.py b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/arch/x86/process.cc b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/gpu-compute/gpu_static_inst.hh b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/gpu-compute/gpu_tlb.hh b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/gpu-compute/gpu_tlb.cc b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/gpu-compute/hsail_code.hh b31738224fb0eb259efc25f6d6efab5a962f29d0 
>   src/mem/slicc/symbols/StateMachine.py 
> b31738224fb0eb259efc25f6d6efab5a962f29d0 
> 
> Diff: http://reviews.gem5.org/r/3446/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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Re: [gem5-dev] Review Request 3604: base: Output all AddrRange parameters to config.ini

2016-10-14 Thread Joe Gross 


> On Aug. 17, 2016, 5:35 a.m., Andreas Hansson wrote:
> > No objections. We have been thinking of making this simpler, by creating a 
> > notion of PortGroups, and let the group be responsible for any 
> > hash/interleaving. Until we actually get to the point of implementing this 
> > I agree that we should proceed with your patch.
> 
> Andreas Hansson wrote:
> Should this be marked submitted? Also, was the CXX parser updated to 
> accommodate the change?

Matt actually made this to fix a problem I had with loading config.ini files 
via the CXX config manager. So I'm not sure any changes are necessary since 
it's working for me now.


- Joe


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On Aug. 4, 2016, 12:56 p.m., Matthew Poremba wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3604/
> ---
> 
> (Updated Aug. 4, 2016, 12:56 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11594:805067369ea7
> ---
> base: Output all AddrRange parameters to config.ini
> 
> Currently only 'start' and 'end' of AddrRange are printed in config.ini.
> This causes address ranges to be overlapping when loading a c++-only
> config with interleaved addresses using CxxConfigManger. This patch adds
> prints for the interleave and XOR bits to config.ini such that address
> ranges are properly setup with cxx config.
> 
> 
> Diffs
> -
> 
>   src/python/m5/params.py ba45735a726a4582e63561ab3dc741d7f0890447 
> 
> Diff: http://reviews.gem5.org/r/3604/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Matthew Poremba
> 
>

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Re: [gem5-dev] Review Request 3659: stats: Add more information to uninitialized error

2016-10-13 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Oct. 11, 2016, 9:45 a.m., Jason Lowe-Power wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3659/
> ---
> 
> (Updated Oct. 11, 2016, 9:45 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> stats: Add more information to uninitialized error
> 
> ClockedObject was changed to require its regStats() to be called from every
> child class. If you forget to do this, the error was indecipherable. This
> patch makes the error more clear.
> 
> 
> Diffs
> -
> 
>   src/base/statistics.cc 220fa4099b9a 
> 
> Diff: http://reviews.gem5.org/r/3659/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Jason Lowe-Power
> 
>

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Re: [gem5-dev] Review Request 3664: ruby: make a RequestDesc class instead of std::pair

2016-10-13 Thread Joe Gross 

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Ship it!


Nice fix, this is much clearer and seems like generally safer code.


src/mem/ruby/system/GPUCoalescer.hh (line 298)
<http://reviews.gem5.org/r/3664/#comment7617>

good idea, this seems like very convoluted code


- Joe Gross


On Oct. 13, 2016, 4:24 p.m., Tony Gutierrez wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3664/
> ---
> 
> (Updated Oct. 13, 2016, 4:24 p.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11855:f99c307b574e
> ---
> ruby: make a RequestDesc class instead of std::pair
> 
> the RequestDesc was previously implemented as a std::pair, which made
> the implementation overly complex and error prone. here we encapsulate the
> packet, primary, and secondary types all in a single data structure with
> all members properly intialized in a ctor
> 
> 
> Diffs
> -
> 
>   src/mem/ruby/system/GPUCoalescer.hh 
> b29aca3fcb75f5ad92429001ab11c65b2f9635b0 
>   src/mem/ruby/system/GPUCoalescer.cc 
> b29aca3fcb75f5ad92429001ab11c65b2f9635b0 
> 
> Diff: http://reviews.gem5.org/r/3664/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Tony Gutierrez
> 
>

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[gem5-dev] Review Request 3656: dram: add DDR3-1866/2400

2016-10-10 Thread Joe Gross 

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---

Review request for Default.


Repository: gem5


Description
---

Changeset 11676:7c1853b9eb72
---
dram: add several new dram timings for ddr3

add DDR3-1866 and DDR3-2400 from Micron specs to DRAMCtrl.py. These allow 
additional speed grades of DRAM to be simulated via the include DRAM controller.


Diffs
-

  src/mem/DRAMCtrl.py b29aca3fcb75f5ad92429001ab11c65b2f9635b0 

Diff: http://reviews.gem5.org/r/3656/diff/


Testing
---


Thanks,

Joe Gross

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Re: [gem5-dev] Review Request 3600: mem: Modify drain to ensure banks and power are idled

2016-09-01 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Aug. 11, 2016, 4:08 a.m., Curtis Dunham wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3600/
> ---
> 
> (Updated Aug. 11, 2016, 4:08 a.m.)
> 
> 
> Review request for Default and Matthias Jung.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> mem: Modify drain to ensure banks and power are idled
> 
> Add constraint that all ranks have to be in PWR_IDLE
> before signaling drain complete
> 
> This will ensure that the banks are all closed and the rank
> has exited any low-power states.
> 
> On suspend, update the power stats to sync the DRAM power logic
> 
> The logic maintains the location of the signalDrainDone
> method, which is still triggered from either:
> 1) Read response event
> 2) Next request event
> 
> This ensures that the drain will complete in the READ bus
> state and minimizes the changes required.
> 
> Change-Id: If1476e631ea7d5999fe50a0c9379c5967a90e3d1
> Reviewed-by: Radhika Jagtap 
> 
> 
> Diffs
> -
> 
>   src/mem/dram_ctrl.cc e9096175eb38ac39f37c91bfdf2a450b9664e222 
>   src/mem/dram_ctrl.hh e9096175eb38ac39f37c91bfdf2a450b9664e222 
> 
> Diff: http://reviews.gem5.org/r/3600/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Curtis Dunham
> 
>

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Re: [gem5-dev] Review Request 3599: mem: Sort memory commands and update DRAMPower

2016-09-01 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Aug. 11, 2016, 4:07 a.m., Curtis Dunham wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3599/
> ---
> 
> (Updated Aug. 11, 2016, 4:07 a.m.)
> 
> 
> Review request for Default and Matthias Jung.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> mem: Sort memory commands and update DRAMPower
> 
> Add local variable to stores commands to be issued.
> These commands are in order within a single bank but will be out
> of order across banks & ranks.
> 
> A new procedure, flushCmdList, sorts commands across banks / ranks,
> and flushes the sorted list, up to curTick() to DRAMPower.
> This is currently called in refresh, once all previous commands are
> guaranteed to have completed.  Could be called in other events like
> the powerEvent as well.
> 
> By only flushing commands up to curTick(), will not get out of sync
> when flushed at a periodic stats dump (done in subsequent patch).
> 
> Change-Id: I4ac65a52407f64270db1e16a1fb04cfe7f638851
> Reviewed-by: Radhika Jagtap 
> 
> 
> Diffs
> -
> 
>   src/mem/dram_ctrl.hh e9096175eb38ac39f37c91bfdf2a450b9664e222 
>   src/mem/dram_ctrl.cc e9096175eb38ac39f37c91bfdf2a450b9664e222 
> 
> Diff: http://reviews.gem5.org/r/3599/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Curtis Dunham
> 
>

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Re: [gem5-dev] Review Request 3598: mem: update DDR3 die revision

2016-08-24 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Aug. 11, 2016, 4:07 a.m., Curtis Dunham wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3598/
> ---
> 
> (Updated Aug. 11, 2016, 4:07 a.m.)
> 
> 
> Review request for Default and Matthias Jung.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> mem: update DDR3 die revision
> 
> Change-Id: I8992ddc1664c3ed4b2d36d8a34e4ce8be113b9de
> Reviewed-by: Radhika Jagtap 
> 
> 
> Diffs
> -
> 
>   src/mem/DRAMCtrl.py e9096175eb38ac39f37c91bfdf2a450b9664e222 
> 
> Diff: http://reviews.gem5.org/r/3598/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Curtis Dunham
> 
>

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Re: [gem5-dev] Review Request 3596: mem: make DDR4 x16

2016-08-24 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Aug. 11, 2016, 4:07 a.m., Curtis Dunham wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3596/
> ---
> 
> (Updated Aug. 11, 2016, 4:07 a.m.)
> 
> 
> Review request for Default and Matthias Jung.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> mem: make DDR4 x16
> 
> 
> Diffs
> -
> 
>   src/mem/DRAMCtrl.py e9096175eb38ac39f37c91bfdf2a450b9664e222 
> 
> Diff: http://reviews.gem5.org/r/3596/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Curtis Dunham
> 
>

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Re: [gem5-dev] Review Request 3597: mem: add DRAM powerdown timing

2016-08-24 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On Aug. 11, 2016, 4:07 a.m., Curtis Dunham wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3597/
> ---
> 
> (Updated Aug. 11, 2016, 4:07 a.m.)
> 
> 
> Review request for Default and Matthias Jung.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> mem: add DRAM powerdown timing
> 
> 
> Diffs
> -
> 
>   src/mem/DRAMCtrl.py e9096175eb38ac39f37c91bfdf2a450b9664e222 
>   src/mem/dram_ctrl.hh e9096175eb38ac39f37c91bfdf2a450b9664e222 
>   src/mem/dram_ctrl.cc e9096175eb38ac39f37c91bfdf2a450b9664e222 
> 
> Diff: http://reviews.gem5.org/r/3597/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Curtis Dunham
> 
>

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Re: [gem5-dev] Review Request 3498: tests: Split test results into running and verification

2016-06-15 Thread Joe Gross 

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Ship it!


Ship It!

- Joe Gross


On June 6, 2016, 11:50 a.m., Andreas Sandberg wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3498/
> ---
> 
> (Updated June 6, 2016, 11:50 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11532:284b74f149d1
> ---
> tests: Split test results into running and verification
> 
> The test base class already assumes that test cases consists of a run
> stage and a verification stage. Reflect this in the results class to
> make it possible to detect cases where a run was successful, but
> didn't verify.
> 
> Change-Id: I31ef393e496671221c5408aca41649cd8dda74ca
> Signed-off-by: Andreas Sandberg 
> Reviewed-by: Curtis Dunham 
> 
> 
> Diffs
> -
> 
>   tests/SConscript 6e143fd2cabf 
>   tests/testing/results.py 6e143fd2cabf 
>   tests/testing/tests.py 6e143fd2cabf 
> 
> Diff: http://reviews.gem5.org/r/3498/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Andreas Sandberg
> 
>

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Re: [gem5-dev] Review Request 3500: tests: Add a test command to get test status as an exit code

2016-06-15 Thread Joe Gross 

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Ship it!


This looks like a nice feature to easily roll up the tester results.

- Joe Gross


On June 6, 2016, 11:50 a.m., Andreas Sandberg wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3500/
> ---
> 
> (Updated June 6, 2016, 11:50 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11533:ca86fea05ac8
> ---
> tests: Add a test command to get test status as an exit code
> 
> Add a "test" command to tests.py that queries a test pickle file and
> returns different exit codes depending on the outcome of the tests in
> the file. The following exit codes can currently be returned:
> 
>   * 0: All tests were successful or skipped.
> 
>   * 1: General fault in the script such as incorrect parameters or
> failing to parse a pickle file.
> 
>   * 2: At least one test failed to run. This is what the summary
> formatter usually shows as a 'FAILED'.
> 
>   * 3: All tests ran correctly, but at least one failed to verify
> its output. When displaying test output using the summary
> formatter, such a test would show up as 'CHANGED'.
> 
> The command can be invoked like this:
> 
> ./tests/tests.py test `find build/ARM/tests/opt/ -name status.pickle`
> 
> Change-Id: I7e6bc661516f38ff08dfda7c4359a1e10bf97864
> Signed-off-by: Andreas Sandberg 
> Reviewed-by: Curtis Dunham 
> 
> 
> Diffs
> -
> 
>   tests/tests.py 6e143fd2cabf 
> 
> Diff: http://reviews.gem5.org/r/3500/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Andreas Sandberg
> 
>

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Re: [gem5-dev] Review Request 3273: [mq]: jkalamat/wfSizeParam.patch

2016-02-16 Thread Joe Gross 

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---

Ship it!


John, I've been using this internally and have even made some modifications to 
my own branch using the same API calls and it all works just fine.

- Joe Gross


On Feb. 16, 2016, 9:56 a.m., John Kalamatianos wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.gem5.org/r/3273/
> ---
> 
> (Updated Feb. 16, 2016, 9:56 a.m.)
> 
> 
> Review request for Default.
> 
> 
> Repository: gem5
> 
> 
> Description
> ---
> 
> Changeset 11342:3a8eb18b522f
> ---
> gpu: parametrize Wavefront size
> Eliminate VSZ constant that defined the Wavefront size in numbers of work
> items. Replaced it with a parameter in the GPU.py configuration script.
> Changed all data structures dependent on the Wavefront size to be
> dynamically sized.
> Legal values of Wavefront size are 16, 32, 64 for now and checked at
> initialization time.
> 
> Updated the patch so that it builds with latest version of Gem5.
> 
> 
> Diffs
> -
> 
>   src/gpu-compute/wavefront.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/wavefront.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   configs/example/apu_se.py bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/gen.py bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/insts/branch.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/insts/main.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/insts/mem.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/insts/mem_impl.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/insts/pseudo_inst.cc 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/arch/hsail/operand.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/GPU.py bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/cl_driver.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/compute_unit.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/compute_unit.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/dispatcher.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/dispatcher.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/global_memory_pipeline.cc 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/gpu_dyn_inst.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/gpu_dyn_inst.cc bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/local_memory_pipeline.cc 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/misc.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/qstruct.hh bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/vector_register_file.cc 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/vector_register_state.hh 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
>   src/gpu-compute/vector_register_state.cc 
> bda2c39fd9fdcedbe7a4b1df38f9ac1279208eee 
> 
> Diff: http://reviews.gem5.org/r/3273/diff/
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> John Kalamatianos
> 
>

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[gem5-dev] changeset in gem5: sim: support for distcc pump server settings

2015-11-15 Thread Joe Gross 
changeset 47e2adf7fb1a in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=47e2adf7fb1a
description:
sim: support for distcc pump server settings

diffstat:

 SConstruct |  9 +
 1 files changed, 5 insertions(+), 4 deletions(-)

diffs (19 lines):

diff -r 4e70e13c1a2c -r 47e2adf7fb1a SConstruct
--- a/SConstructSun Nov 15 21:28:00 2015 +
+++ b/SConstructSun Nov 15 17:56:43 2015 -0500
@@ -209,10 +209,11 @@
  'PYTHONPATH', 'RANLIB', 'SWIG', 'TERM' ])
 
 use_prefixes = [
-"M5",   # M5 configuration (e.g., path to kernels)
-"DISTCC_",  # distcc (distributed compiler wrapper) configuration
-"CCACHE_",  # ccache (caching compiler wrapper) configuration
-"CCC_", # clang static analyzer configuration
+"CCACHE_", # ccache (caching compiler wrapper) configuration
+"CCC_",# clang static analyzer configuration
+"DISTCC_", # distcc (distributed compiler wrapper) configuration
+"INCLUDE_SERVER_", # distcc pump server settings
+"M5",  # M5 configuration (e.g., path to kernels)
 ]
 
 use_env = {}
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[gem5-dev] changeset in gem5: ruby: add BoolVec

2015-11-14 Thread Joe Gross 
changeset fa3e56b6e0b6 in /z/repo/gem5
details: http://repo.gem5.org/gem5?cmd=changeset;node=fa3e56b6e0b6
description:
ruby: add BoolVec

The BoolVec typedef and insertion operator overload function simplify 
usage of
vectors of type bool

diffstat:

 src/mem/protocol/RubySlicc_Util.sm |   3 +
 src/mem/ruby/SConscript|   1 +
 src/mem/ruby/common/BoolVec.cc |  50 ++
 src/mem/ruby/common/BoolVec.hh |  45 +++
 src/mem/ruby/common/SConscript |   1 +
 src/mem/ruby/slicc_interface/RubySlicc_Util.hh |  13 ++
 6 files changed, 113 insertions(+), 0 deletions(-)

diffs (163 lines):

diff -r 7b7e352f8d7f -r fa3e56b6e0b6 src/mem/protocol/RubySlicc_Util.sm
--- a/src/mem/protocol/RubySlicc_Util.smMon Jul 20 09:15:18 2015 -0500
+++ b/src/mem/protocol/RubySlicc_Util.smFri Nov 13 17:30:56 2015 -0500
@@ -43,3 +43,6 @@
 Addr makeLineAddress(Addr addr);
 int getOffset(Addr addr);
 int mod(int val, int mod);
+structure(BoolVec, external="yes") {
+}
+int countBoolVec(BoolVec bVec);
diff -r 7b7e352f8d7f -r fa3e56b6e0b6 src/mem/ruby/SConscript
--- a/src/mem/ruby/SConscript   Mon Jul 20 09:15:18 2015 -0500
+++ b/src/mem/ruby/SConscript   Fri Nov 13 17:30:56 2015 -0500
@@ -115,6 +115,7 @@
 
 # External types
 MakeInclude('common/Address.hh')
+MakeInclude('common/BoolVec.hh')
 MakeInclude('common/DataBlock.hh')
 MakeInclude('common/MachineID.hh')
 MakeInclude('common/NetDest.hh')
diff -r 7b7e352f8d7f -r fa3e56b6e0b6 src/mem/ruby/common/BoolVec.cc
--- /dev/null   Thu Jan 01 00:00:00 1970 +
+++ b/src/mem/ruby/common/BoolVec.ccFri Nov 13 17:30:56 2015 -0500
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2015 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Brad Beckmann
+ */
+
+#include "mem/ruby/common/BoolVec.hh"
+
+#include 
+#include 
+
+std::ostream& operator<<(std::ostream& os, const BoolVec& myvector) {
+for (const auto& it: myvector) {
+os << " " << it;
+}
+return os;
+}
diff -r 7b7e352f8d7f -r fa3e56b6e0b6 src/mem/ruby/common/BoolVec.hh
--- /dev/null   Thu Jan 01 00:00:00 1970 +
+++ b/src/mem/ruby/common/BoolVec.hhFri Nov 13 17:30:56 2015 -0500
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 2015 Advanced Micro Devices, Inc.
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in sou