[gem5-dev] [S] Change in gem5/gem5[develop]: arch-vega: Make VGPR-offset for global SGPR-base signed

2023-02-09 Thread Matthew Poremba (Gerrit) via gem5-dev
Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/67412?usp=email )


Change subject: arch-vega: Make VGPR-offset for global SGPR-base signed
..

arch-vega: Make VGPR-offset for global SGPR-base signed

The VGPR-offset used when SGPR-base addressing is used can be signed in
Vega. These are global instructions of the format:
`global_load_dword v0, v1, s[0:1]`. This is not explicitly stated in the
ISA manual however based on compiler output the offset can be negative.

This changeset assigns the offset to a signed 32-bit integer and the
compiler takes care of the signedness in the expression which calculates
the final address. This fixes a bad address calculation in a rocPRIM
unit test.

Change-Id: I271edfbb4c6344cb1a6a69a0fd3df58a6198d599
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/67412
Reviewed-by: Bobby Bruce 
Maintainer: Bobby Bruce 
Tested-by: kokoro 
---
M src/arch/amdgpu/vega/insts/op_encodings.hh
1 file changed, 25 insertions(+), 1 deletion(-)

Approvals:
  Bobby Bruce: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/arch/amdgpu/vega/insts/op_encodings.hh  
b/src/arch/amdgpu/vega/insts/op_encodings.hh

index 34f6040..1071ead 100644
--- a/src/arch/amdgpu/vega/insts/op_encodings.hh
+++ b/src/arch/amdgpu/vega/insts/op_encodings.hh
@@ -1007,8 +1007,9 @@
 // mask any upper bits from the vaddr.
 for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
 if (gpuDynInst->exec_mask[lane]) {
+ScalarRegI32 voffset = vaddr[lane];
 gpuDynInst->addr.at(lane) =
-saddr.rawData() + (vaddr[lane] & 0x) +  
offset;

+saddr.rawData() + voffset + offset;
 }
 }
 }

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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I271edfbb4c6344cb1a6a69a0fd3df58a6198d599
Gerrit-Change-Number: 67412
Gerrit-PatchSet: 3
Gerrit-Owner: Matthew Poremba 
Gerrit-Reviewer: Bobby Bruce 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] [S] Change in gem5/gem5[develop]: arch-vega: Make VGPR-offset for global SGPR-base signed

2023-01-19 Thread Matthew Poremba (Gerrit) via gem5-dev
Matthew Poremba has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/67412?usp=email )



Change subject: arch-vega: Make VGPR-offset for global SGPR-base signed
..

arch-vega: Make VGPR-offset for global SGPR-base signed

The VGPR-offset used when SGPR-base addressing is used can be signed in
Vega. These are global instructions of the format:
`global_load_dword v0, v1, s[0:1]`. This is not explicitly stated in the
ISA manual however based on compiler output the offset can be negative.

This changeset assigns the offset to a signed 32-bit integer and the
compiler takes care of the signedness in the expression which calculates
the final address. This fixes a bad address calculation in a rocPRIM
unit test.

Change-Id: I271edfbb4c6344cb1a6a69a0fd3df58a6198d599
---
M src/arch/amdgpu/vega/insts/op_encodings.hh
1 file changed, 21 insertions(+), 1 deletion(-)



diff --git a/src/arch/amdgpu/vega/insts/op_encodings.hh  
b/src/arch/amdgpu/vega/insts/op_encodings.hh

index 34f6040..1f52c75 100644
--- a/src/arch/amdgpu/vega/insts/op_encodings.hh
+++ b/src/arch/amdgpu/vega/insts/op_encodings.hh
@@ -1007,8 +1007,9 @@
 // mask any upper bits from the vaddr.
 for (int lane = 0; lane < NumVecElemPerVecReg; ++lane) {
 if (gpuDynInst->exec_mask[lane]) {
+ScalarRegI32 voffset = vaddr[lane] & 0x;
 gpuDynInst->addr.at(lane) =
-saddr.rawData() + (vaddr[lane] & 0x) +  
offset;

+saddr.rawData() + voffset + offset;
 }
 }
 }

--
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https://gem5-review.googlesource.com/c/public/gem5/+/67412?usp=email
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I271edfbb4c6344cb1a6a69a0fd3df58a6198d599
Gerrit-Change-Number: 67412
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba 
Gerrit-MessageType: newchange
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