[gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Fix interrupt handler address assignment

2022-11-01 Thread Matthew Poremba (Gerrit) via gem5-dev
Matthew Poremba has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/65092?usp=email )


Change subject: dev-amdgpu: Fix interrupt handler address assignment
..

dev-amdgpu: Fix interrupt handler address assignment

The interrupt handler's base address is sent via MMIO and must be
shifted by 8 bits to convert to a byte address. The current code is
shifting the MMIO dword first then assigning, resulting in the top 8
bits being shifted out.

This changeset fixes the issue by assigning the dword to the 64-bit
address first then shifting after. Similarly, the upper dword is cast to
a 64-bit value first before shifting.

This fixes some "fence fallback timeout" errors in the m5term output.
These timeouts become a problem because the driver will reset after a
few hundred of them, killing any running GPU applications as part of the
process.

Change-Id: I0beec313f533765c94063bcf4de8c65aacf2986b
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/65092
Tested-by: kokoro 
Reviewed-by: Matt Sinclair 
Maintainer: Matt Sinclair 
---
M src/dev/amdgpu/interrupt_handler.cc
1 file changed, 30 insertions(+), 4 deletions(-)

Approvals:
  Matt Sinclair: Looks good to me, approved; Looks good to me, approved
  kokoro: Regressions pass




diff --git a/src/dev/amdgpu/interrupt_handler.cc  
b/src/dev/amdgpu/interrupt_handler.cc

index 585c1cf..a771976 100644
--- a/src/dev/amdgpu/interrupt_handler.cc
+++ b/src/dev/amdgpu/interrupt_handler.cc
@@ -202,15 +202,14 @@
 void
 AMDGPUInterruptHandler::setBase(const uint32_t &data)
 {
-regs.IH_Base = data << 8;
-regs.baseAddr |= regs.IH_Base;
+regs.baseAddr = data;
+regs.baseAddr <<= 8;
 }

 void
 AMDGPUInterruptHandler::setBaseHi(const uint32_t &data)
 {
-regs.IH_Base_Hi = data;
-regs.baseAddr |= ((uint64_t)regs.IH_Base_Hi) << 32;
+regs.baseAddr |= static_cast(data) << 40;
 }

 void

--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0beec313f533765c94063bcf4de8c65aacf2986b
Gerrit-Change-Number: 65092
Gerrit-PatchSet: 2
Gerrit-Owner: Matthew Poremba 
Gerrit-Reviewer: Alexandru Duțu (Alex) 
Gerrit-Reviewer: Jason Lowe-Power 
Gerrit-Reviewer: Matt Sinclair 
Gerrit-Reviewer: Matthew Poremba 
Gerrit-Reviewer: kokoro 
Gerrit-MessageType: merged
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[gem5-dev] [S] Change in gem5/gem5[develop]: dev-amdgpu: Fix interrupt handler address assignment

2022-10-30 Thread Matthew Poremba (Gerrit) via gem5-dev
Matthew Poremba has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/65092?usp=email )



Change subject: dev-amdgpu: Fix interrupt handler address assignment
..

dev-amdgpu: Fix interrupt handler address assignment

The interrupt handler's base address is sent via MMIO and must be
shifted by 8 bits to convert to a byte address. The current code is
shifting the MMIO dword first then assigning, resulting in the top 8
bits being shifted out.

This changeset fixes the issue by assigning the dword to the 64-bit
address first then shifting after. Similarly, the upper dword is cast to
a 64-bit value first before shifting.

This fixes some "fence fallback timeout" errors in the m5term output.
These timeouts become a problem because the driver will reset after a
few hundred of them, killing any running GPU applications as part of the
process.

Change-Id: I0beec313f533765c94063bcf4de8c65aacf2986b
---
M src/dev/amdgpu/interrupt_handler.cc
1 file changed, 26 insertions(+), 4 deletions(-)



diff --git a/src/dev/amdgpu/interrupt_handler.cc  
b/src/dev/amdgpu/interrupt_handler.cc

index 585c1cf..a771976 100644
--- a/src/dev/amdgpu/interrupt_handler.cc
+++ b/src/dev/amdgpu/interrupt_handler.cc
@@ -202,15 +202,14 @@
 void
 AMDGPUInterruptHandler::setBase(const uint32_t &data)
 {
-regs.IH_Base = data << 8;
-regs.baseAddr |= regs.IH_Base;
+regs.baseAddr = data;
+regs.baseAddr <<= 8;
 }

 void
 AMDGPUInterruptHandler::setBaseHi(const uint32_t &data)
 {
-regs.IH_Base_Hi = data;
-regs.baseAddr |= ((uint64_t)regs.IH_Base_Hi) << 32;
+regs.baseAddr |= static_cast(data) << 40;
 }

 void

--
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https://gem5-review.googlesource.com/c/public/gem5/+/65092?usp=email
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I0beec313f533765c94063bcf4de8c65aacf2986b
Gerrit-Change-Number: 65092
Gerrit-PatchSet: 1
Gerrit-Owner: Matthew Poremba 
Gerrit-MessageType: newchange
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