Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/57299 )
(
2 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the
submitted one.
)Change subject: mem-ruby: CHI fix for WUs on local+upstream line
......................................................................
mem-ruby: CHI fix for WUs on local+upstream line
Fix for WriteUnique operations on cache lines that are both local and
upstream
JIRA: https://gem5.atlassian.net/browse/GEM5-1097
Change-Id: I99def32948d3f0ced9cfc7f7712a0f4ae9aab0cd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/57299
Reviewed-by: Tiago Muck <tiago.m...@arm.com>
Reviewed-by: Jason Lowe-Power <power...@gmail.com>
Maintainer: Jason Lowe-Power <power...@gmail.com>
Maintainer: Bobby Bruce <bbr...@ucdavis.edu>
Tested-by: kokoro <noreply+kok...@google.com>
---
M src/mem/ruby/protocol/chi/CHI-cache-transitions.sm
1 file changed, 31 insertions(+), 1 deletion(-)
Approvals:
Jason Lowe-Power: Looks good to me, but someone else must approve; Looks
good to me, approved
Tiago Muck: Looks good to me, approved
Bobby Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/mem/ruby/protocol/chi/CHI-cache-transitions.sm
b/src/mem/ruby/protocol/chi/CHI-cache-transitions.sm
index c4eb8ff..0f1a7c6 100644
--- a/src/mem/ruby/protocol/chi/CHI-cache-transitions.sm
+++ b/src/mem/ruby/protocol/chi/CHI-cache-transitions.sm
@@ -337,7 +337,7 @@
// WriteUniquePtl
-transition({UD,UD_RU,UD_RSD,UD_RSC,UC,UC_RU,UC_RSC},
+transition({UD,UD_RSD,UD_RSC,UC,UC_RSC},
{WriteUnique, WriteUniquePtl_PoC, WriteUniqueFull_PoC,
WriteUniqueFull_PoC_Alloc},
BUSY_BLKD) {
Initiate_Request;
@@ -347,6 +347,16 @@
ProcessNextState;
}
+transition({UD_RU,UC_RU},
+ {WriteUnique, WriteUniquePtl_PoC, WriteUniqueFull_PoC,
WriteUniqueFull_PoC_Alloc},
+ BUSY_BLKD) {
+ Initiate_Request;
+ Initiate_WriteUnique_LocalWrite;
+ Profile_Miss;
+ Pop_ReqRdyQueue;
+ ProcessNextState;
+}
+
transition({SD, SD_RSD, SD_RSC, SC, SC_RSC},
{WriteUniquePtl_PoC, WriteUniqueFull_PoC,
WriteUniqueFull_PoC_Alloc},
BUSY_BLKD) {
--
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Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I99def32948d3f0ced9cfc7f7712a0f4ae9aab0cd
Gerrit-Change-Number: 57299
Gerrit-PatchSet: 7
Gerrit-Owner: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Bobby Bruce <bbr...@ucdavis.edu>
Gerrit-Reviewer: Giacomo Travaglini <giacomo.travagl...@arm.com>
Gerrit-Reviewer: Jason Lowe-Power <ja...@lowepower.com>
Gerrit-Reviewer: Jason Lowe-Power <power...@gmail.com>
Gerrit-Reviewer: kokoro <noreply+kok...@google.com>
Gerrit-CC: Tiago Muck <tiago.m...@arm.com>
Gerrit-MessageType: merged
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