[gem5-dev] Change in gem5/gem5[develop]: arch-power: Refactor arithmetic instructions

[Boris Shingarov (Gerrit) via gem5-dev]

Boris Shingarov has submitted this change. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40898 )


Change subject: arch-power: Refactor arithmetic instructions
..

arch-power: Refactor arithmetic instructions

This changes the base classes for integer arithmetic
instructions and introduces two new classes that are used
to distinguish between instructions using register and
immediate operands.

Decoding has also been consolidated using formats that can
generate code after determining if an instruction records
carry and overflow and also if it records the nature of the
result, i.e. lesser than, greater than or equal to zero.
However, for multiply and divide instructions, the code to
determine if an overflow has occurred has been moved to the
instruction definition itself. The formats have also been
updated to make use of the new base classes.

Change-Id: I23d70ac4bad4d25d876308db0b3564c092bf574c
Signed-off-by: Sandipan Das 
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/40898
Reviewed-by: Boris Shingarov 
Maintainer: Jason Lowe-Power 
Tested-by: kokoro 
---
M src/arch/power/insts/floating.hh
M src/arch/power/insts/integer.cc
M src/arch/power/insts/integer.hh
M src/arch/power/isa/decoder.isa
M src/arch/power/isa/formats/fp.isa
M src/arch/power/isa/formats/integer.isa
M src/arch/power/types.hh
7 files changed, 176 insertions(+), 173 deletions(-)

Approvals:
  Boris Shingarov: Looks good to me, approved
  Jason Lowe-Power: Looks good to me, approved
  kokoro: Regressions pass



diff --git a/src/arch/power/insts/floating.hh  
b/src/arch/power/insts/floating.hh

index 02dbbb2..ef06901 100644
--- a/src/arch/power/insts/floating.hh
+++ b/src/arch/power/insts/floating.hh
@@ -43,11 +43,12 @@
 {
   protected:

-bool rcSet;
+bool rc;

 /// Constructor
 FloatOp(const char *mnem, MachInst _machInst, OpClass __opClass)
-  : PowerStaticInst(mnem, _machInst, __opClass)
+  : PowerStaticInst(mnem, _machInst, __opClass),
+rc(machInst.rc)
 {
 }

diff --git a/src/arch/power/insts/integer.cc  
b/src/arch/power/insts/integer.cc

index a65d7b7..7da5bf5 100644
--- a/src/arch/power/insts/integer.cc
+++ b/src/arch/power/insts/integer.cc
@@ -61,8 +61,10 @@
 }

 // Additional characters depending on isa bits being set
-if (oeSet) myMnemonic = myMnemonic + "o";
-if (rcSet) myMnemonic = myMnemonic + ".";
+if (oe)
+myMnemonic = myMnemonic + "o";
+if (rc)
+myMnemonic = myMnemonic + ".";
 ccprintf(ss, "%-10s ", myMnemonic);

 // Print the first destination only
@@ -116,7 +118,7 @@
 }

 // Print the immediate value last
-ss << ", " << (int32_t)imm;
+ss << ", " << (int32_t)si;

 return ss.str();
 }
diff --git a/src/arch/power/insts/integer.hh  
b/src/arch/power/insts/integer.hh

index 04222a1..a25e65c 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -51,8 +51,8 @@
 {
   protected:

-bool rcSet;
-bool oeSet;
+bool rc;
+bool oe;

 // Needed for srawi only
 uint32_t sh;
@@ -60,7 +60,8 @@
 /// Constructor
 IntOp(const char *mnem, MachInst _machInst, OpClass __opClass)
   : PowerStaticInst(mnem, _machInst, __opClass),
-rcSet(false), oeSet(false)
+rc(machInst.rc),
+oe(machInst.oe)
 {
 }

@@ -104,14 +105,14 @@
 {
   protected:

-int32_t imm;
-uint32_t uimm;
+int32_t si;
+uint32_t ui;

 /// Constructor
 IntImmOp(const char *mnem, MachInst _machInst, OpClass __opClass)
   : IntOp(mnem, _machInst, __opClass),
-imm(sext<16>(machInst.si)),
-uimm(machInst.si)
+si(sext<16>(machInst.si)),
+ui(machInst.si)
 {
 }

@@ -121,6 +122,39 @@


 /**
+ * Class for integer arithmetic operations.
+ */
+class IntArithOp : public IntOp
+{
+  protected:
+
+/// Constructor
+IntArithOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+  : IntOp(mnem, _machInst, __opClass)
+{
+}
+};
+
+
+/**
+ * Class for integer immediate arithmetic operations.
+ */
+class IntImmArithOp : public IntArithOp
+{
+  protected:
+
+int32_t si;
+
+/// Constructor
+IntImmArithOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+  : IntArithOp(mnem, _machInst, __opClass),
+si(sext<16>(machInst.si))
+{
+}
+};
+
+
+/**
  * Class for integer operations with a shift.
  */
 class IntShiftOp : public IntOp
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 3f51386..e993a7b 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -39,42 +39,48 @@
 format IntImmArithOp {
 7: mulli({{
 int32_t src = Ra_sw;
-int64_t prod = src * imm;
+int64_t prod = src * si;
 Rt = (uint32_t)prod;
 }});

-8: subfic({{ int32_t src = ~Ra; Rt = src + imm + 

[gem5-dev] Change in gem5/gem5[develop]: arch-power: Refactor arithmetic instructions

[Sandipan Das (Gerrit) via gem5-dev]

Sandipan Das has uploaded this change for review. (  
https://gem5-review.googlesource.com/c/public/gem5/+/40898 )



Change subject: arch-power: Refactor arithmetic instructions
..

arch-power: Refactor arithmetic instructions

This changes the base classes for integer arithmetic
instructions and introduces two new classes that are used
to distinguish between instructions using register and
immediate operands.

Decoding has also been consolidated using formats that can
generate code after determining if an instruction records
carry and overflow and also if it records the nature of the
result, i.e. lesser than, greater than or equal to zero.
However, for multiply and divide instructions, the code to
determine if an overflow has occurred has been moved to the
instruction definition itself. The formats have also been
updated to make use of the new base classes.

Change-Id: I23d70ac4bad4d25d876308db0b3564c092bf574c
Signed-off-by: Sandipan Das 
---
M src/arch/power/insts/integer.hh
M src/arch/power/isa/decoder.isa
M src/arch/power/isa/formats/integer.isa
3 files changed, 142 insertions(+), 94 deletions(-)



diff --git a/src/arch/power/insts/integer.hh  
b/src/arch/power/insts/integer.hh

index d81f98d..9efda43 100644
--- a/src/arch/power/insts/integer.hh
+++ b/src/arch/power/insts/integer.hh
@@ -142,6 +142,39 @@


 /**
+ * Class for integer arithmetic operations.
+ */
+class IntArithOp : public IntOp
+{
+  protected:
+
+/// Constructor
+IntArithOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+  : IntOp(mnem, _machInst, __opClass)
+{
+}
+};
+
+
+/**
+ * Class for integer immediate arithmetic operations.
+ */
+class IntImmArithOp : public IntArithOp
+{
+  protected:
+
+int32_t simm;
+
+/// Constructor
+IntImmArithOp(const char *mnem, MachInst _machInst, OpClass __opClass)
+  : IntArithOp(mnem, _machInst, __opClass),
+simm((int16_t)machInst.si)
+{
+}
+};
+
+
+/**
  * Class for integer operations with a shift.
  */
 class IntShiftOp : public IntOp
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index e27fd92..f9fe68a 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -172,26 +172,34 @@
 }

 format IntImmArithCheckRaOp {
-14: addi({{ Rt = Ra + imm; }},
- {{ Rt = imm }});
-
-15: addis({{ Rt = Ra + (imm << 16); }},
-  {{ Rt = imm << 16; }});
+14: addi({{ Rt = Ra + simm; }},
+ {{ Rt = simm }});
+15: addis({{ Rt = Ra + (simm << 16); }},
+  {{ Rt = simm << 16; }});
 }

 format IntImmArithOp {
-12: addic({{ uint32_t src = Ra; Rt = src + imm; }},
-  [computeCA]);
+12: addic({{
+uint64_t src = Ra;
+Rt = src + simm;
+}},
+true);

-13: addic_({{ uint32_t src = Ra; Rt = src + imm; }},
-   [computeCA, computeCR0]);
+13: addic_({{
+uint64_t src = Ra;
+Rt = src + simm;
+}},
+true, true);

-8: subfic({{ int32_t src = ~Ra; Rt = src + imm + 1; }},
-  [computeCA]);
+8: subfic({{
+uint64_t src = ~Ra;
+Rt = src + simm + 1;
+}},
+true);

 7: mulli({{
 int32_t src = Ra_sw;
-int64_t prod = src * imm;
+int64_t prod = src * simm;
 Rt = (uint32_t)prod;
 }});
 }
@@ -508,11 +516,11 @@
 104: neg({{ ~Ra }}, {{ 1 }});
 138: adde({{ Ra }}, {{ Rb }}, {{ xer.ca }},
   true);
-234: addme({{ Ra }}, {{ (uint32_t)-1 }}, {{ xer.ca }},
+234: addme({{ Ra }}, {{ -1ULL }}, {{ xer.ca }},
true);
 136: subfe({{ ~Ra }}, {{ Rb }}, {{ xer.ca }},
true);
-232: subfme({{ ~Ra }}, {{ (uint32_t)-1 }}, {{ xer.ca }},
+232: subfme({{ ~Ra }}, {{ -1ULL }}, {{ xer.ca }},
 true);
 202: addze({{ Ra }}, {{ xer.ca }},
computeCA = true);
@@ -522,21 +530,22 @@

 // Arithmetic instructions all use source registers Ra and Rb,
 // with destination register Rt.
-format IntArithOp {
+format IntArithCheckRcOp {
 75: mulhw({{
 int64_t prod = Ra_sd * Rb_sd;
 Rt = prod >> 32;
 }});
+
 11: mulhwu({{
 uint64_t prod = Ra_ud * Rb_ud;
 Rt = prod >> 32;
 }});
-235: mullw({{ int64_t prod = Ra_sd * Rb_sd; Rt = prod; }});
-747: mullwo({{
-int64_t src1 = Ra_sd;
-int64_t src2 = Rb;
-