[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: convert lsq_unit to new style stats
Emily Brickey has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/33394 )
Change subject: cpu-o3: convert lsq_unit to new style stats
..
cpu-o3: convert lsq_unit to new style stats
Removes unused stats: invAddrLoads, invAddrSwpfs, lsqBlockedLoads
Change-Id: Icd7fc6d8a040f4a1f9b190409b7cdb0a57fd68cf
---
M src/cpu/o3/iew_impl.hh
M src/cpu/o3/lsq_impl.hh
M src/cpu/o3/lsq_unit.hh
M src/cpu/o3/lsq_unit_impl.hh
4 files changed, 45 insertions(+), 87 deletions(-)
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index 99dfd19..3465fbd 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -146,7 +146,6 @@
using namespace Stats;
instQueue.regStats();
-ldstQueue.regStats();
iewIdleCycles
.name(name() + ".iewIdleCycles")
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 1ca7d53..e536aad 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -117,16 +117,6 @@
template
void
-LSQ::regStats()
-{
-//Initialize LSQs
-for (ThreadID tid = 0; tid < numThreads; tid++) {
-thread[tid].regStats();
-}
-}
-
-template
-void
LSQ::setActiveThreads(list *at_ptr)
{
activeThreads = at_ptr;
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index e0cb68b..3a80aeb 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#include
#include "arch/generic/debugfaults.hh"
@@ -234,9 +235,6 @@
/** Returns the name of the LSQ unit. */
std::string name() const;
-/** Registers statistics. */
-void regStats();
-
/** Sets the pointer to the dcache port. */
void setDcachePort(MasterPort *dcache_port);
@@ -539,39 +537,37 @@
/** Flag for memory model. */
bool needsTSO;
+ protected:
// Will also need how many read/write ports the Dcache has. Or keep
track
// of that in stage that is one level up, and only call
executeLoad/Store
// the appropriate number of times.
-/** Total number of loads forwaded from LSQ stores. */
-Stats::Scalar lsqForwLoads;
+struct LSQUnitStats : public Stats::Group{
+LSQUnitStats(Stats::Group *parent);
-/** Total number of loads ignored due to invalid addresses. */
-Stats::Scalar invAddrLoads;
+/** Total number of loads forwaded from LSQ stores. */
+Stats::Scalar lsqForwLoads;
-/** Total number of squashed loads. */
-Stats::Scalar lsqSquashedLoads;
+/** Total number of squashed loads. */
+Stats::Scalar lsqSquashedLoads;
-/** Total number of responses from the memory system that are
- * ignored due to the instruction already being squashed. */
-Stats::Scalar lsqIgnoredResponses;
+/** Total number of responses from the memory system that are
+ * ignored due to the instruction already being squashed. */
+Stats::Scalar lsqIgnoredResponses;
-/** Tota number of memory ordering violations. */
-Stats::Scalar lsqMemOrderViolation;
+/** Tota number of memory ordering violations. */
+Stats::Scalar lsqMemOrderViolation;
-/** Total number of squashed stores. */
-Stats::Scalar lsqSquashedStores;
+/** Total number of squashed stores. */
+Stats::Scalar lsqSquashedStores;
-/** Total number of software prefetches ignored due to invalid
addresses. */
-Stats::Scalar invAddrSwpfs;
+/** Number of loads that were rescheduled. */
+Stats::Scalar lsqRescheduledLoads;
-/** Ready loads blocked due to partial store-forwarding. */
-Stats::Scalar lsqBlockedLoads;
+/** Number of times the LSQ is blocked due to the cache. */
+Stats::Scalar lsqCacheBlocked;
+};
-/** Number of loads that were rescheduled. */
-Stats::Scalar lsqRescheduledLoads;
-
-/** Number of times the LSQ is blocked due to the cache. */
-Stats::Scalar lsqCacheBlocked;
+std::unique_ptr stats;
public:
/** Executes the load at the given index. */
@@ -636,7 +632,7 @@
iewStage->rescheduleMemInst(load_inst);
load_inst->clearIssued();
load_inst->effAddrValid(false);
-++lsqRescheduledLoads;
+++stats->lsqRescheduledLoads;
DPRINTF(LSQUnit, "Strictly ordered load [sn:%lli] PC %s\n",
load_inst->seqNum, load_inst->pcState());
@@ -790,7 +786,7 @@
cpu->schedule(wb, curTick());
// Don't need to do anything special for split loads.
-++lsqForwLoads;
+++stats->lsqForwLoads;
return NoFault;
} else if (coverage ==
AddrRangeCoverage::PartialAddrRangeCoverage) {
@@ -817,7 +813,7 @@
iewStage->rescheduleMemInst(load_inst);
load_inst->clearIssued();
load_inst->effAddrValid(false);
-
[gem5-dev] Change in gem5/gem5[develop]: cpu-o3: convert lsq_unit to new style stats
Jason Lowe-Power has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/33394 )
Change subject: cpu-o3: convert lsq_unit to new style stats
..
cpu-o3: convert lsq_unit to new style stats
Removes unused stats: invAddrLoads, invAddrSwpfs, lsqBlockedLoads
Change-Id: Icd7fc6d8a040f4a1f9b190409b7cdb0a57fd68cf
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/33394
Reviewed-by: Jason Lowe-Power
Maintainer: Jason Lowe-Power
Tested-by: kokoro
---
M src/cpu/o3/iew_impl.hh
M src/cpu/o3/lsq.hh
M src/cpu/o3/lsq_impl.hh
M src/cpu/o3/lsq_unit.hh
M src/cpu/o3/lsq_unit_impl.hh
5 files changed, 49 insertions(+), 93 deletions(-)
Approvals:
Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index 9a04fe6..497c532 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -146,7 +146,6 @@
using namespace Stats;
instQueue.regStats();
-ldstQueue.regStats();
iewIdleCycles
.name(name() + ".iewIdleCycles")
diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index 35c2873..bc5e154 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -856,9 +856,6 @@
/** Returns the name of the LSQ. */
std::string name() const;
-/** Registers statistics of each LSQ unit. */
-void regStats();
-
/** Sets the pointer to the list of active threads. */
void setActiveThreads(std::list *at_ptr);
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index a535dcc..7657b23 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -118,16 +118,6 @@
template
void
-LSQ::regStats()
-{
-//Initialize LSQs
-for (ThreadID tid = 0; tid < numThreads; tid++) {
-thread[tid].regStats();
-}
-}
-
-template
-void
LSQ::setActiveThreads(list *at_ptr)
{
activeThreads = at_ptr;
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index 70995d6..3d6e3f0 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#include
#include "arch/generic/debugfaults.hh"
@@ -225,7 +226,10 @@
* contructor is deleted explicitly. However, STL vector requires
* a valid copy constructor for the base type at compile time.
*/
-LSQUnit(const LSQUnit &l) { panic("LSQUnit is not copy-able"); }
+LSQUnit(const LSQUnit &l): stats(nullptr)
+{
+panic("LSQUnit is not copy-able");
+}
/** Initializes the LSQ unit with the specified number of entries. */
void init(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params,
@@ -234,9 +238,6 @@
/** Returns the name of the LSQ unit. */
std::string name() const;
-/** Registers statistics. */
-void regStats();
-
/** Sets the pointer to the dcache port. */
void setDcachePort(RequestPort *dcache_port);
@@ -561,39 +562,35 @@
/** Flag for memory model. */
bool needsTSO;
+ protected:
// Will also need how many read/write ports the Dcache has. Or keep
track
// of that in stage that is one level up, and only call
executeLoad/Store
// the appropriate number of times.
-/** Total number of loads forwaded from LSQ stores. */
-Stats::Scalar lsqForwLoads;
+struct LSQUnitStats : public Stats::Group{
+LSQUnitStats(Stats::Group *parent);
-/** Total number of loads ignored due to invalid addresses. */
-Stats::Scalar invAddrLoads;
+/** Total number of loads forwaded from LSQ stores. */
+Stats::Scalar forwLoads;
-/** Total number of squashed loads. */
-Stats::Scalar lsqSquashedLoads;
+/** Total number of squashed loads. */
+Stats::Scalar squashedLoads;
-/** Total number of responses from the memory system that are
- * ignored due to the instruction already being squashed. */
-Stats::Scalar lsqIgnoredResponses;
+/** Total number of responses from the memory system that are
+ * ignored due to the instruction already being squashed. */
+Stats::Scalar ignoredResponses;
-/** Tota number of memory ordering violations. */
-Stats::Scalar lsqMemOrderViolation;
+/** Tota number of memory ordering violations. */
+Stats::Scalar memOrderViolation;
-/** Total number of squashed stores. */
-Stats::Scalar lsqSquashedStores;
+/** Total number of squashed stores. */
+Stats::Scalar squashedStores;
-/** Total number of software prefetches ignored due to invalid
addresses. */
-Stats::Scalar invAddrSwpfs;
+/** Number of loads that were rescheduled. */
+Stats::Scalar rescheduledLoads;
-/** Ready loads blocked due to partial store-forwarding. */
-Stats::Scalar lsqBlockedLoads;
-
-/** Number of loads that were rescheduled. */
-Stats::Scalar lsqRescheduledLoads;
-
-/**
