[gem5-dev] Change in gem5/gem5[master]: arch-arm: Make the Tarmac parsed registers case insensitive
Giacomo Travaglini has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/22845 )
Change subject: arch-arm: Make the Tarmac parsed registers case insensitive
..
arch-arm: Make the Tarmac parsed registers case insensitive
This will make parsing more robust, considering the tarmac
format changes between AA32 and AA64.
Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Signed-off-by: Giacomo Travaglini
Reviewed-by: Andreas Sandberg
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22845
Reviewed-by: Nikos Nikoleris
Tested-by: kokoro
---
M src/arch/arm/tracers/tarmac_parser.cc
1 file changed, 7 insertions(+), 8 deletions(-)
Approvals:
Nikos Nikoleris: Looks good to me, approved
Giacomo Travaglini: Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/tracers/tarmac_parser.cc
b/src/arch/arm/tracers/tarmac_parser.cc
index 1495c7a..cade9d3 100644
--- a/src/arch/arm/tracers/tarmac_parser.cc
+++ b/src/arch/arm/tracers/tarmac_parser.cc
@@ -1038,7 +1038,7 @@
regRecord.values.clear();
trace >> buf;
strcpy(regRecord.repr, buf);
-if (buf[0] == 'r' && isdigit(buf[1])) {
+if (std::tolower(buf[0]) == 'r' && isdigit(buf[1])) {
// R register
regRecord.type = REG_R;
int base_index = atoi(&buf[1]);
@@ -1064,28 +1064,27 @@
else if (strncmp(pch, "hyp", 3) == 0)
regRecord.index = INTREG_HYP(base_index);
}
-// A64 register names are capitalized in AEM TARMAC, unlike A32
-} else if (buf[0] == 'X' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'x' && isdigit(buf[1])) {
// X register (A64)
regRecord.type = REG_X;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 's' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 's' && isdigit(buf[1])) {
// S register
regRecord.type = REG_S;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'd' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'd' && isdigit(buf[1])) {
// D register
regRecord.type = REG_D;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'q' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'q' && isdigit(buf[1])) {
// Q register
regRecord.type = REG_Q;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'z' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'z' && isdigit(buf[1])) {
// Z (SVE vector) register
regRecord.type = REG_Z;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'p' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'p' && isdigit(buf[1])) {
// P (SVE predicate) register
regRecord.type = REG_P;
regRecord.index = atoi(&buf[1]);
--
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Gerrit-Change-Number: 22845
Gerrit-PatchSet: 2
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Andreas Sandberg
Gerrit-Reviewer: Giacomo Gabrielli
Gerrit-Reviewer: Giacomo Travaglini
Gerrit-Reviewer: Nikos Nikoleris
Gerrit-Reviewer: kokoro
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[master]: arch-arm: Make the Tarmac parsed registers case insensitive
Hello Andreas Sandberg,
I'd like you to do a code review. Please visit
https://gem5-review.googlesource.com/c/public/gem5/+/22845
to review the following change.
Change subject: arch-arm: Make the Tarmac parsed registers case insensitive
..
arch-arm: Make the Tarmac parsed registers case insensitive
This will make parsing more robust, considering the tarmac
format changes between AA32 and AA64.
Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Signed-off-by: Giacomo Travaglini
Reviewed-by: Andreas Sandberg
---
M src/arch/arm/tracers/tarmac_parser.cc
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/src/arch/arm/tracers/tarmac_parser.cc
b/src/arch/arm/tracers/tarmac_parser.cc
index ce2300e..42ee852 100644
--- a/src/arch/arm/tracers/tarmac_parser.cc
+++ b/src/arch/arm/tracers/tarmac_parser.cc
@@ -1037,7 +1037,7 @@
regRecord.values.clear();
trace >> buf;
strcpy(regRecord.repr, buf);
-if (buf[0] == 'r' && isdigit(buf[1])) {
+if (std::tolower(buf[0]) == 'r' && isdigit(buf[1])) {
// R register
regRecord.type = REG_R;
int base_index = atoi(&buf[1]);
@@ -1063,28 +1063,27 @@
else if (strncmp(pch, "hyp", 3) == 0)
regRecord.index = INTREG_HYP(base_index);
}
-// A64 register names are capitalized in AEM TARMAC, unlike A32
-} else if (buf[0] == 'X' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'x' && isdigit(buf[1])) {
// X register (A64)
regRecord.type = REG_X;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 's' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 's' && isdigit(buf[1])) {
// S register
regRecord.type = REG_S;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'd' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'd' && isdigit(buf[1])) {
// D register
regRecord.type = REG_D;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'q' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'q' && isdigit(buf[1])) {
// Q register
regRecord.type = REG_Q;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'z' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'z' && isdigit(buf[1])) {
// Z (SVE vector) register
regRecord.type = REG_Z;
regRecord.index = atoi(&buf[1]);
-} else if (buf[0] == 'p' && isdigit(buf[1])) {
+} else if (std::tolower(buf[0]) == 'p' && isdigit(buf[1])) {
// P (SVE predicate) register
regRecord.type = REG_P;
regRecord.index = atoi(&buf[1]);
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/22845
To unsubscribe, or for help writing mail filters, visit
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Gerrit-Project: public/gem5
Gerrit-Branch: master
Gerrit-Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Gerrit-Change-Number: 22845
Gerrit-PatchSet: 1
Gerrit-Owner: Giacomo Travaglini
Gerrit-Reviewer: Andreas Sandberg
Gerrit-MessageType: newchange
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