[gem5-dev] Cron m5test@zizzer /z/m5/regression/do-regression quick

2011-06-03 Thread Cron Daemon
* build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing 
passed.
* build/ALPHA_SE/tests/opt/quick/60.rubytest/alpha/linux/rubytest-ruby 
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* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing-ruby 
passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing-ruby 
passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/o3-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/simple-atomic passed.
* build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-atomic-mp 
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* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-atomic passed.
* build/ALPHA_SE/tests/opt/quick/01.hello-2T-smt/alpha/linux/o3-timing 
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* build/ALPHA_SE/tests/opt/quick/30.eio-mp/alpha/eio/simple-timing-mp 
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* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/tru64/simple-timing passed.
* build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic 
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* build/ALPHA_SE/tests/opt/quick/00.hello/alpha/linux/inorder-timing passed.
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* build/ALPHA_SE/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby passed.
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* build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/simple-timing-ruby 
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* build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/o3-timing passed.
* build/MIPS_SE/tests/opt/quick/00.hello/mips/linux/inorder-timing passed.
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* build/POWER_SE/tests/opt/quick/00.hello/power/linux/simple-atomic passed.
* build/POWER_SE/tests/opt/quick/00.hello/power/linux/o3-timing passed.
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build/ALPHA_SE_MOESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MOESI_CMP_directory
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* build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-atomic passed.
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build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/simple-timing-mp
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* build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing passed.
* build/SPARC_SE/tests/opt/quick/00.hello/sparc/linux/simple-timing-ruby 
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* 

[gem5-dev] changeset in m5: SLICC: Remove machine name as prefix to functions

2011-06-03 Thread Nilay Vaish
changeset b9ba22cb23f2 in /z/repo/m5
details: http://repo.gem5.org/m5?cmd=changeset;node=b9ba22cb23f2
description:
SLICC: Remove machine name as prefix to functions
Currently, the machine name is appended before any of the functions
defined with in the sm files. This is not necessary and it also
means that these functions cannot be used outside the sm files.
This patch does away with the prefixes. Note that the generated
C++ files in which the code for these functions is present are
still named such that the machine name is the prefix.

diffstat:

 src/mem/slicc/symbols/Func.py |  14 +++---
 src/mem/slicc/symbols/StateMachine.py |  16 
 2 files changed, 15 insertions(+), 15 deletions(-)

diffs (74 lines):

diff -r 3a2aebf01bf3 -r b9ba22cb23f2 src/mem/slicc/symbols/Func.py
--- a/src/mem/slicc/symbols/Func.py Thu Jun 02 21:23:02 2011 -0700
+++ b/src/mem/slicc/symbols/Func.py Fri Jun 03 13:52:18 2011 -0500
@@ -37,15 +37,12 @@
 self.param_strings = param_strings
 self.body = body
 self.isInternalMachineFunc = False
+self.c_ident = ident
 
-if machine is None:
-self.c_ident = ident
-elif external in self or primitive in self:
-self.c_ident = ident
+if machine is None or external in self or primitive in self:
+pass
 else:
 self.machineStr = str(machine)
-# Append with machine name
-self.c_ident = %s_%s % (self.machineStr, ident)
 self.isInternalMachineFunc = True
 
 def __repr__(self):
@@ -107,6 +104,9 @@
 ${{self.body}}
 }
 ''')
-code.write(path, %s.cc % self.c_ident)
+if self.isInternalMachineFunc:
+code.write(path, %s_%s.cc % (self.machineStr,self.c_ident))
+else:
+code.write(path, %s.cc % self.c_ident)
 
 __all__ = [ Func ]
diff -r 3a2aebf01bf3 -r b9ba22cb23f2 src/mem/slicc/symbols/StateMachine.py
--- a/src/mem/slicc/symbols/StateMachine.py Thu Jun 02 21:23:02 2011 -0700
+++ b/src/mem/slicc/symbols/StateMachine.py Fri Jun 03 13:52:18 2011 -0500
@@ -1071,13 +1071,13 @@
 {
 ''')
 if self.TBEType != None and self.EntryType != None:
-code('${ident}_State state = ${ident}_getState(m_tbe_ptr, 
m_cache_entry_ptr, addr);')
+code('${ident}_State state = getState(m_tbe_ptr, 
m_cache_entry_ptr, addr);')
 elif self.TBEType != None:
-code('${ident}_State state = ${ident}_getState(m_tbe_ptr, addr);')
+code('${ident}_State state = getState(m_tbe_ptr, addr);')
 elif self.EntryType != None:
-code('${ident}_State state = ${ident}_getState(m_cache_entry_ptr, 
addr);')
+code('${ident}_State state = getState(m_cache_entry_ptr, addr);')
 else:
-code('${ident}_State state = ${ident}_getState(addr);')
+code('${ident}_State state = getState(addr);')
 
 code('''
 ${ident}_State next_state = state;
@@ -1115,15 +1115,15 @@
 CLEAR_TRANSITION_COMMENT();
 ''')
 if self.TBEType != None and self.EntryType != None:
-code('${ident}_setState(m_tbe_ptr, m_cache_entry_ptr, addr, 
next_state);')
+code('setState(m_tbe_ptr, m_cache_entry_ptr, addr, next_state);')
 code('set_permission(m_cache_entry_ptr, 
${ident}_State_to_permission(next_state));')
 elif self.TBEType != None:
-code('${ident}_setState(m_tbe_ptr, addr, next_state);')
+code('setState(m_tbe_ptr, addr, next_state);')
 elif self.EntryType != None:
-code('${ident}_setState(m_cache_entry_ptr, addr, next_state);')
+code('setState(m_cache_entry_ptr, addr, next_state);')
 code('set_permission(m_cache_entry_ptr, 
${ident}_State_to_permission(next_state));')
 else:
-code('${ident}_setState(addr, next_state);')
+code('setState(addr, next_state);')
 
 code('''
 } else if (result == TransitionResult_ResourceStall) {
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