Re: [m5-dev] Review Request: Ruby: Remove CacheMsg class from SLICC

2011-03-21 Thread Brad Beckmann

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/327/#review1004
---

Ship it!


- Brad


On 2011-03-20 10:53:10, Nilay Vaish wrote:
> 
> ---
> This is an automatically generated e-mail. To reply, visit:
> http://reviews.m5sim.org/r/327/
> ---
> 
> (Updated 2011-03-20 10:53:10)
> 
> 
> Review request for Default.
> 
> 
> Summary
> ---
> 
> Ruby: Remove CacheMsg class from SLICC
> The goal of the patch is to do away with the CacheMsg class currently in use
> in coherence protocols. In place of CacheMsg, the RubyRequest class will used.
> This class is already present in slicc_interface/RubyRequest.hh. In fact,
> objects of class CacheMsg are generated by copying values from a RubyRequest
> object.
> 
> 
> Diffs
> -
> 
>   src/mem/protocol/MESI_CMP_directory-L1cache.sm c1c6f36e118e 
>   src/mem/protocol/MI_example-cache.sm c1c6f36e118e 
>   src/mem/protocol/MOESI_CMP_directory-L1cache.sm c1c6f36e118e 
>   src/mem/protocol/MOESI_CMP_token-L1cache.sm c1c6f36e118e 
>   src/mem/protocol/MOESI_hammer-cache.sm c1c6f36e118e 
>   src/mem/protocol/RubySlicc_Exports.sm c1c6f36e118e 
>   src/mem/protocol/RubySlicc_Profiler.sm c1c6f36e118e 
>   src/mem/protocol/RubySlicc_Types.sm c1c6f36e118e 
>   src/mem/ruby/profiler/AddressProfiler.hh c1c6f36e118e 
>   src/mem/ruby/profiler/AddressProfiler.cc c1c6f36e118e 
>   src/mem/ruby/profiler/Profiler.hh c1c6f36e118e 
>   src/mem/ruby/profiler/Profiler.cc c1c6f36e118e 
>   src/mem/ruby/recorder/TraceRecord.cc c1c6f36e118e 
>   src/mem/ruby/slicc_interface/RubyRequest.hh c1c6f36e118e 
>   src/mem/ruby/slicc_interface/RubyRequest.cc c1c6f36e118e 
>   src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh c1c6f36e118e 
>   src/mem/ruby/slicc_interface/RubySlicc_Util.hh c1c6f36e118e 
>   src/mem/ruby/system/CacheMemory.hh c1c6f36e118e 
>   src/mem/ruby/system/CacheMemory.cc c1c6f36e118e 
>   src/mem/ruby/system/DMASequencer.cc c1c6f36e118e 
>   src/mem/ruby/system/RubyPort.cc c1c6f36e118e 
>   src/mem/ruby/system/Sequencer.cc c1c6f36e118e 
> 
> Diff: http://reviews.m5sim.org/r/327/diff
> 
> 
> Testing
> ---
> 
> 
> Thanks,
> 
> Nilay
> 
>

___
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev


Re: [m5-dev] Review Request: Ruby: Remove CacheMsg class from SLICC

2011-03-20 Thread Nilay Vaish

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/327/
---

(Updated 2011-03-20 10:53:10.248023)


Review request for Default.


Summary (updated)
---

Ruby: Remove CacheMsg class from SLICC
The goal of the patch is to do away with the CacheMsg class currently in use
in coherence protocols. In place of CacheMsg, the RubyRequest class will used.
This class is already present in slicc_interface/RubyRequest.hh. In fact,
objects of class CacheMsg are generated by copying values from a RubyRequest
object.


Diffs (updated)
-

  src/mem/protocol/MESI_CMP_directory-L1cache.sm c1c6f36e118e 
  src/mem/protocol/MI_example-cache.sm c1c6f36e118e 
  src/mem/protocol/MOESI_CMP_directory-L1cache.sm c1c6f36e118e 
  src/mem/protocol/MOESI_CMP_token-L1cache.sm c1c6f36e118e 
  src/mem/protocol/MOESI_hammer-cache.sm c1c6f36e118e 
  src/mem/protocol/RubySlicc_Exports.sm c1c6f36e118e 
  src/mem/protocol/RubySlicc_Profiler.sm c1c6f36e118e 
  src/mem/protocol/RubySlicc_Types.sm c1c6f36e118e 
  src/mem/ruby/profiler/AddressProfiler.hh c1c6f36e118e 
  src/mem/ruby/profiler/AddressProfiler.cc c1c6f36e118e 
  src/mem/ruby/profiler/Profiler.hh c1c6f36e118e 
  src/mem/ruby/profiler/Profiler.cc c1c6f36e118e 
  src/mem/ruby/recorder/TraceRecord.cc c1c6f36e118e 
  src/mem/ruby/slicc_interface/RubyRequest.hh c1c6f36e118e 
  src/mem/ruby/slicc_interface/RubyRequest.cc c1c6f36e118e 
  src/mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh c1c6f36e118e 
  src/mem/ruby/slicc_interface/RubySlicc_Util.hh c1c6f36e118e 
  src/mem/ruby/system/CacheMemory.hh c1c6f36e118e 
  src/mem/ruby/system/CacheMemory.cc c1c6f36e118e 
  src/mem/ruby/system/DMASequencer.cc c1c6f36e118e 
  src/mem/ruby/system/RubyPort.cc c1c6f36e118e 
  src/mem/ruby/system/Sequencer.cc c1c6f36e118e 

Diff: http://reviews.m5sim.org/r/327/diff


Testing
---


Thanks,

Nilay

___
m5-dev mailing list
m5-dev@m5sim.org
http://m5sim.org/mailman/listinfo/m5-dev