Re: [m5-dev] Review Request: TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess
Is there a way for me to ship this, or does someone else need to push it to the repo? Thanks, Joel On Thu, Jul 29, 2010 at 8:21 AM, Steve Reinhardt ste...@gmail.com wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/#review111 --- Ship it! - Steve On 2010-07-28 16:05:00, Joel Hestness wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/ --- (Updated 2010-07-28 16:05:00) Review request for Default. Summary --- TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess ./cpu/simple/timing.cc: fix for x86 CDA microop - since CDA doesn't read or update memory, completeDataAccess needs to handle the case where the current status of the CPU is _status = Running caused by a request NO_ACCESS Discarded previous review request (SIMPLE TIMING: when a request is NO_ACCESS (x86 CDA microinstruction), TimingSimpleCPU::completeDataAccess must still complete) Diffs - src/cpu/simple/timing.cc a75564db03c3 Diff: http://reviews.m5sim.org/r/66/diff Testing --- Thanks, Joel -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Review Request: TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess
Is there a way for me to ship this, or does someone else need to push it to the repo? Push it to some repo that steve controls and he can push it to the main repo for you. Nate ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Review Request: TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/#review111 --- Ship it! - Steve On 2010-07-28 16:05:00, Joel Hestness wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/ --- (Updated 2010-07-28 16:05:00) Review request for Default. Summary --- TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess ./cpu/simple/timing.cc: fix for x86 CDA microop - since CDA doesn't read or update memory, completeDataAccess needs to handle the case where the current status of the CPU is _status = Running caused by a request NO_ACCESS Discarded previous review request (SIMPLE TIMING: when a request is NO_ACCESS (x86 CDA microinstruction), TimingSimpleCPU::completeDataAccess must still complete) Diffs - src/cpu/simple/timing.cc a75564db03c3 Diff: http://reviews.m5sim.org/r/66/diff Testing --- Thanks, Joel ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
[m5-dev] Review Request: TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/ --- Review request for Default. Summary --- TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess ./cpu/simple/timing.cc: fix for x86 CDA microop - since CDA doesn't read or update memory, completeDataAccess needs to handle the case where the current status of the CPU is _status = Running caused by a request NO_ACCESS Discarded previous review request (SIMPLE TIMING: when a request is NO_ACCESS (x86 CDA microinstruction), TimingSimpleCPU::completeDataAccess must still complete) Diffs - src/cpu/simple/timing.cc a75564db03c3 Diff: http://reviews.m5sim.org/r/66/diff Testing --- Thanks, Joel ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] Review Request: TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess
--- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/#review110 --- Ship it! Looks good. - Gabe On 2010-07-28 16:05:00, Joel Hestness wrote: --- This is an automatically generated e-mail. To reply, visit: http://reviews.m5sim.org/r/66/ --- (Updated 2010-07-28 16:05:00) Review request for Default. Summary --- TimingCPU: REPOST: Request::NO_ACCESS bypass in completeDataAccess ./cpu/simple/timing.cc: fix for x86 CDA microop - since CDA doesn't read or update memory, completeDataAccess needs to handle the case where the current status of the CPU is _status = Running caused by a request NO_ACCESS Discarded previous review request (SIMPLE TIMING: when a request is NO_ACCESS (x86 CDA microinstruction), TimingSimpleCPU::completeDataAccess must still complete) Diffs - src/cpu/simple/timing.cc a75564db03c3 Diff: http://reviews.m5sim.org/r/66/diff Testing --- Thanks, Joel ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
