Re: [m5-dev] Review Request: dev: fixed bugs to extend interrupt capability beyond 15 cores

2011-01-10 Thread Brad Beckmann

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(Updated 2011-01-10 11:38:53.251076)


Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan 
Binkert.


Summary
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dev: fixed bugs to extend interrupt capability beyond 15 cores


Diffs (updated)
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  src/arch/x86/interrupts.cc 9f9e10967912 
  src/dev/x86/i82094aa.hh 9f9e10967912 
  src/dev/x86/i82094aa.cc 9f9e10967912 
  src/dev/x86/intdev.hh 9f9e10967912 
  src/dev/x86/intdev.cc 9f9e10967912 

Diff: http://reviews.m5sim.org/r/397/diff


Testing
---


Thanks,

Brad

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Re: [m5-dev] Review Request: dev: fixed bugs to extend interrupt capability beyond 15 cores

2011-01-09 Thread Ali Saidi

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src/dev/x86/intdev.hh
http://reviews.m5sim.org/r/397/#comment922

I think this is correct. It should be fine, but checking with the chekpoint 
verifier script would be good before committing.


- Ali


On 2011-01-06 16:12:56, Brad Beckmann wrote:
 
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 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/397/
 ---
 
 (Updated 2011-01-06 16:12:56)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 dev: fixed bugs to extend interrupt capability beyond 15 cores
 
 
 Diffs
 -
 
   src/arch/x86/interrupts.cc 9f9e10967912 
   src/dev/x86/i82094aa.hh 9f9e10967912 
   src/dev/x86/i82094aa.cc 9f9e10967912 
   src/dev/x86/intdev.hh 9f9e10967912 
   src/dev/x86/intdev.cc 9f9e10967912 
 
 Diff: http://reviews.m5sim.org/r/397/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Brad
 


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Re: [m5-dev] Review Request: dev: fixed bugs to extend interrupt capability beyond 15 cores

2011-01-07 Thread Gabe Black

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src/dev/x86/i82094aa.hh
http://reviews.m5sim.org/r/397/#comment884

You don't need virtual here.



src/dev/x86/i82094aa.cc
http://reviews.m5sim.org/r/397/#comment885

This comment probably could go in /* */s. If you want to stick with //s, 
please get rid of the blank lines that are commented.



src/dev/x86/intdev.hh
http://reviews.m5sim.org/r/397/#comment886

I really want one of the folks that knows the memory system better (Steve, 
Ali, Nate) to comment on whether this is right. I'm worried that by only 
broadcasting its address range only at init it won't go out at all sometimes 
(checkpoint restore?) or somebody will miss somebody else's status change.


- Gabe


On 2011-01-06 16:12:56, Brad Beckmann wrote:
 
 ---
 This is an automatically generated e-mail. To reply, visit:
 http://reviews.m5sim.org/r/397/
 ---
 
 (Updated 2011-01-06 16:12:56)
 
 
 Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and 
 Nathan Binkert.
 
 
 Summary
 ---
 
 dev: fixed bugs to extend interrupt capability beyond 15 cores
 
 
 Diffs
 -
 
   src/arch/x86/interrupts.cc 9f9e10967912 
   src/dev/x86/i82094aa.hh 9f9e10967912 
   src/dev/x86/i82094aa.cc 9f9e10967912 
   src/dev/x86/intdev.hh 9f9e10967912 
   src/dev/x86/intdev.cc 9f9e10967912 
 
 Diff: http://reviews.m5sim.org/r/397/diff
 
 
 Testing
 ---
 
 
 Thanks,
 
 Brad
 


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[m5-dev] Review Request: dev: fixed bugs to extend interrupt capability beyond 15 cores

2011-01-06 Thread Brad Beckmann

---
This is an automatically generated e-mail. To reply, visit:
http://reviews.m5sim.org/r/397/
---

Review request for Default, Ali Saidi, Gabe Black, Steve Reinhardt, and Nathan 
Binkert.


Summary
---

dev: fixed bugs to extend interrupt capability beyond 15 cores


Diffs
-

  src/arch/x86/interrupts.cc 9f9e10967912 
  src/dev/x86/i82094aa.hh 9f9e10967912 
  src/dev/x86/i82094aa.cc 9f9e10967912 
  src/dev/x86/intdev.hh 9f9e10967912 
  src/dev/x86/intdev.cc 9f9e10967912 

Diff: http://reviews.m5sim.org/r/397/diff


Testing
---


Thanks,

Brad

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