[m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
changeset baeee670d4ce in /z/repo/m5 details: http://repo.m5sim.org/m5?cmd=changeset;node=baeee670d4ce description: style: Make a style pass over the whole arch/alpha directory. diffstat: 46 files changed, 776 insertions(+), 509 deletions(-) src/arch/alpha/ev5.cc|1 src/arch/alpha/ev5.hh|2 src/arch/alpha/faults.cc |1 src/arch/alpha/faults.hh |5 src/arch/alpha/floatregfile.cc | 10 - src/arch/alpha/floatregfile.hh | 13 +- src/arch/alpha/freebsd/system.cc |1 src/arch/alpha/idle_event.cc |2 src/arch/alpha/intregfile.cc | 17 +-- src/arch/alpha/intregfile.hh | 25 +++- src/arch/alpha/ipr.cc| 97 +- src/arch/alpha/ipr.hh| 150 +++- src/arch/alpha/isa_traits.hh | 122 -- src/arch/alpha/linux/linux.cc|2 src/arch/alpha/linux/linux.hh|1 src/arch/alpha/linux/process.cc |1 src/arch/alpha/linux/system.hh |3 src/arch/alpha/locked_mem.hh |1 src/arch/alpha/miscregfile.cc| 77 ++ src/arch/alpha/miscregfile.hh| 49 +++-- src/arch/alpha/mmaped_ipr.hh |1 src/arch/alpha/osfpal.cc |3 src/arch/alpha/osfpal.hh |1 src/arch/alpha/pagetable.cc | 20 +-- src/arch/alpha/pagetable.hh | 84 +++ src/arch/alpha/predecoder.hh | 35 -- src/arch/alpha/process.cc|1 src/arch/alpha/process.hh|6 - src/arch/alpha/regfile.cc| 35 +++--- src/arch/alpha/regfile.hh| 105 +-- src/arch/alpha/remote_gdb.cc |1 src/arch/alpha/remote_gdb.hh | 13 +- src/arch/alpha/stacktrace.cc | 202 ++ src/arch/alpha/stacktrace.hh | 59 --- src/arch/alpha/syscallreturn.hh | 12 -- src/arch/alpha/system.hh |3 src/arch/alpha/tlb.cc|2 src/arch/alpha/tlb.hh|1 src/arch/alpha/tru64/process.cc |1 src/arch/alpha/tru64/process.hh |4 src/arch/alpha/tru64/tru64.hh|4 src/arch/alpha/types.hh | 29 - src/arch/alpha/utility.cc|3 src/arch/alpha/utility.hh| 71 +++-- src/arch/alpha/vtophys.hh|4 src/kern/tru64/tru64_events.cc |5 diffs (truncated from 5133 to 300 lines): diff -r d14250d688d2 -r baeee670d4ce src/arch/alpha/ev5.cc --- a/src/arch/alpha/ev5.cc Sat Sep 27 21:03:47 2008 -0700 +++ b/src/arch/alpha/ev5.cc Sat Sep 27 21:03:48 2008 -0700 @@ -459,8 +459,7 @@ // really a control write ipr[idx] = val; -tc-getDTBPtr()-flushAddr(val, -DTB_ASN_ASN(ipr[IPR_DTB_ASN])); +tc-getDTBPtr()-flushAddr(val, DTB_ASN_ASN(ipr[IPR_DTB_ASN])); break; case IPR_DTB_TAG: { @@ -529,8 +528,7 @@ // really a control write ipr[idx] = val; -tc-getITBPtr()-flushAddr(val, -ITB_ASN_ASN(ipr[IPR_ITB_ASN])); +tc-getITBPtr()-flushAddr(val, ITB_ASN_ASN(ipr[IPR_ITB_ASN])); break; default: @@ -541,18 +539,17 @@ // no error... } - void copyIprs(ThreadContext *src, ThreadContext *dest) { -for (int i = 0; i NumInternalProcRegs; ++i) { +for (int i = 0; i NumInternalProcRegs; ++i) dest-setMiscRegNoEffect(i, src-readMiscRegNoEffect(i)); -} } } // namespace AlphaISA #if FULL_SYSTEM + using namespace AlphaISA; Fault diff -r d14250d688d2 -r baeee670d4ce src/arch/alpha/ev5.hh --- a/src/arch/alpha/ev5.hh Sat Sep 27 21:03:47 2008 -0700 +++ b/src/arch/alpha/ev5.hh Sat Sep 27 21:03:48 2008 -0700 @@ -65,7 +65,9 @@ const Addr PAddrUncachedBit40 = ULL(0x100); const Addr PAddrUncachedBit43 = ULL(0x800); const Addr PAddrUncachedMask = ULL(0x807); // Clear PA42:35 -inline Addr Phys2K0Seg(Addr addr) + +inline Addr +Phys2K0Seg(Addr addr) { #if !ALPHA_TLASER if (addr PAddrUncachedBit43) { diff -r d14250d688d2 -r baeee670d4ce src/arch/alpha/faults.cc --- a/src/arch/alpha/faults.cc Sat Sep 27 21:03:47 2008 -0700 +++ b/src/arch/alpha/faults.cc Sat Sep 27 21:03:48 2008 -0700 @@ -40,8 +40,7 @@ #include mem/page_table.hh #endif -namespace AlphaISA -{ +namespace AlphaISA { FaultName MachineCheckFault::_name = mchk; FaultVect MachineCheckFault::_vect = 0x0401; @@ -109,7 +108,8 @@ #if FULL_SYSTEM -void AlphaFault::invoke(ThreadContext * tc) +void +AlphaFault::invoke(ThreadContext *tc) { FaultBase::invoke(tc); countStat()++; @@ -128,29 +128,31 @@ tc-setNextPC(tc-readPC() + sizeof(MachInst)); } -void ArithmeticFault::invoke(ThreadContext * tc) +void +ArithmeticFault::invoke(ThreadContext *tc) { FaultBase::invoke(tc); panic(Arithmetic traps are unimplemented!); } -void DtbFault::invoke(ThreadContext * tc) +void +DtbFault::invoke(ThreadContext *tc) { // Set fault address and flags. Even though
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
I thought that we had agreed to always use braces for control structures (for, if, while, etc.) since that makes it easier to add/remove lines without worrying about adding/removing braces too. I don't see it mentioned either way on the coding style page, but I know I've developed the habit of using braces unconditionally based on my recollection of that decision. I don't really have a strong opinion either way; the #1 thing is that we should agree and get it down on the wiki page so that these style updates converge rather than oscillating. Steve On Sat, Sep 27, 2008 at 9:04 PM, Nathan Binkert [EMAIL PROTECTED] wrote: void copyIprs(ThreadContext *src, ThreadContext *dest) { -for (int i = 0; i NumInternalProcRegs; ++i) { +for (int i = 0; i NumInternalProcRegs; ++i) dest-setMiscRegNoEffect(i, src-readMiscRegNoEffect(i)); -} } ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
Also, please make these sorts of large scale formatting changes judiciously. There's a large collection of patches out there and it can be non-trivial to keep them applying correctly. Gabe Steve Reinhardt wrote: I thought that we had agreed to always use braces for control structures (for, if, while, etc.) since that makes it easier to add/remove lines without worrying about adding/removing braces too. I don't see it mentioned either way on the coding style page, but I know I've developed the habit of using braces unconditionally based on my recollection of that decision. I don't really have a strong opinion either way; the #1 thing is that we should agree and get it down on the wiki page so that these style updates converge rather than oscillating. Steve On Sat, Sep 27, 2008 at 9:04 PM, Nathan Binkert [EMAIL PROTECTED] mailto:[EMAIL PROTECTED] wrote: void copyIprs(ThreadContext *src, ThreadContext *dest) { -for (int i = 0; i NumInternalProcRegs; ++i) { +for (int i = 0; i NumInternalProcRegs; ++i) dest-setMiscRegNoEffect(i, src-readMiscRegNoEffect(i)); -} } ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
I thought that we had agreed to always use braces for control structures (for, if, while, etc.) since that makes it easier to add/remove lines without worrying about adding/removing braces too. I don't see it mentioned either way on the coding style page, but I know I've developed the habit of using braces unconditionally based on my recollection of that decision. oh, I thought the agreement was that you use braces if there is an else, but if it's just a simple two liner, you don't have to. I don't really have a strong opinion either way; the #1 thing is that we should agree and get it down on the wiki page so that these style updates converge rather than oscillating. Agreed. What do you think about my above statement? If the whole expression fits in two lines, no braces required. More than two requires braces. Nate ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
I don't really have a strong opinion either way; the #1 thing is that we should agree and get it down on the wiki page so that these style updates converge rather than oscillating. Agreed. What do you think about my above statement? If the whole expression fits in two lines, no braces required. More than two requires braces. I think that sounds fine. Does no braces required also mean no braces allowed, or is that something left up to the implementers discretion? I think it should be optional rather than forbidden. Gabe ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
I think that sounds fine. Does no braces required also mean no braces allowed, or is that something left up to the implementers discretion? I think it should be optional rather than forbidden. I'd agree with optional. ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
On Sat, Sep 27, 2008 at 9:35 PM, nathan binkert [EMAIL PROTECTED] wrote: I think that sounds fine. Does no braces required also mean no braces allowed, or is that something left up to the implementers discretion? I think it should be optional rather than forbidden. I'd agree with optional. Optional is OK with me, but in that case it's not something that should be fixed in a style update. Steve ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev
Re: [m5-dev] changeset in m5: style: Make a style pass over the whole arch/al...
Optional is OK with me, but in that case it's not something that should be fixed in a style update. True, my bad. I was just going really fast. Nate ___ m5-dev mailing list m5-dev@m5sim.org http://m5sim.org/mailman/listinfo/m5-dev