[gem5-users] Re: how gem5 loads binaries on SE mode?

[hiromichi.haneda--- via gem5-users]

Thank you, Gabe.

I'll have a good read of src/base/loader and src/arch/X86.

One more question, do you know of any way to rewrite the memory contents 
directly?
It seems to take a long time to load the loader and X86, so I would like to 
know another way as a backup.
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[gem5-users] how gem5 loads binaries on SE mode?

[hiromichi.haneda--- via gem5-users]

Hello, everyone.

I'm interested in memory encryption. I am interested in memory encryption, and 
I came across the problem of memory initialization. I would like to encrypt the 
binary in 128 bit units when it is loaded into the memory.
Is there any document on how gem5 loads binaries on SE mode?

Thank you.
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[gem5-users] Re: Initialization for memory encription in se mode

[hiromichi.haneda--- via gem5-users]

I thought about encrypting the memory area where the binary was loaded once.
How is the area where the binaries are loaded chosen?
Is there a way to encrypt a specific memory area only once?
Or any other good initialization ideas?

Thank you.
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[gem5-users] Re: Initialization for memory encription in se mode

[hiromichi.haneda--- via gem5-users]

Here is an example of the code.
The cache is placed between the CPU and Enc/Dec Engine, and the data size is 
adjusted by setting the cacheline to 128 bits.
if(pkt->isWrite()){
unsigned char dec1[16];
for (int i = 0; i < 16; ++i){
dec1[i] = *(pkt->getConstPtr() + i);
}
unsigned char key[16] = {
0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, 0xab, 0xf7, 0x15, 
0x88, 0x09, 0xcf, 0x4f, 0x3c};
unsigned char enc1[16] = {};
AES128_ECB_Encrypt(key, dec1, enc1);
for (int i = 0; i < 16; ++i){
*(pkt->getPtr() + i) = enc1[i];
}
}
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[gem5-users] Initialization for memory encription in se mode

[hiromichi.haneda--- via gem5-users]

Hello, everyone.

I'm interested in memory encryption.
I am developing a function to encrypt the contents of memory.
I was able to develop a function that reads packet data in SE mode and 
encrypts/decrypts it.
We are using getConstPtr() to get the value by incrementing from the address, 
and then encrypting and decrypting.
However, we could not develop the initialization part properly, and the 
simulation terminates with an unmapped address.
My current idea is to create a "new protected area" by mapping a new virtual 
address, encrypt all the existing memory data, copy it to the new area, and 
update the packet address every time.
I could not think of a way to implement this method with my skills.
Do you have any good ideas for implementation or a more concise method of 
initialization?

Configuration
gem5 version x21.0.1.0
Architecture x86
CPU OoO CPU
I would like to ask about the Enc/Dec Engine in the configuration below.
CPU -> Cache -> Enc/Dec Engine -> MeCtlr - > memory

Log just before exit when ALL is specified as debug flag

 173000: system.cache_bus.respLayer0.wrapped_function_event: 
EventFunctionWrapped 35 executed @ 173000
 173000: 
system.cache_bus.cpu_side_port[0]-RespPacketQueue.wrapped_function_event: 
EventFunctionWrapped 34 executed @ 173000
 173000: system.cpu.icache_port: Received fetch response 0x1008
 173000: Event_47: Timing CPU icache tick 47 scheduled @ 173000
 173000: Event_47: Timing CPU icache tick 47 executed @ 173000
 173000: system.cpu: Complete ICache Fetch for addr 0x1008
 173000: system.cpu.[tid:0]: Setting int reg 16 (16) to 0.
 173000: global: Getting more bytes.
 173000: global: Collecting 8 byte immediate, got 8 bytes.
 173000: global: Collected immediate 0x2cd00a1ab1add2e.
 173000: global: Calculating the instruction size: basePC: 0x401008 offset: 0x5 
origPC: 0x401004 size: 9
 173000: global: Decode: Decoded mov instruction:
{
        leg = 0,
        rex = 0,
        vex/xop = 0,
        op = {
                type = one byte,
                op = 0xa0,
                },
        modRM = 0,
        sib = 0,
        immediate = 0x2cd00a1ab1add2e,
        displacement = 0
        dispSize = 0}

 173000: system.cpu.[tid:0]: Setting int reg 17 (17) to 0x2cd00a1ab1add2e.
 173000: system.cpu: A0 T0 : 0x401004 @_start    : mov  al
 173000: system.cpu: A0 T0 : 0x401004 @_start. 0 :   MOV_R_MI : limm   t1, 
0x2cd00a1ab1add2e : IntAlu :  D=0x02cd00a1ab1add2e  
flags=(IsInteger|IsMicroop|IsDelayedCommit|IsFirstMicroop)
 173000: system.cpu: Fetch
 173000: system.cpu: Complete ICache Fetch for addr 0
 173000: system.cpu.[tid:0]: Setting int reg 16 (16) to 0.
 173000: system.cpu.[tid:0]: Reading int reg 16 (16) as 0.
 173000: system.cpu.[tid:0]: Reading int reg 17 (17) as 0x2cd00a1ab1add2e.
 173000: global: MOV_R_MI : ld: The address is 0x2cd00a1ab1add2e
 173000: system.cpu.mmu.dtb: Translating vaddr 0x2cd00a1ab1add2e.
 173000: system.cpu.mmu.dtb: In protected mode.
 173000: system.cpu.mmu.dtb: Paging enabled.
 173000: system.cpu.mmu.dtb: Handling a TLB miss for address 0x2cd00a1ab1add2e 
at pc 0x401004.
 173000: system.cpu: A0 T0 : 0x401004 @_start. 1 :   MOV_R_MI : ld   al, 
DS:[t1] : MemRead :  A=0x2cd00a1ab1add2e  
flags=(IsInteger|IsLoad|IsMicroop|IsLastMicroop)
 173000: system.cpu: Fault occured. Handling the fault
panic: Tried to read unmapped address 0x2cd00a1ab1add2e.
PC: 0x401004, Instr:   MOV_R_MI : ld   al, DS:[t1]
Memory Usage: 1154604 KBytes
Program aborted at tick 173000
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