[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-20 Thread Mike Pagano 
commit: af6dfb8341d6ec2f07e8be8c04cc67db993f7d5c
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Sep 20 10:10:06 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Sep 20 10:10:06 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=af6dfb83

Linux patch 4.12.14

 _README  |4 +
 1013_linux-4.12.14.patch | 1928 ++
 2 files changed, 1932 insertions(+)

diff --git a/_README b/_README
index e3c1b9e..3fe24e4 100644
--- a/_README
+++ b/_README
@@ -95,6 +95,10 @@ Patch:  1012_linux-4.12.13.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.13
 
+Patch:  1013_linux-4.12.14.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.14
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1013_linux-4.12.14.patch b/1013_linux-4.12.14.patch
new file mode 100644
index 000..7fe464a
--- /dev/null
+++ b/1013_linux-4.12.14.patch
@@ -0,0 +1,1928 @@
+diff --git a/Makefile b/Makefile
+index 983224467a4d..9ad227ddbfcd 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 13
++SUBLEVEL = 14
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
+index 9aeb91935ce0..e2c4dd051ef8 100644
+--- a/arch/x86/include/asm/elf.h
 b/arch/x86/include/asm/elf.h
+@@ -204,6 +204,7 @@ void set_personality_ia32(bool);
+ 
+ #define ELF_CORE_COPY_REGS(pr_reg, regs)  \
+ do {  \
++  unsigned long base; \
+   unsigned v; \
+   (pr_reg)[0] = (regs)->r15;  \
+   (pr_reg)[1] = (regs)->r14;  \
+@@ -226,8 +227,8 @@ do {   
\
+   (pr_reg)[18] = (regs)->flags;   \
+   (pr_reg)[19] = (regs)->sp;  \
+   (pr_reg)[20] = (regs)->ss;  \
+-  (pr_reg)[21] = current->thread.fsbase;  \
+-  (pr_reg)[22] = current->thread.gsbase;  \
++  rdmsrl(MSR_FS_BASE, base); (pr_reg)[21] = base; \
++  rdmsrl(MSR_KERNEL_GS_BASE, base); (pr_reg)[22] = base;  \
+   asm("movl %%ds,%0" : "=r" (v)); (pr_reg)[23] = v;   \
+   asm("movl %%es,%0" : "=r" (v)); (pr_reg)[24] = v;   \
+   asm("movl %%fs,%0" : "=r" (v)); (pr_reg)[25] = v;   \
+diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
+index b6840bf3940b..d0fdce3d1d83 100644
+--- a/arch/x86/kernel/process_64.c
 b/arch/x86/kernel/process_64.c
+@@ -149,6 +149,123 @@ void release_thread(struct task_struct *dead_task)
+   }
+ }
+ 
++enum which_selector {
++  FS,
++  GS
++};
++
++/*
++ * Saves the FS or GS base for an outgoing thread if FSGSBASE extensions are
++ * not available.  The goal is to be reasonably fast on non-FSGSBASE systems.
++ * It's forcibly inlined because it'll generate better code and this function
++ * is hot.
++ */
++static __always_inline void save_base_legacy(struct task_struct *prev_p,
++   unsigned short selector,
++   enum which_selector which)
++{
++  if (likely(selector == 0)) {
++  /*
++   * On Intel (without X86_BUG_NULL_SEG), the segment base could
++   * be the pre-existing saved base or it could be zero.  On AMD
++   * (with X86_BUG_NULL_SEG), the segment base could be almost
++   * anything.
++   *
++   * This branch is very hot (it's hit twice on almost every
++   * context switch between 64-bit programs), and avoiding
++   * the RDMSR helps a lot, so we just assume that whatever
++   * value is already saved is correct.  This matches historical
++   * Linux behavior, so it won't break existing applications.
++   *
++   * To avoid leaking state, on non-X86_BUG_NULL_SEG CPUs, if we
++   * report that the base is zero, it needs to actually be zero:
++   * see the corresponding logic in load_seg_legacy.
++   */
++  } else {
++  /*
++   * If the selector is 1, 2, or 3, then the base is zero on
++   * !X86_BUG_NULL_SEG CPUs and could be anything on
++   * X86_BUG_NULL_SEG CPUs.  In the latter case, Linux
++   * has never attempted to preserve the base across context
++   * switches.
++   *
++   * If selector > 3, then it refers to a real segment, and
++   * saving the base isn't

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-13 Thread Mike Pagano 
commit: 96f06d593059fe935778616edb37a74fd0b42536
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Sep 13 23:09:47 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Sep 13 23:09:47 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=96f06d59

Removal of redundant patch

 _README |   4 -
 2400_BT-check-L2CAP-buffer-length.patch | 357 
 2 files changed, 361 deletions(-)

diff --git a/_README b/_README
index 5320ea5..e3c1b9e 100644
--- a/_README
+++ b/_README
@@ -111,10 +111,6 @@ Patch:  2300_enable-poweroff-on-Mac-Pro-11.patch
 From:   
http://kernel.ubuntu.com/git/ubuntu/ubuntu-xenial.git/patch/drivers/pci/quirks.c?id=5080ff61a438f3dd80b88b423e1a20791d8a774c
 Desc:   Workaround to enable poweroff on Mac Pro 11. See bug #601964.
 
-Patch:  2400_BT-check-L2CAP-buffer-length.patch
-From:   
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3
-Desc:   Validate the output buffer length for L2CAP config reqs and resps to 
avoid stack buffer overflowing. CVE-2017-1000251. See bug #630840
-
 Patch:  2600_enable-key-swapping-for-apple-mac.patch
 From:   https://github.com/free5lot/hid-apple-patched
 Desc:   This hid-apple patch enables swapping of the FN and left Control keys 
and some additional on some apple keyboards. See bug #622902

diff --git a/2400_BT-check-L2CAP-buffer-length.patch 
b/2400_BT-check-L2CAP-buffer-length.patch
deleted file mode 100644
index c6bfdf7..000
--- a/2400_BT-check-L2CAP-buffer-length.patch
+++ /dev/null
@@ -1,357 +0,0 @@
-From e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3 Mon Sep 17 00:00:00 2001
-From: Ben Seri 
-Date: Sat, 9 Sep 2017 23:15:59 +0200
-Subject: Bluetooth: Properly check L2CAP config option output buffer length
-
-Validate the output buffer length for L2CAP config requests and responses
-to avoid overflowing the stack buffer used for building the option blocks.
-
-Cc: sta...@vger.kernel.org
-Signed-off-by: Ben Seri 
-Signed-off-by: Marcel Holtmann 
-Signed-off-by: Linus Torvalds 

- net/bluetooth/l2cap_core.c | 80 +-
- 1 file changed, 43 insertions(+), 37 deletions(-)
-
-diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
-index 303c779..43ba91c 100644
 a/net/bluetooth/l2cap_core.c
-+++ b/net/bluetooth/l2cap_core.c
-@@ -58,7 +58,7 @@ static struct sk_buff *l2cap_build_cmd(struct l2cap_conn 
*conn,
-  u8 code, u8 ident, u16 dlen, void *data);
- static void l2cap_send_cmd(struct l2cap_conn *conn, u8 ident, u8 code, u16 
len,
-  void *data);
--static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data);
-+static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data, size_t 
data_size);
- static void l2cap_send_disconn_req(struct l2cap_chan *chan, int err);
- 
- static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control,
-@@ -1473,7 +1473,7 @@ static void l2cap_conn_start(struct l2cap_conn *conn)
- 
-   set_bit(CONF_REQ_SENT, >conf_state);
-   l2cap_send_cmd(conn, l2cap_get_ident(conn), 
L2CAP_CONF_REQ,
-- l2cap_build_conf_req(chan, buf), buf);
-+ l2cap_build_conf_req(chan, buf, 
sizeof(buf)), buf);
-   chan->num_conf_req++;
-   }
- 
-@@ -2987,12 +2987,15 @@ static inline int l2cap_get_conf_opt(void **ptr, int 
*type, int *olen,
-   return len;
- }
- 
--static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long val)
-+static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long 
val, size_t size)
- {
-   struct l2cap_conf_opt *opt = *ptr;
- 
-   BT_DBG("type 0x%2.2x len %u val 0x%lx", type, len, val);
- 
-+  if (size < L2CAP_CONF_OPT_SIZE + len)
-+  return;
-+
-   opt->type = type;
-   opt->len  = len;
- 
-@@ -3017,7 +3020,7 @@ static void l2cap_add_conf_opt(void **ptr, u8 type, u8 
len, unsigned long val)
-   *ptr += L2CAP_CONF_OPT_SIZE + len;
- }
- 
--static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan)
-+static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan, size_t 
size)
- {
-   struct l2cap_conf_efs efs;
- 
-@@ -3045,7 +3048,7 @@ static void l2cap_add_opt_efs(void **ptr, struct 
l2cap_chan *chan)
-   }
- 
-   l2cap_add_conf_opt(ptr, L2CAP_CONF_EFS, sizeof(efs),
-- (unsigned long) );
-+ (unsigned long) , size);
- }
- 
- static void l2cap_ack_timeout(struct work_struct *work)
-@@ -3191,11 +3194,12 @@ static inline void l2cap_txwin_setup(struct l2cap_chan 
*chan)
-   chan->ack_win = chan->tx_win;
- }
- 
--static int

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-13 Thread Mike Pagano 
commit: 74695b4b8b53d91a791c3227c4d6db6b45b0371a
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Sep 13 22:28:51 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Sep 13 22:28:51 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=74695b4b

Linux patch 4.12.13

 _README  |4 +
 1012_linux-4.12.13.patch | 1076 ++
 2 files changed, 1080 insertions(+)

diff --git a/_README b/_README
index bd9f666..5320ea5 100644
--- a/_README
+++ b/_README
@@ -91,6 +91,10 @@ Patch:  1011_linux-4.12.12.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.12
 
+Patch:  1012_linux-4.12.13.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.13
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1012_linux-4.12.13.patch b/1012_linux-4.12.13.patch
new file mode 100644
index 000..763a970
--- /dev/null
+++ b/1012_linux-4.12.13.patch
@@ -0,0 +1,1076 @@
+diff --git a/Makefile b/Makefile
+index e96306381ee8..983224467a4d 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 12
++SUBLEVEL = 13
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
+index ff8b0aa2dfde..42f585379e19 100644
+--- a/arch/arm/mm/fault.c
 b/arch/arm/mm/fault.c
+@@ -315,8 +315,11 @@ do_page_fault(unsigned long addr, unsigned int fsr, 
struct pt_regs *regs)
+* signal first. We do not need to release the mmap_sem because
+* it would already be released in __lock_page_or_retry in
+* mm/filemap.c. */
+-  if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
++  if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) {
++  if (!user_mode(regs))
++  goto no_context;
+   return 0;
++  }
+ 
+   /*
+* Major/minor page fault accounting is only done on the
+diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi 
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+index b69e4a4ecdd8..1ce5e773dd30 100644
+--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
 b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+@@ -312,6 +312,7 @@
+   interrupt-controller;
+   reg = <0x1d0 0x1>, /* GICD */
+ <0x1d4 0x4>; /* GICR */
++  interrupts = ;
+   };
+   };
+ 
+diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
+index cb8225969255..97fc5f18b0a8 100644
+--- a/arch/x86/kvm/mmu.c
 b/arch/x86/kvm/mmu.c
+@@ -4759,7 +4759,8 @@ int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, 
u64 error_code,
+* Note: AMD only (since it supports the PFERR_GUEST_PAGE_MASK used
+*   in PFERR_NEXT_GUEST_PAGE)
+*/
+-  if (error_code == PFERR_NESTED_GUEST_PAGE) {
++  if (vcpu->arch.mmu.direct_map &&
++  error_code == PFERR_NESTED_GUEST_PAGE) {
+   kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(cr2));
+   return 1;
+   }
+diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
+index 61ca020c5272..d929111b5ebe 100644
+--- a/drivers/mtd/nand/mxc_nand.c
 b/drivers/mtd/nand/mxc_nand.c
+@@ -877,6 +877,8 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int 
column, int page_addr)
+   }
+ }
+ 
++#define MXC_V1_ECCBYTES   5
++
+ static int mxc_v1_ooblayout_ecc(struct mtd_info *mtd, int section,
+   struct mtd_oob_region *oobregion)
+ {
+@@ -886,7 +888,7 @@ static int mxc_v1_ooblayout_ecc(struct mtd_info *mtd, int 
section,
+   return -ERANGE;
+ 
+   oobregion->offset = (section * 16) + 6;
+-  oobregion->length = nand_chip->ecc.bytes;
++  oobregion->length = MXC_V1_ECCBYTES;
+ 
+   return 0;
+ }
+@@ -908,8 +910,7 @@ static int mxc_v1_ooblayout_free(struct mtd_info *mtd, int 
section,
+   oobregion->length = 4;
+   }
+   } else {
+-  oobregion->offset = ((section - 1) * 16) +
+-  nand_chip->ecc.bytes + 6;
++  oobregion->offset = ((section - 1) * 16) + MXC_V1_ECCBYTES + 6;
+   if (section < nand_chip->ecc.steps)
+   oobregion->length = (section * 16) + 6 -
+   oobregion->offset;
+diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
+index 6f9771e82476..2be78d1bc195 100644
+--- a/drivers/mtd/nand/nand_base.c
 b/drivers/mtd/nand/nand_base.c
+@@ -3972,10 +3972,13 @@ static void nand_manufacturer_detect(struct nand_chip 
*chip)
+* nand_decode_ext_id() otherwise.
+*/
+   if (chip->manufacturer.desc &&

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-13 Thread Mike Pagano 
commit: 54b1ba4af883c5b5915f7ef50d6504bae1d1a664
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Sep 13 12:23:15 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Sep 13 12:23:15 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=54b1ba4a

Validate the output buffer length for L2CAP config reqs and resps to avoid 
stack buffer overflowing. CVE-2017-1000251. See bug #630840

 _README |   4 +
 2400_BT-check-L2CAP-buffer-length.patch | 357 
 2 files changed, 361 insertions(+)

diff --git a/_README b/_README
index c3ac518..bd9f666 100644
--- a/_README
+++ b/_README
@@ -107,6 +107,10 @@ Patch:  2300_enable-poweroff-on-Mac-Pro-11.patch
 From:   
http://kernel.ubuntu.com/git/ubuntu/ubuntu-xenial.git/patch/drivers/pci/quirks.c?id=5080ff61a438f3dd80b88b423e1a20791d8a774c
 Desc:   Workaround to enable poweroff on Mac Pro 11. See bug #601964.
 
+Patch:  2400_BT-check-L2CAP-buffer-length.patch
+From:   
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3
+Desc:   Validate the output buffer length for L2CAP config reqs and resps to 
avoid stack buffer overflowing. CVE-2017-1000251. See bug #630840
+
 Patch:  2600_enable-key-swapping-for-apple-mac.patch
 From:   https://github.com/free5lot/hid-apple-patched
 Desc:   This hid-apple patch enables swapping of the FN and left Control keys 
and some additional on some apple keyboards. See bug #622902

diff --git a/2400_BT-check-L2CAP-buffer-length.patch 
b/2400_BT-check-L2CAP-buffer-length.patch
new file mode 100644
index 000..c6bfdf7
--- /dev/null
+++ b/2400_BT-check-L2CAP-buffer-length.patch
@@ -0,0 +1,357 @@
+From e860d2c904d1a9f38a24eb44c9f34b8f915a6ea3 Mon Sep 17 00:00:00 2001
+From: Ben Seri 
+Date: Sat, 9 Sep 2017 23:15:59 +0200
+Subject: Bluetooth: Properly check L2CAP config option output buffer length
+
+Validate the output buffer length for L2CAP config requests and responses
+to avoid overflowing the stack buffer used for building the option blocks.
+
+Cc: sta...@vger.kernel.org
+Signed-off-by: Ben Seri 
+Signed-off-by: Marcel Holtmann 
+Signed-off-by: Linus Torvalds 
+---
+ net/bluetooth/l2cap_core.c | 80 +-
+ 1 file changed, 43 insertions(+), 37 deletions(-)
+
+diff --git a/net/bluetooth/l2cap_core.c b/net/bluetooth/l2cap_core.c
+index 303c779..43ba91c 100644
+--- a/net/bluetooth/l2cap_core.c
 b/net/bluetooth/l2cap_core.c
+@@ -58,7 +58,7 @@ static struct sk_buff *l2cap_build_cmd(struct l2cap_conn 
*conn,
+  u8 code, u8 ident, u16 dlen, void *data);
+ static void l2cap_send_cmd(struct l2cap_conn *conn, u8 ident, u8 code, u16 
len,
+  void *data);
+-static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data);
++static int l2cap_build_conf_req(struct l2cap_chan *chan, void *data, size_t 
data_size);
+ static void l2cap_send_disconn_req(struct l2cap_chan *chan, int err);
+ 
+ static void l2cap_tx(struct l2cap_chan *chan, struct l2cap_ctrl *control,
+@@ -1473,7 +1473,7 @@ static void l2cap_conn_start(struct l2cap_conn *conn)
+ 
+   set_bit(CONF_REQ_SENT, >conf_state);
+   l2cap_send_cmd(conn, l2cap_get_ident(conn), 
L2CAP_CONF_REQ,
+- l2cap_build_conf_req(chan, buf), buf);
++ l2cap_build_conf_req(chan, buf, 
sizeof(buf)), buf);
+   chan->num_conf_req++;
+   }
+ 
+@@ -2987,12 +2987,15 @@ static inline int l2cap_get_conf_opt(void **ptr, int 
*type, int *olen,
+   return len;
+ }
+ 
+-static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long val)
++static void l2cap_add_conf_opt(void **ptr, u8 type, u8 len, unsigned long 
val, size_t size)
+ {
+   struct l2cap_conf_opt *opt = *ptr;
+ 
+   BT_DBG("type 0x%2.2x len %u val 0x%lx", type, len, val);
+ 
++  if (size < L2CAP_CONF_OPT_SIZE + len)
++  return;
++
+   opt->type = type;
+   opt->len  = len;
+ 
+@@ -3017,7 +3020,7 @@ static void l2cap_add_conf_opt(void **ptr, u8 type, u8 
len, unsigned long val)
+   *ptr += L2CAP_CONF_OPT_SIZE + len;
+ }
+ 
+-static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan)
++static void l2cap_add_opt_efs(void **ptr, struct l2cap_chan *chan, size_t 
size)
+ {
+   struct l2cap_conf_efs efs;
+ 
+@@ -3045,7 +3048,7 @@ static void l2cap_add_opt_efs(void **ptr, struct 
l2cap_chan *chan)
+   }
+ 
+   l2cap_add_conf_opt(ptr, L2CAP_CONF_EFS, sizeof(efs),
+- (unsigned long) );
++ (unsigned long) , size);
+ }
+ 
+ static void l2cap_ack_timeout(struct work_struct *work)
+@@ -3191,11 +3194,12 @@ static inline void

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-10 Thread Mike Pagano 
commit: e6019d54e7ac2d157f240768f137469e7e934f3f
Author: Mike Pagano  gentoo  org>
AuthorDate: Sun Sep 10 14:37:39 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Sun Sep 10 14:37:39 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=e6019d54

Linux patch 4.12.12

 _README  |4 +
 1011_linux-4.12.12.patch | 1428 ++
 2 files changed, 1432 insertions(+)

diff --git a/_README b/_README
index dd06605..c3ac518 100644
--- a/_README
+++ b/_README
@@ -87,6 +87,10 @@ Patch:  1010_linux-4.12.11.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.11
 
+Patch:  1011_linux-4.12.12.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.12
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1011_linux-4.12.12.patch b/1011_linux-4.12.12.patch
new file mode 100644
index 000..d3993f4
--- /dev/null
+++ b/1011_linux-4.12.12.patch
@@ -0,0 +1,1428 @@
+diff --git a/Makefile b/Makefile
+index e7b2b54b032c..e96306381ee8 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 11
++SUBLEVEL = 12
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
+index e6e3b887bee3..683560763238 100644
+--- a/arch/s390/include/asm/pgtable.h
 b/arch/s390/include/asm/pgtable.h
+@@ -502,7 +502,7 @@ static inline int mm_alloc_pgste(struct mm_struct *mm)
+  * In the case that a guest uses storage keys
+  * faults should no longer be backed by zero pages
+  */
+-#define mm_forbids_zeropage mm_use_skey
++#define mm_forbids_zeropage mm_has_pgste
+ static inline int mm_use_skey(struct mm_struct *mm)
+ {
+ #ifdef CONFIG_PGSTE
+diff --git a/arch/s390/mm/gmap.c b/arch/s390/mm/gmap.c
+index 7f6db1e6c048..3ce36f92ba93 100644
+--- a/arch/s390/mm/gmap.c
 b/arch/s390/mm/gmap.c
+@@ -2117,6 +2117,37 @@ static inline void thp_split_mm(struct mm_struct *mm)
+ #endif
+ }
+ 
++/*
++ * Remove all empty zero pages from the mapping for lazy refaulting
++ * - This must be called after mm->context.has_pgste is set, to avoid
++ *   future creation of zero pages
++ * - This must be called after THP was enabled
++ */
++static int __zap_zero_pages(pmd_t *pmd, unsigned long start,
++ unsigned long end, struct mm_walk *walk)
++{
++  unsigned long addr;
++
++  for (addr = start; addr != end; addr += PAGE_SIZE) {
++  pte_t *ptep;
++  spinlock_t *ptl;
++
++  ptep = pte_offset_map_lock(walk->mm, pmd, addr, );
++  if (is_zero_pfn(pte_pfn(*ptep)))
++  ptep_xchg_direct(walk->mm, addr, ptep, 
__pte(_PAGE_INVALID));
++  pte_unmap_unlock(ptep, ptl);
++  }
++  return 0;
++}
++
++static inline void zap_zero_pages(struct mm_struct *mm)
++{
++  struct mm_walk walk = { .pmd_entry = __zap_zero_pages };
++
++  walk.mm = mm;
++  walk_page_range(0, TASK_SIZE, );
++}
++
+ /*
+  * switch on pgstes for its userspace process (for kvm)
+  */
+@@ -2134,6 +2165,7 @@ int s390_enable_sie(void)
+   mm->context.has_pgste = 1;
+   /* split thp mappings and disable thp for future mappings */
+   thp_split_mm(mm);
++  zap_zero_pages(mm);
+   up_write(>mmap_sem);
+   return 0;
+ }
+@@ -2146,13 +2178,6 @@ EXPORT_SYMBOL_GPL(s390_enable_sie);
+ static int __s390_enable_skey(pte_t *pte, unsigned long addr,
+ unsigned long next, struct mm_walk *walk)
+ {
+-  /*
+-   * Remove all zero page mappings,
+-   * after establishing a policy to forbid zero page mappings
+-   * following faults for that page will get fresh anonymous pages
+-   */
+-  if (is_zero_pfn(pte_pfn(*pte)))
+-  ptep_xchg_direct(walk->mm, addr, pte, __pte(_PAGE_INVALID));
+   /* Clear storage key */
+   ptep_zap_key(walk->mm, addr, pte);
+   return 0;
+diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
+index b854b1da281a..888bee99fe64 100644
+--- a/arch/s390/mm/mmap.c
 b/arch/s390/mm/mmap.c
+@@ -119,7 +119,8 @@ arch_get_unmapped_area(struct file *filp, unsigned long 
addr,
+   return addr;
+ 
+ check_asce_limit:
+-  if (addr + len > current->mm->context.asce_limit) {
++  if (addr + len > current->mm->context.asce_limit &&
++  addr + len <= TASK_SIZE) {
+   rc = crst_table_upgrade(mm);
+   if (rc)
+   return (unsigned long) rc;
+@@ -183,7 +184,8 @@ arch_get_unmapped_area_topdown(struct file *filp, const 
unsigned long addr0,
+   }
+ 
+ check_asce_limit:
+-  if (addr + len > current->mm->context.asce_limit) {
++  if (addr + len > current->mm->context.asce_limit &&
++  addr + len <= TASK_SIZE) {
+   rc = crst_table_upgrade(mm);
+   if

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-09-07 Thread Mike Pagano 
commit: b3689468077d82446d7542c21032fc93b7d30202
Author: Mike Pagano  gentoo  org>
AuthorDate: Thu Sep  7 22:44:59 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Thu Sep  7 22:44:59 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=b3689468

Linux patch 4.12.11

 _README  |4 +
 1010_linux-4.12.11.patch | 1009 ++
 2 files changed, 1013 insertions(+)

diff --git a/_README b/_README
index a64a189..dd06605 100644
--- a/_README
+++ b/_README
@@ -83,6 +83,10 @@ Patch:  1009_linux-4.12.10.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.10
 
+Patch:  1010_linux-4.12.11.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.11
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1010_linux-4.12.11.patch b/1010_linux-4.12.11.patch
new file mode 100644
index 000..b43b160
--- /dev/null
+++ b/1010_linux-4.12.11.patch
@@ -0,0 +1,1009 @@
+diff --git a/Makefile b/Makefile
+index 6889ec6a091d..e7b2b54b032c 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 10
++SUBLEVEL = 11
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/alpha/include/asm/types.h b/arch/alpha/include/asm/types.h
+index 4cb4b6d3452c..0bc66e1d3a7e 100644
+--- a/arch/alpha/include/asm/types.h
 b/arch/alpha/include/asm/types.h
+@@ -1,6 +1,6 @@
+ #ifndef _ALPHA_TYPES_H
+ #define _ALPHA_TYPES_H
+ 
+-#include 
++#include 
+ 
+ #endif /* _ALPHA_TYPES_H */
+diff --git a/arch/alpha/include/uapi/asm/types.h 
b/arch/alpha/include/uapi/asm/types.h
+index 9fd3cd459777..8d1024d7be05 100644
+--- a/arch/alpha/include/uapi/asm/types.h
 b/arch/alpha/include/uapi/asm/types.h
+@@ -9,8 +9,18 @@
+  * need to be careful to avoid a name clashes.
+  */
+ 
+-#ifndef __KERNEL__
++/*
++ * This is here because we used to use l64 for alpha
++ * and we don't want to impact user mode with our change to ll64
++ * in the kernel.
++ *
++ * However, some user programs are fine with this.  They can
++ * flag __SANE_USERSPACE_TYPES__ to get int-ll64.h here.
++ */
++#if !defined(__SANE_USERSPACE_TYPES__) && !defined(__KERNEL__)
+ #include 
++#else
++#include 
+ #endif
+ 
+ #endif /* _UAPI_ALPHA_TYPES_H */
+diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c
+index 37b95dff0b07..3952d5ef8a7a 100644
+--- a/arch/arm64/mm/fault.c
 b/arch/arm64/mm/fault.c
+@@ -397,8 +397,11 @@ static int __kprobes do_page_fault(unsigned long addr, 
unsigned int esr,
+* signal first. We do not need to release the mmap_sem because it
+* would already be released in __lock_page_or_retry in mm/filemap.c.
+*/
+-  if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
++  if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current)) {
++  if (!user_mode(regs))
++  goto no_context;
+   return 0;
++  }
+ 
+   /*
+* Major/minor page fault accounting is only done on the initial
+diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
+index 7afb0e2f07f4..48febf07e828 100644
+--- a/arch/x86/include/asm/io.h
 b/arch/x86/include/asm/io.h
+@@ -328,13 +328,13 @@ static inline unsigned type in##bwl##_p(int port)
\
+ static inline void outs##bwl(int port, const void *addr, unsigned long count) 
\
+ { \
+   asm volatile("rep; outs" #bwl   \
+-   : "+S"(addr), "+c"(count) : "d"(port));\
++   : "+S"(addr), "+c"(count) : "d"(port) : "memory"); \
+ } \
+   \
+ static inline void ins##bwl(int port, void *addr, unsigned long count)
\
+ { \
+   asm volatile("rep; ins" #bwl\
+-   : "+D"(addr), "+c"(count) : "d"(port));\
++   : "+D"(addr), "+c"(count) : "d"(port) : "memory"); \
+ }
+ 
+ BUILDIO(b, b, char)
+diff --git a/crypto/algif_skcipher.c b/crypto/algif_skcipher.c
+index 43839b00fe6c..903605dbc1a5 100644
+--- a/crypto/algif_skcipher.c
 b/crypto/algif_skcipher.c
+@@ -87,8 +87,13 @@ static void skcipher_free_async_sgls(struct 
skcipher_async_req *sreq)
+   }
+   sgl = sreq->tsg;
+   n = sg_nents(sgl);
+-  for_each_sg(sgl, sg, n, i)
+-  put_page(sg_page(sg));
++  for_each_sg(sgl, sg, n, i) {
++  struct page *page = sg_page(sg);
++
++  /* some SGs may not have a page mapped */
++  if (page && page_ref_count(page))
++  put_page(page);
++

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-30 Thread Mike Pagano 
commit: 333bb572330727d30ce9e4e2b5563e63819eda44
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Aug 30 10:05:12 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Aug 30 10:05:12 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=333bb572

Linux patch 4.12.10

 _README  |4 +
 1009_linux-4.12.10.patch | 3576 ++
 2 files changed, 3580 insertions(+)

diff --git a/_README b/_README
index 90242d0..a64a189 100644
--- a/_README
+++ b/_README
@@ -79,6 +79,10 @@ Patch:  1008_linux-4.12.9.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.9
 
+Patch:  1009_linux-4.12.10.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.10
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1009_linux-4.12.10.patch b/1009_linux-4.12.10.patch
new file mode 100644
index 000..a2ab6c1
--- /dev/null
+++ b/1009_linux-4.12.10.patch
@@ -0,0 +1,3576 @@
+diff --git a/Makefile b/Makefile
+index a6c2a5e7a48d..6889ec6a091d 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 9
++SUBLEVEL = 10
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
+index 19ebddffb279..02fd1cece6ef 100644
+--- a/arch/arc/include/asm/cache.h
 b/arch/arc/include/asm/cache.h
+@@ -96,7 +96,9 @@ extern unsigned long perip_base, perip_end;
+ #define ARC_REG_SLC_FLUSH 0x904
+ #define ARC_REG_SLC_INVALIDATE0x905
+ #define ARC_REG_SLC_RGN_START 0x914
++#define ARC_REG_SLC_RGN_START10x915
+ #define ARC_REG_SLC_RGN_END   0x916
++#define ARC_REG_SLC_RGN_END1  0x917
+ 
+ /* Bit val in SLC_CONTROL */
+ #define SLC_CTRL_DIS  0x001
+diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h
+index db7319e9b506..efb79fafff1d 100644
+--- a/arch/arc/include/asm/mmu.h
 b/arch/arc/include/asm/mmu.h
+@@ -94,6 +94,8 @@ static inline int is_pae40_enabled(void)
+   return IS_ENABLED(CONFIG_ARC_HAS_PAE40);
+ }
+ 
++extern int pae40_exist_but_not_enab(void);
++
+ #endif/* !__ASSEMBLY__ */
+ 
+ #endif
+diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c
+index a867575a758b..7db283b46ebd 100644
+--- a/arch/arc/mm/cache.c
 b/arch/arc/mm/cache.c
+@@ -665,6 +665,7 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, 
const int op)
+   static DEFINE_SPINLOCK(lock);
+   unsigned long flags;
+   unsigned int ctrl;
++  phys_addr_t end;
+ 
+   spin_lock_irqsave(, flags);
+ 
+@@ -694,8 +695,19 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, 
const int op)
+* END needs to be setup before START (latter triggers the operation)
+* END can't be same as START, so add (l2_line_sz - 1) to sz
+*/
+-  write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1));
+-  write_aux_reg(ARC_REG_SLC_RGN_START, paddr);
++  end = paddr + sz + l2_line_sz - 1;
++  if (is_pae40_enabled())
++  write_aux_reg(ARC_REG_SLC_RGN_END1, upper_32_bits(end));
++
++  write_aux_reg(ARC_REG_SLC_RGN_END, lower_32_bits(end));
++
++  if (is_pae40_enabled())
++  write_aux_reg(ARC_REG_SLC_RGN_START1, upper_32_bits(paddr));
++
++  write_aux_reg(ARC_REG_SLC_RGN_START, lower_32_bits(paddr));
++
++  /* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
++  read_aux_reg(ARC_REG_SLC_CTRL);
+ 
+   while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);
+ 
+@@ -,6 +1123,13 @@ noinline void __init arc_ioc_setup(void)
+   __dc_enable();
+ }
+ 
++/*
++ * Cache related boot time checks/setups only needed on master CPU:
++ *  - Geometry checks (kernel build and hardware agree: e.g. L1_CACHE_BYTES)
++ *Assume SMP only, so all cores will have same cache config. A check on
++ *one core suffices for all
++ *  - IOC setup / dma callbacks only need to be done once
++ */
+ void __init arc_cache_init_master(void)
+ {
+   unsigned int __maybe_unused cpu = smp_processor_id();
+@@ -1190,12 +1209,27 @@ void __ref arc_cache_init(void)
+ 
+   printk(arc_cache_mumbojumbo(0, str, sizeof(str)));
+ 
+-  /*
+-   * Only master CPU needs to execute rest of function:
+-   *  - Assume SMP so all cores will have same cache config so
+-   *any geomtry checks will be same for all
+-   *  - IOC setup / dma callbacks only need to be setup once
+-   */
+   if (!cpu)
+   arc_cache_init_master();
++
++  /*
++   * In PAE regime, TLB and cache maintenance ops take wider addresses
++   * And even if PAE is not enabled in kernel, the upper 32-bits still 
need
++   * to be zeroed to keep the ops sane.
++   * As an optimization for more common !PAE enabled case, zero them out
++   * once at init, rather than

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-25 Thread Mike Pagano 
commit: 8911ed4b99ac4a15838eeaaf9bc095b327cb3d23
Author: Mike Pagano  gentoo  org>
AuthorDate: Fri Aug 25 11:00:07 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Fri Aug 25 11:00:07 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=8911ed4b

Linux patch 4.12.9

 _README |4 +
 1008_linux-4.12.9.patch | 1644 +++
 2 files changed, 1648 insertions(+)

diff --git a/_README b/_README
index 47efe0d..90242d0 100644
--- a/_README
+++ b/_README
@@ -75,6 +75,10 @@ Patch:  1007_linux-4.12.8.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.8
 
+Patch:  1008_linux-4.12.9.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.9
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1008_linux-4.12.9.patch b/1008_linux-4.12.9.patch
new file mode 100644
index 000..21e964c
--- /dev/null
+++ b/1008_linux-4.12.9.patch
@@ -0,0 +1,1644 @@
+diff --git a/Makefile b/Makefile
+index 6da481d08441..a6c2a5e7a48d 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 8
++SUBLEVEL = 9
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi 
b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+index 559da17297ef..651299c242ec 100644
+--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
 b/arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi
+@@ -507,7 +507,7 @@
+   pinctrl_pcie: pciegrp {
+   fsl,pins = <
+   /* PCIe reset */
+-  MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x030b0
++  MX6QDL_PAD_EIM_DA0__GPIO3_IO00  0x030b0
+   MX6QDL_PAD_EIM_DA4__GPIO3_IO04  0x030b0
+   >;
+   };
+@@ -668,7 +668,7 @@
+  {
+   pinctrl-names = "default";
+   pinctrl-0 = <_pcie>;
+-  reset-gpio = < 31 GPIO_ACTIVE_LOW>;
++  reset-gpio = < 0 GPIO_ACTIVE_LOW>;
+   status = "okay";
+ };
+ 
+diff --git a/arch/arm/include/asm/bug.h b/arch/arm/include/asm/bug.h
+index 4e6e88a6b2f4..2244a94ed9c9 100644
+--- a/arch/arm/include/asm/bug.h
 b/arch/arm/include/asm/bug.h
+@@ -37,7 +37,7 @@ do { 
\
+   ".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
+   "2:\t.asciz " #__file "\n"  \
+   ".popsection\n" \
+-  ".pushsection __bug_table,\"a\"\n"  \
++  ".pushsection __bug_table,\"aw\"\n" \
+   ".align 2\n"\
+   "3:\t.word 1b, 2b\n"\
+   "\t.hword " #__line ", 0\n" \
+diff --git a/arch/arm64/include/asm/bug.h b/arch/arm64/include/asm/bug.h
+index 366448eb0fb7..a02a57186f56 100644
+--- a/arch/arm64/include/asm/bug.h
 b/arch/arm64/include/asm/bug.h
+@@ -36,7 +36,7 @@
+ #ifdef CONFIG_GENERIC_BUG
+ 
+ #define __BUG_ENTRY(flags)\
+-  ".pushsection __bug_table,\"a\"\n\t"\
++  ".pushsection __bug_table,\"aw\"\n\t"   \
+   ".align 2\n\t"  \
+   "0: .long 1f - 0b\n\t"  \
+ _BUGVERBOSE_LOCATION(__FILE__, __LINE__)  \
+diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
+index acae781f7359..3288c2b36731 100644
+--- a/arch/arm64/include/asm/elf.h
 b/arch/arm64/include/asm/elf.h
+@@ -114,10 +114,10 @@
+ 
+ /*
+  * This is the base location for PIE (ET_DYN with INTERP) loads. On
+- * 64-bit, this is raised to 4GB to leave the entire 32-bit address
++ * 64-bit, this is above 4GB to leave the entire 32-bit address
+  * space open for things that want to use the area for 32-bit pointers.
+  */
+-#define ELF_ET_DYN_BASE   0x1UL
++#define ELF_ET_DYN_BASE   (2 * TASK_SIZE_64 / 3)
+ 
+ #ifndef __ASSEMBLY__
+ 
+diff --git a/arch/blackfin/include/asm/bug.h b/arch/blackfin/include/asm/bug.h
+index 8d9b1eba89c4..76b2e82ee730 100644
+--- a/arch/blackfin/include/asm/bug.h
 b/arch/blackfin/include/asm/bug.h
+@@ -21,7 +21,7 @@
+ #define _BUG_OR_WARN(flags)   \
+   asm volatile(   \
+   "1: .hword  %0\n"   \
+-  "   .section __bug_table,\"a\",@progbits\n" \
++  "   .section __bug_table,\"aw\",@progbits\n"\
+   "2: .long   1b\n"   \
+   "   .long   %1\n"   \
+   "   .short  %2\n"   \
+@@ -38,7 +38,7 @@
+ #define

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-16 Thread Mike Pagano 
commit: bc0d79f2cfab2f521dd63b86f9cc0b8077823e50
Author: Mike Pagano  gentoo  org>
AuthorDate: Wed Aug 16 22:28:16 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Wed Aug 16 22:28:16 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=bc0d79f2

Linux patch 4.12.8

 _README |4 +
 1007_linux-4.12.8.patch | 2849 +++
 2 files changed, 2853 insertions(+)

diff --git a/_README b/_README
index 3a1bafb..47efe0d 100644
--- a/_README
+++ b/_README
@@ -71,6 +71,10 @@ Patch:  1006_linux-4.12.7.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.7
 
+Patch:  1007_linux-4.12.8.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.8
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1007_linux-4.12.8.patch b/1007_linux-4.12.8.patch
new file mode 100644
index 000..560efc0
--- /dev/null
+++ b/1007_linux-4.12.8.patch
@@ -0,0 +1,2849 @@
+diff --git a/Makefile b/Makefile
+index ebe69a704bca..6da481d08441 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 7
++SUBLEVEL = 8
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S
+index 1910223a9c02..cea2bb1621e6 100644
+--- a/arch/mips/dec/int-handler.S
 b/arch/mips/dec/int-handler.S
+@@ -147,23 +147,12 @@
+* Find irq with highest priority
+*/
+   # open coded PTR_LA t1, cpu_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+   # open coded la t1, cpu_mask_nr_tbl
+   lui t1, %hi(cpu_mask_nr_tbl)
+   addiu   t1, %lo(cpu_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+-  # open coded dla t1, cpu_mask_nr_tbl
+-  .setpush
+-  .setnoat
+-  lui t1, %highest(cpu_mask_nr_tbl)
+-  lui AT, %hi(cpu_mask_nr_tbl)
+-  daddiu  t1, t1, %higher(cpu_mask_nr_tbl)
+-  daddiu  AT, AT, %lo(cpu_mask_nr_tbl)
+-  dsllt1, 32
+-  daddu   t1, t1, AT
+-  .setpop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 1:lw  t2,(t1)
+   nop
+@@ -214,23 +203,12 @@
+* Find irq with highest priority
+*/
+   # open coded PTR_LA t1,asic_mask_nr_tbl
+-#if (_MIPS_SZPTR == 32)
++#if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32)
+   # open coded la t1, asic_mask_nr_tbl
+   lui t1, %hi(asic_mask_nr_tbl)
+   addiu   t1, %lo(asic_mask_nr_tbl)
+-
+-#endif
+-#if (_MIPS_SZPTR == 64)
+-  # open coded dla t1, asic_mask_nr_tbl
+-  .setpush
+-  .setnoat
+-  lui t1, %highest(asic_mask_nr_tbl)
+-  lui AT, %hi(asic_mask_nr_tbl)
+-  daddiu  t1, t1, %higher(asic_mask_nr_tbl)
+-  daddiu  AT, AT, %lo(asic_mask_nr_tbl)
+-  dsllt1, 32
+-  daddu   t1, t1, AT
+-  .setpop
++#else
++#error GCC `-msym32' option required for 64-bit DECstation builds
+ #endif
+ 2:lw  t2,(t1)
+   nop
+diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
+index fc67947ed658..8b14c2706aa5 100644
+--- a/arch/mips/include/asm/cache.h
 b/arch/mips/include/asm/cache.h
+@@ -9,6 +9,8 @@
+ #ifndef _ASM_CACHE_H
+ #define _ASM_CACHE_H
+ 
++#include 
++
+ #define L1_CACHE_SHIFTCONFIG_MIPS_L1_CACHE_SHIFT
+ #define L1_CACHE_BYTES(1 << L1_CACHE_SHIFT)
+ 
+diff --git a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h 
b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+index d045973ddb33..3ea84acf1814 100644
+--- a/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
 b/arch/mips/include/asm/octeon/cvmx-l2c-defs.h
+@@ -33,6 +33,10 @@
+ #define CVMX_L2C_DBG (CVMX_ADD_IO_SEG(0x000118008030ull))
+ #define CVMX_L2C_CFG (CVMX_ADD_IO_SEG(0x000118008000ull))
+ #define CVMX_L2C_CTL (CVMX_ADD_IO_SEG(0x000118008080ull))
++#define CVMX_L2C_ERR_TDTX(block_id)  \
++  (CVMX_ADD_IO_SEG(0x0001180080A007E0ull) + ((block_id) & 3) * 0x4ull)
++#define CVMX_L2C_ERR_TTGX(block_id)  \
++  (CVMX_ADD_IO_SEG(0x0001180080A007E8ull) + ((block_id) & 3) * 0x4ull)
+ #define CVMX_L2C_LCKBASE (CVMX_ADD_IO_SEG(0x000118008058ull))
+ #define CVMX_L2C_LCKOFF (CVMX_ADD_IO_SEG(0x000118008060ull))
+ #define CVMX_L2C_PFCTL (CVMX_ADD_IO_SEG(0x000118008090ull))
+@@ -66,9 +70,40 @@
+   ((offset) & 1) * 8)
+ #define CVMX_L2C_WPAR_PPX(offset) (CVMX_ADD_IO_SEG(0x000118008084ull)
+ \
+

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-13 Thread Mike Pagano 
commit: ae3dadabd5058e845ed5bf34cbad53c580cfc6f9
Author: Mike Pagano  gentoo  org>
AuthorDate: Sun Aug 13 16:36:48 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Sun Aug 13 16:36:48 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=ae3dadab

Linux patch 4.12.7

 _README |   4 +
 1006_linux-4.12.7.patch | 648 
 2 files changed, 652 insertions(+)

diff --git a/_README b/_README
index b88e1e0..3a1bafb 100644
--- a/_README
+++ b/_README
@@ -67,6 +67,10 @@ Patch:  1005_linux-4.12.6.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.6
 
+Patch:  1006_linux-4.12.7.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.7
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1006_linux-4.12.7.patch b/1006_linux-4.12.7.patch
new file mode 100644
index 000..b130ed5
--- /dev/null
+++ b/1006_linux-4.12.7.patch
@@ -0,0 +1,648 @@
+diff --git a/Makefile b/Makefile
+index c8d80b50495a..ebe69a704bca 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 6
++SUBLEVEL = 7
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
+index 6e97a2e3fd8d..8cea684f1f53 100644
+--- a/arch/s390/net/bpf_jit_comp.c
 b/arch/s390/net/bpf_jit_comp.c
+@@ -1253,7 +1253,8 @@ static int bpf_jit_prog(struct bpf_jit *jit, struct 
bpf_prog *fp)
+   insn_count = bpf_jit_insn(jit, fp, i);
+   if (insn_count < 0)
+   return -1;
+-  jit->addrs[i + 1] = jit->prg; /* Next instruction address */
++  /* Next instruction address */
++  jit->addrs[i + insn_count] = jit->prg;
+   }
+   bpf_jit_epilogue(jit);
+ 
+diff --git a/drivers/net/ethernet/mellanox/mlx4/en_rx.c 
b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+index 77abd1813047..802f0e8bff3a 100644
+--- a/drivers/net/ethernet/mellanox/mlx4/en_rx.c
 b/drivers/net/ethernet/mellanox/mlx4/en_rx.c
+@@ -572,16 +572,21 @@ static inline __wsum get_fixed_vlan_csum(__wsum 
hw_checksum,
+  * header, the HW adds it. To address that, we are subtracting the pseudo
+  * header checksum from the checksum value provided by the HW.
+  */
+-static void get_fixed_ipv4_csum(__wsum hw_checksum, struct sk_buff *skb,
+-  struct iphdr *iph)
++static int get_fixed_ipv4_csum(__wsum hw_checksum, struct sk_buff *skb,
++ struct iphdr *iph)
+ {
+   __u16 length_for_csum = 0;
+   __wsum csum_pseudo_header = 0;
++  __u8 ipproto = iph->protocol;
++
++  if (unlikely(ipproto == IPPROTO_SCTP))
++  return -1;
+ 
+   length_for_csum = (be16_to_cpu(iph->tot_len) - (iph->ihl << 2));
+   csum_pseudo_header = csum_tcpudp_nofold(iph->saddr, iph->daddr,
+-  length_for_csum, iph->protocol, 
0);
++  length_for_csum, ipproto, 0);
+   skb->csum = csum_sub(hw_checksum, csum_pseudo_header);
++  return 0;
+ }
+ 
+ #if IS_ENABLED(CONFIG_IPV6)
+@@ -592,17 +597,20 @@ static void get_fixed_ipv4_csum(__wsum hw_checksum, 
struct sk_buff *skb,
+ static int get_fixed_ipv6_csum(__wsum hw_checksum, struct sk_buff *skb,
+  struct ipv6hdr *ipv6h)
+ {
++  __u8 nexthdr = ipv6h->nexthdr;
+   __wsum csum_pseudo_hdr = 0;
+ 
+-  if (unlikely(ipv6h->nexthdr == IPPROTO_FRAGMENT ||
+-   ipv6h->nexthdr == IPPROTO_HOPOPTS))
++  if (unlikely(nexthdr == IPPROTO_FRAGMENT ||
++   nexthdr == IPPROTO_HOPOPTS ||
++   nexthdr == IPPROTO_SCTP))
+   return -1;
+-  hw_checksum = csum_add(hw_checksum, (__force 
__wsum)htons(ipv6h->nexthdr));
++  hw_checksum = csum_add(hw_checksum, (__force __wsum)htons(nexthdr));
+ 
+   csum_pseudo_hdr = csum_partial(>saddr,
+  sizeof(ipv6h->saddr) + 
sizeof(ipv6h->daddr), 0);
+   csum_pseudo_hdr = csum_add(csum_pseudo_hdr, (__force 
__wsum)ipv6h->payload_len);
+-  csum_pseudo_hdr = csum_add(csum_pseudo_hdr, (__force 
__wsum)ntohs(ipv6h->nexthdr));
++  csum_pseudo_hdr = csum_add(csum_pseudo_hdr,
++ (__force __wsum)htons(nexthdr));
+ 
+   skb->csum = csum_sub(hw_checksum, csum_pseudo_hdr);
+   skb->csum = csum_add(skb->csum, csum_partial(ipv6h, sizeof(struct 
ipv6hdr), 0));
+@@ -625,11 +633,10 @@ static int check_csum(struct mlx4_cqe *cqe, struct 
sk_buff *skb, void *va,
+   }
+ 
+   if (cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4))
+-  get_fixed_ipv4_csum(hw_checksum, skb, hdr);
++  return get_fixed_ipv4_csum(hw_checksum, skb, hdr);
+ #if IS_ENABLED(CONFIG_IPV6)
+-  else if

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-11 Thread Mike Pagano 
commit: c20ad5072b7e3f69f4ff535dd534453ad3d7b8ec
Author: Mike Pagano  gentoo  org>
AuthorDate: Fri Aug 11 17:39:51 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Fri Aug 11 17:39:51 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=c20ad507

Linux patch 4.12.6

 _README |4 +
 1005_linux-4.12.6.patch | 3935 +++
 2 files changed, 3939 insertions(+)

diff --git a/_README b/_README
index 29e1ca2..b88e1e0 100644
--- a/_README
+++ b/_README
@@ -63,6 +63,10 @@ Patch:  1004_linux-4.12.5.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.5
 
+Patch:  1005_linux-4.12.6.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.6
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1005_linux-4.12.6.patch b/1005_linux-4.12.6.patch
new file mode 100644
index 000..461714c
--- /dev/null
+++ b/1005_linux-4.12.6.patch
@@ -0,0 +1,3935 @@
+diff --git a/Makefile b/Makefile
+index 382e967b0792..c8d80b50495a 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 5
++SUBLEVEL = 6
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/arm/boot/dts/armada-388-gp.dts 
b/arch/arm/boot/dts/armada-388-gp.dts
+index 895fa6cfa15a..563901e0ec07 100644
+--- a/arch/arm/boot/dts/armada-388-gp.dts
 b/arch/arm/boot/dts/armada-388-gp.dts
+@@ -75,7 +75,7 @@
+   pinctrl-names = "default";
+   pinctrl-0 = <_pins>;
+   interrupt-parent = <>;
+-  interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
++  interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+@@ -87,7 +87,7 @@
+   compatible = "nxp,pca9555";
+   pinctrl-names = "default";
+   interrupt-parent = <>;
+-  interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
++  interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+diff --git a/arch/arm/boot/dts/tango4-vantage-1172.dts 
b/arch/arm/boot/dts/tango4-vantage-1172.dts
+index 86d8df98802f..13bcc460bcb2 100644
+--- a/arch/arm/boot/dts/tango4-vantage-1172.dts
 b/arch/arm/boot/dts/tango4-vantage-1172.dts
+@@ -22,7 +22,7 @@
+ };
+ 
+  {
+-  phy-connection-type = "rgmii";
++  phy-connection-type = "rgmii-id";
+   phy-handle = <_phy>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c
+index e62273aacb43..4ffbbd217e82 100644
+--- a/arch/arm/mach-mvebu/platsmp.c
 b/arch/arm/mach-mvebu/platsmp.c
+@@ -211,7 +211,7 @@ static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, 
void *boot_addr)
+   return PTR_ERR(base);
+ 
+   writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG);
+-  writel(virt_to_phys(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
++  writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG);
+ 
+   iounmap(base);
+ 
+diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi 
b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+index bc179efb10ef..b69e4a4ecdd8 100644
+--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
 b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+@@ -219,7 +219,7 @@
+   reg = <0x18800 0x100>, <0x18C00 0x20>;
+   gpiosb: gpio {
+   #gpio-cells = <2>;
+-  gpio-ranges = <_sb 0 0 29>;
++  gpio-ranges = <_sb 0 0 30>;
+   gpio-controller;
+   interrupts =
+   ,
+diff --git a/arch/mips/include/asm/mach-ralink/ralink_regs.h 
b/arch/mips/include/asm/mach-ralink/ralink_regs.h
+index 9df1a53bcb36..b4e7dfa214eb 100644
+--- a/arch/mips/include/asm/mach-ralink/ralink_regs.h
 b/arch/mips/include/asm/mach-ralink/ralink_regs.h
+@@ -13,6 +13,8 @@
+ #ifndef _RALINK_REGS_H_
+ #define _RALINK_REGS_H_
+ 
++#include 
++
+ enum ralink_soc_type {
+   RALINK_UNKNOWN = 0,
+   RT2880_SOC,
+diff --git a/arch/parisc/include/asm/thread_info.h 
b/arch/parisc/include/asm/thread_info.h
+index 88fe0aad4390..bc208136bbb2 100644
+--- a/arch/parisc/include/asm/thread_info.h

[gentoo-commits] proj/linux-patches:4.12 commit in: /

2017-08-06 Thread Mike Pagano 
commit: 0f23b605fb69e470f285ce960cb4fd7e0492050e
Author: Mike Pagano  gentoo  org>
AuthorDate: Sun Aug  6 19:34:27 2017 +
Commit: Mike Pagano  gentoo  org>
CommitDate: Sun Aug  6 19:34:27 2017 +
URL:https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=0f23b605

Linux patch 4.12.5

 _README |   4 +
 1004_linux-4.12.5.patch | 997 
 2 files changed, 1001 insertions(+)

diff --git a/_README b/_README
index 09d6e6c..29e1ca2 100644
--- a/_README
+++ b/_README
@@ -59,6 +59,10 @@ Patch:  1003_linux-4.12.4.patch
 From:   http://www.kernel.org
 Desc:   Linux 4.12.4
 
+Patch:  1004_linux-4.12.5.patch
+From:   http://www.kernel.org
+Desc:   Linux 4.12.5
+
 Patch:  1500_XATTR_USER_PREFIX.patch
 From:   https://bugs.gentoo.org/show_bug.cgi?id=470644
 Desc:   Support for namespace user.pax.* on tmpfs.

diff --git a/1004_linux-4.12.5.patch b/1004_linux-4.12.5.patch
new file mode 100644
index 000..0b6a672
--- /dev/null
+++ b/1004_linux-4.12.5.patch
@@ -0,0 +1,997 @@
+diff --git a/Makefile b/Makefile
+index bfdc92c2e47a..382e967b0792 100644
+--- a/Makefile
 b/Makefile
+@@ -1,6 +1,6 @@
+ VERSION = 4
+ PATCHLEVEL = 12
+-SUBLEVEL = 4
++SUBLEVEL = 5
+ EXTRAVERSION =
+ NAME = Fearless Coyote
+ 
+diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
+index c32a09095216..85a92db70afc 100644
+--- a/arch/parisc/kernel/cache.c
 b/arch/parisc/kernel/cache.c
+@@ -453,8 +453,8 @@ void copy_user_page(void *vto, void *vfrom, unsigned long 
vaddr,
+ before it can be accessed through the kernel mapping. */
+   preempt_disable();
+   flush_dcache_page_asm(__pa(vfrom), vaddr);
+-  preempt_enable();
+   copy_page_asm(vto, vfrom);
++  preempt_enable();
+ }
+ EXPORT_SYMBOL(copy_user_page);
+ 
+@@ -539,6 +539,10 @@ void flush_cache_mm(struct mm_struct *mm)
+   struct vm_area_struct *vma;
+   pgd_t *pgd;
+ 
++  /* Flush the TLB to avoid speculation if coherency is required. */
++  if (parisc_requires_coherency())
++  flush_tlb_all();
++
+   /* Flushing the whole cache on each cpu takes forever on
+  rp3440, etc.  So, avoid it if the mm isn't too big.  */
+   if (mm_total_size(mm) >= parisc_cache_flush_threshold) {
+@@ -577,33 +581,22 @@ void flush_cache_mm(struct mm_struct *mm)
+ void flush_cache_range(struct vm_area_struct *vma,
+   unsigned long start, unsigned long end)
+ {
+-  unsigned long addr;
+-  pgd_t *pgd;
+-
+   BUG_ON(!vma->vm_mm->context);
+ 
++  /* Flush the TLB to avoid speculation if coherency is required. */
++  if (parisc_requires_coherency())
++  flush_tlb_range(vma, start, end);
++
+   if ((end - start) >= parisc_cache_flush_threshold) {
+   flush_cache_all();
+   return;
+   }
+ 
+-  if (vma->vm_mm->context == mfsp(3)) {
+-  flush_user_dcache_range_asm(start, end);
+-  if (vma->vm_flags & VM_EXEC)
+-  flush_user_icache_range_asm(start, end);
+-  return;
+-  }
++  BUG_ON(vma->vm_mm->context != mfsp(3));
+ 
+-  pgd = vma->vm_mm->pgd;
+-  for (addr = start & PAGE_MASK; addr < end; addr += PAGE_SIZE) {
+-  unsigned long pfn;
+-  pte_t *ptep = get_ptep(pgd, addr);
+-  if (!ptep)
+-  continue;
+-  pfn = pte_pfn(*ptep);
+-  if (pfn_valid(pfn))
+-  __flush_cache_page(vma, addr, PFN_PHYS(pfn));
+-  }
++  flush_user_dcache_range_asm(start, end);
++  if (vma->vm_flags & VM_EXEC)
++  flush_user_icache_range_asm(start, end);
+ }
+ 
+ void
+@@ -612,7 +605,8 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long 
vmaddr, unsigned long
+   BUG_ON(!vma->vm_mm->context);
+ 
+   if (pfn_valid(pfn)) {
+-  flush_tlb_page(vma, vmaddr);
++  if (parisc_requires_coherency())
++  flush_tlb_page(vma, vmaddr);
+   __flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
+   }
+ }
+diff --git a/arch/parisc/kernel/process.c b/arch/parisc/kernel/process.c
+index b64d7d21646e..a45a67d526f8 100644
+--- a/arch/parisc/kernel/process.c
 b/arch/parisc/kernel/process.c
+@@ -53,6 +53,7 @@
+ #include 
+ #include 
+ #include 
++#include 
+ 
+ #include 
+ #include 
+@@ -145,6 +146,7 @@ void machine_power_off(void)
+ 
+   /* prevent soft lockup/stalled CPU messages for endless loop. */
+   rcu_sysrq_start();
++  lockup_detector_suspend();
+   for (;;);
+ }
+ 
+diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c 
b/arch/powerpc/kvm/book3s_64_mmu_hv.c
+index 710e491206ed..1c10e26cebbb 100644
+--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
 b/arch/powerpc/kvm/book3s_64_mmu_hv.c
+@@ -164,8 +164,10 @@ long kvmppc_alloc_reset_hpt(struct kvm *kvm, int order)
+   goto out;
+   }
+ 
+-  if