Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.
Olivier Galibert galib...@pobox.com writes: On Tue, Jul 17, 2012 at 07:37:43AM -0700, Paul Berry wrote: If possible, I would still like to think of a way to address this situation that (a) doesn't require modifying both fragment shader back-ends and the SF program, and (b) helps all Mesa drivers, not just Intel Gen4-5. Especially because I suspect we may have bugs in Gen6-7 related to this situation. You don't :-) It's correctly handled in gen6_sf_state.c::get_attr_override with similar semantics too. Would you be happy with one of the following two alternatives? 1. In the GLSL front-end, if we detect that a vertex shader writes to gl_BackColor but not gl_FrontColor, then automatically insert gl_FrontColor = 0; into the shader. This will guarantee that whenever gl_BackColor is written, gl_FrontColor is too. 2. In the function brw_compute_vue_map(), assign a VUE slot for VERT_RESULT_COL0 whenever *either* VERT_RESULT_COL0 or VERT_RESULT_BFC0 is used. This will guarantee that we always have a VUE slot available for front color, so we don't have to be as tricky in the FS and SF code. With both methods the SF code is not really simplified. Doing the mov without testing would require writing to/reserving a slot for gl_BackColor if gl_FrontColor is written to, which wouldn't be acceptable. And to write to/reserve a slot for the two of them if gl_Color is read in any case. Probably unacceptable. So the need_* stuff is going to stay in any case :/ I'm perfectly fine with the VUE containing slots for both when the app has gone out of its way to ask for deprecated two-sided color rendering. pgpUM0cQlSmKO.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [Mesa-dev] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.
On Mon, Jul 30, 2012 at 10:30:57AM -0700, Eric Anholt wrote: I'm perfectly fine with the VUE containing slots for both when the app has gone out of its way to ask for deprecated two-sided color rendering. Are you also ok with recompiler the shaders when that enable is switched? OG. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Make intel_panel_get_backlight static.
This function isn't used outside of intel_panel.c, so make it static.
Signed-off-by: Stéphane Marchesin marc...@chromium.org
---
drivers/gpu/drm/i915/intel_drv.h |1 -
drivers/gpu/drm/i915/intel_panel.c |2 +-
2 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 8435355..3afe355 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -380,7 +380,6 @@ extern void intel_pch_panel_fitting(struct drm_device *dev,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode);
extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
-extern u32 intel_panel_get_backlight(struct drm_device *dev);
extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
extern int intel_panel_setup_backlight(struct drm_device *dev);
extern void intel_panel_enable_backlight(struct drm_device *dev,
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 10c7d39..9474488 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -213,7 +213,7 @@ static u32 intel_panel_compute_brightness(struct drm_device
*dev, u32 val)
return val;
}
-u32 intel_panel_get_backlight(struct drm_device *dev)
+static u32 intel_panel_get_backlight(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
u32 val;
--
1.7.5.3.367.ga9930
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[Intel-gfx] Macbook Pro Retina display problems
Hi all, I'm trying to the the $Subject laptop up and running using the built-in Intel graphics chip: 00:02.0 VGA compatible controller: Intel Corporation 3rd Gen Core processor Graphics Controller (rev 09) (prog-if 00 [VGA controller]) Subsystem: Apple Inc. Device 00f7 Flags: bus master, fast devsel, latency 0, IRQ 53 Memory at c140 (64-bit, non-prefetchable) [size=4M] Memory at b000 (64-bit, prefetchable) [size=256M] I/O ports at 3000 [size=64] Expansion ROM at unassigned [disabled] Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [d0] Power Management version 2 Capabilities: [a4] PCI Advanced Features Kernel driver in use: i915 And it seems that the xorg Intel driver just doesn't recognize it at all. Below is my Xorg.0.log file. I'm using a 3.5.0 kernel (with a few minor hardware patches for other bits of this laptop that don't work with 3.5.0, but no changes to the graphics drivers.) Any ideas or patches I can try out? thanks, greg k-h [ 616.279] This is a pre-release version of the X server from The X.Org Foundation. It is not supported in any way. Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/. Select the xorg product for bugs you find in this release. Before reporting bugs in pre-release versions please check the latest version in the X.Org Foundation git repository. See http://wiki.x.org/wiki/GitPage for git access instructions. [ 616.302] X.Org X Server 1.12.99.903 (1.13.0 RC 3) Release Date: 2012-07-25 [ 616.371] X Protocol Version 11, Revision 0 [ 616.394] Build Operating System: Linux 3.5.0gregkh+ x86_64 Gentoo [ 616.417] Current Operating System: Linux mb.kroah.org 3.5.0gregkh-drm+ #9 SMP Mon Jul 30 14:34:31 PDT 2012 x86_64 [ 616.417] Kernel command line: root=/dev/sda2 rootwait root=/dev/sda2 rootwait [ 616.464] Build Date: 26 July 2012 09:03:46PM [ 616.487] [ 616.510] Current version of pixman: 0.26.2 [ 616.557]Before reporting problems, check http://wiki.x.org to make sure that you have the latest version. [ 616.557] Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. [ 616.652] (==) Log file: /var/log/Xorg.0.log, Time: Mon Jul 30 15:23:38 2012 [ 616.678] (==) Using system config directory /usr/share/X11/xorg.conf.d [ 616.678] (==) No Layout section. Using the first Screen section. [ 616.678] (==) No screen section available. Using defaults. [ 616.678] (**) |--Screen Default Screen Section (0) [ 616.678] (**) | |--Monitor default monitor [ 616.679] (==) No monitor specified for screen Default Screen Section. Using a default monitor configuration. [ 616.679] (==) Automatically adding devices [ 616.679] (==) Automatically enabling devices [ 616.679] (==) Automatically adding GPU devices [ 616.679] (WW) The directory /usr/share/fonts/misc/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (WW) The directory /usr/share/fonts/TTF/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (WW) The directory /usr/share/fonts/OTF/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (WW) The directory /usr/share/fonts/Type1/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (WW) The directory /usr/share/fonts/100dpi/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (WW) The directory /usr/share/fonts/75dpi/ does not exist. [ 616.679]Entry deleted from font path. [ 616.679] (==) FontPath set to: [ 616.679] (==) ModulePath set to /usr/lib64/xorg/modules [ 616.679] (II) The server relies on udev to provide the list of input devices. If no devices become available, reconfigure udev or disable AutoAddDevices. [ 616.679] (II) Loader magic: 0x84dc00 [ 616.679] (II) Module ABI versions: [ 616.679]X.Org ANSI C Emulation: 0.4 [ 616.679]X.Org Video Driver: 13.0 [ 616.679]X.Org XInput driver : 18.0 [ 616.679]X.Org Server Extension : 6.0 [ 616.680] (II) config/udev: Adding drm device (/dev/dri/card0) [ 616.681] (--) PCI: (0:0:2:0) 8086:0166:106b:00f7 rev 9, Mem @ 0xc140/4194304, 0xb000/268435456, I/O @ 0x3000/64 [ 616.681] (--) PCI:*(0:1:0:0) 10de:0fd5:106b:00f2 rev 161, Mem @ 0xc000/16777216, 0x9000/268435456, 0xa000/33554432, I/O @ 0x2000/128, BIOS @ 0x/524288 [ 616.681] (WW) Open ACPI failed (/var/run/acpid.socket) (No such file or directory) [ 616.706] Initializing built-in extension Generic Event Extension [ 616.730] Initializing built-in extension SHAPE [ 616.754] Initializing built-in extension MIT-SHM [ 616.778] Initializing built-in extension XInputExtension [ 616.802] Initializing built-in extension XTEST [
[Intel-gfx] [PATCH] drm/i915: Don't forget to apply SNB PIPE_CONTROL GTT workaround.
If a buffer that was the target of a PIPE_CONTROL from userland was a
reused one that hadn't been evicted which had not previously had this
workaround applied, then we would not bind it into the GTT and the
write would land somewhere else.
Based on a doubting-my-sanity debugging session with cworth, I'm
pretty sure this will fix his reproducible GL_EXT_timer_query
failures, and hopefully the intermittent OQ issues on snb that
danvet's been working on.
I have not tested it yet, but hopefully when cworth gets home he will.
Signed-off-by: Eric Anholt e...@anholt.net
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 25b2c54..afb312e 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -117,6 +117,16 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
target_i915_obj = to_intel_bo(target_obj);
target_offset = target_i915_obj-gtt_offset;
+ /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
+* pipe_control writes because the gpu doesn't properly redirect them
+* through the ppgtt for non_secure batchbuffers. */
+ if (unlikely(IS_GEN6(dev)
+ reloc-write_domain == I915_GEM_DOMAIN_INSTRUCTION
+ !target_i915_obj-has_global_gtt_mapping)) {
+ i915_gem_gtt_bind_object(target_i915_obj,
+target_i915_obj-cache_level);
+ }
+
/* The target buffer should have appeared before us in the
* exec_object list, so it should have a GTT space bound by now.
*/
@@ -225,16 +235,6 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
io_mapping_unmap_atomic(reloc_page);
}
- /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and
-* pipe_control writes because the gpu doesn't properly redirect them
-* through the ppgtt for non_secure batchbuffers. */
- if (unlikely(IS_GEN6(dev)
- reloc-write_domain == I915_GEM_DOMAIN_INSTRUCTION
- !target_i915_obj-has_global_gtt_mapping)) {
- i915_gem_gtt_bind_object(target_i915_obj,
-target_i915_obj-cache_level);
- }
-
/* and update the user's relocation entry */
reloc-presumed_offset = target_offset;
--
1.7.10.4
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Re: [Intel-gfx] Macbook Pro Retina display problems
On Tue, Jul 31, 2012 at 8:33 AM, Greg KH gre...@linuxfoundation.org wrote: Hi all, I'm trying to the the $Subject laptop up and running using the built-in Intel graphics chip: 00:02.0 VGA compatible controller: Intel Corporation 3rd Gen Core processor Graphics Controller (rev 09) (prog-if 00 [VGA controller]) Subsystem: Apple Inc. Device 00f7 Flags: bus master, fast devsel, latency 0, IRQ 53 Memory at c140 (64-bit, non-prefetchable) [size=4M] Memory at b000 (64-bit, prefetchable) [size=256M] I/O ports at 3000 [size=64] Expansion ROM at unassigned [disabled] Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [d0] Power Management version 2 Capabilities: [a4] PCI Advanced Features Kernel driver in use: i915 And it seems that the xorg Intel driver just doesn't recognize it at all. Below is my Xorg.0.log file. I'm using a 3.5.0 kernel (with a few minor hardware patches for other bits of this laptop that don't work with 3.5.0, but no changes to the graphics drivers.) Any ideas or patches I can try out? try writing an xorg.conf with a BusID in it and see if it works, most likely the primary boot_vga detection is busted. Dave. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] Find bugs in i915 driver
Hi, I found some bugs in i915 driver when reviewing intel_display.c The
parameter passed-in for function hdmi/adpa/lvds_pipe_enabled() are not coherent
with functions' definition.
This is the patch.
Thanks
Eric
commit 9128c5c29649a1eea4e7db9282d0aa57e4885ba8
Author: Xu Anhua anhua...@intel.com
Date: Mon Jul 30 20:59:48 2012 +0800
i915: fix wrong parameter sequence when calling
hdmi/adpa/lvds_pipe_enabled()
When calling hdmi/adpa/lvds_pipe_enabled(),make the
parameters passed-in coherent with function definitions
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index f615976..5fc8c8d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1383,7 +1383,7 @@ static void assert_pch_hdmi_disabled(struct
drm_i915_private *dev_priv,
enum pipe pipe, int reg)
{
u32 val = I915_READ(reg);
- WARN(hdmi_pipe_enabled(dev_priv, val, pipe),
+ WARN(hdmi_pipe_enabled(dev_priv, pipe, val),
PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n,
reg, pipe_name(pipe));
@@ -1403,13 +1403,13 @@ static void assert_pch_ports_disabled(struct
drm_i915_private *dev_priv,
reg = PCH_ADPA;
val = I915_READ(reg);
- WARN(adpa_pipe_enabled(dev_priv, val, pipe),
+ WARN(adpa_pipe_enabled(dev_priv, pipe, val),
PCH VGA enabled on transcoder %c, should be disabled\n,
pipe_name(pipe));
reg = PCH_LVDS;
val = I915_READ(reg);
- WARN(lvds_pipe_enabled(dev_priv, val, pipe),
+ WARN(lvds_pipe_enabled(dev_priv, pipe, val),
PCH LVDS enabled on transcoder %c, should be disabled\n,
pipe_name(pipe));
@@ -1871,7 +1871,7 @@ static void disable_pch_hdmi(struct drm_i915_private
*dev_priv,
enum pipe pipe, int reg)
{
u32 val = I915_READ(reg);
- if (hdmi_pipe_enabled(dev_priv, val, pipe)) {
+ if (hdmi_pipe_enabled(dev_priv, pipe, val)) {
DRM_DEBUG_KMS(Disabling pch HDMI %x on pipe %d\n,
reg, pipe);
I915_WRITE(reg, val ~PORT_ENABLE);
@@ -1893,12 +1893,12 @@ static void intel_disable_pch_ports(struct
drm_i915_private *dev_priv,
reg = PCH_ADPA;
val = I915_READ(reg);
- if (adpa_pipe_enabled(dev_priv, val, pipe))
+ if (adpa_pipe_enabled(dev_priv, pipe, val))
I915_WRITE(reg, val ~ADPA_DAC_ENABLE);
reg = PCH_LVDS;
val = I915_READ(reg);
- if (lvds_pipe_enabled(dev_priv, val, pipe)) {
+ if (lvds_pipe_enabled(dev_priv, pipe, val)) {
DRM_DEBUG_KMS(disable lvds on pipe %d val 0x%08x\n, pipe,
val);
I915_WRITE(reg, val ~LVDS_PORT_EN);
POSTING_READ(reg);
intel-display-wrong-para-sequence.patch
Description: intel-display-wrong-para-sequence.patch
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[Intel-gfx] [PATCH v2 0/4] Haswell HDMI/DP audio enable
This patch series enable HDMI audio on Haswell platform, not DP audio. The DP enablement will come after the DP patches are upstream. V2 patches fixed one warning and some type errors. Here're some notes useful for you to test the patches on Sharkbay machine: I please make sure your branch include below three patches in Takashi's sound tree, othersiwe there's no proper Haswell ID and HDMI ID. http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=79fc901301d6115b11457e8240ed6abc4b3f5c65 http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=e269cee227a2b2297b79bfc71094c709b9387061 http://git.alsa-project.org/?p=alsa-kmirror.git;a=commitdiff;h=cb192625233496ac3d96cce667ebf4e322dab678 II No sound from HDMI/DP. we found it's not stable in current stage, sometimes you may not heard sound from HDMI or DP port, but most of the time you can heard clear sound. After some investigation, we suspect the HDA verb didnot really make codec change,and we regard the GPU register as the right one. the easy way is to use intel_audio_dump to compare related registers, and make sure the port is enabled and unmute, otherwise there's no sound. intel_audio_tools has no support on Haswell yet, i wrote patches to make that happen, if you need the patches, please feel free to let me know. Here's part of the snapshot about port enable and mute status from intel_audio_dump: AUD_PORT_EN_HD_CFG Port_B_Out_Enable 1 AUD_PORT_EN_HD_CFG Port_C_Out_Enable 1 AUD_PORT_EN_HD_CFG Port_D_Out_Enable 1 AUD_PORT_EN_HD_CFG Port_B_Amp_Mute_Status 1 AUD_PORT_EN_HD_CFG Port_C_Amp_Mute_Status 0 AUD_PORT_EN_HD_CFG Port_D_Amp_Mute_Status 1 you can see from above message, the Port C is enabled and unmute, that's what we expect. Wang Xingchao (4): drm/i915: HSW audio registers definition drm/i915: write eld info for HDMI audio drm/i915: Haswell HDMI audio enable ALSA HDA: Force HDMI pins enabled drivers/gpu/drm/i915/i915_reg.h | 46 +++ drivers/gpu/drm/i915/intel_ddi.c |6 +++- drivers/gpu/drm/i915/intel_display.c | 58 ++ sound/pci/hda/patch_hdmi.c | 15 + 4 files changed, 117 insertions(+), 8 deletions(-) -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V2 2/4] drm/i915: write eld info for HDMI audio
HDMI audio related registers will be configured in write_eld callback. Signed-off-by: Wang Xingchao xingchao.w...@intel.com --- drivers/gpu/drm/i915/intel_ddi.c |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 32604ac..4c12371 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -718,8 +718,12 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, /* Proper support for digital audio needs a new logic and a new set * of registers, so we leave it for future patch bombing. */ - DRM_DEBUG_DRIVER(HDMI audio on pipe %c not yet supported on DDI\n, + DRM_DEBUG_DRIVER(HDMI audio on pipe %c on DDI\n, pipe_name(intel_crtc-pipe)); + + /* write eld */ + DRM_DEBUG_DRIVER(HDMI audio: write eld information\n); + intel_write_eld(encoder, adjusted_mode); } /* Enable PIPE_DDI_FUNC_CTL for the pipe to work in HDMI mode */ -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V2 3/4] drm/i915: Haswell HDMI audio enable
Configure the related HDMI audio register to generate an unsolicited
response to the audio controller driver to indicate that the controller
sequence should start.
Signed-off-by: Wang Xingchao xingchao.w...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 58 ++
1 file changed, 58 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 17020cd..7ddc446 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1649,6 +1649,7 @@ static void intel_enable_transcoder(struct
drm_i915_private *dev_priv,
u32 val, pipeconf_val;
struct drm_crtc *crtc = dev_priv-pipe_to_crtc_mapping[pipe];
+ DRM_DEBUG_DRIVER(Enable transcoder %c\n, pipe_name(pipe));
/* PCH only available on ILK+ */
BUG_ON(dev_priv-info-gen 5);
@@ -5071,6 +5072,7 @@ static void ironlake_write_eld(struct drm_connector
*connector,
struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = connector-dev-dev_private;
+ struct drm_device *dev = crtc-dev;
uint8_t *eld = connector-eld;
uint32_t eldv;
uint32_t i;
@@ -5085,6 +5087,11 @@ static void ironlake_write_eld(struct drm_connector
*connector,
aud_config = IBX_AUD_CONFIG_A;
aud_cntl_st = IBX_AUD_CNTL_ST_A;
aud_cntrl_st2 = IBX_AUD_CNTL_ST2;
+ } else if (IS_HASWELL(dev)) {
+ hdmiw_hdmiedid = HSW_AUD_EDID_DATA;
+ aud_cntl_st = HSW_AUD_DIP_ELD_CTRL_ST_A;
+ aud_config = HSW_AUD_CONFIG_A;
+ aud_cntrl_st2 = HSW_AUD_PIN_ELD_CP_VLD;
} else {
hdmiw_hdmiedid = CPT_HDMIW_HDMIEDID_A;
aud_config = CPT_AUD_CONFIG_A;
@@ -5092,6 +5099,55 @@ static void ironlake_write_eld(struct drm_connector
*connector,
aud_cntrl_st2 = CPT_AUD_CNTRL_ST2;
}
+ if (IS_HASWELL(dev)) {
+ int tmp;
+ int aud_cfg;
+ int aud_vld;
+ int eld_ctr_st;
+ int audio_misc;
+ int transf_a;
+ int pipe;
+
+ pipe = to_intel_crtc(crtc)-pipe;
+
+ DRM_DEBUG_DRIVER(HDMI: Haswell Audio initialize\n);
+
+ /* Need first enable transcoder and port */
+ aud_cfg = HSW_AUD_CFG(pipe);
+ eld_ctr_st = HSW_AUD_DIP_ELD_CTRL(pipe);
+ aud_vld = HSW_AUD_PIN_ELD_CP_VLD;
+ audio_misc = HSW_AUD_MISC_CTRL(pipe);
+
+ transf_a = TRANS_CONF_A;
+
+ /* Audio output enable */
+ DRM_DEBUG_DRIVER(HDMI audio: enable codec\n);
+ tmp = I915_READ(aud_vld);
+ tmp |= (AUDIO_OUTPUT_ENABLE_AB | AUDIO_OUTPUT_ENABLE_BC |
AUDIO_OUTPUT_ENABLE_CD);
+ I915_WRITE(aud_vld, tmp);
+
+ /* Set ELD valid state */
+ tmp = I915_READ(aud_vld);
+ DRM_DEBUG_DRIVER(HDMI audio: pin eld vld status=0x%8x\n, tmp);
+ tmp |= (AUDIO_ELD_VALID_AB | AUDIO_ELD_VALID_BC |
AUDIO_ELD_VALID_CD);
+ I915_WRITE(aud_vld, tmp);
+ tmp = I915_READ(aud_vld);
+ DRM_DEBUG_DRIVER(HDMI audio: eld vld status=0x%8x\n, tmp);
+
+ /* Enable HDMI mode */
+ tmp = I915_READ(aud_cfg);
+ DRM_DEBUG_DRIVER(HDMI audio: audio conf: 0x%8x\n, tmp);
+ /* clear N_programing_enable and N_value_index */
+ tmp = ~(0x329);
+ I915_WRITE(aud_cfg, tmp);
+
+ /*TODO:
+* 1.enable sample fabrication
+* 2.set Upper_N_value(27:20) and Lower_N_value(15:4)
+* 3.enable timestamps
+* */
+ }
+
i = to_intel_crtc(crtc)-pipe;
hdmiw_hdmiedid += i * 0x100;
aud_cntl_st += i * 0x100;
@@ -5135,6 +5191,8 @@ static void ironlake_write_eld(struct drm_connector
*connector,
i = I915_READ(aud_cntl_st);
i = ~IBX_ELD_ADDRESS;
I915_WRITE(aud_cntl_st, i);
+ i = (i 29) 0x3;/* DIP_Port_Select, 0x1 = PortB */
+ DRM_DEBUG_DRIVER(port num:%d\n, i);
len = min_t(uint8_t, eld[2], 21); /* 84 bytes of hw ELD buffer */
DRM_DEBUG_DRIVER(ELD size %d\n, len);
--
1.7.9.5
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[Intel-gfx] [PATCH V2 4/4] ALSA HDA: Force HDMI pins enabled
There's one issue for HDMI pins, even the related pin will be enabled
when the stream is active but the GPU registers show the PIN is not in
active state, so we force all pins in active state and donot close it
when the stream is closed.
Signed-off-by: Wang Xingchao xingchao.w...@intel.com
---
sound/pci/hda/patch_hdmi.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index ad319d4..64cc9e0 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -421,13 +421,17 @@ static void hdmi_write_dip_byte(struct hda_codec *codec,
hda_nid_t pin_nid,
static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
{
+ /* Force all output Pins enabled */
+ snd_printk(KERN_DEBUG HDMI: enable all output\n);
+ snd_hda_codec_write(codec, pin_nid, 0,
+ AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40);
+
/* Unmute */
- if (get_wcaps(codec, pin_nid) AC_WCAP_OUT_AMP)
+ if (get_wcaps(codec, pin_nid) AC_WCAP_OUT_AMP) {
+ snd_printk(KERN_DEBUG HDMI: unmute pin %d\n, pin_nid);
snd_hda_codec_write(codec, pin_nid, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
- /* Disable pin out until stream is active*/
- snd_hda_codec_write(codec, pin_nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL, 0);
+ }
}
static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
@@ -1190,9 +1194,6 @@ static int generic_hdmi_playback_pcm_cleanup(struct
hda_pcm_stream *hinfo,
pinctl = snd_hda_codec_read(codec, per_pin-pin_nid, 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
- snd_hda_codec_write(codec, per_pin-pin_nid, 0,
- AC_VERB_SET_PIN_WIDGET_CONTROL,
- pinctl ~PIN_OUT);
snd_hda_spdif_ctls_unassign(codec, pin_idx);
}
--
1.7.9.5
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Re: [Intel-gfx] Macbook Pro Retina display problems
On Tue, Jul 31, 2012 at 1:41 PM, Greg KH gre...@linuxfoundation.org wrote: On Tue, Jul 31, 2012 at 12:06:28PM +1000, Dave Airlie wrote: On Tue, Jul 31, 2012 at 8:33 AM, Greg KH gre...@linuxfoundation.org wrote: Hi all, I'm trying to the the $Subject laptop up and running using the built-in Intel graphics chip: 00:02.0 VGA compatible controller: Intel Corporation 3rd Gen Core processor Graphics Controller (rev 09) (prog-if 00 [VGA controller]) Subsystem: Apple Inc. Device 00f7 Flags: bus master, fast devsel, latency 0, IRQ 53 Memory at c140 (64-bit, non-prefetchable) [size=4M] Memory at b000 (64-bit, prefetchable) [size=256M] I/O ports at 3000 [size=64] Expansion ROM at unassigned [disabled] Capabilities: [90] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [d0] Power Management version 2 Capabilities: [a4] PCI Advanced Features Kernel driver in use: i915 And it seems that the xorg Intel driver just doesn't recognize it at all. Below is my Xorg.0.log file. I'm using a 3.5.0 kernel (with a few minor hardware patches for other bits of this laptop that don't work with 3.5.0, but no changes to the graphics drivers.) Any ideas or patches I can try out? try writing an xorg.conf with a BusID in it and see if it works, most likely the primary boot_vga detection is busted. Ah, I did that previously, it gave me a black screen and locked up. I'll get the log from that tomorrow and send it here. Note, we are switching from EFI framebuffer mode, so could that be an issue as well? And, just to make it fun, this laptop also has an nvidia chip in it, but someone else is working on getting the nouveau driver working on it, I was trying to stay away from that mess :) Yeah the problem is most likely that the nvidia is connected to the screen :-) I think mjg59 has been working on some stuff in this area lately as well. Dave. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
