[Intel-gfx] [PATCH] drm/i915: Replace racy object bookkeeping
Now that we track objects for their entire lifetime in a list, we can
move the cost of the bookkeeping to the infrequent query of
i915_gem_objects. This also removes the race where we would increment the
global object count and size without holding any locks.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67121
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_debugfs.c | 9 ++---
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/i915_gem.c | 19 ---
3 files changed, 6 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index cc3e74a..baefd8b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -228,9 +228,12 @@ static int i915_gem_object_info(struct seq_file *m, void
*data)
if (ret)
return ret;
- seq_printf(m, %u objects, %zu bytes\n,
- dev_priv-mm.object_count,
- dev_priv-mm.object_memory);
+ size = count = 0;
+ list_for_each_entry(obj, dev_priv-mm.unbound_list, global_list)
+ size += obj-base.size, ++count;
+ list_for_each_entry(obj, dev_priv-mm.bound_list, global_list)
+ size += obj-base.size, ++count;
+ seq_printf(m, %u objects, %zu bytes\n, count, size);
size = count = mappable_size = mappable_count = 0;
count_objects(dev_priv-mm.bound_list, global_list);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2cfa12c..54d5627 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -932,10 +932,6 @@ struct i915_gem_mm {
/* storage for physical objects */
struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
-
- /* accounting, useful for userland debugging */
- size_t object_memory;
- u32 object_count;
};
struct drm_i915_error_state_buf {
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 321a187..2283765 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -71,21 +71,6 @@ static inline void i915_gem_object_fence_lost(struct
drm_i915_gem_object *obj)
obj-fence_reg = I915_FENCE_REG_NONE;
}
-/* some bookkeeping */
-static void i915_gem_info_add_obj(struct drm_i915_private *dev_priv,
- size_t size)
-{
- dev_priv-mm.object_count++;
- dev_priv-mm.object_memory += size;
-}
-
-static void i915_gem_info_remove_obj(struct drm_i915_private *dev_priv,
-size_t size)
-{
- dev_priv-mm.object_count--;
- dev_priv-mm.object_memory -= size;
-}
-
static int
i915_gem_wait_for_error(struct i915_gpu_error *error)
{
@@ -221,7 +206,6 @@ i915_gem_create(struct drm_file *file,
ret = drm_gem_handle_create(file, obj-base, handle);
if (ret) {
drm_gem_object_release(obj-base);
- i915_gem_info_remove_obj(dev-dev_private, obj-base.size);
i915_gem_object_free(obj);
return ret;
}
@@ -3883,8 +3867,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
obj-madv = I915_MADV_WILLNEED;
/* Avoid an unnecessary call to unbind on the first bind. */
obj-map_and_fenceable = true;
-
- i915_gem_info_add_obj(obj-base.dev-dev_private, obj-base.size);
}
static const struct drm_i915_gem_object_ops i915_gem_object_ops = {
@@ -3990,7 +3972,6 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
drm_prime_gem_destroy(obj-base, NULL);
drm_gem_object_release(obj-base);
- i915_gem_info_remove_obj(dev_priv, obj-base.size);
kfree(obj-bit_17);
i915_gem_object_free(obj);
--
1.8.3.2
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Re: [Intel-gfx] [Update][PATCH 0/3] Fix backlight issues on some Windows 8 systems
On Wed, Jul 17, 2013 at 7:16 PM, Rafael J. Wysocki r...@sisk.pl wrote: On Sunday, June 09, 2013 07:01:36 PM Matthew Garrett wrote: Windows 8 introduced new policy for backlight control by pushing it out to graphics drivers. This appears to have coincided with a range of vendors adding Windows 8 checks to their backlight control code which trigger either awkward behaviour (Lenovo) or complete brokenness (some Dells). The simplest thing to do would be to just disable ACPI backlight control entirely if the firmware indicates Windows 8 support, but it's entirely possible that individual graphics drivers might still make use of the ACPI functionality in preference to native control. The first two patches in this series are picked from other patchesets aimed at solving similar problems. The last simply unregisters ACPI backlight control on Windows 8 systems when using an Intel GPU. Similar code could be added to other drivers, but I'm reluctant to do so without further investigation as to the behaviour of the vendor drivers under Windows. Well, after some more time spent on that, we now have a series of 3 patches (different from the $subject one) that we think may be used to address this issue. As far as I can say, it has been tested by multiple people whose systems have those problems and they generally saw improvement. It is not my ideal approach, but it seems to be the least intrusive and/or with the least amount of possible side effects that we can do right now as a general measure (alternatively, we could create a possibly long blacklist table of affected systems with different workarounds for them, but let's just say that is not overwhelmingly attractive). [1/3] Make ACPICA export things that we need for checking OSI(Win8). [2/3] Make acpi_video_device_find_cap() call acpi_video_init_brightness() even if it is not going to register the backlight interface (needed for Thinkpads). [3/3] Avoid using ACPI backlight if i915 is in use and the firmware believes we are Windows 8. Many thanks to everyone involved! I tried this patch series and it's as I expected, it's the same as acpi_backlight=vendor, and the intel backlight driver doesn't work correctly in this machine. If you are actually serious about the mantra of no user-space regressions, then for this machine at least, you need to use the ACPI backlight with Windows8 OSI disabled, until the intel backlight driver is fixed. My patch does that: http://article.gmane.org/gmane.linux.acpi.devel/60969 -- Felipe Contreras ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: fix up gt init sequence fallout
The regression fix for gen6+ rps fallout
commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505
Author: Konstantin Khlebnikov khlebni...@openvz.org
Date: Wed Jul 17 10:22:58 2013 +0400
drm/i915: fix long-standing SNB regression in power consumption after resume
unintentionally also changed the init sequence ordering between
gt_init and gt_reset - we need to reset BIOS damage like leftover
forcewake references before we run our own code. Otherwise we can get
nasty dmesg noise like
[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old
ack to clear.
again. Since _reset suggests that we first need to have stuff
initialized (which isn't the case here) call it sanitze instead.
While at it also block out the rps disable introduce by the above
commit on ilk: We don't have any knowledge of ilk rps being broken in
similar ways. And the disable functions uses the default hw state
which is only read out when we're enabling rps. So essentially we've
been writing random grabage into that register.
Reported-by: Chris Wilson ch...@chris-wilson.co.uk
Cc: Chris Wilson ch...@chris-wilson.co.uk
Cc: Konstantin Khlebnikov khlebni...@openvz.org
Cc: Jesse Barnes jbar...@virtuousgeek.org
Cc: sta...@vger.kernel.org
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_dma.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 5 +++--
4 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5c0663f..abf158d 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1593,8 +1593,8 @@ int i915_driver_load(struct drm_device *dev, unsigned
long flags)
intel_detect_pch(dev);
intel_irq_init(dev);
+ intel_gt_sanitize(dev);
intel_gt_init(dev);
- intel_gt_reset(dev);
/* Try to make sure MCHBAR is enabled before poking at it */
intel_setup_mchbar(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6ddc567..45b3c03 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -706,7 +706,7 @@ static int i915_drm_thaw(struct drm_device *dev)
{
int error = 0;
- intel_gt_reset(dev);
+ intel_gt_sanitize(dev);
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
mutex_lock(dev-struct_mutex);
@@ -732,7 +732,7 @@ int i915_resume(struct drm_device *dev)
pci_set_master(dev-pdev);
- intel_gt_reset(dev);
+ intel_gt_sanitize(dev);
/*
* Platforms with opregion should have sane BIOS, older ones (gen3 and
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 204c3ec..d2ee334 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1584,7 +1584,7 @@ void i915_handle_error(struct drm_device *dev, bool
wedged);
extern void intel_irq_init(struct drm_device *dev);
extern void intel_hpd_init(struct drm_device *dev);
extern void intel_gt_init(struct drm_device *dev);
-extern void intel_gt_reset(struct drm_device *dev);
+extern void intel_gt_sanitize(struct drm_device *dev);
void i915_error_state_free(struct kref *error_ref);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 828c426..6a347f5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5476,7 +5476,7 @@ static void vlv_force_wake_put(struct drm_i915_private
*dev_priv)
gen6_gt_check_fifodbg(dev_priv);
}
-void intel_gt_reset(struct drm_device *dev)
+void intel_gt_sanitize(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -5489,7 +5489,8 @@ void intel_gt_reset(struct drm_device *dev)
}
/* BIOS often leaves RC6 enabled, but disable it for hw init */
- intel_disable_gt_powersave(dev);
+ if (INTEL_INFO(dev)-gen = 6)
+ intel_disable_gt_powersave(dev);
}
void intel_gt_init(struct drm_device *dev)
--
1.8.3.2
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Re: [Intel-gfx] [PATCH] drm/i915: Replace racy object bookkeeping
On Sun, Jul 21, 2013 at 09:57:04AM +0100, Chris Wilson wrote: Now that we track objects for their entire lifetime in a list, we can move the cost of the bookkeeping to the infrequent query of i915_gem_objects. This also removes the race where we would increment the global object count and size without holding any locks. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67121 Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk I love it when I can check off items from my todo list simply by merging a patch ;-) Queued for -next, thanks for the patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix up gt init sequence fallout
On Sun, Jul 21, 2013 at 01:16:24PM +0200, Daniel Vetter wrote: The regression fix for gen6+ rps fallout commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505 Author: Konstantin Khlebnikov khlebni...@openvz.org Date: Wed Jul 17 10:22:58 2013 +0400 drm/i915: fix long-standing SNB regression in power consumption after resume unintentionally also changed the init sequence ordering between gt_init and gt_reset - we need to reset BIOS damage like leftover forcewake references before we run our own code. Otherwise we can get nasty dmesg noise like [drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old ack to clear. again. Since _reset suggests that we first need to have stuff initialized (which isn't the case here) call it sanitze instead. While at it also block out the rps disable introduce by the above commit on ilk: We don't have any knowledge of ilk rps being broken in similar ways. And the disable functions uses the default hw state which is only read out when we're enabling rps. So essentially we've been writing random grabage into that register. Reported-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Chris Wilson ch...@chris-wilson.co.uk Cc: Konstantin Khlebnikov khlebni...@openvz.org Cc: Jesse Barnes jbar...@virtuousgeek.org Cc: sta...@vger.kernel.org Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Indeed, on ilk this does look a bit fishy. Tested-by: Chris Wilson ch...@chris-wilson.co.uk Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Add some debug breadcrumbs to connector detection
On Sat, Jul 20, 2013 at 08:27:08PM +0100, Chris Wilson wrote:
Try to decypher detection failures is a little tricker at the moment as
the only indicator of progress is when output_poll_execute() tells us
the result after the connector-detect() has run. This patch adds a
telltale to the start of each detect function so that we can track
progress and associate activity more clearly with each connector.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Dunno whether this shouldn't be in the drm core, otoh there's a bunch of
callsites all over the place. So queued for -next, thanks for the patch.
-Daniel
---
drivers/gpu/drm/i915/intel_crt.c | 4
drivers/gpu/drm/i915/intel_dp.c | 3 +++
drivers/gpu/drm/i915/intel_dvo.c | 2 ++
drivers/gpu/drm/i915/intel_hdmi.c | 3 +++
drivers/gpu/drm/i915/intel_lvds.c | 3 +++
drivers/gpu/drm/i915/intel_sdvo.c | 3 +++
drivers/gpu/drm/i915/intel_tv.c | 4
7 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_crt.c
b/drivers/gpu/drm/i915/intel_crt.c
index 3acec8c..0c0d4e8 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -613,6 +613,10 @@ intel_crt_detect(struct drm_connector *connector, bool
force)
enum drm_connector_status status;
struct intel_load_detect_pipe tmp;
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s] force=%d\n,
+ connector-base.id, drm_get_connector_name(connector),
+ force);
+
if (I915_HAS_HOTPLUG(dev)) {
/* We can not rely on the HPD pin always being correctly wired
* up, for example many KVM do not pass it through, and so
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f474adb..c6996ce 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2820,6 +2820,9 @@ intel_dp_detect(struct drm_connector *connector, bool
force)
enum drm_connector_status status;
struct edid *edid = NULL;
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.id, drm_get_connector_name(connector));
+
intel_dp-has_audio = false;
if (HAS_PCH_SPLIT(dev))
diff --git a/drivers/gpu/drm/i915/intel_dvo.c
b/drivers/gpu/drm/i915/intel_dvo.c
index cbbc49d..8b4ad27 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -332,6 +332,8 @@ static enum drm_connector_status
intel_dvo_detect(struct drm_connector *connector, bool force)
{
struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.id, drm_get_connector_name(connector));
return intel_dvo-dev.dev_ops-detect(intel_dvo-dev);
}
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 98df2a0..af18da7 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -866,6 +866,9 @@ intel_hdmi_detect(struct drm_connector *connector, bool
force)
struct edid *edid;
enum drm_connector_status status = connector_status_disconnected;
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.id, drm_get_connector_name(connector));
+
intel_hdmi-has_hdmi_sink = false;
intel_hdmi-has_audio = false;
intel_hdmi-rgb_quant_range_selectable = false;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 2adc024..dd17198 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -343,6 +343,9 @@ intel_lvds_detect(struct drm_connector *connector, bool
force)
struct drm_device *dev = connector-dev;
enum drm_connector_status status;
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.id, drm_get_connector_name(connector));
+
status = intel_panel_detect(dev);
if (status != connector_status_unknown)
return status;
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 798df11..c3b59b8 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1696,6 +1696,9 @@ intel_sdvo_detect(struct drm_connector *connector, bool
force)
struct intel_sdvo_connector *intel_sdvo_connector =
to_intel_sdvo_connector(connector);
enum drm_connector_status ret;
+ DRM_DEBUG_KMS([CONNECTOR:%d:%s]\n,
+ connector-base.id, drm_get_connector_name(connector));
+
if (!intel_sdvo_get_value(intel_sdvo,
SDVO_CMD_GET_ATTACHED_DISPLAYS,
response, 2))
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 39debd8..b0b446f 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1305,6 +1305,10 @@ intel_tv_detect(struct
[Intel-gfx] [PATCH] Revert drm/i915: Implement WaSwitchSolVfFArbitrationPriority
This reverts commit e3dff585508636c8d2915cc1595e04f16ccd66ba. The bspec recommends that this only be setup as part of the context for GPGPU as it penalizes 3D workloads. As we have exactly zero GPGPU clients at present, optimizing for them makes no sense. The description from the bspec on how the driver should setup the memory hints is as follows: As part of the memory interface programming another option is to re-allocate TLBs between different streams of GFX. The GFX TLBs are organized as assigned resources for dedicated ports which could be re-programmed based on the context that is being executed. This is especially critical for the L3 backed clients which are seeing one large TLB. The default programming favors 3D workloads (384 entry for Textures, 64 entry for data port, 64 entry for rest), however for GPGPU recommended setting is (64 for textures, 384 for dataport, 64 for rest). With this new setting there are certain GPGPU workloads which benefit significantly. Driver needs to make this setting part of the context that is submitted. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Ben Widawsky b...@bwidawsk.net --- drivers/gpu/drm/i915/intel_pm.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4e6d618..e1a4e4b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4662,8 +4662,20 @@ static void haswell_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | GEN6_MBCTL_ENABLE_BOOT_FETCH); - /* WaSwitchSolVfFArbitrationPriority:hsw */ +#if 0 + /* The default programming of GAM_ECOCHK favours 3D workloads (384 +* entries for texturing, 64 for dataport and 64 for the rest). +* However, GPGPU workloads benefit greatly from an increased number +* of dataport entries. Setting ARB_PRIO_SOL here adjusts the TLB +* cache configuration to (64 for texturing, 384 for data and 64 for +* the rest) thereby favouring GPGPU over 3D workloads. By default +* we want to favour 3D workloads, but we should consider making this +* part of the context state for OpenCL clients. +* +* WaSwitchSolVfFArbitrationPriority:hsw +*/ I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL); +#endif /* WaRsPkgCStateDisplayPMReq:hsw */ I915_WRITE(CHICKEN_PAR1_1, -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] Revert drm/i915: Implement WaSwitchSolVfFArbitrationPriority
On Sun, Jul 21, 2013 at 01:49:16PM +0100, Chris Wilson wrote: This reverts commit e3dff585508636c8d2915cc1595e04f16ccd66ba. The bspec recommends that this only be setup as part of the context for GPGPU as it penalizes 3D workloads. As we have exactly zero GPGPU clients at present, optimizing for them makes no sense. The description from the bspec on how the driver should setup the memory hints is as follows: As part of the memory interface programming another option is to re-allocate TLBs between different streams of GFX. The GFX TLBs are organized as assigned resources for dedicated ports which could be re-programmed based on the context that is being executed. This is especially critical for the L3 backed clients which are seeing one large TLB. The default programming favors 3D workloads (384 entry for Textures, 64 entry for data port, 64 entry for rest), however for GPGPU recommended setting is (64 for textures, 384 for dataport, 64 for rest). With this new setting there are certain GPGPU workloads which benefit significantly. Driver needs to make this setting part of the context that is submitted. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Ben Widawsky b...@bwidawsk.net Cc: sta...@vger.kernel.org ... since the offending commit is already in 3.10. -Daniel --- drivers/gpu/drm/i915/intel_pm.c | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 4e6d618..e1a4e4b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4662,8 +4662,20 @@ static void haswell_init_clock_gating(struct drm_device *dev) I915_WRITE(GEN6_MBCTL, I915_READ(GEN6_MBCTL) | GEN6_MBCTL_ENABLE_BOOT_FETCH); - /* WaSwitchSolVfFArbitrationPriority:hsw */ +#if 0 + /* The default programming of GAM_ECOCHK favours 3D workloads (384 + * entries for texturing, 64 for dataport and 64 for the rest). + * However, GPGPU workloads benefit greatly from an increased number + * of dataport entries. Setting ARB_PRIO_SOL here adjusts the TLB + * cache configuration to (64 for texturing, 384 for data and 64 for + * the rest) thereby favouring GPGPU over 3D workloads. By default + * we want to favour 3D workloads, but we should consider making this + * part of the context state for OpenCL clients. + * + * WaSwitchSolVfFArbitrationPriority:hsw + */ I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL); +#endif /* WaRsPkgCStateDisplayPMReq:hsw */ I915_WRITE(CHICKEN_PAR1_1, -- 1.8.3.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: fix up gt init sequence fallout
On Sun, Jul 21, 2013 at 12:50:03PM +0100, Chris Wilson wrote: On Sun, Jul 21, 2013 at 01:16:24PM +0200, Daniel Vetter wrote: The regression fix for gen6+ rps fallout commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505 Author: Konstantin Khlebnikov khlebni...@openvz.org Date: Wed Jul 17 10:22:58 2013 +0400 drm/i915: fix long-standing SNB regression in power consumption after resume unintentionally also changed the init sequence ordering between gt_init and gt_reset - we need to reset BIOS damage like leftover forcewake references before we run our own code. Otherwise we can get nasty dmesg noise like [drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old ack to clear. again. Since _reset suggests that we first need to have stuff initialized (which isn't the case here) call it sanitze instead. While at it also block out the rps disable introduce by the above commit on ilk: We don't have any knowledge of ilk rps being broken in similar ways. And the disable functions uses the default hw state which is only read out when we're enabling rps. So essentially we've been writing random grabage into that register. Reported-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Chris Wilson ch...@chris-wilson.co.uk Cc: Konstantin Khlebnikov khlebni...@openvz.org Cc: Jesse Barnes jbar...@virtuousgeek.org Cc: sta...@vger.kernel.org Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Indeed, on ilk this does look a bit fishy. Tested-by: Chris Wilson ch...@chris-wilson.co.uk Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk Merged to -fixes, thanks for digging this out and testingreviewing my patch. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: fix hdmi portclock limits on Haswell
In
commit 325b9d048810f7689ec644595061c0b700e64bce
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Fri Apr 19 11:24:33 2013 +0200
drm/i915: fixup 12bpc hdmi dotclock handling
I've errornously claimed that we don't yet support the hdmi 1.4
dotclocks 225 MHz on Haswell. But a bug report and a closer look at
the wrpll table showed that we've supported port clocks up to 300MHz.
With the new code to dynamically compute wrpll limits we should have
no issues going up to the full 340 MHz range of hdmi 1.4, so let's
just use that to fix this regression. That'll allow 4k over hdmi for
free!
v2: Drop the random hunk that somehow slipped in.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67048
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67030
Tested-by: Andreas Reis andreas.r...@gmail.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_hdmi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 98df2a0..29b6028 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -806,6 +806,7 @@ bool intel_hdmi_compute_config(struct intel_encoder
*encoder,
struct drm_device *dev = encoder-base.dev;
struct drm_display_mode *adjusted_mode = pipe_config-adjusted_mode;
int clock_12bpc = pipe_config-requested_mode.clock * 3 / 2;
+ int portclock_limit = IS_HASWELL(dev) ? 34 : 225000;
int desired_bpp;
if (intel_hdmi-color_range_auto) {
@@ -829,7 +830,7 @@ bool intel_hdmi_compute_config(struct intel_encoder
*encoder,
* outputs. We also need to check that the higher clock still fits
* within limits.
*/
- if (pipe_config-pipe_bpp 8*3 clock_12bpc = 225000
+ if (pipe_config-pipe_bpp 8*3 clock_12bpc = portclock_limit
HAS_PCH_SPLIT(dev)) {
DRM_DEBUG_KMS(picking bpc to 12 for HDMI output\n);
desired_bpp = 12*3;
@@ -846,7 +847,7 @@ bool intel_hdmi_compute_config(struct intel_encoder
*encoder,
pipe_config-pipe_bpp = desired_bpp;
}
- if (adjusted_mode-clock 225000) {
+ if (adjusted_mode-clock portclock_limit) {
DRM_DEBUG_KMS(too high HDMI clock, rejecting mode\n);
return false;
}
--
1.8.3.2
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Re: [Intel-gfx] [PATCH] Revert drm/i915: Implement WaSwitchSolVfFArbitrationPriority
On Sun, Jul 21, 2013 at 03:01:32PM +0200, Daniel Vetter wrote: On Sun, Jul 21, 2013 at 01:49:16PM +0100, Chris Wilson wrote: This reverts commit e3dff585508636c8d2915cc1595e04f16ccd66ba. The bspec recommends that this only be setup as part of the context for GPGPU as it penalizes 3D workloads. As we have exactly zero GPGPU clients at present, optimizing for them makes no sense. The description from the bspec on how the driver should setup the memory hints is as follows: As part of the memory interface programming another option is to re-allocate TLBs between different streams of GFX. The GFX TLBs are organized as assigned resources for dedicated ports which could be re-programmed based on the context that is being executed. This is especially critical for the L3 backed clients which are seeing one large TLB. The default programming favors 3D workloads (384 entry for Textures, 64 entry for data port, 64 entry for rest), however for GPGPU recommended setting is (64 for textures, 384 for dataport, 64 for rest). With this new setting there are certain GPGPU workloads which benefit significantly. Driver needs to make this setting part of the context that is submitted. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Cc: Ben Widawsky b...@bwidawsk.net Cc: sta...@vger.kernel.org Yikes, just read the w/a db. Apparently the w/a is required because the hw has the sense of this bit reversed. That is we need to set the bit for 3d, and clear it for GPGPU. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Retry DP aux_ch communications with a different clock after failure
The w/a db makes the recommendation to both use a non-default value for
the initial clock and then to retry with an alternative clock for
Haswell with the Lakeport PCH.
On LPT:H, use a divider value of 63 decimal (03Fh). If there is a
failure, retry at least three times with 63, then retry at least three
times with 72 decimal (048h).
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/intel_dp.c | 92 +++--
1 file changed, 51 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index c6996ce..4a7ba5e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -276,7 +276,8 @@ intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool
has_aux_irq)
return status;
}
-static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp)
+static uint32_t get_aux_clock_divider(struct intel_dp *intel_dp,
+ int index)
{
struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = intel_dig_port-base.base.dev;
@@ -290,22 +291,27 @@ static uint32_t get_aux_clock_divider(struct intel_dp
*intel_dp)
* clock divider.
*/
if (IS_VALLEYVIEW(dev)) {
- return 100;
+ return index ? 0 : 100;
} else if (intel_dig_port-port == PORT_A) {
+ if (index)
+ return 0;
if (HAS_DDI(dev))
- return DIV_ROUND_CLOSEST(
- intel_ddi_get_cdclk_freq(dev_priv), 2000);
+ return
DIV_ROUND_CLOSEST(intel_ddi_get_cdclk_freq(dev_priv), 2000);
else if (IS_GEN6(dev) || IS_GEN7(dev))
return 200; /* SNB IVB eDP input clock at 400Mhz */
else
return 225; /* eDP input clock at 450Mhz */
} else if (dev_priv-pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
/* Workaround for non-ULT HSW */
- return 74;
+ switch (index) {
+ case 0: return 63;
+ case 1: return 72;
+ default: return 0;
+ }
} else if (HAS_PCH_SPLIT(dev)) {
- return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
+ return index ? 0 : DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
} else {
- return intel_hrawclk(dev) / 2;
+ return index ? 0 :intel_hrawclk(dev) / 2;
}
}
@@ -319,10 +325,10 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
struct drm_i915_private *dev_priv = dev-dev_private;
uint32_t ch_ctl = intel_dp-aux_ch_ctl_reg;
uint32_t ch_data = ch_ctl + 4;
+ uint32_t aux_clock_divider;
int i, ret, recv_bytes;
uint32_t status;
- uint32_t aux_clock_divider = get_aux_clock_divider(intel_dp);
- int try, precharge;
+ int try, precharge, clock = 0;
bool has_aux_irq = INTEL_INFO(dev)-gen = 5 !IS_VALLEYVIEW(dev);
/* dp aux is extremely sensitive to irq latency, hence request the
@@ -353,37 +359,41 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
goto out;
}
- /* Must try at least 3 times according to DP spec */
- for (try = 0; try 5; try++) {
- /* Load the send data into the aux channel data registers */
- for (i = 0; i send_bytes; i += 4)
- I915_WRITE(ch_data + i,
- pack_aux(send + i, send_bytes - i));
-
- /* Send the command and wait for it to complete */
- I915_WRITE(ch_ctl,
- DP_AUX_CH_CTL_SEND_BUSY |
- (has_aux_irq ? DP_AUX_CH_CTL_INTERRUPT : 0) |
- DP_AUX_CH_CTL_TIME_OUT_400us |
- (send_bytes DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT) |
- (precharge DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
- (aux_clock_divider
DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT) |
- DP_AUX_CH_CTL_DONE |
- DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR);
-
- status = intel_dp_aux_wait_done(intel_dp, has_aux_irq);
-
- /* Clear done status and any errors */
- I915_WRITE(ch_ctl,
- status |
- DP_AUX_CH_CTL_DONE |
- DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR);
-
- if (status (DP_AUX_CH_CTL_TIME_OUT_ERROR |
- DP_AUX_CH_CTL_RECEIVE_ERROR))
- continue;
+ while ((aux_clock_divider = get_aux_clock_divider(intel_dp, clock++))) {
+ /* Must try at least 3 times according to DP spec */
+
[Intel-gfx] [PATCH] drm/i915: Replace open-coded offset_in_page()
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 1734825..5b6d764 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -255,7 +255,7 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
reloc-delta += target_offset;
if (use_cpu_reloc(obj)) {
- uint32_t page_offset = reloc-offset ~PAGE_MASK;
+ uint32_t page_offset = offset_in_page(reloc-offset);
char *vaddr;
ret = i915_gem_object_set_to_cpu_domain(obj, 1);
@@ -284,7 +284,7 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
reloc_page = io_mapping_map_atomic_wc(dev_priv-gtt.mappable,
reloc-offset
PAGE_MASK);
reloc_entry = (uint32_t __iomem *)
- (reloc_page + (reloc-offset ~PAGE_MASK));
+ (reloc_page + offset_in_page(reloc-offset));
iowrite32(reloc-delta, reloc_entry);
io_mapping_unmap_atomic(reloc_page);
}
--
1.8.3.2
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Re: [Intel-gfx] [GIT PULL] ACPI video support fixes for v3.11
On Sat, Jul 20, 2013 at 5:22 PM, Rafael J. Wysocki r...@sisk.pl wrote: I'm sending a separate pull request for this as it may be somewhat controversial. Ugh. That's an understatement, and I hate the timing. That said, it looks like it should be easy to revert if it causes problems, and I guess it won't become better from waiting until the next merge window. And the problems are hopefully going to be pretty easily pinpointed to this.. So I've pulled it. Linus ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] i915 irq storm mitigation in 3.10
On Sun, Jul 21, 2013 at 10:23 PM, Jan Niggemann j...@hz6.de wrote: But every time this happens we only let through a few interrupts, so this shouldn't affect you badly. Can you please check whether those slowdowns line up with 2 minute intervalls? I observed these slowdowns for a couple of weeks now. On my machine, they only happen once, some minutes after a cold boot. They last for a minute or two, and then they are gone. I'd have guessed that the storm detection kicks in pretty quickly after a storm is detected and that it would go unnoticed. Hm, that sounds like something doesn't quite work as expected. We should kill things once we get 5 interrupts or so in 1 second. So if it's bad enough that it slows your machine down it really should only be barely noticeable. Can you please boot with drm.debug=0xe added to your kernel cmdline, do a cold boot (so that we get a storm) and then once everything is quiet grab the full kernel log (you probably have to grab it from the disk, dmesg has likely overflown) and upload it somewhere (since it's probably too big for the mailing lists)? Please also enable printk timestamps for your kernel so that we can create a timeline of everything going on. That log should give us a starting point, but I guess we need to run some debug patches past you to figure out what's going on in your system exactly. Another thing I have noticed: All storm-related messages are about DP-3 and HDMI-A-1, but my T400 doesn't have either a HDMI out nor a DisplayPort connector... We'll only enable ports (and interrupts for them) if we think they're there. Could it be that there's a docking station for your machine available which would have these ports? I returned to 3.2.0 with drm_kms_helper.poll=0 for the time being, so this doesn't affect me badly. Please tell me if and how I can further diagnose this. That's not good, we need to fix this. Also adding Egbert, maybe he has seen something like this in the wild already, after all he's implemented the storm handling code. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/13] modeset interface cleanups
Hi all, I've figured it's time that we rip out our legacy modeset encoder callbacks from the crtc helpers and only use the new ones. This patch series converts over the last few stragglers of encoder_helper_funcs-mode_set and -mode_fixup. As the icing on the cake I've thrown in a conversion of the old timings_set logic to something more natural in our new world where we precompute the entire pipe config and can freely control the code flow in that stage. Comments, flames and testing highly welcome. Cheers, Daniel Daniel Vetter (13): drm/i915/dvo: use intel_encoder to the upcast macro drm/i915/dvo: switch -mode_fixup to -compute_config drm/i915: rip out legacy encoder-mode_fixup logic drm/i915/dvo: use native encoder -mode_set callback drm/i915/sdvo: use intel_encoder for upcast helper drm/i915/tv: Use native encoder-mode_set callback drm/i915/crt: use native encoder-mode_set callback drm/i915/hdmi: use native encoder mode_set callback drm/i915/dp: use native encoder -mode_set callback drm/i915/lvds: use the native encoder -mode_set callback drm/i915/ddi: use the native encoder -mode_set callback drm/i915: rip out legacy encoder-mode_set callback drm/i915: clean up crtc timings computation drivers/gpu/drm/i915/intel_crt.c | 34 +- drivers/gpu/drm/i915/intel_ddi.c | 39 +++-- drivers/gpu/drm/i915/intel_display.c | 36 --- drivers/gpu/drm/i915/intel_dp.c | 19 +--- drivers/gpu/drm/i915/intel_drv.h | 4 --- drivers/gpu/drm/i915/intel_dvo.c | 56 +--- drivers/gpu/drm/i915/intel_hdmi.c| 29 --- drivers/gpu/drm/i915/intel_lvds.c| 16 --- drivers/gpu/drm/i915/intel_panel.c | 3 -- drivers/gpu/drm/i915/intel_sdvo.c| 23 +++ drivers/gpu/drm/i915/intel_tv.c | 27 ++--- 11 files changed, 105 insertions(+), 181 deletions(-) -- 1.8.1.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 01/13] drm/i915/dvo: use intel_encoder to the upcast macro
More natural and will soon be even better!
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dvo.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index cbbc49d..d820884 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -100,9 +100,9 @@ struct intel_dvo {
bool panel_wants_dither;
};
-static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
+static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
{
- return container_of(encoder, struct intel_dvo, base.base);
+ return container_of(encoder, struct intel_dvo, base);
}
static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
@@ -123,7 +123,7 @@ static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder,
{
struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder-base);
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
u32 tmp;
tmp = I915_READ(intel_dvo-dev.dvo_reg);
@@ -140,7 +140,7 @@ static void intel_dvo_get_config(struct intel_encoder
*encoder,
struct intel_crtc_config *pipe_config)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder-base);
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
u32 tmp, flags = 0;
tmp = I915_READ(intel_dvo-dev.dvo_reg);
@@ -159,7 +159,7 @@ static void intel_dvo_get_config(struct intel_encoder
*encoder,
static void intel_disable_dvo(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder-base);
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
u32 dvo_reg = intel_dvo-dev.dvo_reg;
u32 temp = I915_READ(dvo_reg);
@@ -171,7 +171,7 @@ static void intel_disable_dvo(struct intel_encoder *encoder)
static void intel_enable_dvo(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder-base);
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
u32 dvo_reg = intel_dvo-dev.dvo_reg;
u32 temp = I915_READ(dvo_reg);
@@ -245,7 +245,7 @@ static bool intel_dvo_mode_fixup(struct drm_encoder
*encoder,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
+ struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
/* If we have timings from the BIOS for the panel, put them in
* to the adjusted mode. The CRTC will be set up for this mode,
@@ -279,7 +279,7 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
struct drm_device *dev = encoder-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
+ struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
int pipe = intel_crtc-pipe;
u32 dvo_val;
u32 dvo_reg = intel_dvo-dev.dvo_reg, dvo_srcdim_reg;
@@ -389,7 +389,7 @@ static const struct drm_connector_helper_funcs
intel_dvo_connector_helper_funcs
static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
{
- struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
+ struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
if (intel_dvo-dev.dev_ops-destroy)
intel_dvo-dev.dev_ops-destroy(intel_dvo-dev);
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/13] drm/i915: rip out legacy encoder-mode_fixup logic
Everyone is now using our own -compute_config callback, which means
we can now also make that callback mandatory.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 62c5ab9..1ff8f9c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4109,7 +4109,7 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
}
/* All interlaced capable intel hw wants timings in frames. Note though
-* that intel_lvds_mode_fixup does some funny tricks with the crtc
+* that intel_lvds_compute_config does some funny tricks with the crtc
* timings, so we need to be careful not to clobber these.*/
if (!pipe_config-timings_set)
drm_mode_set_crtcinfo(adjusted_mode, 0);
@@ -7856,7 +7856,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
struct drm_display_mode *mode)
{
struct drm_device *dev = crtc-dev;
- struct drm_encoder_helper_funcs *encoder_funcs;
struct intel_encoder *encoder;
struct intel_crtc_config *pipe_config;
int plane_bpp, ret = -EINVAL;
@@ -7901,20 +7900,8 @@ encoder_retry:
if (encoder-new_crtc-base != crtc)
continue;
- if (encoder-compute_config) {
- if (!(encoder-compute_config(encoder, pipe_config))) {
- DRM_DEBUG_KMS(Encoder config failure\n);
- goto fail;
- }
-
- continue;
- }
-
- encoder_funcs = encoder-base.helper_private;
- if (!(encoder_funcs-mode_fixup(encoder-base,
- pipe_config-requested_mode,
- pipe_config-adjusted_mode))) {
- DRM_DEBUG_KMS(Encoder fixup failed\n);
+ if (!(encoder-compute_config(encoder, pipe_config))) {
+ DRM_DEBUG_KMS(Encoder config failure\n);
goto fail;
}
}
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/13] drm/i915/dvo: switch -mode_fixup to -compute_config
This is the last encoder -mode_fixup callback we have left, so
convert it.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dvo.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index d820884..1297ea3 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -241,11 +241,11 @@ static int intel_dvo_mode_valid(struct drm_connector
*connector,
return intel_dvo-dev.dev_ops-mode_valid(intel_dvo-dev, mode);
}
-static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
-const struct drm_display_mode *mode,
-struct drm_display_mode *adjusted_mode)
+static bool intel_dvo_compute_config(struct intel_encoder *encoder,
+struct intel_crtc_config *pipe_config)
{
- struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
+ struct drm_display_mode *adjusted_mode = pipe_config-adjusted_mode;
/* If we have timings from the BIOS for the panel, put them in
* to the adjusted mode. The CRTC will be set up for this mode,
@@ -267,7 +267,9 @@ static bool intel_dvo_mode_fixup(struct drm_encoder
*encoder,
}
if (intel_dvo-dev.dev_ops-mode_fixup)
- return intel_dvo-dev.dev_ops-mode_fixup(intel_dvo-dev,
mode, adjusted_mode);
+ return intel_dvo-dev.dev_ops-mode_fixup(intel_dvo-dev,
+
pipe_config-requested_mode,
+ adjusted_mode);
return true;
}
@@ -370,7 +372,6 @@ static void intel_dvo_destroy(struct drm_connector
*connector)
}
static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
- .mode_fixup = intel_dvo_mode_fixup,
.mode_set = intel_dvo_mode_set,
};
@@ -468,6 +469,7 @@ void intel_dvo_init(struct drm_device *dev)
intel_encoder-enable = intel_enable_dvo;
intel_encoder-get_hw_state = intel_dvo_get_hw_state;
intel_encoder-get_config = intel_dvo_get_config;
+ intel_encoder-compute_config = intel_dvo_compute_config;
intel_connector-get_hw_state = intel_dvo_connector_get_hw_state;
/* Now, try to find a controller */
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 04/13] drm/i915/dvo: use native encoder -mode_set callback
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dvo.c | 28 +++-
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c
index 1297ea3..6f2dac2 100644
--- a/drivers/gpu/drm/i915/intel_dvo.c
+++ b/drivers/gpu/drm/i915/intel_dvo.c
@@ -107,8 +107,7 @@ static struct intel_dvo *enc_to_dvo(struct intel_encoder
*encoder)
static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
{
- return container_of(intel_attached_encoder(connector),
- struct intel_dvo, base);
+ return enc_to_dvo(intel_attached_encoder(connector));
}
static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
@@ -274,15 +273,14 @@ static bool intel_dvo_compute_config(struct intel_encoder
*encoder,
return true;
}
-static void intel_dvo_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_dvo_mode_set(struct intel_encoder *encoder)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
- struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
- int pipe = intel_crtc-pipe;
+ struct intel_crtc *crtc = to_intel_crtc(encoder-base.crtc);
+ struct drm_display_mode *adjusted_mode = crtc-config.adjusted_mode;
+ struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
+ int pipe = crtc-pipe;
u32 dvo_val;
u32 dvo_reg = intel_dvo-dev.dvo_reg, dvo_srcdim_reg;
@@ -299,7 +297,9 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder,
break;
}
- intel_dvo-dev.dev_ops-mode_set(intel_dvo-dev, mode, adjusted_mode);
+ intel_dvo-dev.dev_ops-mode_set(intel_dvo-dev,
+crtc-config.requested_mode,
+adjusted_mode);
/* Save the data order, since I don't know what it should be set to. */
dvo_val = I915_READ(dvo_reg)
@@ -371,10 +371,6 @@ static void intel_dvo_destroy(struct drm_connector
*connector)
kfree(connector);
}
-static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
- .mode_set = intel_dvo_mode_set,
-};
-
static const struct drm_connector_funcs intel_dvo_connector_funcs = {
.dpms = intel_dvo_dpms,
.detect = intel_dvo_detect,
@@ -470,6 +466,7 @@ void intel_dvo_init(struct drm_device *dev)
intel_encoder-get_hw_state = intel_dvo_get_hw_state;
intel_encoder-get_config = intel_dvo_get_config;
intel_encoder-compute_config = intel_dvo_compute_config;
+ intel_encoder-mode_set = intel_dvo_mode_set;
intel_connector-get_hw_state = intel_dvo_connector_get_hw_state;
/* Now, try to find a controller */
@@ -536,9 +533,6 @@ void intel_dvo_init(struct drm_device *dev)
connector-interlace_allowed = false;
connector-doublescan_allowed = false;
- drm_encoder_helper_add(intel_encoder-base,
- intel_dvo_helper_funcs);
-
intel_connector_attach_encoder(intel_connector, intel_encoder);
if (dvo-type == INTEL_DVO_CHIP_LVDS) {
/* For our LVDS chipsets, we should hopefully be able
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 05/13] drm/i915/sdvo: use intel_encoder for upcast helper
It's what all callers (except for the destroy callback which is called
from drm core) actually want.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_sdvo.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_sdvo.c
index 798df11..a03d47c 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -202,15 +202,14 @@ struct intel_sdvo_connector {
u32 cur_dot_crawl, max_dot_crawl;
};
-static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
+static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
{
- return container_of(encoder, struct intel_sdvo, base.base);
+ return container_of(encoder, struct intel_sdvo, base);
}
static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
{
- return container_of(intel_attached_encoder(connector),
- struct intel_sdvo, base);
+ return to_sdvo(intel_attached_encoder(connector));
}
static struct intel_sdvo_connector *to_intel_sdvo_connector(struct
drm_connector *connector)
@@ -1084,7 +1083,7 @@ static void i9xx_adjust_sdvo_tv_clock(struct
intel_crtc_config *pipe_config)
static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config)
{
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct drm_display_mode *adjusted_mode = pipe_config-adjusted_mode;
struct drm_display_mode *mode = pipe_config-requested_mode;
@@ -1154,7 +1153,7 @@ static void intel_sdvo_mode_set(struct intel_encoder
*intel_encoder)
struct drm_display_mode *adjusted_mode =
intel_crtc-config.adjusted_mode;
struct drm_display_mode *mode = intel_crtc-config.requested_mode;
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(intel_encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
u32 sdvox;
struct intel_sdvo_in_out_map in_out;
struct intel_sdvo_dtd input_dtd, output_dtd;
@@ -1292,7 +1291,7 @@ static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder,
{
struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
u16 active_outputs = 0;
u32 tmp;
@@ -1315,7 +1314,7 @@ static void intel_sdvo_get_config(struct intel_encoder
*encoder,
{
struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_sdvo_dtd dtd;
int encoder_pixel_multiplier = 0;
u32 flags = 0, sdvox;
@@ -1380,7 +1379,7 @@ static void intel_sdvo_get_config(struct intel_encoder
*encoder,
static void intel_disable_sdvo(struct intel_encoder *encoder)
{
struct drm_i915_private *dev_priv = encoder-base.dev-dev_private;
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
u32 temp;
intel_sdvo_set_active_outputs(intel_sdvo, 0);
@@ -1422,7 +1421,7 @@ static void intel_enable_sdvo(struct intel_encoder
*encoder)
{
struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
struct intel_crtc *intel_crtc = to_intel_crtc(encoder-base.crtc);
u32 temp;
bool input1, input2;
@@ -1583,7 +1582,7 @@ static uint16_t intel_sdvo_get_hotplug_support(struct
intel_sdvo *intel_sdvo)
static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
{
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder-base);
+ struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
intel_sdvo-hotplug_active, 2);
@@ -2187,7 +2186,7 @@ static const struct drm_connector_helper_funcs
intel_sdvo_connector_helper_funcs
static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
{
- struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
+ struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
if (intel_sdvo-sdvo_lvds_fixed_mode != NULL)
drm_mode_destroy(encoder-dev,
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 06/13] drm/i915/tv: Use native encoder-mode_set callback
Also switch to intel_encoder for the upcast helper while at it.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_tv.c | 27 +--
1 file changed, 9 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 39debd8..dce899d 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -823,16 +823,14 @@ static const struct tv_mode tv_modes[] = {
},
};
-static struct intel_tv *enc_to_intel_tv(struct drm_encoder *encoder)
+static struct intel_tv *enc_to_tv(struct intel_encoder *encoder)
{
- return container_of(encoder, struct intel_tv, base.base);
+ return container_of(encoder, struct intel_tv, base);
}
static struct intel_tv *intel_attached_tv(struct drm_connector *connector)
{
- return container_of(intel_attached_encoder(connector),
- struct intel_tv,
- base);
+ return enc_to_tv(intel_attached_encoder(connector));
}
static bool
@@ -908,7 +906,7 @@ static bool
intel_tv_compute_config(struct intel_encoder *encoder,
struct intel_crtc_config *pipe_config)
{
- struct intel_tv *intel_tv = enc_to_intel_tv(encoder-base);
+ struct intel_tv *intel_tv = enc_to_tv(encoder);
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
if (!tv_mode)
@@ -921,15 +919,12 @@ intel_tv_compute_config(struct intel_encoder *encoder,
return true;
}
-static void
-intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_tv_mode_set(struct intel_encoder *encoder)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct drm_crtc *crtc = encoder-crtc;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_tv *intel_tv = enc_to_intel_tv(encoder);
+ struct intel_crtc *intel_crtc = to_intel_crtc(encoder-base.crtc);
+ struct intel_tv *intel_tv = enc_to_tv(encoder);
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_tv);
u32 tv_ctl;
u32 hctl1, hctl2, hctl3;
@@ -1483,10 +1478,6 @@ out:
return ret;
}
-static const struct drm_encoder_helper_funcs intel_tv_helper_funcs = {
- .mode_set = intel_tv_mode_set,
-};
-
static const struct drm_connector_funcs intel_tv_connector_funcs = {
.dpms = intel_connector_dpms,
.detect = intel_tv_detect,
@@ -1619,6 +1610,7 @@ intel_tv_init(struct drm_device *dev)
DRM_MODE_ENCODER_TVDAC);
intel_encoder-compute_config = intel_tv_compute_config;
+ intel_encoder-mode_set = intel_tv_mode_set;
intel_encoder-enable = intel_enable_tv;
intel_encoder-disable = intel_disable_tv;
intel_encoder-get_hw_state = intel_tv_get_hw_state;
@@ -1640,7 +1632,6 @@ intel_tv_init(struct drm_device *dev)
intel_tv-tv_format = tv_modes[initial_mode].name;
- drm_encoder_helper_add(intel_encoder-base, intel_tv_helper_funcs);
drm_connector_helper_add(connector, intel_tv_connector_helper_funcs);
connector-interlace_allowed = false;
connector-doublescan_allowed = false;
--
1.8.1.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/13] drm/i915/crt: use native encoder-mode_set callback
Also drop the intel_ prefix from the local intel_crtc variable and
reorder the upcast macros a bit for more reuse.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_crt.c | 34 +-
1 file changed, 13 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 3acec8c..dea472b 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -52,15 +52,14 @@ struct intel_crt {
u32 adpa_reg;
};
-static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
+static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
{
- return container_of(intel_attached_encoder(connector),
- struct intel_crt, base);
+ return container_of(encoder, struct intel_crt, base);
}
-static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
+static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
{
- return container_of(encoder, struct intel_crt, base);
+ return intel_encoder_to_crt(intel_attached_encoder(connector));
}
static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
@@ -238,17 +237,14 @@ static bool intel_crt_compute_config(struct intel_encoder
*encoder,
return true;
}
-static void intel_crt_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_crt_mode_set(struct intel_encoder *encoder)
{
- struct drm_device *dev = encoder-dev;
- struct drm_crtc *crtc = encoder-crtc;
- struct intel_crt *crt =
- intel_encoder_to_crt(to_intel_encoder(encoder));
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ struct drm_device *dev = encoder-base.dev;
+ struct intel_crt *crt = intel_encoder_to_crt(encoder);
+ struct intel_crtc *crtc = to_intel_crtc(encoder-base.crtc);
struct drm_i915_private *dev_priv = dev-dev_private;
+ struct drm_display_mode *adjusted_mode = crtc-config.adjusted_mode;
u32 adpa;
if (HAS_PCH_SPLIT(dev))
@@ -265,14 +261,14 @@ static void intel_crt_mode_set(struct drm_encoder
*encoder,
if (HAS_PCH_LPT(dev))
; /* Those bits don't exist here */
else if (HAS_PCH_CPT(dev))
- adpa |= PORT_TRANS_SEL_CPT(intel_crtc-pipe);
- else if (intel_crtc-pipe == 0)
+ adpa |= PORT_TRANS_SEL_CPT(crtc-pipe);
+ else if (crtc-pipe == 0)
adpa |= ADPA_PIPE_A_SELECT;
else
adpa |= ADPA_PIPE_B_SELECT;
if (!HAS_PCH_SPLIT(dev))
- I915_WRITE(BCLRPAT(intel_crtc-pipe), 0);
+ I915_WRITE(BCLRPAT(crtc-pipe), 0);
I915_WRITE(crt-adpa_reg, adpa);
}
@@ -707,10 +703,6 @@ static void intel_crt_reset(struct drm_connector
*connector)
* Routines for controlling stuff on the analog port
*/
-static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
- .mode_set = intel_crt_mode_set,
-};
-
static const struct drm_connector_funcs intel_crt_connector_funcs = {
.reset = intel_crt_reset,
.dpms = intel_crt_dpms,
@@ -800,6 +792,7 @@ void intel_crt_init(struct drm_device *dev)
crt-adpa_reg = ADPA;
crt-base.compute_config = intel_crt_compute_config;
+ crt-base.mode_set = intel_crt_mode_set;
crt-base.disable = intel_disable_crt;
crt-base.enable = intel_enable_crt;
crt-base.get_config = intel_crt_get_config;
@@ -811,7 +804,6 @@ void intel_crt_init(struct drm_device *dev)
crt-base.get_hw_state = intel_crt_get_hw_state;
intel_connector-get_hw_state = intel_connector_get_hw_state;
- drm_encoder_helper_add(crt-base.base, crt_encoder_funcs);
drm_connector_helper_add(connector, intel_crt_connector_helper_funcs);
drm_sysfs_connector_add(connector);
--
1.8.1.4
___
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[Intel-gfx] [PATCH 08/13] drm/i915/hdmi: use native encoder mode_set callback
Again drop the intel_ prefix from the intel_crtc local variable to
save a bit of space. But here I didn't switch the upcast macros to
intel_encoder since all our infoframe interfaces still use
drm_encoder. That needs to be changed first.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_hdmi.c | 29 -
1 file changed, 12 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 98df2a0..5afb033 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -591,14 +591,13 @@ static void hsw_set_infoframes(struct drm_encoder
*encoder,
intel_hdmi_set_spd_infoframe(encoder);
}
-static void intel_hdmi_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_hdmi_mode_set(struct intel_encoder *encoder)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_crtc *intel_crtc = to_intel_crtc(encoder-crtc);
- struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
+ struct intel_crtc *crtc = to_intel_crtc(encoder-base.crtc);
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder-base);
+ struct drm_display_mode *adjusted_mode = crtc-config.adjusted_mode;
u32 hdmi_val;
hdmi_val = SDVO_ENCODING_HDMI;
@@ -609,7 +608,7 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
if (adjusted_mode-flags DRM_MODE_FLAG_PHSYNC)
hdmi_val |= SDVO_HSYNC_ACTIVE_HIGH;
- if (intel_crtc-config.pipe_bpp 24)
+ if (crtc-config.pipe_bpp 24)
hdmi_val |= HDMI_COLOR_FORMAT_12bpc;
else
hdmi_val |= SDVO_COLOR_FORMAT_8bpc;
@@ -620,21 +619,21 @@ static void intel_hdmi_mode_set(struct drm_encoder
*encoder,
if (intel_hdmi-has_audio) {
DRM_DEBUG_DRIVER(Enabling HDMI audio on pipe %c\n,
-pipe_name(intel_crtc-pipe));
+pipe_name(crtc-pipe));
hdmi_val |= SDVO_AUDIO_ENABLE;
hdmi_val |= HDMI_MODE_SELECT_HDMI;
- intel_write_eld(encoder, adjusted_mode);
+ intel_write_eld(encoder-base, adjusted_mode);
}
if (HAS_PCH_CPT(dev))
- hdmi_val |= SDVO_PIPE_SEL_CPT(intel_crtc-pipe);
+ hdmi_val |= SDVO_PIPE_SEL_CPT(crtc-pipe);
else
- hdmi_val |= SDVO_PIPE_SEL(intel_crtc-pipe);
+ hdmi_val |= SDVO_PIPE_SEL(crtc-pipe);
I915_WRITE(intel_hdmi-hdmi_reg, hdmi_val);
POSTING_READ(intel_hdmi-hdmi_reg);
- intel_hdmi-set_infoframes(encoder, adjusted_mode);
+ intel_hdmi-set_infoframes(encoder-base, adjusted_mode);
}
static bool intel_hdmi_get_hw_state(struct intel_encoder *encoder,
@@ -1100,10 +1099,6 @@ static void intel_hdmi_destroy(struct drm_connector
*connector)
kfree(connector);
}
-static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
- .mode_set = intel_hdmi_mode_set,
-};
-
static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
.dpms = intel_connector_dpms,
.detect = intel_hdmi_detect,
@@ -1226,9 +1221,9 @@ void intel_hdmi_init(struct drm_device *dev, int
hdmi_reg, enum port port)
drm_encoder_init(dev, intel_encoder-base, intel_hdmi_enc_funcs,
DRM_MODE_ENCODER_TMDS);
- drm_encoder_helper_add(intel_encoder-base, intel_hdmi_helper_funcs);
intel_encoder-compute_config = intel_hdmi_compute_config;
+ intel_encoder-mode_set = intel_hdmi_mode_set;
intel_encoder-enable = intel_enable_hdmi;
intel_encoder-disable = intel_disable_hdmi;
intel_encoder-get_hw_state = intel_hdmi_get_hw_state;
--
1.8.1.4
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[Intel-gfx] [PATCH 09/13] drm/i915/dp: use native encoder -mode_set callback
Usual drill applies. Again I've not switched the upcast helpers to use
intel_encoder instead of drm_encoder since that's much more invasive
and will change also the hdmi and ddi encoders.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_dp.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f474adb..08966b5 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -823,15 +823,14 @@ static void ironlake_set_pll_cpu_edp(struct intel_dp
*intel_dp)
udelay(500);
}
-static void
-intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_dp_mode_set(struct intel_encoder *encoder)
{
- struct drm_device *dev = encoder-dev;
+ struct drm_device *dev = encoder-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
enum port port = dp_to_dig_port(intel_dp)-port;
- struct intel_crtc *crtc = to_intel_crtc(encoder-crtc);
+ struct intel_crtc *crtc = to_intel_crtc(encoder-base.crtc);
+ struct drm_display_mode *adjusted_mode = crtc-config.adjusted_mode;
/*
* There are four kinds of DP registers:
@@ -863,7 +862,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct
drm_display_mode *mode,
DRM_DEBUG_DRIVER(Enabling DP audio on pipe %c\n,
pipe_name(crtc-pipe));
intel_dp-DP |= DP_AUDIO_OUTPUT_ENABLE;
- intel_write_eld(encoder, adjusted_mode);
+ intel_write_eld(encoder-base, adjusted_mode);
}
intel_dp_init_link_config(intel_dp);
@@ -3013,10 +3012,6 @@ void intel_dp_encoder_destroy(struct drm_encoder
*encoder)
kfree(intel_dig_port);
}
-static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
- .mode_set = intel_dp_mode_set,
-};
-
static const struct drm_connector_funcs intel_dp_connector_funcs = {
.dpms = intel_connector_dpms,
.detect = intel_dp_detect,
@@ -3496,9 +3491,9 @@ intel_dp_init(struct drm_device *dev, int output_reg,
enum port port)
drm_encoder_init(dev, intel_encoder-base, intel_dp_enc_funcs,
DRM_MODE_ENCODER_TMDS);
- drm_encoder_helper_add(intel_encoder-base, intel_dp_helper_funcs);
intel_encoder-compute_config = intel_dp_compute_config;
+ intel_encoder-mode_set = intel_dp_mode_set;
intel_encoder-enable = intel_enable_dp;
intel_encoder-pre_enable = intel_pre_enable_dp;
intel_encoder-disable = intel_disable_dp;
--
1.8.1.4
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[Intel-gfx] [PATCH 10/13] drm/i915/lvds: use the native encoder -mode_set callback
Does nothing, so trivial conversion. But update the outdated comment
while at it.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_lvds.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c
b/drivers/gpu/drm/i915/intel_lvds.c
index 2adc024..d3be78c 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -319,14 +319,12 @@ static bool intel_lvds_compute_config(struct
intel_encoder *intel_encoder,
return true;
}
-static void intel_lvds_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_lvds_mode_set(struct intel_encoder *encoder)
{
/*
-* The LVDS pin pair will already have been turned on in the
-* intel_crtc_mode_set since it has a large impact on the DPLL
-* settings.
+* We don't do anything here, the LVDS port is fully set up in the pre
+* enable hook - the ordering constraints for enabling the lvds port vs.
+* enabling the display pll are too strict.
*/
}
@@ -504,10 +502,6 @@ static int intel_lvds_set_property(struct drm_connector
*connector,
return 0;
}
-static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
- .mode_set = intel_lvds_mode_set,
-};
-
static const struct drm_connector_helper_funcs
intel_lvds_connector_helper_funcs = {
.get_modes = intel_lvds_get_modes,
.mode_valid = intel_lvds_mode_valid,
@@ -952,6 +946,7 @@ void intel_lvds_init(struct drm_device *dev)
intel_encoder-enable = intel_enable_lvds;
intel_encoder-pre_enable = intel_pre_enable_lvds;
intel_encoder-compute_config = intel_lvds_compute_config;
+ intel_encoder-mode_set = intel_lvds_mode_set;
intel_encoder-disable = intel_disable_lvds;
intel_encoder-get_hw_state = intel_lvds_get_hw_state;
intel_encoder-get_config = intel_lvds_get_config;
@@ -968,7 +963,6 @@ void intel_lvds_init(struct drm_device *dev)
else
intel_encoder-crtc_mask = (1 1);
- drm_encoder_helper_add(encoder, intel_lvds_helper_funcs);
drm_connector_helper_add(connector, intel_lvds_connector_helper_funcs);
connector-display_info.subpixel_order = SubPixelHorizontalRGB;
connector-interlace_allowed = false;
--
1.8.1.4
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[Intel-gfx] [PATCH 12/13] drm/i915: rip out legacy encoder-mode_set callback
The encoder-mode_set callback from the crtc helpers is now completely
unused in our driver. Good riddance!
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 10 +-
1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 1ff8f9c..b07f891e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6015,11 +6015,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
{
struct drm_device *dev = crtc-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
- struct drm_encoder_helper_funcs *encoder_funcs;
struct intel_encoder *encoder;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct drm_display_mode *adjusted_mode =
- intel_crtc-config.adjusted_mode;
struct drm_display_mode *mode = intel_crtc-config.requested_mode;
int pipe = intel_crtc-pipe;
int ret;
@@ -6038,12 +6035,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
encoder-base.base.id,
drm_get_encoder_name(encoder-base),
mode-base.id, mode-name);
- if (encoder-mode_set) {
- encoder-mode_set(encoder);
- } else {
- encoder_funcs = encoder-base.helper_private;
- encoder_funcs-mode_set(encoder-base, mode,
adjusted_mode);
- }
+ encoder-mode_set(encoder);
}
return 0;
--
1.8.1.4
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[Intel-gfx] [PATCH 11/13] drm/i915/ddi: use the native encoder -mode_set callback
Same conversion as for hdmi/dp.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_ddi.c | 39 ---
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 931b4bb..b361c08 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -281,25 +281,22 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
DRM_ERROR(FDI link training failed!\n);
}
-static void intel_ddi_mode_set(struct drm_encoder *encoder,
- struct drm_display_mode *mode,
- struct drm_display_mode *adjusted_mode)
+static void intel_ddi_mode_set(struct intel_encoder *encoder)
{
- struct drm_crtc *crtc = encoder-crtc;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
- int port = intel_ddi_get_encoder_port(intel_encoder);
- int pipe = intel_crtc-pipe;
- int type = intel_encoder-type;
+ struct intel_crtc *crtc = to_intel_crtc(encoder-base.crtc);
+ int port = intel_ddi_get_encoder_port(encoder);
+ int pipe = crtc-pipe;
+ int type = encoder-type;
+ struct drm_display_mode *adjusted_mode = crtc-config.adjusted_mode;
DRM_DEBUG_KMS(Preparing DDI mode on port %c, pipe %c\n,
port_name(port), pipe_name(pipe));
- intel_crtc-eld_vld = false;
+ crtc-eld_vld = false;
if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+ struct intel_dp *intel_dp = enc_to_intel_dp(encoder-base);
struct intel_digital_port *intel_dig_port =
- enc_to_dig_port(encoder);
+ enc_to_dig_port(encoder-base);
intel_dp-DP = intel_dig_port-saved_port_bits |
DDI_BUF_CTL_ENABLE | DDI_BUF_EMP_400MV_0DB_HSW;
@@ -307,17 +304,17 @@ static void intel_ddi_mode_set(struct drm_encoder
*encoder,
if (intel_dp-has_audio) {
DRM_DEBUG_DRIVER(DP audio on pipe %c on DDI\n,
-pipe_name(intel_crtc-pipe));
+pipe_name(crtc-pipe));
/* write eld */
DRM_DEBUG_DRIVER(DP audio: write eld information\n);
- intel_write_eld(encoder, adjusted_mode);
+ intel_write_eld(encoder-base, adjusted_mode);
}
intel_dp_init_link_config(intel_dp);
} else if (type == INTEL_OUTPUT_HDMI) {
- struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
+ struct intel_hdmi *intel_hdmi =
enc_to_intel_hdmi(encoder-base);
if (intel_hdmi-has_audio) {
/* Proper support for digital audio needs a new logic
@@ -325,14 +322,14 @@ static void intel_ddi_mode_set(struct drm_encoder
*encoder,
* patch bombing.
*/
DRM_DEBUG_DRIVER(HDMI audio on pipe %c on DDI\n,
-pipe_name(intel_crtc-pipe));
+pipe_name(crtc-pipe));
/* write eld */
DRM_DEBUG_DRIVER(HDMI audio: write eld information\n);
- intel_write_eld(encoder, adjusted_mode);
+ intel_write_eld(encoder-base, adjusted_mode);
}
- intel_hdmi-set_infoframes(encoder, adjusted_mode);
+ intel_hdmi-set_infoframes(encoder-base, adjusted_mode);
}
}
@@ -1311,10 +1308,6 @@ static const struct drm_encoder_funcs intel_ddi_funcs = {
.destroy = intel_ddi_destroy,
};
-static const struct drm_encoder_helper_funcs intel_ddi_helper_funcs = {
- .mode_set = intel_ddi_mode_set,
-};
-
void intel_ddi_init(struct drm_device *dev, enum port port)
{
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -1339,9 +1332,9 @@ void intel_ddi_init(struct drm_device *dev, enum port
port)
drm_encoder_init(dev, encoder, intel_ddi_funcs,
DRM_MODE_ENCODER_TMDS);
- drm_encoder_helper_add(encoder, intel_ddi_helper_funcs);
intel_encoder-compute_config = intel_ddi_compute_config;
+ intel_encoder-mode_set = intel_ddi_mode_set;
intel_encoder-enable = intel_enable_ddi;
intel_encoder-pre_enable = intel_ddi_pre_enable;
intel_encoder-disable = intel_disable_ddi;
--
1.8.1.4
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[Intel-gfx] [PATCH 13/13] drm/i915: clean up crtc timings computation
In the old days of the crtc helpers we've only had the encoder and
crtc -mode_fixup callbacks. So when the lvds connector wanted to
adjust the crtc timings it had to set a driver-private mode flag to
tell the crtc mode fixup code to not overwrite them with the generic
ones.
When converting things to the new infrastructure I've kept the entire
logic and only moved the flag to pipe_config-timings_set. But this
logic is pretty tricky and already caused regressions:
commit 21d8a4756af5fdf4a42e79a77cf3b6f52678d443
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Fri Jul 12 08:07:30 2013 +0200
drm/i915: fix pfit regression for non-autoscaled resolutions
So take advantage of the flexibility our own modeset infrastructure
affords us and prefill default crtc timings. This allows us to rip out
-timings_set. Note that we overwrite things again when retrying the
pipe config computation due to bandwidth constraints to avoid bogus
crtc timings if the encoder only does relative adjustments (which is
how the pfit code works). Only a theoretical concern though since
platforms where we retry (pch-split platforms) do not need
adjustements (since only the old gmch pfit needs that). But let's
better be safe than sorry.
Cc: Jesse Barnes jbar...@virtuousgeek.org
Cc: Mika Kuoppala mika.kuopp...@intel.com
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 9 +++--
drivers/gpu/drm/i915/intel_drv.h | 4
drivers/gpu/drm/i915/intel_panel.c | 3 ---
3 files changed, 3 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index b07f891e..aebdadc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4108,12 +4108,6 @@ static int intel_crtc_compute_config(struct intel_crtc
*crtc,
return -EINVAL;
}
- /* All interlaced capable intel hw wants timings in frames. Note though
-* that intel_lvds_compute_config does some funny tricks with the crtc
-* timings, so we need to be careful not to clobber these.*/
- if (!pipe_config-timings_set)
- drm_mode_set_crtcinfo(adjusted_mode, 0);
-
/* Cantiga+ cannot handle modes with a hsync front porch of 0.
* WaPruneModeWithIncorrectHsyncOffset:ctg,elk,ilk,snb,ivb,vlv,hsw.
*/
@@ -7882,6 +7876,9 @@ encoder_retry:
pipe_config-port_clock = 0;
pipe_config-pixel_multiplier = 1;
+ /* Fill in default crtc timings, allow encoders to overwrite them. */
+ drm_mode_set_crtcinfo(pipe_config-adjusted_mode, 0);
+
/* Pass our mode to the connectors and the CRTC to give them a chance to
* adjust it according to limitations or connector properties, and also
* a chance to reject the mode entirely.
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 31087ff..a9eca0e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -208,10 +208,6 @@ struct intel_crtc_config {
struct drm_display_mode requested_mode;
struct drm_display_mode adjusted_mode;
- /* This flag must be set by the encoder's compute_config callback if it
-* changes the crtc timings in the mode to prevent the crtc fixup from
-* overwriting them. Currently only lvds needs that. */
- bool timings_set;
/* Whether to set up the PCH/FDI. Note that we never allow sharing
* between pch encoders and cpu encoders. */
bool has_pch_encoder;
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 67e2c1f..01b5a51 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -194,9 +194,6 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
adjusted_mode-vdisplay == mode-vdisplay)
goto out;
- drm_mode_set_crtcinfo(adjusted_mode, 0);
- pipe_config-timings_set = true;
-
switch (fitting_mode) {
case DRM_MODE_SCALE_CENTER:
/*
--
1.8.1.4
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[Intel-gfx] [PATCH 00/12] Completion of i915 VMAs
Included in this series are the unmerged patches from the VMA only version of my post [1] as well as two new sets of patches on top. Daniel has already merged the first part of the series which introduced the VMAs, and VMs, but didn't actually use them ([2]). As agreed up in the previous mail thread ([1]), I've put in a couple things on top of the old series to make the end result what Daniel was looking for; and I also agree it's an improvement. (One downside however is I can no longer use the original 66 patch series [3] as a direct reference) objective was to not throw away all the testing I had done on the previous work, make the changes easier to review, but still get to where we needed to get to. The diff churn is a bit higher than if I had just rebased it in. The two big things this adds from the last go around are: 1. map/unmap_vma function pointers for the VM. 2. conversion of some obj,vm - vma in functions. Map, and unmap are logical functionalities to add for an address space. They do more or less what you'd think: take an object and create a mapping via the GPU's page tables to that object. Of course, without the rest of the patches from [3], there will only ever be 1 address space, with the weird aliasing ppgtt behind it. One thing which I toyed with, but opted not to include was to directly pass obj,vm to map/unmap instead of doing the slightly less pretty way as I've done in execbuf and bind. In the future I think I may just do this, but for now it's not a big win as the end result wasn't much better (and I didn't get it to immediately work). The conversion of obj,vm to VMA was a lot of churn, but the idea is simple. In the original series [1,3], I passed the pair of an object and an address space everywhere. Every time I needed to convert that into a VMA, it requires walking a list. In fact, we only need to walk the list once - GEM is still all about BOs, and I have no intention of changing this - so we must walk the list at user space entry points; but from thereon it can all be a VMA. The caveat is, we do have a few internal APIs that are easily broken unless we talk in objects (caching is one of them). As I mentioned in the original series, we may eventually want to move things over to be all in the VMA. For now, I think this is fine as it stands. You'll notice unbind() to be a wart currently - but the alternative looked worse to my eyes. Breakdown: The first 4 patches are basically what I sent in [1], except I've squashed some stuff, rebased, and applied some requested fixups, which brought the patch count down from 6-4. The next 3 patches are about the map/unmap mentioned in #1. And the final 5 patches are for replacing obj,vm pairs with vma, #2. Testing: IGT looks pretty stable on IVB. I was having a lot of issues on gpu reset on my ILK, but somehow after a clean build, I stopped seeing it. I've done nothing else. References: [1] http://lists.freedesktop.org/archives/intel-gfx/2013-July/029974.html [2] http://lists.freedesktop.org/archives/intel-gfx/2013-July/030395.html [3] http://lists.freedesktop.org/archives/intel-gfx/2013-June/029408.html I've pushed a badly rebased onto -nightly here (not worth fixing): http://cgit.freedesktop.org/~bwidawsk/drm-intel/log/?h=ppgtt2 --- Ben Widawsky (12): drm/i915: plumb VM into object operations drm/i915: Fix up map and fenceable for VMA drm/i915: Update error capture for VMs drm/i915: Track active by VMA instead of object drm/i915: Add map/unmap object functions to VM drm/i915: Use the new vm [un]bind functions drm/i915: eliminate vm-insert_entries() drm/i915: Add vma to list at creation drm/i915: create vmas at execbuf drm/i915: Convert execbuf code to use vmas drm/i915: Convert object coloring to VMA drm/i915: Convert active API to VMA drivers/gpu/drm/i915/i915_debugfs.c| 68 +++-- drivers/gpu/drm/i915/i915_dma.c| 4 - drivers/gpu/drm/i915/i915_drv.h| 193 +++-- drivers/gpu/drm/i915/i915_gem.c| 433 - drivers/gpu/drm/i915/i915_gem_context.c| 17 +- drivers/gpu/drm/i915/i915_gem_evict.c | 78 +++--- drivers/gpu/drm/i915/i915_gem_execbuffer.c | 321 +++-- drivers/gpu/drm/i915/i915_gem_gtt.c| 140 ++ drivers/gpu/drm/i915/i915_gem_stolen.c | 10 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 10 +- drivers/gpu/drm/i915/i915_gpu_error.c | 111 +--- drivers/gpu/drm/i915/i915_trace.h | 20 +- drivers/gpu/drm/i915/intel_fb.c| 1 - drivers/gpu/drm/i915/intel_overlay.c | 2 +- drivers/gpu/drm/i915/intel_pm.c| 2 +- drivers/gpu/drm/i915/intel_ringbuffer.c| 16 +- 16 files changed, 880 insertions(+), 546 deletions(-) -- 1.8.3.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/12] drm/i915: Update error capture for VMs
formerly: drm/i915: Create VMAs (part 4) - Error capture
Since the active/inactive lists are per VM, we need to modify the error
capture code to be aware of this, and also extend it to capture the
buffers from all the VMs. For now all the code assumes only 1 VM, but it
will become more generic over the next few patches.
NOTE: If the number of VMs in a real world system grows significantly
we'll have to focus on only capturing the guilty VM, or else it's likely
there won't be enough space for error capture.
v2: Squashed in the part 6 which had dependencies on the mm_list
change. Since I've moved the mm_list change to an earlier point in the
series, we were able to accomplish it here and now.
v3: Rebased over new error capture
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 76 ---
2 files changed, 55 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b208c30..f809204 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -323,8 +323,8 @@ struct drm_i915_error_state {
u32 purgeable:1;
s32 ring:4;
u32 cache_level:2;
- } *active_bo, *pinned_bo;
- u32 active_bo_count, pinned_bo_count;
+ } **active_bo, **pinned_bo;
+ u32 *active_bo_count, *pinned_bo_count;
struct intel_overlay_error_state *overlay;
struct intel_display_error_state *display;
};
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 9623a4e..b834f78 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -304,13 +304,13 @@ int i915_error_state_to_str(struct
drm_i915_error_state_buf *m,
if (error-active_bo)
print_error_buffers(m, Active,
- error-active_bo,
- error-active_bo_count);
+ error-active_bo[0],
+ error-active_bo_count[0]);
if (error-pinned_bo)
print_error_buffers(m, Pinned,
- error-pinned_bo,
- error-pinned_bo_count);
+ error-pinned_bo[0],
+ error-pinned_bo_count[0]);
for (i = 0; i ARRAY_SIZE(error-ring); i++) {
struct drm_i915_error_object *obj;
@@ -775,42 +775,72 @@ static void i915_gem_record_rings(struct drm_device *dev,
}
}
-static void i915_gem_capture_buffers(struct drm_i915_private *dev_priv,
-struct drm_i915_error_state *error)
+/* FIXME: Since pin count/bound list is global, we duplicate what we capture
per
+ * VM.
+ */
+static void i915_gem_capture_vm(struct drm_i915_private *dev_priv,
+ struct drm_i915_error_state *error,
+ struct i915_address_space *vm,
+ const int ndx)
{
- struct i915_address_space *vm = dev_priv-gtt.base;
- struct i915_vma *vma;
+ struct drm_i915_error_buffer *active_bo = NULL, *pinned_bo = NULL;
struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
int i;
i = 0;
list_for_each_entry(vma, vm-active_list, mm_list)
i++;
- error-active_bo_count = i;
+ error-active_bo_count[ndx] = i;
list_for_each_entry(obj, dev_priv-mm.bound_list, global_list)
if (obj-pin_count)
i++;
- error-pinned_bo_count = i - error-active_bo_count;
+ error-pinned_bo_count[ndx] = i - error-active_bo_count[ndx];
if (i) {
- error-active_bo = kmalloc(sizeof(*error-active_bo)*i,
- GFP_ATOMIC);
- if (error-active_bo)
- error-pinned_bo =
- error-active_bo + error-active_bo_count;
+ active_bo = kmalloc(sizeof(*active_bo)*i, GFP_ATOMIC);
+ if (active_bo)
+ pinned_bo = active_bo + error-active_bo_count[ndx];
}
- if (error-active_bo)
- error-active_bo_count =
- capture_active_bo(error-active_bo,
- error-active_bo_count,
+ if (active_bo)
+ error-active_bo_count[ndx] =
+ capture_active_bo(active_bo,
+ error-active_bo_count[ndx],
vm-active_list);
- if (error-pinned_bo)
- error-pinned_bo_count =
- capture_pinned_bo(error-pinned_bo,
- error-pinned_bo_count,
+
[Intel-gfx] [PATCH 02/12] drm/i915: Fix up map and fenceable for VMA
formerly: drm/i915: Create VMAs (part 3.5) - map and fenceable
tracking
The map_and_fenceable tracking is per object. GTT mapping, and fences
only apply to global GTT. As such, object operations which are not
performed on the global GTT should not effect mappable or fenceable
characteristics.
Functionally, this commit could very well be squashed in to the previous
patch which updated object operations to take a VM argument. This
commit is split out because it's a bit tricky (or at least it was for
me).
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_debugfs.c| 53 ++
drivers/gpu/drm/i915/i915_drv.h| 5 ++--
drivers/gpu/drm/i915/i915_gem.c| 43 +--
drivers/gpu/drm/i915/i915_gem_evict.c | 14 -
drivers/gpu/drm/i915/i915_gem_stolen.c | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 37 ++--
6 files changed, 93 insertions(+), 61 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index f8e590f..0b7df6c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -144,7 +144,7 @@ static int i915_gem_object_list_info(struct seq_file *m,
void *data)
struct drm_device *dev = node-minor-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
struct i915_address_space *vm = dev_priv-gtt.base;
- struct drm_i915_gem_object *obj;
+ struct i915_vma *vma;
size_t total_obj_size, total_gtt_size;
int count, ret;
@@ -152,6 +152,7 @@ static int i915_gem_object_list_info(struct seq_file *m,
void *data)
if (ret)
return ret;
+ /* FIXME: the user of this interface might want more than just GGTT */
switch (list) {
case ACTIVE_LIST:
seq_puts(m, Active:\n);
@@ -167,12 +168,12 @@ static int i915_gem_object_list_info(struct seq_file *m,
void *data)
}
total_obj_size = total_gtt_size = count = 0;
- list_for_each_entry(obj, head, mm_list) {
- seq_puts(m,);
- describe_obj(m, obj);
- seq_putc(m, '\n');
- total_obj_size += obj-base.size;
- total_gtt_size += i915_gem_obj_ggtt_size(obj);
+ list_for_each_entry(vma, head, mm_list) {
+ seq_printf(m,);
+ describe_obj(m, vma-obj);
+ seq_printf(m, \n);
+ total_obj_size += vma-obj-base.size;
+ total_gtt_size += i915_gem_obj_size(vma-obj, vma-vm);
count++;
}
mutex_unlock(dev-struct_mutex);
@@ -220,7 +221,18 @@ static int per_file_stats(int id, void *ptr, void *data)
return 0;
}
-static int i915_gem_object_info(struct seq_file *m, void *data)
+#define count_vmas(list, member) do { \
+ list_for_each_entry(vma, list, member) { \
+ size += i915_gem_obj_ggtt_size(vma-obj); \
+ ++count; \
+ if (vma-obj-map_and_fenceable) { \
+ mappable_size += i915_gem_obj_ggtt_size(vma-obj); \
+ ++mappable_count; \
+ } \
+ } \
+} while (0)
+
+static int i915_gem_object_info(struct seq_file *m, void* data)
{
struct drm_info_node *node = (struct drm_info_node *) m-private;
struct drm_device *dev = node-minor-dev;
@@ -230,6 +242,7 @@ static int i915_gem_object_info(struct seq_file *m, void
*data)
struct drm_i915_gem_object *obj;
struct i915_address_space *vm = dev_priv-gtt.base;
struct drm_file *file;
+ struct i915_vma *vma;
int ret;
ret = mutex_lock_interruptible(dev-struct_mutex);
@@ -249,12 +262,12 @@ static int i915_gem_object_info(struct seq_file *m, void
*data)
count, mappable_count, size, mappable_size);
size = count = mappable_size = mappable_count = 0;
- count_objects(vm-active_list, mm_list);
+ count_vmas(vm-active_list, mm_list);
seq_printf(m, %u [%u] active objects, %zu [%zu] bytes\n,
count, mappable_count, size, mappable_size);
size = count = mappable_size = mappable_count = 0;
- count_objects(vm-inactive_list, mm_list);
+ count_vmas(vm-inactive_list, mm_list);
seq_printf(m, %u [%u] inactive objects, %zu [%zu] bytes\n,
count, mappable_count, size, mappable_size);
@@ -1767,7 +1780,8 @@ i915_drop_caches_set(void *data, u64 val)
struct drm_device *dev = data;
struct drm_i915_private *dev_priv = dev-dev_private;
struct drm_i915_gem_object *obj, *next;
- struct i915_address_space *vm = dev_priv-gtt.base;
+ struct i915_address_space *vm;
+ struct i915_vma *vma, *x;
int ret;
DRM_DEBUG_DRIVER(Dropping caches: 0x%08llx\n, val);
@@ -1788,14 +1802,15 @@ i915_drop_caches_set(void *data, u64 val)
[Intel-gfx] [PATCH 06/12] drm/i915: Use the new vm [un]bind functions
Building on the last patch which created the new function pointers in
the VM for bind/unbind, here we actually put those new function pointers
to use.
Split out as a separate patch to aid in review. I'm fine with squashing
into the previous patch if people request it.
v2: Updated to address the smart ggtt which can do aliasing as needed
Make sure we bind to global gtt when mappable and fenceable. I thought
we could get away without this initialy, but we cannot.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 10 --
drivers/gpu/drm/i915/i915_gem.c| 37 +
drivers/gpu/drm/i915/i915_gem_context.c| 7 ++--
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 29
drivers/gpu/drm/i915/i915_gem_gtt.c| 53 ++
5 files changed, 37 insertions(+), 99 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f3f2825..8d6aa34 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1933,18 +1933,8 @@ int i915_gem_context_destroy_ioctl(struct drm_device
*dev, void *data,
/* i915_gem_gtt.c */
void i915_gem_cleanup_aliasing_ppgtt(struct drm_device *dev);
-void i915_ppgtt_bind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj,
- enum i915_cache_level cache_level);
-void i915_ppgtt_unbind_object(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_gem_object *obj);
-
void i915_gem_restore_gtt_mappings(struct drm_device *dev);
int __must_check i915_gem_gtt_prepare_object(struct drm_i915_gem_object *obj);
-/* FIXME: this is never okay with full PPGTT */
-void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
- enum i915_cache_level cache_level);
-void i915_gem_gtt_unbind_object(struct drm_i915_gem_object *obj);
void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj);
void i915_gem_init_global_gtt(struct drm_device *dev);
void i915_gem_setup_global_gtt(struct drm_device *dev, unsigned long start,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9ea6424..63297d7 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2653,12 +2653,9 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj,
trace_i915_gem_object_unbind(obj, vm);
- if (obj-has_global_gtt_mapping i915_is_ggtt(vm))
- i915_gem_gtt_unbind_object(obj);
- if (obj-has_aliasing_ppgtt_mapping) {
- i915_ppgtt_unbind_object(dev_priv-mm.aliasing_ppgtt, obj);
- obj-has_aliasing_ppgtt_mapping = 0;
- }
+ vma = i915_gem_obj_to_vma(obj, vm);
+ vm-unmap_vma(vma);
+
i915_gem_gtt_finish_object(obj);
i915_gem_object_unpin_pages(obj);
@@ -2666,7 +2663,6 @@ i915_gem_object_unbind(struct drm_i915_gem_object *obj,
if (i915_is_ggtt(vm))
obj-map_and_fenceable = true;
- vma = i915_gem_obj_to_vma(obj, vm);
list_del(vma-mm_list);
list_del(vma-vma_link);
drm_mm_remove_node(vma-node);
@@ -3372,7 +3368,6 @@ int i915_gem_object_set_cache_level(struct
drm_i915_gem_object *obj,
enum i915_cache_level cache_level)
{
struct drm_device *dev = obj-base.dev;
- drm_i915_private_t *dev_priv = dev-dev_private;
struct i915_vma *vma = i915_gem_obj_to_vma(obj, vm);
int ret;
@@ -3407,13 +3402,8 @@ int i915_gem_object_set_cache_level(struct
drm_i915_gem_object *obj,
return ret;
}
- if (obj-has_global_gtt_mapping)
- i915_gem_gtt_bind_object(obj, cache_level);
- if (obj-has_aliasing_ppgtt_mapping)
- i915_ppgtt_bind_object(dev_priv-mm.aliasing_ppgtt,
- obj, cache_level);
-
- i915_gem_obj_set_color(obj, vma-vm, cache_level);
+ vm-map_vma(vma, cache_level, 0);
+ i915_gem_obj_set_color(obj, vm, cache_level);
}
if (cache_level == I915_CACHE_NONE) {
@@ -3695,6 +3685,8 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
bool map_and_fenceable,
bool nonblocking)
{
+ const u32 flags = map_and_fenceable ? GLOBAL_BIND : 0;
+ struct i915_vma *vma;
int ret;
if (WARN_ON(obj-pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT))
@@ -3702,6 +3694,7 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj,
WARN_ON(map_and_fenceable !i915_is_ggtt(vm));
+ /* FIXME: Use vma for bounds check */
if (i915_gem_obj_bound(obj, vm)) {
if ((alignment
i915_gem_obj_offset(obj, vm) (alignment - 1)) ||
@@ -3720,20 +3713,22 @@
[Intel-gfx] [PATCH 05/12] drm/i915: Add map/unmap object functions to VM
As we plumb the code with more VM information, it has become more
obvious that the easiest way to deal with bind and unbind is to simply
put the function pointers in the vm, and let those choose the correct
way to handle the page table updates. This change allows many places in
the code to simply be vm-map, and not have to worry about
distinguishing PPGTT vs GGTT.
Notice that this patch has no impact on functionality. I've decided to
save the actual change until the next patch because I think it's easier
to review that way. I'm happy to squash the two, or let Daniel do it on
merge.
v2:
Make ggtt handle the quirky aliasing ppgtt
Add flags to map object to support above
Don't ever call bind/unbind directly for PPGTT until we have real, full
PPGTT (use NULLs to assert this)
Make sure we rebind the ggtt if there already is a ggtt binding. This
happens on set cache levels
Use VMA for map/unmap, call it map/unmap (Daniel, Ben)
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 51 ++
drivers/gpu/drm/i915/i915_gem_gtt.c | 100
2 files changed, 130 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bdce9c1..f3f2825 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -446,6 +446,27 @@ enum i915_cache_level {
typedef uint32_t gen6_gtt_pte_t;
+/* To make things as simple as possible (ie. no refcounting), a VMA's lifetime
+ * will always be = an objects lifetime. So object refcounting should cover
us.
+ */
+struct i915_vma {
+ struct drm_mm_node node;
+ struct drm_i915_gem_object *obj;
+ struct i915_address_space *vm;
+
+ /**
+* This is set if the object is on the active lists (has pending
+* rendering and so a non-zero seqno), and is not set if it i s on
+* inactive (ready to be unbound) list.
+*/
+ unsigned int active:1;
+
+ /** This object's place on the active/inactive lists */
+ struct list_head mm_list;
+
+ struct list_head vma_link; /* Link in the object's VMA list */
+};
+
struct i915_address_space {
struct drm_mm mm;
struct drm_device *dev;
@@ -484,9 +505,18 @@ struct i915_address_space {
/* FIXME: Need a more generic return type */
gen6_gtt_pte_t (*pte_encode)(dma_addr_t addr,
enum i915_cache_level level);
+
+ /** Unmap an object from an address space. This usually consists of
+* setting the valid PTE entries to a reserved scratch page. */
+ void (*unmap_vma)(struct i915_vma *vma);
void (*clear_range)(struct i915_address_space *vm,
unsigned int first_entry,
unsigned int num_entries);
+ /* Map an object into an address space with the given cache flags. */
+#define GLOBAL_BIND (10)
+ void (*map_vma)(struct i915_vma *vma,
+ enum i915_cache_level cache_level,
+ u32 flags);
void (*insert_entries)(struct i915_address_space *vm,
struct sg_table *st,
unsigned int first_entry,
@@ -533,27 +563,6 @@ struct i915_hw_ppgtt {
int (*enable)(struct drm_device *dev);
};
-/* To make things as simple as possible (ie. no refcounting), a VMA's lifetime
- * will always be = an objects lifetime. So object refcounting should cover
us.
- */
-struct i915_vma {
- struct drm_mm_node node;
- struct drm_i915_gem_object *obj;
- struct i915_address_space *vm;
-
- /**
-* This is set if the object is on the active lists (has pending
-* rendering and so a non-zero seqno), and is not set if it i s on
-* inactive (ready to be unbound) list.
-*/
- unsigned int active:1;
-
- /** This object's place on the active/inactive lists */
- struct list_head mm_list;
-
- struct list_head vma_link; /* Link in the object's VMA list */
-};
-
struct i915_ctx_hang_stats {
/* This context had batch pending when hang was declared */
unsigned batch_pending;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 44f3464..03e6179 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -55,6 +55,11 @@
#define HSW_WB_LLC_AGE0HSW_CACHEABILITY_CONTROL(0x3)
#define HSW_WB_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0xb)
+static void gen6_ppgtt_map_vma(struct i915_vma *vma,
+ enum i915_cache_level cache_level,
+ u32 flags);
+static void gen6_ppgtt_unmap_vma(struct i915_vma *vma);
+
static gen6_gtt_pte_t gen6_pte_encode(dma_addr_t addr,
enum i915_cache_level level)
{
@@ -307,7 +312,9 @@ static int
[Intel-gfx] [PATCH 10/12] drm/i915: Convert execbuf code to use vmas
This attempts to convert all the execbuf code to speak in vmas. Since
the execbuf code is very self contained it was a nice isolated
conversion.
The meat of the code is about turning eb_objects into eb_vma, and then
wiring up the rest of the code to use vmas instead of obj, vm pairs.
Unfortunately, to do this, we must move the exec_list link from the obj
structure. This list is reused in the shrinker code, so we must also
modify the shrinker code to make this work.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 20 +-
drivers/gpu/drm/i915/i915_gem.c| 2 +-
drivers/gpu/drm/i915/i915_gem_evict.c | 31 ++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 295 ++---
4 files changed, 171 insertions(+), 177 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 59a8c03..fe41a3d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -465,6 +465,17 @@ struct i915_vma {
struct list_head mm_list;
struct list_head vma_link; /* Link in the object's VMA list */
+
+ /** This vma's place in the batchbuffer or on the eviction list */
+ struct list_head exec_list;
+
+ /**
+* Used for performing relocations during execbuffer insertion.
+*/
+ struct hlist_node exec_node;
+ unsigned long exec_handle;
+ struct drm_i915_gem_exec_object2 *exec_entry;
+
};
struct i915_address_space {
@@ -1278,8 +1289,6 @@ struct drm_i915_gem_object {
struct list_head global_list;
struct list_head ring_list;
- /** This object's place in the batchbuffer or on the eviction list */
- struct list_head exec_list;
/**
* This is set if the object has been written to since last bound
@@ -1357,13 +1366,6 @@ struct drm_i915_gem_object {
void *dma_buf_vmapping;
int vmapping_count;
- /**
-* Used for performing relocations during execbuffer insertion.
-*/
- struct hlist_node exec_node;
- unsigned long exec_handle;
- struct drm_i915_gem_exec_object2 *exec_entry;
-
struct intel_ring_buffer *ring;
/** Breadcrumb of last rendering to the buffer. */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0fa6667..397a4b4 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3922,7 +3922,6 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
{
INIT_LIST_HEAD(obj-global_list);
INIT_LIST_HEAD(obj-ring_list);
- INIT_LIST_HEAD(obj-exec_list);
INIT_LIST_HEAD(obj-vma_list);
obj-ops = ops;
@@ -4057,6 +4056,7 @@ struct i915_vma *i915_gem_vma_create(struct
drm_i915_gem_object *obj,
INIT_LIST_HEAD(vma-vma_link);
INIT_LIST_HEAD(vma-mm_list);
+ INIT_LIST_HEAD(vma-exec_list);
vma-vm = vm;
vma-obj = obj;
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c
b/drivers/gpu/drm/i915/i915_gem_evict.c
index 18a44a9..c860c5b 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -37,7 +37,7 @@ mark_free(struct i915_vma *vma, struct list_head *unwind)
if (vma-obj-pin_count)
return false;
- list_add(vma-obj-exec_list, unwind);
+ list_add(vma-exec_list, unwind);
return drm_mm_scan_add_block(vma-node);
}
@@ -49,7 +49,6 @@ i915_gem_evict_something(struct drm_device *dev, struct
i915_address_space *vm,
drm_i915_private_t *dev_priv = dev-dev_private;
struct list_head eviction_list, unwind_list;
struct i915_vma *vma;
- struct drm_i915_gem_object *obj;
int ret = 0;
trace_i915_gem_evict(dev, min_size, alignment, mappable);
@@ -104,14 +103,13 @@ i915_gem_evict_something(struct drm_device *dev, struct
i915_address_space *vm,
none:
/* Nothing found, clean up and bail out! */
while (!list_empty(unwind_list)) {
- obj = list_first_entry(unwind_list,
- struct drm_i915_gem_object,
+ vma = list_first_entry(unwind_list,
+ struct i915_vma,
exec_list);
- vma = i915_gem_obj_to_vma(obj, vm);
ret = drm_mm_scan_remove_block(vma-node);
BUG_ON(ret);
- list_del_init(obj-exec_list);
+ list_del_init(vma-exec_list);
}
/* We expect the caller to unpin, evict all and try again, or give up.
@@ -125,28 +123,27 @@ found:
* temporary list. */
INIT_LIST_HEAD(eviction_list);
while (!list_empty(unwind_list)) {
- obj = list_first_entry(unwind_list,
- struct drm_i915_gem_object,
+ vma = list_first_entry(unwind_list,
+
[Intel-gfx] [PATCH 12/12] drm/i915: Convert active API to VMA
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 5 ++---
drivers/gpu/drm/i915/i915_gem.c| 14 ++
drivers/gpu/drm/i915/i915_gem_context.c| 5 +++--
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
4 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2b4f30c..8850730 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1738,9 +1738,8 @@ int __must_check i915_mutex_lock_interruptible(struct
drm_device *dev);
int i915_gem_object_sync(struct drm_i915_gem_object *obj,
struct intel_ring_buffer *to);
bool i915_gem_object_is_active(struct drm_i915_gem_object *obj);
-void i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- struct intel_ring_buffer *ring);
+void i915_gem_vma_move_to_active(struct i915_vma *vma,
+struct intel_ring_buffer *ring);
int i915_gem_dumb_create(struct drm_file *file_priv,
struct drm_device *dev,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e038709..6ff9040 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1879,14 +1879,13 @@ i915_gem_object_get_pages(struct drm_i915_gem_object
*obj)
}
void
-i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
- struct i915_address_space *vm,
- struct intel_ring_buffer *ring)
+i915_gem_vma_move_to_active(struct i915_vma *vma,
+ struct intel_ring_buffer *ring)
{
- struct drm_device *dev = obj-base.dev;
+ struct drm_device *dev = ring-dev;
struct drm_i915_private *dev_priv = dev-dev_private;
u32 seqno = intel_ring_get_seqno(ring);
- struct i915_vma *vma;
+ struct drm_i915_gem_object *obj = vma-obj;
BUG_ON(ring == NULL);
if (obj-ring != ring obj-last_write_seqno) {
@@ -1895,15 +1894,14 @@ i915_gem_object_move_to_active(struct
drm_i915_gem_object *obj,
}
obj-ring = ring;
- /* Move from whatever list we were on to the tail of execution. */
- vma = i915_gem_obj_to_vma(obj, vm);
/* Add a reference if we're newly entering the active list. */
if (!vma-active) {
drm_gem_object_reference(obj-base);
vma-active = 1;
}
- list_move_tail(vma-mm_list, vm-active_list);
+ /* Move from whatever list we were on to the tail of execution. */
+ list_move_tail(vma-mm_list, vma-vm-active_list);
list_move_tail(obj-ring_list, ring-active_list);
obj-last_read_seqno = seqno;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index cc7c0b4..8177a2d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -441,9 +441,10 @@ static int do_switch(struct i915_hw_context *to)
* MI_SET_CONTEXT instead of when the next seqno has completed.
*/
if (from != NULL) {
+ struct i915_vma *vma =
+ i915_gem_obj_to_vma(from-obj, dev_priv-gtt.base);
from-obj-base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
- i915_gem_object_move_to_active(from-obj, dev_priv-gtt.base,
- ring);
+ i915_gem_vma_move_to_active(vma, ring);
/* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
* whole damn pipeline, we don't need to explicitly mark the
* object dirty. The only exception is that the context must be
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 75325c9..8559947 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -798,7 +798,7 @@ i915_gem_execbuffer_move_to_active(struct list_head *vmas,
obj-base.read_domains = obj-base.pending_read_domains;
obj-fenced_gpu_access = obj-pending_fenced_gpu_access;
- i915_gem_object_move_to_active(obj, vma-vm, ring);
+ i915_gem_vma_move_to_active(vma, ring);
if (obj-base.write_domain) {
obj-dirty = 1;
obj-last_write_seqno = intel_ring_get_seqno(ring);
--
1.8.3.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/12] drm/i915: eliminate vm-insert_entries()
With bind/unbind function pointers in place, we no longer need
insert_entries. We could, and want, to remove clear_range, however it's
not totally easy at this point. Since it's used in a couple of place
still that don't only deal in objects: setup, ppgtt init, and restore
gtt mappings.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 16
1 file changed, 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1de49a0..5c04887 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -315,7 +315,6 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt-base.unmap_vma = NULL;
ppgtt-base.clear_range = gen6_ppgtt_clear_range;
ppgtt-base.map_vma = NULL;
- ppgtt-base.insert_entries = gen6_ppgtt_insert_entries;
ppgtt-base.cleanup = gen6_ppgtt_cleanup;
ppgtt-base.scratch = dev_priv-gtt.base.scratch;
ppgtt-pt_pages = kzalloc(sizeof(struct page *)*ppgtt-num_pd_entries,
@@ -570,19 +569,6 @@ static void gen6_ggtt_clear_range(struct
i915_address_space *vm,
readl(gtt_base);
}
-
-static void i915_ggtt_insert_entries(struct i915_address_space *vm,
-struct sg_table *st,
-unsigned int pg_start,
-enum i915_cache_level cache_level)
-{
- unsigned int flags = (cache_level == I915_CACHE_NONE) ?
- AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
-
- intel_gtt_insert_sg_entries(st, pg_start, flags);
-
-}
-
static void i915_ggtt_map_vma(struct i915_vma *vma,
enum i915_cache_level cache_level,
u32 unused)
@@ -895,7 +881,6 @@ static int gen6_gmch_probe(struct drm_device *dev,
dev_priv-gtt.base.clear_range = gen6_ggtt_clear_range;
dev_priv-gtt.base.unmap_vma = gen6_ggtt_unmap_vma;
- dev_priv-gtt.base.insert_entries = gen6_ggtt_insert_entries;
dev_priv-gtt.base.map_vma = gen6_ggtt_map_vma;
return ret;
@@ -929,7 +914,6 @@ static int i915_gmch_probe(struct drm_device *dev,
dev_priv-gtt.do_idle_maps = needs_idle_maps(dev_priv-dev);
dev_priv-gtt.base.clear_range = i915_ggtt_clear_range;
dev_priv-gtt.base.unmap_vma = i915_ggtt_unmap_vma;
- dev_priv-gtt.base.insert_entries = i915_ggtt_insert_entries;
dev_priv-gtt.base.map_vma = i915_ggtt_map_vma;
return 0;
--
1.8.3.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/12] drm/i915: Add vma to list at creation
With the current code there shouldn't be a distinction - however with an upcoming change we intend to allocate a vma much earlier, before it's actually bound anywhere. To do this we have to check node allocation as well for the _bound() check. Signed-off-by: Ben Widawsky b...@bwidawsk.net --- drivers/gpu/drm/i915/i915_gem.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 63297d7..a6dc653 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -3190,12 +3190,6 @@ search_free: list_move_tail(obj-global_list, dev_priv-mm.bound_list); list_add_tail(vma-mm_list, vm-inactive_list); - /* Keep GGTT vmas first to make debug easier */ - if (i915_is_ggtt(vm)) - list_add(vma-vma_link, obj-vma_list); - else - list_add_tail(vma-vma_link, obj-vma_list); - fenceable = i915_is_ggtt(vm) i915_gem_obj_ggtt_size(obj) == fence_size @@ -4069,6 +4063,12 @@ struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj, vma-vm = vm; vma-obj = obj; + /* Keep GGTT vmas first to make debug easier */ + if (i915_is_ggtt(vm)) + list_add(vma-vma_link, obj-vma_list); + else + list_add_tail(vma-vma_link, obj-vma_list); + return vma; } @@ -4767,7 +4767,7 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o, struct i915_vma *vma; list_for_each_entry(vma, o-vma_list, vma_link) - if (vma-vm == vm) + if (vma-vm == vm drm_mm_node_allocated(vma-node)) return true; return false; -- 1.8.3.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 04/12] drm/i915: Track active by VMA instead of object
Even though we want to be able to track active by VMA, the rest of the
code is still using objects for most internal APIs. To solve this,
create an object_is_active() function to help us in converting over to
VMA usage.
Because we intend to keep around some functions that care about objects,
and not VMAs, having this function around will be useful even as we
begin to use VMAs more in function arguments.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 15 +++
drivers/gpu/drm/i915/i915_gem.c| 64 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
3 files changed, 48 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f809204..bdce9c1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -541,6 +541,13 @@ struct i915_vma {
struct drm_i915_gem_object *obj;
struct i915_address_space *vm;
+ /**
+* This is set if the object is on the active lists (has pending
+* rendering and so a non-zero seqno), and is not set if it i s on
+* inactive (ready to be unbound) list.
+*/
+ unsigned int active:1;
+
/** This object's place on the active/inactive lists */
struct list_head mm_list;
@@ -1266,13 +1273,6 @@ struct drm_i915_gem_object {
struct list_head exec_list;
/**
-* This is set if the object is on the active lists (has pending
-* rendering and so a non-zero seqno), and is not set if it i s on
-* inactive (ready to be unbound) list.
-*/
- unsigned int active:1;
-
- /**
* This is set if the object has been written to since last bound
* to the GTT
*/
@@ -1726,6 +1726,7 @@ static inline void i915_gem_object_unpin_pages(struct
drm_i915_gem_object *obj)
int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);
int i915_gem_object_sync(struct drm_i915_gem_object *obj,
struct intel_ring_buffer *to);
+bool i915_gem_object_is_active(struct drm_i915_gem_object *obj);
void i915_gem_object_move_to_active(struct drm_i915_gem_object *obj,
struct i915_address_space *vm,
struct intel_ring_buffer *ring);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 6bdf89d..9ea6424 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -119,10 +119,22 @@ int i915_mutex_lock_interruptible(struct drm_device *dev)
return 0;
}
+/* NB: Not the same as !i915_gem_object_is_inactive */
+bool i915_gem_object_is_active(struct drm_i915_gem_object *obj)
+{
+ struct i915_vma *vma;
+
+ list_for_each_entry(vma, obj-vma_list, vma_link)
+ if (vma-active)
+ return true;
+
+ return false;
+}
+
static inline bool
i915_gem_object_is_inactive(struct drm_i915_gem_object *obj)
{
- return i915_gem_obj_bound_any(obj) !obj-active;
+ return i915_gem_obj_bound_any(obj) !i915_gem_object_is_active(obj);
}
int
@@ -1883,14 +1895,14 @@ i915_gem_object_move_to_active(struct
drm_i915_gem_object *obj,
}
obj-ring = ring;
+ /* Move from whatever list we were on to the tail of execution. */
+ vma = i915_gem_obj_to_vma(obj, vm);
/* Add a reference if we're newly entering the active list. */
- if (!obj-active) {
+ if (!vma-active) {
drm_gem_object_reference(obj-base);
- obj-active = 1;
+ vma-active = 1;
}
- /* Move from whatever list we were on to the tail of execution. */
- vma = i915_gem_obj_to_vma(obj, vm);
list_move_tail(vma-mm_list, vm-active_list);
list_move_tail(obj-ring_list, ring-active_list);
@@ -1911,16 +1923,23 @@ i915_gem_object_move_to_active(struct
drm_i915_gem_object *obj,
}
static void
-i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj,
-struct i915_address_space *vm)
+i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
{
+ struct drm_i915_private *dev_priv = obj-base.dev-dev_private;
+ struct i915_address_space *vm;
struct i915_vma *vma;
+ int i = 0;
BUG_ON(obj-base.write_domain ~I915_GEM_GPU_DOMAINS);
- BUG_ON(!obj-active);
- vma = i915_gem_obj_to_vma(obj, vm);
- list_move_tail(vma-mm_list, vm-inactive_list);
+ list_for_each_entry(vm, dev_priv-vm_list, global_link) {
+ vma = i915_gem_obj_to_vma(obj, vm);
+ if (!vma || !vma-active)
+ continue;
+ list_move_tail(vma-mm_list, vm-inactive_list);
+ vma-active = 0;
+ i++;
+ }
list_del_init(obj-ring_list);
obj-ring = NULL;
@@ -1932,8
[Intel-gfx] [PATCH 09/12] drm/i915: create vmas at execbuf
In order to transition more of our code over to using a VMA instead of
an OBJ, VM pair - we must have the vma accessible at execbuf time. Up
until now, we've only had a VMA when actually binding an object.
The previous patch helped handle the distinction on bound vs. unbound.
This patch will help us catch leaks, and other issues before we actually
shuffle a bunch of stuff around.
The subsequent patch to fix up the rest of execbuf should be mostly just
moving code around, and this is the major functional change.
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h| 3 +++
drivers/gpu/drm/i915/i915_gem.c| 26 ++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 10 --
3 files changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d6aa34..59a8c03 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1867,6 +1867,9 @@ void i915_gem_obj_set_color(struct drm_i915_gem_object *o,
enum i915_cache_level color);
struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
struct i915_address_space *vm);
+struct i915_vma *
+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
+ struct i915_address_space *vm);
/* Some GGTT VM helpers */
#define obj_to_ggtt(obj) \
(((struct drm_i915_private *)(obj)-base.dev-dev_private)-gtt.base)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a6dc653..0fa6667 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3111,9 +3111,6 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object
*obj,
struct i915_vma *vma;
int ret;
- if (WARN_ON(!list_empty(obj-vma_list)))
- return -EBUSY;
-
BUG_ON(!i915_is_ggtt(vm));
fence_size = i915_gem_get_gtt_size(dev,
@@ -3154,15 +3151,15 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object
*obj,
i915_gem_object_pin_pages(obj);
- /* For now we only ever use 1 vma per object */
- WARN_ON(!list_empty(obj-vma_list));
-
- vma = i915_gem_vma_create(obj, vm);
+ vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
if (IS_ERR(vma)) {
i915_gem_object_unpin_pages(obj);
return PTR_ERR(vma);
}
+ /* For now we only ever use 1 vma per object */
+ WARN_ON(!list_is_singular(obj-vma_list));
+
search_free:
ret = drm_mm_insert_node_in_range_generic(vm-mm, vma-node,
size, alignment,
@@ -4054,7 +4051,7 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj)
struct i915_vma *i915_gem_vma_create(struct drm_i915_gem_object *obj,
struct i915_address_space *vm)
{
- struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_KERNEL);
+ struct i915_vma *vma = kzalloc(sizeof(*vma), GFP_ATOMIC);
if (vma == NULL)
return ERR_PTR(-ENOMEM);
@@ -4829,3 +4826,16 @@ struct i915_vma *i915_gem_obj_to_vma(struct
drm_i915_gem_object *obj,
return NULL;
}
+
+struct i915_vma *
+i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
+ struct i915_address_space *vm)
+{
+ struct i915_vma *vma;
+
+ vma = i915_gem_obj_to_vma(obj, vm);
+ if (!vma)
+ vma = i915_gem_vma_create(obj, vm);
+
+ return vma;
+}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6359ef2..1f82a04 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -85,12 +85,14 @@ static int
eb_lookup_objects(struct eb_objects *eb,
struct drm_i915_gem_exec_object2 *exec,
const struct drm_i915_gem_execbuffer2 *args,
+ struct i915_address_space *vm,
struct drm_file *file)
{
int i;
spin_lock(file-table_lock);
for (i = 0; i args-buffer_count; i++) {
+ struct i915_vma *vma;
struct drm_i915_gem_object *obj;
obj = to_intel_bo(idr_find(file-object_idr, exec[i].handle));
@@ -111,6 +113,10 @@ eb_lookup_objects(struct eb_objects *eb,
drm_gem_object_reference(obj-base);
list_add_tail(obj-exec_list, eb-objects);
+ vma = i915_gem_obj_lookup_or_create_vma(obj, vm);
+ if (IS_ERR(vma))
+ return PTR_ERR(vma);
+
obj-exec_entry = exec[i];
if (eb-and 0) {
eb-lut[i] = obj;
@@ -666,7 +672,7 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev,
/* reacquire the objects */
eb_reset(eb);
-
[Intel-gfx] [PATCH 11/12] drm/i915: Convert object coloring to VMA
Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/i915_gem.c | 18 +-
2 files changed, 1 insertion(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fe41a3d..2b4f30c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1864,9 +1864,6 @@ bool i915_gem_obj_bound(struct drm_i915_gem_object *o,
struct i915_address_space *vm);
unsigned long i915_gem_obj_size(struct drm_i915_gem_object *o,
struct i915_address_space *vm);
-void i915_gem_obj_set_color(struct drm_i915_gem_object *o,
- struct i915_address_space *vm,
- enum i915_cache_level color);
struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
struct i915_address_space *vm);
struct i915_vma *
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 397a4b4..e038709 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3394,7 +3394,7 @@ int i915_gem_object_set_cache_level(struct
drm_i915_gem_object *obj,
}
vm-map_vma(vma, cache_level, 0);
- i915_gem_obj_set_color(obj, vm, cache_level);
+ vma-node.color = cache_level;
}
if (cache_level == I915_CACHE_NONE) {
@@ -4800,22 +4800,6 @@ unsigned long i915_gem_obj_size(struct
drm_i915_gem_object *o,
return 0;
}
-void i915_gem_obj_set_color(struct drm_i915_gem_object *o,
- struct i915_address_space *vm,
- enum i915_cache_level color)
-{
- struct i915_vma *vma;
- BUG_ON(list_empty(o-vma_list));
- list_for_each_entry(vma, o-vma_list, vma_link) {
- if (vma-vm == vm) {
- vma-node.color = color;
- return;
- }
- }
-
- WARN(1, Couldn't set color for VM %p\n, vm);
-}
-
struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
struct i915_address_space *vm)
{
--
1.8.3.3
___
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http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] lib/drmtest: add drmtest_disable/enable_prefault() function
Yes, I have tested it before I sent out the patch.
It hit all the slow paths.
Thanks.
-Original Message-
From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter
Sent: Saturday, July 20, 2013 12:14 AM
To: Zhang, Xiong Y
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/2] lib/drmtest: add
drmtest_disable/enable_prefault() function
On Fri, Jul 19, 2013 at 06:42:51PM +0800, Xiong Zhang wrote:
V2: add exit handler to enable prefault (Daniel)
Signed-off-by: Xiong Zhang xiong.y.zh...@intel.com
Thanks a lot for doing these patches, I've merged them both. Just to
check: Are the subtests added now instead of your gem_prefault testcase good
enough to still hit all slowpaths? I have to admit that I didn't even really
compile-test my little idea that I've pasted as a diff into my reply ;-)
Cheers, Daniel
---
lib/drmtest.c | 50 ++
lib/drmtest.h | 3 +++
2 files changed, 53 insertions(+)
diff --git a/lib/drmtest.c b/lib/drmtest.c index 011d8c1..980fa49
100644
--- a/lib/drmtest.c
+++ b/lib/drmtest.c
@@ -1593,3 +1593,53 @@ void kmstest_free_connector_config(struct
kmstest_connector_config *config)
drmModeFreeEncoder(config-encoder);
drmModeFreeConnector(config-connector);
}
+
+#define PREFAULT_DEBUGFS /sys/module/i915/parameters/prefault_disable
+static int drmtest_prefault_control(bool enable) {
+ char *name = PREFAULT_DEBUGFS;
+ int fd;
+ char buf[2] = {'Y', 'N'};
+ int index;
+ int result = 0;
+
+ fd = open(name, O_RDWR);
+ if (fd == -1) {
+ fprintf(stderr, Couldn't open prefault_debugfs.%s\n,
+ strerror(errno));
+ return -1;
+ }
+
+ if (enable)
+ index = 1;
+ else
+ index = 0;
+
+ if (write(fd, buf[index], 1) != 1) {
+ fprintf(stderr, write prefault_debugfs error.%s\n,
+ strerror(errno));
+ result = -1;
+ }
+
+ close(fd);
+
+ return result;
+}
+
+static void enable_prefault_at_exit(int sig) {
+ drmtest_enable_prefault();
+}
+
+int drmtest_disable_prefault(void)
+{
+ drmtest_install_exit_handler(enable_prefault_at_exit);
+
+ return drmtest_prefault_control(false); }
+
+int drmtest_enable_prefault(void)
+{
+ return drmtest_prefault_control(true); }
+
diff --git a/lib/drmtest.h b/lib/drmtest.h index e3a9275..80b344c
100644
--- a/lib/drmtest.h
+++ b/lib/drmtest.h
@@ -179,3 +179,6 @@ void drmtest_enable_exit_handler(void);
void drmtest_disable_exit_handler(void);
int drmtest_set_vt_graphics_mode(void);
+
+int drmtest_disable_prefault(void);
+int drmtest_enable_prefault(void);
--
1.8.3.2
___
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
___
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Re: [Intel-gfx] [PATCH] drm/i915: fix up gt init sequence fallout
Daniel Vetter wrote:
The regression fix for gen6+ rps fallout
commit 7dcd2677ea912573d9ed4bcd629b0023b2d11505
Author: Konstantin Khlebnikovkhlebni...@openvz.org
Date: Wed Jul 17 10:22:58 2013 +0400
drm/i915: fix long-standing SNB regression in power consumption after
resume
unintentionally also changed the init sequence ordering between
gt_init and gt_reset - we need to reset BIOS damage like leftover
forcewake references before we run our own code. Otherwise we can get
nasty dmesg noise like
[drm:__gen6_gt_force_wake_mt_get] *ERROR* Timed out waiting for forcewake old
ack to clear.
again. Since _reset suggests that we first need to have stuff
initialized (which isn't the case here) call it sanitze instead.
While at it also block out the rps disable introduce by the above
commit on ilk: We don't have any knowledge of ilk rps being broken in
similar ways. And the disable functions uses the default hw state
which is only read out when we're enabling rps. So essentially we've
been writing random grabage into that register.
Reported-by: Chris Wilsonch...@chris-wilson.co.uk
Cc: Chris Wilsonch...@chris-wilson.co.uk
Cc: Konstantin Khlebnikovkhlebni...@openvz.org
Cc: Jesse Barnesjbar...@virtuousgeek.org
Cc: sta...@vger.kernel.org
Signed-off-by: Daniel Vetterdaniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/i915_dma.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 5 +++--
4 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5c0663f..abf158d 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1593,8 +1593,8 @@ int i915_driver_load(struct drm_device *dev, unsigned
long flags)
intel_detect_pch(dev);
intel_irq_init(dev);
+ intel_gt_sanitize(dev);
intel_gt_init(dev);
- intel_gt_reset(dev);
Ok, this will work. I just found that I915_WRITE() doesn't call
gt.force_wake_get/put unlike to I915_READ(). intel_gt_sanitize() calls
only writes and posting reads, so it can be called before intel_gt_init()
/* Try to make sure MCHBAR is enabled before poking at it */
intel_setup_mchbar(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6ddc567..45b3c03 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -706,7 +706,7 @@ static int i915_drm_thaw(struct drm_device *dev)
{
int error = 0;
- intel_gt_reset(dev);
+ intel_gt_sanitize(dev);
if (drm_core_check_feature(dev, DRIVER_MODESET)) {
mutex_lock(dev-struct_mutex);
@@ -732,7 +732,7 @@ int i915_resume(struct drm_device *dev)
pci_set_master(dev-pdev);
- intel_gt_reset(dev);
+ intel_gt_sanitize(dev);
/*
* Platforms with opregion should have sane BIOS, older ones (gen3 and
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 204c3ec..d2ee334 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1584,7 +1584,7 @@ void i915_handle_error(struct drm_device *dev, bool
wedged);
extern void intel_irq_init(struct drm_device *dev);
extern void intel_hpd_init(struct drm_device *dev);
extern void intel_gt_init(struct drm_device *dev);
-extern void intel_gt_reset(struct drm_device *dev);
+extern void intel_gt_sanitize(struct drm_device *dev);
void i915_error_state_free(struct kref *error_ref);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 828c426..6a347f5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5476,7 +5476,7 @@ static void vlv_force_wake_put(struct drm_i915_private
*dev_priv)
gen6_gt_check_fifodbg(dev_priv);
}
-void intel_gt_reset(struct drm_device *dev)
+void intel_gt_sanitize(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -5489,7 +5489,8 @@ void intel_gt_reset(struct drm_device *dev)
}
/* BIOS often leaves RC6 enabled, but disable it for hw init */
- intel_disable_gt_powersave(dev);
+ if (INTEL_INFO(dev)-gen= 6)
+ intel_disable_gt_powersave(dev);
}
This hunk might be simplified:
@@ -4496,10 +4496,10 @@ void intel_gt_reset(struct drm_device *dev)
__gen6_gt_force_wake_reset(dev_priv);
if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))
__gen6_gt_force_wake_mt_reset(dev_priv);
- }
- /* BIOS often leaves RC6 enabled, but disable it for hw init */
- intel_disable_gt_powersave(dev);
+ /* BIOS often leaves RC6 enabled, but disable it for hw init */
+ gen6_disable_rps(dev);
+ }
}
void intel_gt_init(struct drm_device *dev)
___
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Re: [Intel-gfx] [PATCH] drm/i915: fix up readout of the lvds dither bit on gen2/3
On 11.07.2013 19:22, Daniel Vetter wrote: On Thu, Jul 11, 2013 at 06:29:15PM +0200, Knut Petersen wrote: On 11.07.2013 13:49, Chris Wilson wrote: On Thu, Jul 11, 2013 at 01:35:40PM +0200, Daniel Vetter wrote: It's in the PFIT_CONTROL register, but very much associated with the lvds encoder. So move the readout for it (in the case of an otherwise disabled pfit) from the pipe to the lvds encoder's get_config function. Otherwise we get a pipe state mismatch if we use pipe B for a non-lvds output and we've left the dither bit enabled behind us. This can happen if the BIOS has set the bit (some seem to unconditionally do that, even in the complete absence of an lvds port), but not enabled pipe B at boot-up. Then we won't clear the pfit control register since we can only touch that if the pfit is associated with our pipe in the crtc configuration - we could trample over the pfit state of the other pipe otherwise since it's shared. Once pipe B is enabled we notice that the 6to8 dither bit is set and complain about the mismatch. Note that testing indicates that we don't actually need to set this bit when the pfit is disabled, dithering on 18bpp panels seems to work regardless. But ripping that code out is not something for a bugfix meant for -rc kernels. v2: While at it clarify the logic in i9xx_get_pfit_config, spurred by comments from Chris on irc. v3: Use Chris suggestion to make the control flow in i9xx_get_pfit_config easier to understand. v4: Kill the extra line, spotted by Chris. Reported-by: Knut Petersen knut_peter...@t-online.de Cc: Knut Petersen knut_peter...@t-online.de Cc: Chris Wilson ch...@chris-wilson.co.uk References: http://lists.freedesktop.org/archives/intel-gfx/2013-July/030092.html Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Reviewed-by: Chris Wilson ch...@chris-wilson.co.uk -Chris Tested-by: Knut Petersen knut_peter...@t-online.de Thanks, that patch cures both inital boot and suspend/resume problems. Attached find dmesg (inital boot) and dmesg2 (suspend/resume cycle). Thanks for testing and reporting this issue, patch is merged into my -fixes queue now. Thanks, Daniel We have -rc2, but this patch is still missing ... cu, Knut ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
