Re: [Intel-gfx] [Linux v4.10.0-rc1] call-traces after suspend-resume (pm? i915? cpu/hotplug?)
On Thu, 29 Dec 2016, Sedat Dilek wrote:
> On Wed, Dec 28, 2016 at 11:32 PM, Rafael J. Wysocki wrote:
>> On Wed, Dec 28, 2016 at 11:00 AM, Sedat Dilek wrote:
>>> On Wed, Dec 28, 2016 at 9:29 AM, Jani Nikula wrote:
On Wed, 28 Dec 2016, Sedat Dilek wrote:
> On Tue, Dec 27, 2016 at 10:13 PM, Pavel Machek wrote:
>> Hi!
>>
>>> [ Add some pm | i915 | x86 folks ]
>>>
>>> Hi,
>>>
>>> I have built Linux v4.10-rc1 today on my Ubuntu/precise AMD64 system
>>> and I see some call-traces.
>>> It is reproducible on suspend and resume.
>>>
>>> I cannot say which area touches the problem or if these are several
>>> independent problems.
>>>
>>> For a full dmesg-log see attachments (my linux-config is attached, too).
>>>
>>> Here some hunks...
>>>
>>> [ 29.003601] BUG: sleeping function called from invalid context at
>>> drivers/base/power/runtime.c:1032
>>> [ 29.003608] in_atomic(): 1, irqs_disabled(): 0, pid: 1469, name: Xorg
>>> [ 29.003610] 1 lock held by Xorg/1469:
>>> [ 29.003611] #0: (&dev->struct_mutex){+.+.+.}, at:
>>> [] i915_mutex_lock_interruptible+0x43/0x140 [i915]
>>> [ 29.003653] CPU: 0 PID: 1469 Comm: Xorg Not tainted
>>> 4.10.0-rc1-1-iniza-small #1
>>> [ 29.003655] Hardware name: SAMSUNG ELECTRONICS CO., LTD.
>>> 530U3BI/530U4BI/530U4BH/530U3BI/530U4BI/530U4BH, BIOS 13XK 03/28/2013
>>> [ 29.003656] Call Trace:
>>
>> Just a note, at least 2 machines here refuse to resume with
>> v4.10-rc1. One has intel graphics, one has AMD. It may or may not have
>> common cause...
>>
>
> [ Correct linux-pm ML and add Mika & Jani ]
>
> Thanks for the feedback.
>
> There are some cpu/hotplug fixes post-v4.10-rc1.
> Give that a try.
>
> Yesterday, after answers from drm-intel folks I have seen that a
> cpu/hotplug commit [1] was reverted in
> drm-intel.git#drm-intel-nightly.
> I haven't tried that.
>
> It's good when Thomas knows of this and gets in contact with drm-intel
> folks.
>
> Regards,
> - Sedat -
>
> [1]
> https://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=e558f178f5390185b7324ff4b816b52c6ae3a928
> [2] https://cgit.freedesktop.org/drm-intel/log/?h=drm-intel-nightly
>
> P.S.: Revert "cpu/hotplug: Prevent overwriting of callbacks"
>
> This reverts commit dc280d93623927570da279e99393879dbbab39e7
> Author: Thomas Gleixner
> Date: Wed Dec 21 20:19:49 2016 +0100
> cpu/hotplug: Prevent overwriting of callbacks
>
> It started hanging all machines in CI s3 test:
> https://intel-gfx-ci.01.org/CI/igt@gem_exec_susp...@basic-s3.html
>
> Bisected-by: Mika Kuoppala
> Signed-off-by: Jani Nikula
Thomas -
Indeed, basically all of the boxes in the intel-gfx CI hang at the
suspend/resume test with dc280d936239 ("cpu/hotplug: Prevent overwriting
of callbacks"), and after the revert in the tree that feeds to the CI,
we're back on track.
I found [1], was hoping to get feedback from Mika whether that helps
before reporting. Chris also suggested [2] as a quick fix but I don't
know if anyone tried that.
>>>
>>> Hi Jani,
>>>
>>> I know you were not CCed in the original thread, please see [5].
>>>
>>> The patchset from Thomas you mention [1] does fix one of the problems
>>> I have seen, please see [6].
>>> With these post-v4.10-rc1 patches applied a clean revert of Revert
>>> "cpu/hotplug: Prevent overwriting of callbacks" is not possible.
>>>
>>> Can you give a clear statement if the quick-fix from Chris is in
>>> combination with the above revert or not?
>>> Against v4.10-rc1?
>>> Tested together with the patchset of Thomas?
>>
>> Please test the Linus' tree from today, it should work.
>>
>
> Latest Linus tree (v4.10-rc1-17-g2d706e790f05) does not fix it.
It seems to me there are more than one bug at play here.
BR,
Jani.
>
> - Sedat -
--
Jani Nikula, Intel Open Source Technology Center
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Re: [Intel-gfx] [PATCH v3 3/3] drm: clean cached display info
Hi Shashank,
On 29-12-2016 05:53, Sharma, Shashank wrote:
> Regards
>
> Shashank
>
>
> On 12/27/2016 3:07 PM, Daniel Vetter wrote:
>> On Thu, Dec 22, 2016 at 10:21:25AM +, Jose Abreu wrote:
>>> Hi Shashank,
>>>
>>>
>>> On 21-12-2016 15:29, Shashank Sharma wrote:
This patch adds a small helper function, which clears the
cached
information about a hot-pluggable display, from connector.
On event
This will run on event of a hot-unplug, keeping the
connector's display
info up-to-date, avoiding any errors due to invalid cached
data.
Cc: Jose Abreu
Suggested-by: Jose Abreu
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_probe_helper.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/drm_probe_helper.c
b/drivers/gpu/drm/drm_probe_helper.c
index 7cff91e..9e97b45 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -164,6 +164,18 @@ void
drm_kms_helper_poll_enable_locked(struct drm_device *dev)
}
/**
+ * drm_helper_clear_display_info - clean cached display
information for
+ * hot pluggable displays, on event of hot-unplug
+ * @connector: connector under event
+ */
+void drm_helper_clear_display_info(struct drm_connector
*connector)
+{
+struct drm_display_info *info = &connector->display_info;
+
+memset(info, 0, sizeof(*info));
+}
+
+/**
* drm_helper_probe_single_connector_modes - get complete
set of display modes
* @connector: connector to probe
* @maxX: max width for modes
@@ -288,6 +300,14 @@ int
drm_helper_probe_single_connector_modes(struct drm_connector
*connector,
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
connector->base.id, connector->name);
drm_mode_connector_update_edid_property(connector,
NULL);
+
+/*
+ * Connector status change to disconnected, time to
clean
+ * cached display information
+ */
+if (connector->status ==
connector_status_disconnected)
+drm_helper_clear_display_info(connector);
+
>>> I don't know if this is the right place to do this because it is
>>> a helper and I don't know if it is used by all the drivers. We
>>> may need something more general that is always called when
>>> probing modes, or force drivers that don't use the helper to use
>>> the drm_helper_clear_display_info function. As I told you
>>> before,
>>> I'm new to dri-devel so we need more comments.
>> Seems reasonable to me, since afaik all drivers do use the
>> probe helpers.
>> -Daniel
> This was my understanding too. Jose, you think there would be
> any drivers who dont use this probe ?
> - Shashank
I found only one driver that don't use this helper: vmwgfx. But,
this driver does not seem to use EDID fields, it has a list of
preferred video modes and manually adds these modes.
So, I think it is safe to add this in the helper as long as
future drivers that use EDID use this helper also. Maybe a small
comment about this should be added in the helper declaration.
Best regards,
Jose Miguel Abreu
>>> Best regards,
>>> Jose Miguel Abreu
>>>
verbose_prune = false;
goto prune;
}
>>> ___
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>>
>
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Re: [Intel-gfx] [PATCH 0/2] Pipe CSC and Gamma Enabling for GLK.
On Thu, 29 Dec 2016, Dhanya Pillai wrote: > This series contains patches for enabling CSC and Gamma for > GLK. Also, it programs unity gamma to Pre-CSC Gamma lut for GLK+. The patches don't apply on top of drm-tip branch of [1]. Please rebase and repost. BR, Jani. [1] https://cgit.freedesktop.org/drm-tip -- Jani Nikula, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 3/3] drm: clean cached display info
Regards
Shashank
On 12/29/2016 3:35 PM, Jose Abreu wrote:
Hi Shashank,
On 29-12-2016 05:53, Sharma, Shashank wrote:
Regards
Shashank
On 12/27/2016 3:07 PM, Daniel Vetter wrote:
On Thu, Dec 22, 2016 at 10:21:25AM +, Jose Abreu wrote:
Hi Shashank,
On 21-12-2016 15:29, Shashank Sharma wrote:
This patch adds a small helper function, which clears the
cached
information about a hot-pluggable display, from connector.
On event
This will run on event of a hot-unplug, keeping the
connector's display
info up-to-date, avoiding any errors due to invalid cached
data.
Cc: Jose Abreu
Suggested-by: Jose Abreu
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_probe_helper.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/drm_probe_helper.c
b/drivers/gpu/drm/drm_probe_helper.c
index 7cff91e..9e97b45 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -164,6 +164,18 @@ void
drm_kms_helper_poll_enable_locked(struct drm_device *dev)
}
/**
+ * drm_helper_clear_display_info - clean cached display
information for
+ * hot pluggable displays, on event of hot-unplug
+ * @connector: connector under event
+ */
+void drm_helper_clear_display_info(struct drm_connector
*connector)
+{
+struct drm_display_info *info = &connector->display_info;
+
+memset(info, 0, sizeof(*info));
+}
+
+/**
* drm_helper_probe_single_connector_modes - get complete
set of display modes
* @connector: connector to probe
* @maxX: max width for modes
@@ -288,6 +300,14 @@ int
drm_helper_probe_single_connector_modes(struct drm_connector
*connector,
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
connector->base.id, connector->name);
drm_mode_connector_update_edid_property(connector,
NULL);
+
+/*
+ * Connector status change to disconnected, time to
clean
+ * cached display information
+ */
+if (connector->status ==
connector_status_disconnected)
+drm_helper_clear_display_info(connector);
+
I don't know if this is the right place to do this because it is
a helper and I don't know if it is used by all the drivers. We
may need something more general that is always called when
probing modes, or force drivers that don't use the helper to use
the drm_helper_clear_display_info function. As I told you
before,
I'm new to dri-devel so we need more comments.
Seems reasonable to me, since afaik all drivers do use the
probe helpers.
-Daniel
This was my understanding too. Jose, you think there would be
any drivers who dont use this probe ?
- Shashank
I found only one driver that don't use this helper: vmwgfx. But,
this driver does not seem to use EDID fields, it has a list of
preferred video modes and manually adds these modes.
So, I think it is safe to add this in the helper as long as
future drivers that use EDID use this helper also. Maybe a small
comment about this should be added in the helper declaration.
Best regards,
Jose Miguel Abreu
Sure, I will add a comment and publish a new patchset.
Shashank
Best regards,
Jose Miguel Abreu
verbose_prune = false;
goto prune;
}
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[Intel-gfx] [PATCH] drm/mm: Convert to drm_printer
Including all drivers. I thought about keeping small compat functions
to avoid having to change all drivers. But I really like the
drm_printer idea, so figured spreading it more widely is a good thing.
v2: Review from Chris:
- Natural argument order and better name for drm_mm_print.
- show_mm() macro in the selftest.
Cc: Rob Clark
Cc: Russell King
Cc: Alex Deucher
Cc: Christian König
Cc: Lucas Stach
Cc: Tomi Valkeinen
Cc: Thierry Reding
Cc: Jyri Sarha
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 3 +-
drivers/gpu/drm/armada/armada_debugfs.c | 6 +--
drivers/gpu/drm/drm_mm.c | 67 +---
drivers/gpu/drm/drm_print.c | 2 +-
drivers/gpu/drm/etnaviv/etnaviv_drv.c| 10 +++--
drivers/gpu/drm/msm/msm_debugfs.c| 6 ++-
drivers/gpu/drm/omapdrm/omap_debugfs.c | 6 ++-
drivers/gpu/drm/qxl/qxl_ttm.c| 6 +--
drivers/gpu/drm/radeon/radeon_ttm.c | 6 +--
drivers/gpu/drm/selftests/test-drm_mm.c | 12 +++--
drivers/gpu/drm/tegra/drm.c | 5 ++-
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 +-
drivers/gpu/drm/ttm/ttm_bo_manager.c | 3 +-
include/drm/drm_mm.h | 9 +---
16 files changed, 63 insertions(+), 91 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
index 00f46b0e076d..c6c125d31161 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c
@@ -235,9 +235,10 @@ static void amdgpu_gtt_mgr_debug(struct
ttm_mem_type_manager *man,
const char *prefix)
{
struct amdgpu_gtt_mgr *mgr = man->priv;
+ struct drm_printer p = drm_debug_printer(prefix);
spin_lock(&mgr->lock);
- drm_mm_debug_table(&mgr->mm, prefix);
+ drm_mm_print(&mgr->mm, &p);
spin_unlock(&mgr->lock);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 8e35c1ff59e3..c695b6c55361 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1482,18 +1482,18 @@ static int amdgpu_mm_dump_table(struct seq_file *m,
void *data)
struct drm_device *dev = node->minor->dev;
struct amdgpu_device *adev = dev->dev_private;
struct drm_mm *mm = (struct drm_mm *)adev->mman.bdev.man[ttm_pl].priv;
- int ret;
struct ttm_bo_global *glob = adev->mman.bdev.glob;
+ struct drm_printer p = drm_seq_file_printer(m);
spin_lock(&glob->lru_lock);
- ret = drm_mm_dump_table(m, mm);
+ drm_mm_print(mm, &p);
spin_unlock(&glob->lru_lock);
if (ttm_pl == TTM_PL_VRAM)
seq_printf(m, "man size:%llu pages, ram usage:%lluMB, vis
usage:%lluMB\n",
adev->mman.bdev.man[ttm_pl].size,
(u64)atomic64_read(&adev->vram_usage) >> 20,
(u64)atomic64_read(&adev->vram_vis_usage) >> 20);
- return ret;
+ return 0;
}
static int ttm_pl_vram = TTM_PL_VRAM;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index d710226a0fff..ac9007986c11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -207,9 +207,10 @@ static void amdgpu_vram_mgr_debug(struct
ttm_mem_type_manager *man,
const char *prefix)
{
struct amdgpu_vram_mgr *mgr = man->priv;
+ struct drm_printer p = drm_debug_printer(prefix);
spin_lock(&mgr->lock);
- drm_mm_debug_table(&mgr->mm, prefix);
+ drm_mm_print(&mgr->mm, &p);
spin_unlock(&mgr->lock);
}
diff --git a/drivers/gpu/drm/armada/armada_debugfs.c
b/drivers/gpu/drm/armada/armada_debugfs.c
index 90222e60d2d6..0c7b915be082 100644
--- a/drivers/gpu/drm/armada/armada_debugfs.c
+++ b/drivers/gpu/drm/armada/armada_debugfs.c
@@ -19,13 +19,13 @@ static int armada_debugfs_gem_linear_show(struct seq_file
*m, void *data)
struct drm_info_node *node = m->private;
struct drm_device *dev = node->minor->dev;
struct armada_private *priv = dev->dev_private;
- int ret;
+ struct drm_printer p = drm_seq_file_printer(m);
mutex_lock(&priv->linear_lock);
- ret = drm_mm_dump_table(m, &priv->linear);
+ drm_mm_dump_table(&p, &priv->linear);
mutex_unlock(&priv->linear_lock);
- return ret;
+ return 0;
}
static int armada_debugfs_reg_show(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 1a5b4eba2386..e54aa3fa538f 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -832,8 +832,7 @@ void
Re: [Intel-gfx] [PATCH] drm/mm: Convert to drm_printer
On Thu, Dec 29, 2016 at 12:09:24PM +0100, Daniel Vetter wrote: > Including all drivers. I thought about keeping small compat functions > to avoid having to change all drivers. But I really like the > drm_printer idea, so figured spreading it more widely is a good thing. > > v2: Review from Chris: > - Natural argument order and better name for drm_mm_print. > - show_mm() macro in the selftest. > > Cc: Rob Clark > Cc: Russell King > Cc: Alex Deucher > Cc: Christian König > Cc: Lucas Stach > Cc: Tomi Valkeinen > Cc: Thierry Reding > Cc: Jyri Sarha > Signed-off-by: Daniel Vetter Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/printer: add debug printer (rev2)
== Series Details == Series: series starting with [1/2] drm/printer: add debug printer (rev2) URL : https://patchwork.freedesktop.org/series/17251/ State : success == Summary == Series 17251v2 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/17251/revisions/2/mbox/ fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest 5065980 drm/mm: Convert to drm_printer 0adfc38 drm/printer: add debug printer == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3400/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t v3] tests/kms_plane_lowres: Plane visibility after atomic modesets
Op 16-12-16 om 09:40 schreef Mika Kahola:
> Testcase for plane visibility after atomic modesets. The idea of the test
> is the following:
>
> - draw a blue screen with high resolution
> - enable a yellow plane, visible, in lower-left corner
> - set a new lower resolution mode (1024x768) that makes plane invisible
> - check from debugfs 'i915_display_info' that the plane is invisible
> - switch back to higher resolution mode
> - check from debugfs 'i915_display_info' that the plane is visible again
> - repeat number of iterations, default 64
>
> v2: allow test to be run on non-Intel drivers (Daniel)
> moved test for plane visibility to as helper function (Daniel)
> moved get_vblank() function to be part of helper functions (Daniel)
> rename 'tiling' parameter as 'modifier' (Daniel)
> select a mode from a list so that the plane should be invisible.
> use default 1024x768 mode only as a fallback if decent mode has not
> been found (Daniel)
> add tiling MODE_NONE (Daniel)
>
> v3: draw as many overlay planes as the platform supports + cursor plane
> on top of each other on lower-left corner
> skip the test if i915_display_info file is not available
> test plane visibility with igt_assert_plane_visibility() function
> drop option for multiple test iterations (Daniel Vetter)
>
> Cc: Daniel Stone
> Signed-off-by: Mika Kahola
> ---
> lib/igt_kms.c| 161 ++
> lib/igt_kms.h| 23
> tests/Makefile.sources | 1 +
> tests/kms_plane_lowres.c | 344
> +++
> 4 files changed, 529 insertions(+)
> create mode 100644 tests/kms_plane_lowres.c
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 989704e..1ef74dc 100644
> --- a/lib/igt_kms.c
> +++ b/lib/igt_kms.c
> @@ -324,6 +324,24 @@ const char *kmstest_pipe_name(enum pipe pipe)
> }
>
> /**
> + * kmstest_pipe_to_index:
> + *@pipe: display pipe in string format
> + *
> + * Returns: index to corresponding pipe
> + */
> +int kmstest_pipe_to_index(char pipe)
> +{
> + if (pipe == 'A')
> + return 0;
> + else if (pipe == 'B')
> + return 1;
> + else if (pipe == 'C')
> + return 2;
> + else
> + return -EINVAL;
> +}
> +
> +/**
> * kmstest_plane_name:
> * @plane: display plane
> *
> @@ -1176,6 +1194,149 @@ int kmstest_get_crtc_idx(drmModeRes *res, uint32_t
> crtc_id)
> igt_assert(false);
> }
>
> +static inline uint32_t pipe_select(int pipe)
> +{
> + if (pipe > 1)
> + return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT;
> + else if (pipe > 0)
> + return DRM_VBLANK_SECONDARY;
> + else
> + return 0;
> +}
> +
> +unsigned int kmstest_get_vblank(int fd, int pipe, unsigned int flags)
> +{
> + union drm_wait_vblank vbl;
> +
> + memset(&vbl, 0, sizeof(vbl));
> + vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe) | flags;
> + if (drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl))
> + return 0;
> +
> + return vbl.reply.sequence;
> +}
> +
> +static void get_plane(char *str, int type, struct kmstest_plane *plane)
> +{
> + int ret;
> + char buf[256];
> +
> + plane->plane = type;
> + ret = sscanf(str + 12, "%d%*c %*s %[^n]s",
> + &plane->id,
> + buf);
> + igt_assert_eq(ret, 2);
> +
> + ret = sscanf(buf + 9, "%4d%*c%4d%*c", &plane->pos_x, &plane->pos_y);
> + igt_assert_eq(ret, 2);
> +
> + ret = sscanf(buf + 30, "%4d%*c%4d%*c", &plane->width, &plane->height);
> + igt_assert_eq(ret, 2);
> +}
> +
> +static int parse_planes(FILE *fid, struct kmstest_plane *plane)
> +{
> + char tmp[256];
> + int nplanes;
> + int ovl;
> +
> + ovl = 0;
> + nplanes = 0;
> + while (fgets(tmp, 256, fid) != NULL) {
> + igt_assert_neq(nplanes, IGT_MAX_PLANES);
> + if (strstr(tmp, "type=PRI") != NULL) {
> + get_plane(tmp, IGT_PLANE_PRIMARY, &plane[nplanes]);
> + nplanes++;
> + } else if (strstr(tmp, "type=OVL") != NULL) {
> + get_plane(tmp, IGT_PLANE_2 + ovl, &plane[nplanes]);
> + ovl++;
> + nplanes++;
> + } else if (strstr(tmp, "type=CUR") != NULL) {
> + get_plane(tmp, IGT_PLANE_CURSOR, &plane[nplanes]);
> + nplanes++;
> + break;
> + }
> + }
> +
> + return nplanes;
> +}
> +
> +static void parse_crtc(char *info, struct kmstest_crtc *crtc)
> +{
> + char buf[256];
> + int ret;
> + char pipe;
> +
> + ret = sscanf(info + 4, "%d%*c %*s %c%*c %*s %s%*c",
> + &crtc->id, &pipe, buf);
> + igt_assert_eq(ret, 3);
> +
> + crtc->pipe = kmstest_pipe_to_index(pipe);
> + igt_assert(crtc->pipe >= 0);
> +
> + ret = sscanf(buf + 6, "%d%*c%d%*c",
> + &crtc->width, &crtc-
Re: [Intel-gfx] [Linux v4.10.0-rc1] call-traces after suspend-resume (pm? i915? cpu/hotplug?)
Sedat Dilek writes:
> On Wed, Dec 28, 2016 at 11:32 PM, Rafael J. Wysocki wrote:
>> On Wed, Dec 28, 2016 at 11:00 AM, Sedat Dilek wrote:
>>> On Wed, Dec 28, 2016 at 9:29 AM, Jani Nikula wrote:
On Wed, 28 Dec 2016, Sedat Dilek wrote:
> On Tue, Dec 27, 2016 at 10:13 PM, Pavel Machek wrote:
>> Hi!
>>
>>> [ Add some pm | i915 | x86 folks ]
>>>
>>> Hi,
>>>
>>> I have built Linux v4.10-rc1 today on my Ubuntu/precise AMD64 system
>>> and I see some call-traces.
>>> It is reproducible on suspend and resume.
>>>
>>> I cannot say which area touches the problem or if these are several
>>> independent problems.
>>>
>>> For a full dmesg-log see attachments (my linux-config is attached, too).
>>>
>>> Here some hunks...
>>>
>>> [ 29.003601] BUG: sleeping function called from invalid context at
>>> drivers/base/power/runtime.c:1032
>>> [ 29.003608] in_atomic(): 1, irqs_disabled(): 0, pid: 1469, name: Xorg
>>> [ 29.003610] 1 lock held by Xorg/1469:
>>> [ 29.003611] #0: (&dev->struct_mutex){+.+.+.}, at:
>>> [] i915_mutex_lock_interruptible+0x43/0x140 [i915]
>>> [ 29.003653] CPU: 0 PID: 1469 Comm: Xorg Not tainted
>>> 4.10.0-rc1-1-iniza-small #1
>>> [ 29.003655] Hardware name: SAMSUNG ELECTRONICS CO., LTD.
>>> 530U3BI/530U4BI/530U4BH/530U3BI/530U4BI/530U4BH, BIOS 13XK 03/28/2013
>>> [ 29.003656] Call Trace:
>>
>> Just a note, at least 2 machines here refuse to resume with
>> v4.10-rc1. One has intel graphics, one has AMD. It may or may not have
>> common cause...
>>
>
> [ Correct linux-pm ML and add Mika & Jani ]
>
> Thanks for the feedback.
>
> There are some cpu/hotplug fixes post-v4.10-rc1.
> Give that a try.
>
> Yesterday, after answers from drm-intel folks I have seen that a
> cpu/hotplug commit [1] was reverted in
> drm-intel.git#drm-intel-nightly.
> I haven't tried that.
>
> It's good when Thomas knows of this and gets in contact with drm-intel
> folks.
>
> Regards,
> - Sedat -
>
> [1]
> https://cgit.freedesktop.org/drm-intel/commit/?h=drm-intel-nightly&id=e558f178f5390185b7324ff4b816b52c6ae3a928
> [2] https://cgit.freedesktop.org/drm-intel/log/?h=drm-intel-nightly
>
> P.S.: Revert "cpu/hotplug: Prevent overwriting of callbacks"
>
> This reverts commit dc280d93623927570da279e99393879dbbab39e7
> Author: Thomas Gleixner
> Date: Wed Dec 21 20:19:49 2016 +0100
> cpu/hotplug: Prevent overwriting of callbacks
>
> It started hanging all machines in CI s3 test:
> https://intel-gfx-ci.01.org/CI/igt@gem_exec_susp...@basic-s3.html
>
> Bisected-by: Mika Kuoppala
> Signed-off-by: Jani Nikula
Thomas -
Indeed, basically all of the boxes in the intel-gfx CI hang at the
suspend/resume test with dc280d936239 ("cpu/hotplug: Prevent overwriting
of callbacks"), and after the revert in the tree that feeds to the CI,
we're back on track.
I found [1], was hoping to get feedback from Mika whether that helps
before reporting. Chris also suggested [2] as a quick fix but I don't
know if anyone tried that.
>>>
>>> Hi Jani,
>>>
>>> I know you were not CCed in the original thread, please see [5].
>>>
>>> The patchset from Thomas you mention [1] does fix one of the problems
>>> I have seen, please see [6].
>>> With these post-v4.10-rc1 patches applied a clean revert of Revert
>>> "cpu/hotplug: Prevent overwriting of callbacks" is not possible.
>>>
>>> Can you give a clear statement if the quick-fix from Chris is in
>>> combination with the above revert or not?
>>> Against v4.10-rc1?
>>> Tested together with the patchset of Thomas?
>>
>> Please test the Linus' tree from today, it should work.
>>
>
> Latest Linus tree (v4.10-rc1-17-g2d706e790f05) does not fix it.
>
Latest Linus tree 2d706e790f0508dff4fb72eca9b4892b79757feb fixes our S3
problems. It survives gem_exec_suspend --r basic-S3 on kabylake.
It contains the fix to the bisected commit:
commit b9d9d6911bd5c370ad4b3aa57d758c093d17aed5
Author: Thomas Gleixner
Date: Mon Dec 26 22:58:19 2016 +0100
smp/hotplug: Undo tglxs brainfart
-Mika
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Re: [Intel-gfx] [PATCH i-g-t v3] tests/kms_plane_lowres: Plane visibility after atomic modesets
> -Original Message-
> From: Maarten Lankhorst [mailto:maarten.lankho...@linux.intel.com]
> Sent: Thursday, December 29, 2016 1:57 PM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH i-g-t v3] tests/kms_plane_lowres: Plane
> visibility
> after atomic modesets
>
> Op 16-12-16 om 09:40 schreef Mika Kahola:
> > Testcase for plane visibility after atomic modesets. The idea of the
> > test is the following:
> >
> > - draw a blue screen with high resolution
> > - enable a yellow plane, visible, in lower-left corner
> > - set a new lower resolution mode (1024x768) that makes plane
> > invisible
> > - check from debugfs 'i915_display_info' that the plane is invisible
> > - switch back to higher resolution mode
> > - check from debugfs 'i915_display_info' that the plane is visible
> > again
> > - repeat number of iterations, default 64
> >
> > v2: allow test to be run on non-Intel drivers (Daniel)
> > moved test for plane visibility to as helper function (Daniel)
> > moved get_vblank() function to be part of helper functions (Daniel)
> > rename 'tiling' parameter as 'modifier' (Daniel)
> > select a mode from a list so that the plane should be invisible.
> > use default 1024x768 mode only as a fallback if decent mode has not
> > been found (Daniel)
> > add tiling MODE_NONE (Daniel)
> >
> > v3: draw as many overlay planes as the platform supports + cursor plane
> > on top of each other on lower-left corner
> > skip the test if i915_display_info file is not available
> > test plane visibility with igt_assert_plane_visibility() function
> > drop option for multiple test iterations (Daniel Vetter)
> >
> > Cc: Daniel Stone
> > Signed-off-by: Mika Kahola
> > ---
> > lib/igt_kms.c| 161 ++
> > lib/igt_kms.h| 23
> > tests/Makefile.sources | 1 +
> > tests/kms_plane_lowres.c | 344
> > +++
> > 4 files changed, 529 insertions(+)
> > create mode 100644 tests/kms_plane_lowres.c
> >
> > diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 989704e..1ef74dc
> > 100644
> > --- a/lib/igt_kms.c
> > +++ b/lib/igt_kms.c
> > @@ -324,6 +324,24 @@ const char *kmstest_pipe_name(enum pipe pipe) }
> >
> > /**
> > + * kmstest_pipe_to_index:
> > + *@pipe: display pipe in string format
> > + *
> > + * Returns: index to corresponding pipe */ int
> > +kmstest_pipe_to_index(char pipe) {
> > + if (pipe == 'A')
> > + return 0;
> > + else if (pipe == 'B')
> > + return 1;
> > + else if (pipe == 'C')
> > + return 2;
> > + else
> > + return -EINVAL;
> > +}
> > +
> > +/**
> > * kmstest_plane_name:
> > * @plane: display plane
> > *
> > @@ -1176,6 +1194,149 @@ int kmstest_get_crtc_idx(drmModeRes *res,
> uint32_t crtc_id)
> > igt_assert(false);
> > }
> >
> > +static inline uint32_t pipe_select(int pipe) {
> > + if (pipe > 1)
> > + return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT;
> > + else if (pipe > 0)
> > + return DRM_VBLANK_SECONDARY;
> > + else
> > + return 0;
> > +}
> > +
> > +unsigned int kmstest_get_vblank(int fd, int pipe, unsigned int flags)
> > +{
> > + union drm_wait_vblank vbl;
> > +
> > + memset(&vbl, 0, sizeof(vbl));
> > + vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(pipe) | flags;
> > + if (drmIoctl(fd, DRM_IOCTL_WAIT_VBLANK, &vbl))
> > + return 0;
> > +
> > + return vbl.reply.sequence;
> > +}
> > +
> > +static void get_plane(char *str, int type, struct kmstest_plane
> > +*plane) {
> > + int ret;
> > + char buf[256];
> > +
> > + plane->plane = type;
> > + ret = sscanf(str + 12, "%d%*c %*s %[^n]s",
> > +&plane->id,
> > +buf);
> > + igt_assert_eq(ret, 2);
> > +
> > + ret = sscanf(buf + 9, "%4d%*c%4d%*c", &plane->pos_x, &plane-
> >pos_y);
> > + igt_assert_eq(ret, 2);
> > +
> > + ret = sscanf(buf + 30, "%4d%*c%4d%*c", &plane->width, &plane-
> >height);
> > + igt_assert_eq(ret, 2);
> > +}
> > +
> > +static int parse_planes(FILE *fid, struct kmstest_plane *plane) {
> > + char tmp[256];
> > + int nplanes;
> > + int ovl;
> > +
> > + ovl = 0;
> > + nplanes = 0;
> > + while (fgets(tmp, 256, fid) != NULL) {
> > + igt_assert_neq(nplanes, IGT_MAX_PLANES);
> > + if (strstr(tmp, "type=PRI") != NULL) {
> > + get_plane(tmp, IGT_PLANE_PRIMARY,
> &plane[nplanes]);
> > + nplanes++;
> > + } else if (strstr(tmp, "type=OVL") != NULL) {
> > + get_plane(tmp, IGT_PLANE_2 + ovl, &plane[nplanes]);
> > + ovl++;
> > + nplanes++;
> > + } else if (strstr(tmp, "type=CUR") != NULL) {
> > + get_plane(tmp, IGT_PLANE_CURSOR, &plane[nplanes]);
> > + nplanes++;
> > + break;
> > + }
> > + }
> > +
> > + return npl
[Intel-gfx] [PATCH] drm: clean cached display info
This patch adds a small helper function, which clears the cached
information about a hot-pluggable display, from connector. On event
This will run on event of a hot-unplug, keeping the connector's display
info up-to-date, avoiding any errors due to invalid cached data.
Forking this patch out from the 3 patch series:
https://patchwork.freedesktop.org/patch/128961/
(still under review) and sending as individual patch.
Cc: Jose Abreu
Cc: Daniel Vetter
Suggested-by: Jose Abreu
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_probe_helper.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/drm_probe_helper.c
b/drivers/gpu/drm/drm_probe_helper.c
index 7cff91e..65a6a1f 100644
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -164,6 +164,18 @@ void drm_kms_helper_poll_enable_locked(struct drm_device
*dev)
}
/**
+ * drm_helper_clear_display_info - clean cached display information for
+ * hot pluggable displays, on event of hot-unplug
+ * @connector: connector under event
+ */
+void drm_helper_clear_display_info(struct drm_connector *connector)
+{
+ struct drm_display_info *info = &connector->display_info;
+
+ memset(info, 0, sizeof(*info));
+}
+
+/**
* drm_helper_probe_single_connector_modes - get complete set of display modes
* @connector: connector to probe
* @maxX: max width for modes
@@ -288,6 +300,16 @@ int drm_helper_probe_single_connector_modes(struct
drm_connector *connector,
DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
connector->base.id, connector->name);
drm_mode_connector_update_edid_property(connector, NULL);
+
+ /*
+* Connector status change to disconnected, time to clean
+* cached display information.
+* Any driver which doesn't use this probe_helper function
+* should implement update of EDID property and display_info
+* on its own.
+*/
+ drm_helper_clear_display_info(connector);
+
verbose_prune = false;
goto prune;
}
--
1.9.1
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Re: [Intel-gfx] [PATCH] drm/mm: Convert to drm_printer
On Thu, Dec 29, 2016 at 11:31:45AM +, Chris Wilson wrote: > On Thu, Dec 29, 2016 at 12:09:24PM +0100, Daniel Vetter wrote: > > Including all drivers. I thought about keeping small compat functions > > to avoid having to change all drivers. But I really like the > > drm_printer idea, so figured spreading it more widely is a good thing. > > > > v2: Review from Chris: > > - Natural argument order and better name for drm_mm_print. > > - show_mm() macro in the selftest. > > > > Cc: Rob Clark > > Cc: Russell King > > Cc: Alex Deucher > > Cc: Christian König > > Cc: Lucas Stach > > Cc: Tomi Valkeinen > > Cc: Thierry Reding > > Cc: Jyri Sarha > > Signed-off-by: Daniel Vetter > > Reviewed-by: Chris Wilson r-b on both patches? -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/printer: add debug printer
On Wed, Dec 28, 2016 at 05:42:09PM +0100, Daniel Vetter wrote:
> Useful for dumping lots of data into dmesg, e.g. drm_mm.
>
> Cc: Rob Clark
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_print.c | 6 ++
> include/drm/drm_print.h | 20 ++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
> index ad3caaa1f48b..a8300cd2d3b3 100644
> --- a/drivers/gpu/drm/drm_print.c
> +++ b/drivers/gpu/drm/drm_print.c
> @@ -40,6 +40,12 @@ void __drm_printfn_info(struct drm_printer *p, struct
> va_format *vaf)
> }
> EXPORT_SYMBOL(__drm_printfn_info);
>
> +void __drm_printfn_debug(struct drm_printer *p, struct va_format *vaf)
> +{
> + pr_debug("%s %pV", p->prefix, vaf);
> +}
> +EXPORT_SYMBOL(__drm_printfn_info);
Ahem.
> +
> /**
> * drm_printf - print to a &drm_printer stream
> * @p: the &drm_printer
> diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
> index 1adf84aea622..e9d0ba20089c 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -60,19 +60,20 @@
>
> /**
> * struct drm_printer - drm output "stream"
> - * @printfn: actual output fxn
> - * @arg: output fxn specific data
> *
> * Do not use struct members directly. Use drm_printer_seq_file(),
> * drm_printer_info(), etc to initialize. And drm_printf() for output.
> */
> struct drm_printer {
> + /* private: */
> void (*printfn)(struct drm_printer *p, struct va_format *vaf);
> void *arg;
> + const char *prefix;
> };
>
> void __drm_printfn_seq_file(struct drm_printer *p, struct va_format *vaf);
> void __drm_printfn_info(struct drm_printer *p, struct va_format *vaf);
> +void __drm_printfn_debug(struct drm_printer *p, struct va_format *vaf);
>
> void drm_printf(struct drm_printer *p, const char *f, ...);
>
> @@ -109,4 +110,19 @@ static inline struct drm_printer drm_info_printer(struct
> device *dev)
> return p;
> }
>
> +/**
> + * drm_debug_printer - construct a &drm_printer that outputs to pr_debug()
> + * @prefix: debug output prefix
> + *
> + * RETURNS:
> + * The &drm_printer object
> + */
> +static inline struct drm_printer drm_debug_printer(const char *prefix)
> +{
> + struct drm_printer p = {
> + .printfn = __drm_printfn_debug,
> + .prefix = prefix
> + };
> + return p;
> +}
\n
> #endif /* DRM_PRINT_H_ */
I was looking at a single __drm_printfn callback with a
drm_printer.level, but we lose the dynamic debug goodness.
With the EXPORT_SYMBOL fixed,
Reviewed-by: Chris Wilson
-Chris
--
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm: clean cached display info
== Series Details == Series: drm: clean cached display info URL : https://patchwork.freedesktop.org/series/17265/ State : success == Summary == Series 17265v1 drm: clean cached display info https://patchwork.freedesktop.org/api/1.0/series/17265/revisions/1/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest be7e903 drm: clean cached display info == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3401/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm: Reduce verbosity level for drm_core_init() debug message
Currently at the end of drm_core_init() we print
[0.735185] [drm] Initialized
which does not provide any user information and is only a breadcrumb for
developers, so reduce it from info to debug.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/drm_drv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 2b75ce65d586..25783b99b651 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -929,7 +929,7 @@ static int __init drm_core_init(void)
if (ret < 0)
goto error;
- DRM_INFO("Initialized\n");
+ DRM_DEBUG("Initialized\n");
return 0;
error:
--
2.11.0
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Reduce verbosity level for drm_core_init() debug message
== Series Details == Series: drm: Reduce verbosity level for drm_core_init() debug message URL : https://patchwork.freedesktop.org/series/17269/ State : success == Summary == Series 17269v1 drm: Reduce verbosity level for drm_core_init() debug message https://patchwork.freedesktop.org/api/1.0/series/17269/revisions/1/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest 1c5500d drm: Reduce verbosity level for drm_core_init() debug message == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3402/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/7] drm/i915: Rename intel_shared_dpll_commit() to _swap_state()
The function intel_shared_dpll_commit() performs the equivalent of
drm_atomic_helper_swap_state() for the shared dpll state, which is not
handled by the helpers. So make it do a full swap of the state and
rename it for consistency.
v2: Fix typo in the commit message. (Durga)
v3: Rebase.
v4: Swap the states instead of just renaming the function. (Daniel)
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Durgadoss R (v2)
Reviewed-by: Daniel Vetter (v3)
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 7 ++-
drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 +-
3 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 55e1e88..610c016 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14660,7 +14660,7 @@ static int intel_atomic_commit(struct drm_device *dev,
drm_atomic_helper_swap_state(state, true);
dev_priv->wm.distrust_bios_wm = false;
- intel_shared_dpll_commit(state);
+ intel_shared_dpll_swap_state(state);
intel_atomic_track_fbs(state);
if (intel_state->modeset) {
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 1fa32f2..c6b14af 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -265,7 +265,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll,
shared_dpll[pll->id].crtc_mask |= 1 << crtc->pipe;
}
-void intel_shared_dpll_commit(struct drm_atomic_state *state)
+void intel_shared_dpll_swap_state(struct drm_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->dev);
struct intel_shared_dpll_config *shared_dpll;
@@ -277,8 +277,13 @@ void intel_shared_dpll_commit(struct drm_atomic_state
*state)
shared_dpll = to_intel_atomic_state(state)->shared_dpll;
for (i = 0; i < dev_priv->num_shared_dpll; i++) {
+ struct intel_shared_dpll_config tmp;
+
pll = &dev_priv->shared_dplls[i];
+
+ tmp = pll->config;
pll->config = shared_dpll[i];
+ shared_dpll[i] = tmp;
}
}
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index 99a82c9..06d61c5 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -152,7 +152,7 @@ void intel_release_shared_dpll(struct intel_shared_dpll
*dpll,
void intel_prepare_shared_dpll(struct intel_crtc *crtc);
void intel_enable_shared_dpll(struct intel_crtc *crtc);
void intel_disable_shared_dpll(struct intel_crtc *crtc);
-void intel_shared_dpll_commit(struct drm_atomic_state *state);
+void intel_shared_dpll_swap_state(struct drm_atomic_state *state);
void intel_shared_dpll_init(struct drm_device *dev);
/* BXT dpll related functions */
--
2.5.5
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[Intel-gfx] [PATCH v2 0/7] Shared DPLL kernel doc and improvements
Hi, This is a long overdue update series with Daniel's comments addressed. Only the last patch is missing and R-b since it is new in this version. Thanks, Ander Ander Conselvan de Oliveira (7): drm/i915: Introduce intel_release_shared_dpll() drm/i915: Rename intel_shared_dpll_commit() to _swap_state() drm/i915: Rename intel_shared_dpll_config to intel_shared_dpll_state drm/i915: Rename intel_shared_dpll->mode_set() to prepare() drm/i915: Update kerneldoc for intel_dpll_mgr.c drm/i915: Add dpll entrypoint for dumping hw state drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.c Documentation/gpu/i915.rst| 12 ++ drivers/gpu/drm/i915/i915_debugfs.c | 12 +- drivers/gpu/drm/i915/intel_atomic.c | 31 drivers/gpu/drm/i915/intel_ddi.c | 10 +- drivers/gpu/drm/i915/intel_display.c | 64 ++- drivers/gpu/drm/i915/intel_dpll_mgr.c | 319 +++--- drivers/gpu/drm/i915/intel_dpll_mgr.h | 176 --- drivers/gpu/drm/i915/intel_drv.h | 4 +- 8 files changed, 442 insertions(+), 186 deletions(-) -- 2.5.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/7] drm/i915: Introduce intel_release_shared_dpll()
While the details of getting a shared dpll are wrapped by
intel_get_shared_dpll(), the release was still hand rolled into the
modeset code. Fix that by creating an entry point for releasing the
pll and move that code there.
v2: Take old_dpll from crtc->state instead of crtc_state. (CI)
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 6 +
drivers/gpu/drm/i915/intel_dpll_mgr.c | 41 +++
drivers/gpu/drm/i915/intel_dpll_mgr.h | 11 +++---
3 files changed, 22 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d8effd4..55e1e88 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13874,7 +13874,6 @@ static void intel_modeset_clear_plls(struct
drm_atomic_state *state)
{
struct drm_device *dev = state->dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- struct intel_shared_dpll_config *shared_dpll = NULL;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
int i;
@@ -13895,10 +13894,7 @@ static void intel_modeset_clear_plls(struct
drm_atomic_state *state)
if (!old_dpll)
continue;
- if (!shared_dpll)
- shared_dpll = intel_atomic_get_shared_dpll_state(state);
-
- intel_shared_dpll_config_put(shared_dpll, old_dpll, intel_crtc);
+ intel_release_shared_dpll(old_dpll, intel_crtc, state);
}
}
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 97f7cc9..1fa32f2 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -79,28 +79,6 @@ intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,
return (enum intel_dpll_id) (pll - dev_priv->shared_dplls);
}
-void
-intel_shared_dpll_config_get(struct intel_shared_dpll_config *config,
-struct intel_shared_dpll *pll,
-struct intel_crtc *crtc)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);
-
- config[id].crtc_mask |= 1 << crtc->pipe;
-}
-
-void
-intel_shared_dpll_config_put(struct intel_shared_dpll_config *config,
-struct intel_shared_dpll *pll,
-struct intel_crtc *crtc)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);
-
- config[id].crtc_mask &= ~(1 << crtc->pipe);
-}
-
/* For ILK+ */
void assert_shared_dpll(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll,
@@ -284,7 +262,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll,
DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,
pipe_name(crtc->pipe));
- intel_shared_dpll_config_get(shared_dpll, pll, crtc);
+ shared_dpll[pll->id].crtc_mask |= 1 << crtc->pipe;
}
void intel_shared_dpll_commit(struct drm_atomic_state *state)
@@ -1933,3 +1911,20 @@ intel_get_shared_dpll(struct intel_crtc *crtc,
return dpll_mgr->get_dpll(crtc, crtc_state, encoder);
}
+
+/**
+ * intel_release_shared_dpll - end use of DPLL by CRTC in atomic state
+ * @dpll: dpll in use by @crtc
+ * @crtc: crtc
+ * @state: atomic state
+ *
+ */
+void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
+ struct intel_crtc *crtc,
+ struct drm_atomic_state *state)
+{
+ struct intel_shared_dpll_config *shared_dpll_config;
+
+ shared_dpll_config = intel_atomic_get_shared_dpll_state(state);
+ shared_dpll_config[dpll->id].crtc_mask &= ~(1 << crtc->pipe);
+}
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index f438535..99a82c9 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -138,14 +138,6 @@ intel_get_shared_dpll_by_id(struct drm_i915_private
*dev_priv,
enum intel_dpll_id
intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll);
-void
-intel_shared_dpll_config_get(struct intel_shared_dpll_config *config,
-struct intel_shared_dpll *pll,
-struct intel_crtc *crtc);
-void
-intel_shared_dpll_config_put(struct intel_shared_dpll_config *config,
-struct intel_shared_dpll *pll,
-struct intel_crtc *crtc);
void assert_shared_dpll(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll,
bool state);
@@ -154,6 +146,9 @@ void assert_shared_dpll(struct drm_i915_private *de
[Intel-gfx] [PATCH 5/7] drm/i915: Update kerneldoc for intel_dpll_mgr.c
The documentation for most of the non-static members and structs were
missing. Fix that.
v2: Fix typos (Durga)
v3: Rebase.
Fix make docs warnings.
Document more.
v4: capitilize CRTC; say that the prepare hook is a nop if the DPLL is
already enabled; link to struct intel_dpll_hw_state from @hw_state
field in struct intel_shared_dpll_state; reorganize DPLL flags; link
intel_shared_dpll_state to other structs and functions. (Daniel)
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Daniel Vetter
---
Documentation/gpu/i915.rst| 12 +++
drivers/gpu/drm/i915/intel_dpll_mgr.c | 91 ++--
drivers/gpu/drm/i915/intel_dpll_mgr.h | 154 ++
3 files changed, 237 insertions(+), 20 deletions(-)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 3843ef6..104296d 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -213,6 +213,18 @@ Video BIOS Table (VBT)
.. kernel-doc:: drivers/gpu/drm/i915/intel_vbt_defs.h
:internal:
+Display PLLs
+
+
+.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.c
+ :doc: Display PLLs
+
+.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.c
+ :internal:
+
+.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.h
+ :internal:
+
Memory Management and Command Submission
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 2db1d02..44c3c70 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -23,6 +23,25 @@
#include "intel_drv.h"
+/**
+ * DOC: Display PLLs
+ *
+ * Display PLLs used for driving outputs vary by platform. While some have
+ * per-pipe or per-encoder dedicated PLLs, others allow the use of any PLL
+ * from a pool. In the latter scenario, it is possible that multiple pipes
+ * share a PLL if their configurations match.
+ *
+ * This file provides an abstraction over display PLLs. The function
+ * intel_shared_dpll_init() initializes the PLLs for the given platform. The
+ * users of a PLL are tracked and that tracking is integrated with the atomic
+ * modest interface. During an atomic operation, a PLL can be requested for a
+ * given CRTC and encoder configuration by calling intel_get_shared_dpll() and
+ * a previously used PLL can be released with intel_release_shared_dpll().
+ * Changes to the users are first staged in the atomic state, and then made
+ * effective by calling intel_shared_dpll_swap_state() during the atomic
+ * commit phase.
+ */
+
struct intel_shared_dpll *
skl_find_link_pll(struct drm_i915_private *dev_priv, int clock)
{
@@ -61,6 +80,14 @@ skl_find_link_pll(struct drm_i915_private *dev_priv, int
clock)
return pll;
}
+/**
+ * intel_get_shared_dpll_by_id - get a DPLL given its id
+ * @dev_priv: i915 device instance
+ * @id: pll id
+ *
+ * Returns:
+ * A pointer to the DPLL with @id
+ */
struct intel_shared_dpll *
intel_get_shared_dpll_by_id(struct drm_i915_private *dev_priv,
enum intel_dpll_id id)
@@ -68,6 +95,14 @@ intel_get_shared_dpll_by_id(struct drm_i915_private
*dev_priv,
return &dev_priv->shared_dplls[id];
}
+/**
+ * intel_get_shared_dpll_id - get the id of a DPLL
+ * @dev_priv: i915 device instance
+ * @pll: the DPLL
+ *
+ * Returns:
+ * The id of @pll
+ */
enum intel_dpll_id
intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
@@ -96,6 +131,13 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
pll->name, onoff(state), onoff(cur_state));
}
+/**
+ * intel_prepare_shared_dpll - call a dpll's prepare hook
+ * @crtc: CRTC which has a shared dpll
+ *
+ * This calls the PLL's prepare hook if it has one and if the PLL is not
+ * already enabled. The prepare hook is platform specific.
+ */
void intel_prepare_shared_dpll(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
@@ -118,12 +160,10 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
}
/**
- * intel_enable_shared_dpll - enable PCH PLL
- * @dev_priv: i915 private structure
- * @pipe: pipe PLL to enable
+ * intel_enable_shared_dpll - enable a CRTC's shared DPLL
+ * @crtc: CRTC which has a shared DPLL
*
- * The PCH PLL needs to be enabled before the PCH transcoder, since it
- * drives the transcoder clock.
+ * Enable the shared DPLL used by @crtc.
*/
void intel_enable_shared_dpll(struct intel_crtc *crtc)
{
@@ -164,6 +204,12 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
mutex_unlock(&dev_priv->dpll_lock);
}
+/**
+ * intel_disable_shared_dpll - disable a CRTC's shared DPLL
+ * @crtc: CRTC which has a shared DPLL
+ *
+ * Disable the shared DPLL used by @crtc.
+ */
void intel_disable_shared_dpll(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -265,6
[Intel-gfx] [PATCH 7/7] drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.c
The function intel_atomic_get_shared_dpll_state() is only called from
intel_dpll_mgr.c and it concerns the same data structures as the other
functions in that file, so move it there and make it static.
Signed-off-by: Ander Conselvan de Oliveira
Suggested-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_atomic.c | 31 ---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 31 +++
drivers/gpu/drm/i915/intel_drv.h | 2 --
3 files changed, 31 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index fa6dc43..aa9160e 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -265,37 +265,6 @@ int intel_atomic_setup_scalers(struct drm_device *dev,
return 0;
}
-static void
-intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll_state *shared_dpll)
-{
- enum intel_dpll_id i;
-
- /* Copy shared dpll state */
- for (i = 0; i < dev_priv->num_shared_dpll; i++) {
- struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
-
- shared_dpll[i] = pll->state;
- }
-}
-
-struct intel_shared_dpll_state *
-intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
-{
- struct intel_atomic_state *state = to_intel_atomic_state(s);
-
- WARN_ON(!drm_modeset_is_locked(&s->dev->mode_config.connection_mutex));
-
- if (!state->dpll_set) {
- state->dpll_set = true;
-
- intel_atomic_duplicate_dpll_state(to_i915(s->dev),
- state->shared_dpll);
- }
-
- return state->shared_dpll;
-}
-
struct drm_atomic_state *
intel_atomic_state_alloc(struct drm_device *dev)
{
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 57d4271..c92a255 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -80,6 +80,37 @@ skl_find_link_pll(struct drm_i915_private *dev_priv, int
clock)
return pll;
}
+static void
+intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
+ struct intel_shared_dpll_state *shared_dpll)
+{
+ enum intel_dpll_id i;
+
+ /* Copy shared dpll state */
+ for (i = 0; i < dev_priv->num_shared_dpll; i++) {
+ struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
+
+ shared_dpll[i] = pll->state;
+ }
+}
+
+static struct intel_shared_dpll_state *
+intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
+{
+ struct intel_atomic_state *state = to_intel_atomic_state(s);
+
+ WARN_ON(!drm_modeset_is_locked(&s->dev->mode_config.connection_mutex));
+
+ if (!state->dpll_set) {
+ state->dpll_set = true;
+
+ intel_atomic_duplicate_dpll_state(to_i915(s->dev),
+ state->shared_dpll);
+ }
+
+ return state->shared_dpll;
+}
+
/**
* intel_get_shared_dpll_by_id - get a DPLL given its id
* @dev_priv: i915 device instance
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 5ee1719..6b02dac 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1815,8 +1815,6 @@ void intel_crtc_destroy_state(struct drm_crtc *crtc,
struct drm_crtc_state *state);
struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
void intel_atomic_state_clear(struct drm_atomic_state *);
-struct intel_shared_dpll_state *
-intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s);
static inline struct intel_crtc_state *
intel_atomic_get_crtc_state(struct drm_atomic_state *state,
--
2.5.5
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[Intel-gfx] [PATCH 3/7] drm/i915: Rename intel_shared_dpll_config to intel_shared_dpll_state
Struct intel_shared_dpll_config is used to hold the state of the DPLL in
the "atomic" sense, so call it state like everything else atomic.
v2: Rebase
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Daniel Vetter (v1)
---
drivers/gpu/drm/i915/i915_debugfs.c | 12 +++---
drivers/gpu/drm/i915/intel_atomic.c | 6 +--
drivers/gpu/drm/i915/intel_ddi.c | 10 ++---
drivers/gpu/drm/i915/intel_display.c | 22 +--
drivers/gpu/drm/i915/intel_dpll_mgr.c | 72 +--
drivers/gpu/drm/i915/intel_dpll_mgr.h | 4 +-
drivers/gpu/drm/i915/intel_drv.h | 4 +-
7 files changed, 65 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 655b671..9d7b5a8 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3352,14 +3352,14 @@ static int i915_shared_dplls_info(struct seq_file *m,
void *unused)
seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id);
seq_printf(m, " crtc_mask: 0x%08x, active: 0x%x, on: %s\n",
- pll->config.crtc_mask, pll->active_mask,
yesno(pll->on));
+ pll->state.crtc_mask, pll->active_mask,
yesno(pll->on));
seq_printf(m, " tracked hardware state:\n");
- seq_printf(m, " dpll:0x%08x\n", pll->config.hw_state.dpll);
+ seq_printf(m, " dpll:0x%08x\n", pll->state.hw_state.dpll);
seq_printf(m, " dpll_md: 0x%08x\n",
- pll->config.hw_state.dpll_md);
- seq_printf(m, " fp0: 0x%08x\n", pll->config.hw_state.fp0);
- seq_printf(m, " fp1: 0x%08x\n", pll->config.hw_state.fp1);
- seq_printf(m, " wrpll: 0x%08x\n", pll->config.hw_state.wrpll);
+ pll->state.hw_state.dpll_md);
+ seq_printf(m, " fp0: 0x%08x\n", pll->state.hw_state.fp0);
+ seq_printf(m, " fp1: 0x%08x\n", pll->state.hw_state.fp1);
+ seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll);
}
drm_modeset_unlock_all(dev);
diff --git a/drivers/gpu/drm/i915/intel_atomic.c
b/drivers/gpu/drm/i915/intel_atomic.c
index c5a1667..fa6dc43 100644
--- a/drivers/gpu/drm/i915/intel_atomic.c
+++ b/drivers/gpu/drm/i915/intel_atomic.c
@@ -267,7 +267,7 @@ int intel_atomic_setup_scalers(struct drm_device *dev,
static void
intel_atomic_duplicate_dpll_state(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll_config *shared_dpll)
+ struct intel_shared_dpll_state *shared_dpll)
{
enum intel_dpll_id i;
@@ -275,11 +275,11 @@ intel_atomic_duplicate_dpll_state(struct drm_i915_private
*dev_priv,
for (i = 0; i < dev_priv->num_shared_dpll; i++) {
struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
- shared_dpll[i] = pll->config;
+ shared_dpll[i] = pll->state;
}
}
-struct intel_shared_dpll_config *
+struct intel_shared_dpll_state *
intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
{
struct intel_atomic_state *state = to_intel_atomic_state(s);
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index d808a2c..66b367d 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1057,7 +1057,7 @@ static int bxt_calc_pll_link(struct drm_i915_private
*dev_priv,
return 0;
pll = &dev_priv->shared_dplls[dpll];
- state = &pll->config.hw_state;
+ state = &pll->state.hw_state;
clock.m1 = 2;
clock.m2 = (state->pll0 & PORT_PLL_M2_MASK) << 22;
@@ -2134,7 +2134,7 @@ intel_ddi_get_link_dpll(struct intel_dp *intel_dp, int
clock)
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct intel_shared_dpll *pll = NULL;
- struct intel_shared_dpll_config tmp_pll_config;
+ struct intel_shared_dpll_state tmp_pll_state;
enum intel_dpll_id dpll_id;
if (IS_GEN9_LP(dev_priv)) {
@@ -2150,11 +2150,11 @@ intel_ddi_get_link_dpll(struct intel_dp *intel_dp, int
clock)
pll->active_mask);
return NULL;
}
- tmp_pll_config = pll->config;
+ tmp_pll_state = pll->state;
if (!bxt_ddi_dp_set_dpll_hw_state(clock,
- &pll->config.hw_state)) {
+ &pll->state.hw_state)) {
DRM_ERROR("Could not setup DPLL\n");
- pll->config = tmp_pll_config;
+ pll->state = tmp_pll_state;
return NULL;
}
} else if (IS_S
[Intel-gfx] [PATCH 6/7] drm/i915: Add dpll entrypoint for dumping hw state
Remove the IS_PLATFORM() macros from intel_dump_pipe_config() and split
that logic in platform specific implementations inside the dpll code,
accessed through a platform independent interface.
v2: Rebase.
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Daniel Vetter (v1)
---
drivers/gpu/drm/i915/intel_display.c | 34 +--
drivers/gpu/drm/i915/intel_dpll_mgr.c | 79 +++
drivers/gpu/drm/i915/intel_dpll_mgr.h | 3 ++
3 files changed, 83 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index da90d13..9b64edc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -12826,39 +12826,7 @@ static void intel_dump_pipe_config(struct intel_crtc
*crtc,
DRM_DEBUG_KMS("ips: %i, double wide: %i\n",
pipe_config->ips_enabled, pipe_config->double_wide);
- if (IS_GEN9_LP(dev_priv)) {
- DRM_DEBUG_KMS("dpll_hw_state: ebb0: 0x%x, ebb4: 0x%x,"
- "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
- "pll6: 0x%x, pll8: 0x%x, pll9: 0x%x, pll10: 0x%x,
pcsdw12: 0x%x\n",
- pipe_config->dpll_hw_state.ebb0,
- pipe_config->dpll_hw_state.ebb4,
- pipe_config->dpll_hw_state.pll0,
- pipe_config->dpll_hw_state.pll1,
- pipe_config->dpll_hw_state.pll2,
- pipe_config->dpll_hw_state.pll3,
- pipe_config->dpll_hw_state.pll6,
- pipe_config->dpll_hw_state.pll8,
- pipe_config->dpll_hw_state.pll9,
- pipe_config->dpll_hw_state.pll10,
- pipe_config->dpll_hw_state.pcsdw12);
- } else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv)) {
- DRM_DEBUG_KMS("dpll_hw_state: "
- "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
- pipe_config->dpll_hw_state.ctrl1,
- pipe_config->dpll_hw_state.cfgcr1,
- pipe_config->dpll_hw_state.cfgcr2);
- } else if (HAS_DDI(dev_priv)) {
- DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",
- pipe_config->dpll_hw_state.wrpll,
- pipe_config->dpll_hw_state.spll);
- } else {
- DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
- "fp0: 0x%x, fp1: 0x%x\n",
- pipe_config->dpll_hw_state.dpll,
- pipe_config->dpll_hw_state.dpll_md,
- pipe_config->dpll_hw_state.fp0,
- pipe_config->dpll_hw_state.fp1);
- }
+ intel_dpll_dump_hw_state(dev_priv, &pipe_config->dpll_hw_state);
DRM_DEBUG_KMS("planes on this crtc\n");
list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 44c3c70..57d4271 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -452,6 +452,17 @@ ibx_get_dpll(struct intel_crtc *crtc, struct
intel_crtc_state *crtc_state,
return pll;
}
+static void ibx_dump_hw_state(struct drm_i915_private *dev_priv,
+ struct intel_dpll_hw_state *hw_state)
+{
+ DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
+ "fp0: 0x%x, fp1: 0x%x\n",
+ hw_state->dpll,
+ hw_state->dpll_md,
+ hw_state->fp0,
+ hw_state->fp1);
+}
+
static const struct intel_shared_dpll_funcs ibx_pch_dpll_funcs = {
.prepare = ibx_pch_dpll_prepare,
.enable = ibx_pch_dpll_enable,
@@ -838,6 +849,13 @@ hsw_get_dpll(struct intel_crtc *crtc, struct
intel_crtc_state *crtc_state,
return pll;
}
+static void hsw_dump_hw_state(struct drm_i915_private *dev_priv,
+ struct intel_dpll_hw_state *hw_state)
+{
+ DRM_DEBUG_KMS("dpll_hw_state: wrpll: 0x%x spll: 0x%x\n",
+ hw_state->wrpll, hw_state->spll);
+}
+
static const struct intel_shared_dpll_funcs hsw_ddi_wrpll_funcs = {
.enable = hsw_ddi_wrpll_enable,
.disable = hsw_ddi_wrpll_disable,
@@ -1393,6 +1411,16 @@ skl_get_dpll(struct intel_crtc *crtc, struct
intel_crtc_state *crtc_state,
return pll;
}
+static void skl_dump_hw_state(struct drm_i915_private *dev_priv,
+ struct intel_dpll_hw_state *hw_state)
+{
+ DRM_DEBUG_KMS("dpll_hw_state: "
+ "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
+ hw_state->ctr
[Intel-gfx] [PATCH 4/7] drm/i915: Rename intel_shared_dpll->mode_set() to prepare()
The hook is called from intel_prepare_shared_dpll(). The name doesn't
make sense after all the changes to modeset code. So just call it
prepare.
Signed-off-by: Ander Conselvan de Oliveira
Reviewed-by: Durgadoss R
Reviewed-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_dpll_mgr.c | 8
drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 4c4b434..2db1d02 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -112,7 +112,7 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
WARN_ON(pll->on);
assert_shared_dpll_disabled(dev_priv, pll);
- pll->funcs.mode_set(dev_priv, pll);
+ pll->funcs.prepare(dev_priv, pll);
}
mutex_unlock(&dev_priv->dpll_lock);
}
@@ -306,8 +306,8 @@ static bool ibx_pch_dpll_get_hw_state(struct
drm_i915_private *dev_priv,
return val & DPLL_VCO_ENABLE;
}
-static void ibx_pch_dpll_mode_set(struct drm_i915_private *dev_priv,
- struct intel_shared_dpll *pll)
+static void ibx_pch_dpll_prepare(struct drm_i915_private *dev_priv,
+struct intel_shared_dpll *pll)
{
I915_WRITE(PCH_FP0(pll->id), pll->state.hw_state.fp0);
I915_WRITE(PCH_FP1(pll->id), pll->state.hw_state.fp1);
@@ -396,7 +396,7 @@ ibx_get_dpll(struct intel_crtc *crtc, struct
intel_crtc_state *crtc_state,
}
static const struct intel_shared_dpll_funcs ibx_pch_dpll_funcs = {
- .mode_set = ibx_pch_dpll_mode_set,
+ .prepare = ibx_pch_dpll_prepare,
.enable = ibx_pch_dpll_enable,
.disable = ibx_pch_dpll_disable,
.get_hw_state = ibx_pch_dpll_get_hw_state,
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
b/drivers/gpu/drm/i915/intel_dpll_mgr.h
index 6e3a0f1..9a7db65 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
@@ -101,7 +101,7 @@ struct intel_shared_dpll_state {
struct intel_shared_dpll_funcs {
/* The mode_set hook is optional and should be used together with the
* intel_prepare_shared_dpll function. */
- void (*mode_set)(struct drm_i915_private *dev_priv,
+ void (*prepare)(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll);
void (*enable)(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll);
--
2.5.5
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 07/14] drm/i915: Compute vlv/chv wms the atomic way
Op 15-12-16 om 17:09 schreef Ville Syrjälä:
> On Thu, Dec 15, 2016 at 04:45:49PM +0100, Maarten Lankhorst wrote:
>> Op 15-12-16 om 16:38 schreef Ville Syrjälä:
>>> On Thu, Dec 15, 2016 at 04:30:54PM +0100, Maarten Lankhorst wrote:
Op 12-12-16 om 21:35 schreef ville.syrj...@linux.intel.com:
> From: Ville Syrjälä
>
> Start computing the vlv/chv watermarks the atomic way, from the
> .compute_pipe_wm() hook. We'll recompute the actual watermarks
> for only planes that are part of the state, the other planes will
> keep their watermark from the last time it was computed.
>
> And the actual watermark programming will happen from the
> .initial_watermarks() hook. For now we'll just compute the
> optimal watermarks, and we'll hook up the intermediate
> watermarks properly later.
>
> The DSPARB registers responsible for the FIFO paritioning are
> double buffered, so they will be programming from
> intel_begin_crtc_commit().
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/i915_drv.h | 8 +
> drivers/gpu/drm/i915/intel_display.c | 21 ++-
> drivers/gpu/drm/i915/intel_drv.h | 2 -
> drivers/gpu/drm/i915/intel_pm.c | 327
> +++
> 4 files changed, 238 insertions(+), 120 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 20bc04d5e617..f23698f99685 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -493,6 +493,14 @@ struct i915_hotplug {
> for ((domain) = 0; (domain) < POWER_DOMAIN_NUM; (domain)++) \
> for_each_if ((1 << (domain)) & (mask))
>
> +#define for_each_intel_plane_in_state(__state, plane, plane_state, __i) \
> + for ((__i) = 0; \
> + (__i) < (__state)->base.dev->mode_config.num_total_plane && \
> + ((plane) =
> to_intel_plane((__state)->base.planes[__i].ptr), \
> + (plane_state) =
> to_intel_plane_state((__state)->base.planes[__i].state), 1); \
> + (__i)++) \
> + for_each_if (plane_state)
> +
> struct drm_i915_private;
> struct i915_mm_struct;
> struct i915_mmu_object;
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 3f027341b0f3..8d80873b6643 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6736,6 +6736,8 @@ static void valleyview_modeset_commit_cdclk(struct
> drm_atomic_state *old_state)
> static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config,
> struct drm_atomic_state *old_state)
> {
> + struct intel_atomic_state *old_intel_state =
> + to_intel_atomic_state(old_state);
> struct drm_crtc *crtc = pipe_config->base.crtc;
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = to_i915(dev);
> @@ -6780,7 +6782,8 @@ static void valleyview_crtc_enable(struct
> intel_crtc_state *pipe_config,
>
> intel_color_load_luts(&pipe_config->base);
>
> - intel_update_watermarks(intel_crtc);
> + dev_priv->display.initial_watermarks(old_intel_state,
> + pipe_config);
> intel_enable_pipe(intel_crtc);
>
> assert_vblank_disabled(crtc);
> @@ -6897,6 +6900,9 @@ static void i9xx_crtc_disable(struct
> intel_crtc_state *old_crtc_state,
>
> if (!IS_GEN2(dev_priv))
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false);
> +
> + if (!dev_priv->display.initial_watermarks)
> + intel_update_watermarks(intel_crtc);
> }
>
> static void intel_crtc_disable_noatomic(struct drm_crtc *crtc)
> @@ -12980,10 +12986,13 @@ static bool check_digital_port_conflicts(struct
> drm_atomic_state *state)
> static void
> clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
> {
> + struct drm_i915_private *dev_priv =
> + to_i915(crtc_state->base.crtc->dev);
> struct drm_crtc_state tmp_state;
> struct intel_crtc_scaler_state scaler_state;
> struct intel_dpll_hw_state dpll_hw_state;
> struct intel_shared_dpll *shared_dpll;
> + struct intel_crtc_wm_state wm_state;
> bool force_thru;
>
> /* FIXME: before the switch to atomic started, a new pipe_config was
> @@ -12996,6 +13005,8 @@ clear_intel_crtc_state(struct intel_crtc_state
> *crtc_state)
> shared_dpll = crtc_state->shared_dpll;
> dpll_hw_state = crtc_state->dpll_hw_state;
> force_thru = crtc_state->pch_pfit.force_thru;
> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + wm_state = crtc_state->wm;
>
> memset(crtc_state, 0, s
[Intel-gfx] ✓ Fi.CI.BAT: success for Shared DPLL kernel doc and improvements (rev2)
== Series Details == Series: Shared DPLL kernel doc and improvements (rev2) URL : https://patchwork.freedesktop.org/series/13277/ State : success == Summary == Series 13277v2 Shared DPLL kernel doc and improvements https://patchwork.freedesktop.org/api/1.0/series/13277/revisions/2/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest c905e30 drm/i915: Move intel_atomic_get_shared_dpll_state() to intel_dpll_mgr.c 8ee6bea drm/i915: Add dpll entrypoint for dumping hw state f3b72bb drm/i915: Update kerneldoc for intel_dpll_mgr.c 729333c drm/i915: Rename intel_shared_dpll->mode_set() to prepare() f06cf12 drm/i915: Rename intel_shared_dpll_config to intel_shared_dpll_state be94191 drm/i915: Rename intel_shared_dpll_commit() to _swap_state() dafe87c drm/i915: Introduce intel_release_shared_dpll() == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3403/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: clean cached display info
Hi Shashank,
On 29-12-2016 12:28, Shashank Sharma wrote:
> This patch adds a small helper function, which clears the cached
> information about a hot-pluggable display, from connector. On event
> This will run on event of a hot-unplug, keeping the connector's display
> info up-to-date, avoiding any errors due to invalid cached data.
>
> Forking this patch out from the 3 patch series:
>
> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.freedesktop.org_patch_128961_&d=DgIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=yaVFU4TjGY0gVF8El1uKcisy6TPsyCl9uN7Wsis-qhY&m=wGqvHYK00VvbUVGun4-ZhK6KZ4Ht_lHwPGfC6ajlzxE&s=7YpJD-fwUixHNz9SNn2B1ijuL5mEVeEUmolbf3NqWcs&e=
>
> (still under review) and sending as individual patch.
>
> Cc: Jose Abreu
> Cc: Daniel Vetter
>
> Suggested-by: Jose Abreu
> Signed-off-by: Shashank Sharma
> ---
Reviewed-by: Jose Abreu
Best regards,
Jose Miguel Abreu
> drivers/gpu/drm/drm_probe_helper.c | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_probe_helper.c
> b/drivers/gpu/drm/drm_probe_helper.c
> index 7cff91e..65a6a1f 100644
> --- a/drivers/gpu/drm/drm_probe_helper.c
> +++ b/drivers/gpu/drm/drm_probe_helper.c
> @@ -164,6 +164,18 @@ void drm_kms_helper_poll_enable_locked(struct drm_device
> *dev)
> }
>
> /**
> + * drm_helper_clear_display_info - clean cached display information for
> + * hot pluggable displays, on event of hot-unplug
> + * @connector: connector under event
> + */
> +void drm_helper_clear_display_info(struct drm_connector *connector)
> +{
> + struct drm_display_info *info = &connector->display_info;
> +
> + memset(info, 0, sizeof(*info));
> +}
> +
> +/**
> * drm_helper_probe_single_connector_modes - get complete set of display
> modes
> * @connector: connector to probe
> * @maxX: max width for modes
> @@ -288,6 +300,16 @@ int drm_helper_probe_single_connector_modes(struct
> drm_connector *connector,
> DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
> connector->base.id, connector->name);
> drm_mode_connector_update_edid_property(connector, NULL);
> +
> + /*
> + * Connector status change to disconnected, time to clean
> + * cached display information.
> + * Any driver which doesn't use this probe_helper function
> + * should implement update of EDID property and display_info
> + * on its own.
> + */
> + drm_helper_clear_display_info(connector);
> +
> verbose_prune = false;
> goto prune;
> }
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Re: [Intel-gfx] [PATCH] drm: clean cached display info
Thanks for the review, Jose.
Regards
Shashank
-Original Message-
From: Jose Abreu [mailto:jose.ab...@synopsys.com]
Sent: Thursday, December 29, 2016 11:05 PM
To: Sharma, Shashank ;
dri-de...@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
Cc: Jose Abreu ; Daniel Vetter
Subject: Re: [PATCH] drm: clean cached display info
Hi Shashank,
On 29-12-2016 12:28, Shashank Sharma wrote:
> This patch adds a small helper function, which clears the cached
> information about a hot-pluggable display, from connector. On event
> This will run on event of a hot-unplug, keeping the connector's
> display info up-to-date, avoiding any errors due to invalid cached data.
>
> Forking this patch out from the 3 patch series:
>
> https://urldefense.proofpoint.com/v2/url?u=https-3A__patchwork.freedes
> ktop.org_patch_128961_&d=DgIBAg&c=DPL6_X_6JkXFx7AXWqB0tg&r=yaVFU4TjGY0
> gVF8El1uKcisy6TPsyCl9uN7Wsis-qhY&m=wGqvHYK00VvbUVGun4-ZhK6KZ4Ht_lHwPGf
> C6ajlzxE&s=7YpJD-fwUixHNz9SNn2B1ijuL5mEVeEUmolbf3NqWcs&e=
> (still under review) and sending as individual patch.
>
> Cc: Jose Abreu
> Cc: Daniel Vetter
>
> Suggested-by: Jose Abreu
> Signed-off-by: Shashank Sharma
> ---
Reviewed-by: Jose Abreu
Best regards,
Jose Miguel Abreu
> drivers/gpu/drm/drm_probe_helper.c | 22 ++
> 1 file changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_probe_helper.c
> b/drivers/gpu/drm/drm_probe_helper.c
> index 7cff91e..65a6a1f 100644
> --- a/drivers/gpu/drm/drm_probe_helper.c
> +++ b/drivers/gpu/drm/drm_probe_helper.c
> @@ -164,6 +164,18 @@ void drm_kms_helper_poll_enable_locked(struct
> drm_device *dev) }
>
> /**
> + * drm_helper_clear_display_info - clean cached display information
> +for
> + * hot pluggable displays, on event of hot-unplug
> + * @connector: connector under event
> + */
> +void drm_helper_clear_display_info(struct drm_connector *connector) {
> + struct drm_display_info *info = &connector->display_info;
> +
> + memset(info, 0, sizeof(*info));
> +}
> +
> +/**
> * drm_helper_probe_single_connector_modes - get complete set of display
> modes
> * @connector: connector to probe
> * @maxX: max width for modes
> @@ -288,6 +300,16 @@ int drm_helper_probe_single_connector_modes(struct
> drm_connector *connector,
> DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
> connector->base.id, connector->name);
> drm_mode_connector_update_edid_property(connector, NULL);
> +
> + /*
> + * Connector status change to disconnected, time to clean
> + * cached display information.
> + * Any driver which doesn't use this probe_helper function
> + * should implement update of EDID property and display_info
> + * on its own.
> + */
> + drm_helper_clear_display_info(connector);
> +
> verbose_prune = false;
> goto prune;
> }
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[Intel-gfx] [PATCH 03/17] drm/mm: Some doc polish
Added some boilerplate for the structs, documented members where they are relevant and plenty of markup for hyperlinks all over. And a few small wording polish. Note that the intro needs some more love after the DRM_MM_INSERT_* patch from Chris has landed. v2: Spelling fixes (Chris). v3: Use &struct foo instead of &foo structure (Chris). Cc: Chris Wilson Cc: Joonas Lahtinen Signed-off-by: Daniel Vetter --- Documentation/gpu/drm-mm.rst | 2 +- drivers/gpu/drm/drm_mm.c | 41 +++-- include/drm/drm_mm.h | 84 ++-- 3 files changed, 89 insertions(+), 38 deletions(-) diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst index cb5daffcd6be..5355e5ad51a7 100644 --- a/Documentation/gpu/drm-mm.rst +++ b/Documentation/gpu/drm-mm.rst @@ -442,7 +442,7 @@ LRU Scan/Eviction Support - .. kernel-doc:: drivers/gpu/drm/drm_mm.c - :doc: lru scan roaster + :doc: lru scan roster DRM MM Range Allocator Function References -- diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index e54aa3fa538f..229b3f525dee 100644 --- a/drivers/gpu/drm/drm_mm.c +++ b/drivers/gpu/drm/drm_mm.c @@ -59,8 +59,8 @@ * * The main data struct is &drm_mm, allocations are tracked in &drm_mm_node. * Drivers are free to embed either of them into their own suitable - * datastructures. drm_mm itself will not do any allocations of its own, so if - * drivers choose not to embed nodes they need to still allocate them + * datastructures. drm_mm itself will not do any memory allocations of its own, + * so if drivers choose not to embed nodes they need to still allocate them * themselves. * * The range allocator also supports reservation of preallocated blocks. This is @@ -78,7 +78,7 @@ * steep cliff not a real concern. Removing a node again is O(1). * * drm_mm supports a few features: Alignment and range restrictions can be - * supplied. Further more every &drm_mm_node has a color value (which is just an + * supplied. Furthermore every &drm_mm_node has a color value (which is just an * opaque unsigned long) which in conjunction with a driver callback can be used * to implement sophisticated placement restrictions. The i915 DRM driver uses * this to implement guard pages between incompatible caching domains in the @@ -296,11 +296,11 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node, * @mm: drm_mm allocator to insert @node into * @node: drm_mm_node to insert * - * This functions inserts an already set-up drm_mm_node into the allocator, - * meaning that start, size and color must be set by the caller. This is useful - * to initialize the allocator with preallocated objects which must be set-up - * before the range allocator can be set-up, e.g. when taking over a firmware - * framebuffer. + * This functions inserts an already set-up &drm_mm_node into the allocator, + * meaning that start, size and color must be set by the caller. All other + * fields must be cleared to 0. This is useful to initialize the allocator with + * preallocated objects which must be set-up before the range allocator can be + * set-up, e.g. when taking over a firmware framebuffer. * * Returns: * 0 on success, -ENOSPC if there's no hole where @node is. @@ -375,7 +375,7 @@ EXPORT_SYMBOL(drm_mm_reserve_node); * @sflags: flags to fine-tune the allocation search * @aflags: flags to fine-tune the allocation behavior * - * The preallocated node must be cleared to 0. + * The preallocated @node must be cleared to 0. * * Returns: * 0 on success, -ENOSPC if there's no suitable hole. @@ -537,7 +537,7 @@ void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new) EXPORT_SYMBOL(drm_mm_replace_node); /** - * DOC: lru scan roaster + * DOC: lru scan roster * * Very often GPUs need to have continuous allocations for a given object. When * evicting objects to make space for a new one it is therefore not most @@ -549,9 +549,11 @@ EXPORT_SYMBOL(drm_mm_replace_node); * The DRM range allocator supports this use-case through the scanning * interfaces. First a scan operation needs to be initialized with * drm_mm_scan_init() or drm_mm_scan_init_with_range(). The driver adds - * objects to the roster (probably by walking an LRU list, but this can be - * freely implemented) (using drm_mm_scan_add_block()) until a suitable hole - * is found or there are no further evictable objects. + * objects to the roster, probably by walking an LRU list, but this can be + * freely implemented. Eviction candiates are added using + * drm_mm_scan_add_block() until a suitable hole is found or there are no + * further evictable objects. Eviction roster metadata is tracked in struct + * &drm_mm_scan. * * The driver must walk through all objects again in exactly the reverse * order to restore the allocator state. Note that while the allocator is used @@ -55
[Intel-gfx] [PATCH 01/17] drm/docs: Small cleanup in drm-uapi.rst
- Remove the outdated hunk about driver documentation which somehow got misplaced here in the split-up. - Collect all the testing&validation stuff together and give the CRC section a heading for prettier output. Cc: Tomeu Vizoso Cc: Jani Nikula Signed-off-by: Daniel Vetter --- Documentation/gpu/drm-uapi.rst | 25 +++-- 1 file changed, 11 insertions(+), 14 deletions(-) diff --git a/Documentation/gpu/drm-uapi.rst b/Documentation/gpu/drm-uapi.rst index de3ac9f90f8f..fcc228ef5bc4 100644 --- a/Documentation/gpu/drm-uapi.rst +++ b/Documentation/gpu/drm-uapi.rst @@ -156,8 +156,12 @@ other hand, a driver requires shared state between clients which is visible to user-space and accessible beyond open-file boundaries, they cannot support render nodes. + +Testing and validation +== + Validating changes with IGT -=== +--- There's a collection of tests that aims to cover the whole functionality of DRM drivers and that can be used to check that changes to DRM drivers or the @@ -193,6 +197,12 @@ run-tests.sh is a wrapper around piglit that will execute the tests matching the -t options. A report in HTML format will be available in ./results/html/index.html. Results can be compared with piglit. +Display CRC Support +--- + +.. kernel-doc:: drivers/gpu/drm/drm_debugfs_crc.c + :doc: CRC ABI + VBlank event handling = @@ -209,16 +219,3 @@ DRM_IOCTL_MODESET_CTL mode setting, since on many devices the vertical blank counter is reset to 0 at some point during modeset. Modern drivers should not call this any more since with kernel mode setting it is a no-op. - -This second part of the GPU Driver Developer's Guide documents driver -code, implementation details and also all the driver-specific userspace -interfaces. Especially since all hardware-acceleration interfaces to -userspace are driver specific for efficiency and other reasons these -interfaces can be rather substantial. Hence every driver has its own -chapter. - -Testing and validation -== - -.. kernel-doc:: drivers/gpu/drm/drm_debugfs_crc.c - :doc: CRC ABI -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 14/17] drm/cma-helpers: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty
even. It doesn't (yet) link to the member directly though, which would
be really good for big structures or vfunc tables (where the
per-member kerneldoc tends to be long).
Also some minor drive-by polish where it makes sense, I read a lot
of docs ...
Cc: Laurent Pinchart
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_fb_cma_helper.c | 24
drivers/gpu/drm/drm_gem_cma_helper.c | 16
2 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c
b/drivers/gpu/drm/drm_fb_cma_helper.c
index ec081727cd5a..0a0ac77b464b 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -48,14 +48,14 @@ struct drm_fbdev_cma {
* Provides helper functions for creating a cma (contiguous memory allocator)
* backed framebuffer.
*
- * drm_fb_cma_create() is used in the &drm_mode_config_funcs ->fb_create
+ * drm_fb_cma_create() is used in the &drm_mode_config_funcs.fb_create
* callback function to create a cma backed framebuffer.
*
* An fbdev framebuffer backed by cma is also available by calling
* drm_fbdev_cma_init(). drm_fbdev_cma_fini() tears it down.
- * If the &drm_framebuffer_funcs ->dirty callback is set, fb_deferred_io
- * will be set up automatically. dirty() is called by
- * drm_fb_helper_deferred_io() in process context (struct delayed_work).
+ * If the &drm_framebuffer_funcs.dirty callback is set, fb_deferred_io will be
+ * set up automatically. &drm_framebuffer_funcs.dirty is called by
+ * drm_fb_helper_deferred_io() in process context (&struct delayed_work).
*
* Example fbdev deferred io code::
*
@@ -155,16 +155,16 @@ static struct drm_fb_cma *drm_fb_cma_alloc(struct
drm_device *dev,
/**
* drm_fb_cma_create_with_funcs() - helper function for the
- * &drm_mode_config_funcs ->fb_create
- * callback function
+ * &drm_mode_config_funcs.fb_create
+ * callback
* @dev: DRM device
* @file_priv: drm file for the ioctl call
* @mode_cmd: metadata from the userspace fb creation request
* @funcs: vtable to be used for the new framebuffer object
*
* This can be used to set &drm_framebuffer_funcs for drivers that need the
- * dirty() callback. Use drm_fb_cma_create() if you don't need to change
- * &drm_framebuffer_funcs.
+ * &drm_framebuffer_funcs.dirty callback. Use drm_fb_cma_create() if you don't
+ * need to change &drm_framebuffer_funcs.
*/
struct drm_framebuffer *drm_fb_cma_create_with_funcs(struct drm_device *dev,
struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd,
@@ -221,14 +221,14 @@ struct drm_framebuffer
*drm_fb_cma_create_with_funcs(struct drm_device *dev,
EXPORT_SYMBOL_GPL(drm_fb_cma_create_with_funcs);
/**
- * drm_fb_cma_create() - &drm_mode_config_funcs ->fb_create callback function
+ * drm_fb_cma_create() - &drm_mode_config_funcs.fb_create callback function
* @dev: DRM device
* @file_priv: drm file for the ioctl call
* @mode_cmd: metadata from the userspace fb creation request
*
* If your hardware has special alignment or pitch requirements these should be
* checked before calling this function. Use drm_fb_cma_create_with_funcs() if
- * you need to set &drm_framebuffer_funcs ->dirty.
+ * you need to set &drm_framebuffer_funcs.dirty.
*/
struct drm_framebuffer *drm_fb_cma_create(struct drm_device *dev,
struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
@@ -264,7 +264,7 @@ EXPORT_SYMBOL_GPL(drm_fb_cma_get_gem_obj);
* @plane: Which plane
* @state: Plane state attach fence to
*
- * This should be put into prepare_fb hook of &struct drm_plane_helper_funcs .
+ * This should be set as the &struct drm_plane_helper_funcs.prepare_fb hook.
*
* This function checks if the plane FB has an dma-buf attached, extracts
* the exclusive fence and attaches it to plane state for the atomic helper
@@ -491,7 +491,7 @@ static const struct drm_fb_helper_funcs
drm_fb_cma_helper_funcs = {
* @preferred_bpp: Preferred bits per pixel for the device
* @num_crtc: Number of CRTCs
* @max_conn_count: Maximum number of connectors
- * @funcs: fb helper functions, in particular fb_probe()
+ * @funcs: fb helper functions, in particular a custom dirty() callback
*
* Returns a newly allocated drm_fbdev_cma struct or a ERR_PTR.
*/
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c
b/drivers/gpu/drm/drm_gem_cma_helper.c
index 1d6c335584ec..6ec2d8096b2c 100644
--- a/drivers/gpu/drm/drm_gem_cma_helper.c
+++ b/drivers/gpu/drm/drm_gem_cma_helper.c
@@ -177,7 +177,7 @@ drm_gem_cma_create_with_handle(struct drm_file *file_priv,
* This function frees the backing memory of the CMA GEM object, cleans up the
* GEM object state and frees the memory used to store the object
[Intel-gfx] [PATCH 04/17] dma-buf: use preferred struct reference in kernel-doc
sed -e 's/\( \* .*\)struct &\([_a-z]*\)/\1\&struct \2/' -i
Originally I wasnt a friend of this style because I thought a
line-break between the "&struct" and "foo" part would break it. But a
quick test shows that " * &struct \n * foo\n" works pefectly well with
current kernel-doc. So time to mass-apply these changes!
Cc: Sumit Semwal
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Daniel Vetter
---
drivers/dma-buf/dma-buf.c | 6 +++---
include/linux/dma-buf.h | 4 ++--
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index 91aff74ed092..ab814aff0a5b 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -128,7 +128,7 @@ static loff_t dma_buf_llseek(struct file *file, loff_t
offset, int whence)
* DOC: fence polling
*
* To support cross-device and cross-driver synchronization of buffer access
- * implicit fences (represented internally in the kernel with struct &fence)
can
+ * implicit fences (represented internally in the kernel with &struct fence)
can
* be attached to a &dma_buf. The glue for that and a few related things are
* provided in the &reservation_object structure.
*
@@ -373,7 +373,7 @@ static inline int is_dma_buf_file(struct file *file)
* Additionally, provide a name string for exporter; useful in debugging.
*
* @exp_info: [in]holds all the export related information provided
- * by the exporter. see struct &dma_buf_export_info
+ * by the exporter. see &struct dma_buf_export_info
* for further details.
*
* Returns, on success, a newly created dma_buf object, which wraps the
@@ -517,7 +517,7 @@ EXPORT_SYMBOL_GPL(dma_buf_get);
*
* If, as a result of this call, the refcount becomes 0, the 'release' file
* operation related to this fd is called. It calls the release operation of
- * struct &dma_buf_ops in turn, and frees the memory allocated for dmabuf when
+ * &struct dma_buf_ops in turn, and frees the memory allocated for dmabuf when
* exported.
*/
void dma_buf_put(struct dma_buf *dmabuf)
diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
index 57828154e440..4d61fc55278b 100644
--- a/include/linux/dma-buf.h
+++ b/include/linux/dma-buf.h
@@ -278,7 +278,7 @@ struct dma_buf_ops {
* Shared dma buffers are reference counted using dma_buf_put() and
* get_dma_buf().
*
- * Device DMA access is handled by the separate struct &dma_buf_attachment.
+ * Device DMA access is handled by the separate &struct dma_buf_attachment.
*/
struct dma_buf {
size_t size;
@@ -355,7 +355,7 @@ struct dma_buf_export_info {
* DEFINE_DMA_BUF_EXPORT_INFO - helper macro for exporters
* @name: export-info name
*
- * DEFINE_DMA_BUF_EXPORT_INFO macro defines the struct &dma_buf_export_info,
+ * DEFINE_DMA_BUF_EXPORT_INFO macro defines the &struct dma_buf_export_info,
* zeroes it out and pre-populates exp_name in it.
*/
#define DEFINE_DMA_BUF_EXPORT_INFO(name) \
--
2.7.4
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[Intel-gfx] [PATCH 10/17] drm/atomic-helpers: Remove outdated comment
We forgot to clean this up when adding connector refcounting.
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_atomic_helper.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 8eab8944c736..5e5224460042 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3286,11 +3286,6 @@ EXPORT_SYMBOL(drm_atomic_helper_duplicate_state);
void
__drm_atomic_helper_connector_destroy_state(struct drm_connector_state *state)
{
- /*
-* This is currently a placeholder so that drivers that subclass the
-* state will automatically do the right thing if code is ever added
-* to this function.
-*/
if (state->crtc)
drm_connector_unreference(state->connector);
}
--
2.7.4
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[Intel-gfx] [PATCH 09/17] drm/rect: Fix formatting of example code
Drive-by polish. Cc: Ville Syrjälä Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_rect.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_rect.c b/drivers/gpu/drm/drm_rect.c index e6057d8cdcd5..bc5575960ebc 100644 --- a/drivers/gpu/drm/drm_rect.c +++ b/drivers/gpu/drm/drm_rect.c @@ -371,10 +371,10 @@ EXPORT_SYMBOL(drm_rect_rotate); * to the vertical axis of the original untransformed * coordinate space, so that you never have to flip * them when doing a rotatation and its inverse. - * That is, if you do: + * That is, if you do :: * - * drm_rotate(&r, width, height, rotation); - * drm_rotate_inv(&r, width, height, rotation); + * drm_rotate(&r, width, height, rotation); + * drm_rotate_inv(&r, width, height, rotation); * * you will always get back the original rectangle. */ -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/17] drm/doc: link style-guide to doc-guide
Our style guide should only be the delta compared to the overall one. Cc: Chris Wilson Signed-off-by: Daniel Vetter --- Documentation/gpu/introduction.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/gpu/introduction.rst b/Documentation/gpu/introduction.rst index 1903595b5310..6960e31f71e1 100644 --- a/Documentation/gpu/introduction.rst +++ b/Documentation/gpu/introduction.rst @@ -49,3 +49,5 @@ section name should be all upper-case or not, and whether it should end in a colon or not. Go with the file-local style. Other common section names are "Notes" with information for dangerous or tricky corner cases, and "FIXME" where the interface could be cleaned up. + +Also read the :ref:`guidelines for the kernel documentation at large `. -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 11/17] drm/cma-helper: simplify setup for drivers with ->dirty callbacks
If we store the fb funcs pointer, we can remove a bit of boilerplate.
Also remove the _fbdev_ in the example code, since the fb_funcs->dirty
callback has nothing to do with fbdev. It's a KMS feature, only
used by the fbdev deferred_io support to implement flushing/upload.
Cc: Noralf Trønnes
Cc: Laurent Pinchart
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_fb_cma_helper.c | 58 +
include/drm/drm_fb_cma_helper.h | 5 +---
2 files changed, 21 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/drm_fb_cma_helper.c
b/drivers/gpu/drm/drm_fb_cma_helper.c
index 76cb1aa1b089..ec081727cd5a 100644
--- a/drivers/gpu/drm/drm_fb_cma_helper.c
+++ b/drivers/gpu/drm/drm_fb_cma_helper.c
@@ -39,6 +39,7 @@ struct drm_fb_cma {
struct drm_fbdev_cma {
struct drm_fb_helperfb_helper;
struct drm_fb_cma *fb;
+ const struct drm_framebuffer_funcs *fb_funcs;
};
/**
@@ -58,39 +59,29 @@ struct drm_fbdev_cma {
*
* Example fbdev deferred io code::
*
- * static int driver_fbdev_fb_dirty(struct drm_framebuffer *fb,
- * struct drm_file *file_priv,
- * unsigned flags, unsigned color,
- * struct drm_clip_rect *clips,
- * unsigned num_clips)
+ * static int driver_fb_dirty(struct drm_framebuffer *fb,
+ *struct drm_file *file_priv,
+ *unsigned flags, unsigned color,
+ *struct drm_clip_rect *clips,
+ *unsigned num_clips)
* {
* struct drm_gem_cma_object *cma = drm_fb_cma_get_gem_obj(fb, 0);
* ... push changes ...
* return 0;
* }
*
- * static struct drm_framebuffer_funcs driver_fbdev_fb_funcs = {
+ * static struct drm_framebuffer_funcs driver_fb_funcs = {
* .destroy = drm_fb_cma_destroy,
* .create_handle = drm_fb_cma_create_handle,
- * .dirty = driver_fbdev_fb_dirty,
+ * .dirty = driver_fb_dirty,
* };
*
- * static int driver_fbdev_create(struct drm_fb_helper *helper,
- * struct drm_fb_helper_surface_size *sizes)
- * {
- * return drm_fbdev_cma_create_with_funcs(helper, sizes,
- *&driver_fbdev_fb_funcs);
- * }
- *
- * static const struct drm_fb_helper_funcs driver_fb_helper_funcs = {
- * .fb_probe = driver_fbdev_create,
- * };
+ * Initialize::
*
- * Initialize:
* fbdev = drm_fbdev_cma_init_with_funcs(dev, 16,
* dev->mode_config.num_crtc,
* dev->mode_config.num_connector,
- * &driver_fb_helper_funcs);
+ * &driver_fb_funcs);
*
*/
@@ -408,13 +399,9 @@ static void drm_fbdev_cma_defio_fini(struct fb_info *fbi)
kfree(fbi->fbops);
}
-/*
- * For use in a (struct drm_fb_helper_funcs *)->fb_probe callback function that
- * needs custom struct drm_framebuffer_funcs, like dirty() for deferred_io use.
- */
-int drm_fbdev_cma_create_with_funcs(struct drm_fb_helper *helper,
- struct drm_fb_helper_surface_size *sizes,
- const struct drm_framebuffer_funcs *funcs)
+static int
+drm_fbdev_cma_create(struct drm_fb_helper *helper,
+ struct drm_fb_helper_surface_size *sizes)
{
struct drm_fbdev_cma *fbdev_cma = to_fbdev_cma(helper);
struct drm_mode_fb_cmd2 mode_cmd = { 0 };
@@ -450,7 +437,8 @@ int drm_fbdev_cma_create_with_funcs(struct drm_fb_helper
*helper,
goto err_gem_free_object;
}
- fbdev_cma->fb = drm_fb_cma_alloc(dev, &mode_cmd, &obj, 1, funcs);
+ fbdev_cma->fb = drm_fb_cma_alloc(dev, &mode_cmd, &obj, 1,
+fbdev_cma->fb_funcs);
if (IS_ERR(fbdev_cma->fb)) {
dev_err(dev->dev, "Failed to allocate DRM framebuffer.\n");
ret = PTR_ERR(fbdev_cma->fb);
@@ -476,7 +464,7 @@ int drm_fbdev_cma_create_with_funcs(struct drm_fb_helper
*helper,
fbi->screen_size = size;
fbi->fix.smem_len = size;
- if (funcs->dirty) {
+ if (fbdev_cma->fb_funcs->dirty) {
ret = drm_fbdev_cma_defio_init(fbi, obj);
if (ret)
goto err_cma_destroy;
@@ -492,13 +480,6 @@ int drm_fbdev_cma_create_with_funcs(struct drm_fb_helper
*helper,
drm_gem_object_unreference_unlocked(&obj->base);
return ret;
}
-EXPORT_SYMBOL(drm_fbdev_cma_create_with_funcs);
-
-static int drm_fbdev_cma_create(struct drm_fb_helper *helper,
- struct drm_fb_helper_surface_size *sizes)
-{
- return drm_fbdev_cma_create_with_funcs(helper, sizes,
&drm_fb_cma_funcs);
-}
static const struct
[Intel-gfx] [PATCH 05/17] dma-buf: Use recommended structure member reference
I just learned that &struct_name.member_name works and looks pretty
even. It doesn't (yet) link to the member directly though, which would
be really good for big structures or vfunc tables (where the
per-member kerneldoc tends to be long).
Cc: Sumit Semwal
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Daniel Vetter
---
drivers/dma-buf/dma-buf.c | 5 ++---
include/linux/dma-buf.h | 6 +++---
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/dma-buf/dma-buf.c b/drivers/dma-buf/dma-buf.c
index ab814aff0a5b..718f832a5c71 100644
--- a/drivers/dma-buf/dma-buf.c
+++ b/drivers/dma-buf/dma-buf.c
@@ -516,9 +516,8 @@ EXPORT_SYMBOL_GPL(dma_buf_get);
* Uses file's refcounting done implicitly by fput().
*
* If, as a result of this call, the refcount becomes 0, the 'release' file
- * operation related to this fd is called. It calls the release operation of
- * &struct dma_buf_ops in turn, and frees the memory allocated for dmabuf when
- * exported.
+ * operation related to this fd is called. It calls &dma_buf_ops.release vfunc
+ * in turn, and frees the memory allocated for dmabuf when exported.
*/
void dma_buf_put(struct dma_buf *dmabuf)
{
diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h
index 4d61fc55278b..bfb3704fc6fc 100644
--- a/include/linux/dma-buf.h
+++ b/include/linux/dma-buf.h
@@ -66,8 +66,8 @@ struct dma_buf_ops {
* is not the case, and the allocation cannot be moved, it should also
* fail the attach operation.
*
-* Any exporter-private housekeeping data can be stored in the priv
-* pointer of &dma_buf_attachment structure.
+* Any exporter-private housekeeping data can be stored in the
+* &dma_buf_attachment.priv pointer.
*
* This callback is optional.
*
@@ -106,7 +106,7 @@ struct dma_buf_ops {
*
* Note that any specific buffer attributes required for this function
* should get added to device_dma_parameters accessible via
-* device->dma_params from the &dma_buf_attachment. The @attach callback
+* &device.dma_params from the &dma_buf_attachment. The @attach callback
* should also check these constraints.
*
* If this is being called for the first time, the exporter can now
--
2.7.4
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[Intel-gfx] [PATCH 07/17] drm: Nuke connector_list locking assert
I've forgotten to remove this when revamping the
connector_list locking.
Cc: seanp...@chromium.org
Signed-off-by: Daniel Vetter
---
include/drm/drm_connector.h | 6 +-
include/drm/drm_crtc.h | 14 --
2 files changed, 1 insertion(+), 19 deletions(-)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index acb4241bff7d..d489cc003b7e 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -875,11 +875,7 @@ void drm_mode_put_tile_group(struct drm_device *dev,
* deprecated. Use drm_for_each_connector_iter() instead.
*/
#define drm_for_each_connector(connector, dev) \
- for (assert_drm_connector_list_read_locked(&(dev)->mode_config),
\
-connector = list_first_entry(&(dev)->mode_config.connector_list,
\
- struct drm_connector, head);
\
-&connector->head != (&(dev)->mode_config.connector_list);
\
-connector = list_next_entry(connector, head))
+ list_for_each_entry(connector, &(dev)->mode_config.connector_list, head)
/**
* struct drm_connector_list_iter - connector_list iterator
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 0b9ec7245c7e..c0817fa205d4 100644
--- a/include/drm/drm_crtc.h
+++ b/include/drm/drm_crtc.h
@@ -835,18 +835,4 @@ static inline struct drm_crtc *drm_crtc_find(struct
drm_device *dev,
#define drm_for_each_crtc(crtc, dev) \
list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
-static inline void
-assert_drm_connector_list_read_locked(struct drm_mode_config *mode_config)
-{
- /*
-* The connector hotadd/remove code currently grabs both locks when
-* updating lists. Hence readers need only hold either of them to be
-* safe and the check amounts to
-*
-* WARN_ON(not_holding(A) && not_holding(B)).
-*/
- WARN_ON(!mutex_is_locked(&mode_config->mutex) &&
- !drm_modeset_is_locked(&mode_config->connection_mutex));
-}
-
#endif /* __DRM_CRTC_H__ */
--
2.7.4
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[Intel-gfx] [PATCH 13/17] drm/bridge: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty
even. It doesn't (yet) link to the member directly though, which would
be really good for big structures or vfunc tables (where the
per-member kerneldoc tends to be long).
Also some minor drive-by polish where it makes sense, I read a lot
of docs ...
Cc: Archit Taneja
Cc: Jani Nikula
Cc: Chris Wilson
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/drm_bridge.c | 27 +++--
include/drm/drm_bridge.h | 48 +---
2 files changed, 39 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c
index ae5e57ad718c..86a7637ba344 100644
--- a/drivers/gpu/drm/drm_bridge.c
+++ b/drivers/gpu/drm/drm_bridge.c
@@ -55,7 +55,7 @@
* just provide additional hooks to get the desired output at the end of the
* encoder chain.
*
- * Bridges can also be chained up using the next pointer in &struct drm_bridge.
+ * Bridges can also be chained up using the &drm_bridge.next pointer.
*
* Both legacy CRTC helpers and the new atomic modeset helpers support bridges.
*/
@@ -179,7 +179,7 @@ void drm_bridge_detach(struct drm_bridge *bridge)
* @mode: desired mode to be set for the bridge
* @adjusted_mode: updated mode that works for this bridge
*
- * Calls ->mode_fixup() &drm_bridge_funcs op for all the bridges in the
+ * Calls &drm_bridge_funcs.mode_fixup for all the bridges in the
* encoder chain, starting from the first bridge to the last.
*
* Note: the bridge passed should be the one closest to the encoder
@@ -206,11 +206,10 @@ bool drm_bridge_mode_fixup(struct drm_bridge *bridge,
EXPORT_SYMBOL(drm_bridge_mode_fixup);
/**
- * drm_bridge_disable - calls ->disable() &drm_bridge_funcs op for all
- * bridges in the encoder chain.
+ * drm_bridge_disable - disables all bridges in the encoder chain
* @bridge: bridge control structure
*
- * Calls ->disable() &drm_bridge_funcs op for all the bridges in the encoder
+ * Calls &drm_bridge_funcs.disable op for all the bridges in the encoder
* chain, starting from the last bridge to the first. These are called before
* calling the encoder's prepare op.
*
@@ -229,11 +228,10 @@ void drm_bridge_disable(struct drm_bridge *bridge)
EXPORT_SYMBOL(drm_bridge_disable);
/**
- * drm_bridge_post_disable - calls ->post_disable() &drm_bridge_funcs op for
- * all bridges in the encoder chain.
+ * drm_bridge_post_disable - cleans up after disabling all bridges in the
encoder chain
* @bridge: bridge control structure
*
- * Calls ->post_disable() &drm_bridge_funcs op for all the bridges in the
+ * Calls &drm_bridge_funcs.post_disable op for all the bridges in the
* encoder chain, starting from the first bridge to the last. These are called
* after completing the encoder's prepare op.
*
@@ -258,7 +256,7 @@ EXPORT_SYMBOL(drm_bridge_post_disable);
* @mode: desired mode to be set for the bridge
* @adjusted_mode: updated mode that works for this bridge
*
- * Calls ->mode_set() &drm_bridge_funcs op for all the bridges in the
+ * Calls &drm_bridge_funcs.mode_set op for all the bridges in the
* encoder chain, starting from the first bridge to the last.
*
* Note: the bridge passed should be the one closest to the encoder
@@ -278,11 +276,11 @@ void drm_bridge_mode_set(struct drm_bridge *bridge,
EXPORT_SYMBOL(drm_bridge_mode_set);
/**
- * drm_bridge_pre_enable - calls ->pre_enable() &drm_bridge_funcs op for all
- *bridges in the encoder chain.
+ * drm_bridge_pre_enable - prepares for enabling all
+ *bridges in the encoder chain
* @bridge: bridge control structure
*
- * Calls ->pre_enable() &drm_bridge_funcs op for all the bridges in the encoder
+ * Calls &drm_bridge_funcs.pre_enable op for all the bridges in the encoder
* chain, starting from the last bridge to the first. These are called
* before calling the encoder's commit op.
*
@@ -301,11 +299,10 @@ void drm_bridge_pre_enable(struct drm_bridge *bridge)
EXPORT_SYMBOL(drm_bridge_pre_enable);
/**
- * drm_bridge_enable - calls ->enable() &drm_bridge_funcs op for all bridges
- *in the encoder chain.
+ * drm_bridge_enable - enables all bridges in the encoder chain
* @bridge: bridge control structure
*
- * Calls ->enable() &drm_bridge_funcs op for all the bridges in the encoder
+ * Calls &drm_bridge_funcs.enable op for all the bridges in the encoder
* chain, starting from the first bridge to the last. These are called
* after completing the encoder's commit op.
*
diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h
index d3ca16f4da8f..1595a57dfbf2 100644
--- a/include/drm/drm_bridge.h
+++ b/include/drm/drm_bridge.h
@@ -87,18 +87,19 @@ struct drm_bridge_funcs {
* True if an acceptable configuration is possible, false if the modeset
* operation should be rejected.
[Intel-gfx] [PATCH 17/17] drm/core: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty even. It doesn't (yet) link to the member directly though, which would be really good for big structures or vfunc tables (where the per-member kerneldoc tends to be long). Also some minor drive-by polish where it makes sense, I read a lot of docs ... Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_auth.c | 4 ++-- drivers/gpu/drm/drm_drv.c | 8 drivers/gpu/drm/drm_fops.c | 11 ++- drivers/gpu/drm/drm_irq.c | 10 +- drivers/gpu/drm/drm_pci.c | 2 +- drivers/gpu/drm/drm_platform.c | 2 +- drivers/gpu/drm/drm_sysfs.c| 2 +- include/drm/drm_auth.h | 12 ++-- include/drm/drm_drv.h | 2 +- include/drm/drm_irq.h | 4 ++-- 10 files changed, 29 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/drm_auth.c b/drivers/gpu/drm/drm_auth.c index 860cfe124c2a..7ff697389d74 100644 --- a/drivers/gpu/drm/drm_auth.c +++ b/drivers/gpu/drm/drm_auth.c @@ -40,8 +40,8 @@ * least once successfully became the device master (either through the * SET_MASTER IOCTL, or implicitly through opening the primary device node when * no one else is the current master that time) there exists one &drm_master. - * This is noted in the is_master member of &drm_file. All other clients have - * just a pointer to the &drm_master they are associated with. + * This is noted in &drm_file.is_master. All other clients have just a pointer + * to the &drm_master they are associated with. * * In addition only one &drm_master can be the current master for a &drm_device. * It can be switched through the DROP_MASTER and SET_MASTER IOCTL, or diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index f8de5804c37c..720427aad1d4 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c @@ -309,7 +309,7 @@ void drm_minor_release(struct drm_minor *minor) * userspace the device instance can be published using drm_dev_register(). * * There is also deprecated support for initalizing device instances using - * bus-specific helpers and the ->load() callback. But due to + * bus-specific helpers and the &drm_driver.load callback. But due to * backwards-compatibility needs the device instance have to be published too * early, which requires unpretty global locking to make safe and is therefore * only support for existing drivers not yet converted to the new scheme. @@ -718,9 +718,9 @@ static void remove_compat_control_link(struct drm_device *dev) * Never call this twice on any device! * * NOTE: To ensure backward compatibility with existing drivers method this - * function calls the ->load() method after registering the device nodes, - * creating race conditions. Usage of the ->load() methods is therefore - * deprecated, drivers must perform all initialization before calling + * function calls the &drm_driver.load method after registering the device + * nodes, creating race conditions. Usage of the &drm_driver.load methods is + * therefore deprecated, drivers must perform all initialization before calling * drm_dev_register(). * * RETURNS: diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c index 48e106557c92..c9383ff36b61 100644 --- a/drivers/gpu/drm/drm_fops.c +++ b/drivers/gpu/drm/drm_fops.c @@ -580,7 +580,7 @@ EXPORT_SYMBOL(drm_poll); * kmalloc and @p must be the first member element. * * This is the locked version of drm_event_reserve_init() for callers which - * already hold dev->event_lock. + * already hold &drm_device.event_lock. * * RETURNS: * @@ -621,7 +621,7 @@ EXPORT_SYMBOL(drm_event_reserve_init_locked); * If callers embedded @p into a larger structure it must be allocated with * kmalloc and @p must be the first member element. * - * Callers which already hold dev->event_lock should use + * Callers which already hold &drm_device.event_lock should use * drm_event_reserve_init_locked() instead. * * RETURNS: @@ -677,7 +677,7 @@ EXPORT_SYMBOL(drm_event_cancel_free); * * This function sends the event @e, initialized with drm_event_reserve_init(), * to its associated userspace DRM file. Callers must already hold - * dev->event_lock, see drm_send_event() for the unlocked version. + * &drm_device.event_lock, see drm_send_event() for the unlocked version. * * Note that the core will take care of unlinking and disarming events when the * corresponding DRM file is closed. Drivers need not worry about whether the @@ -717,8 +717,9 @@ EXPORT_SYMBOL(drm_send_event_locked); * @e: DRM event to deliver * * This function sends the event @e, initialized with drm_event_reserve_init(), - * to its associated userspace DRM file. This function acquires dev->event_lock, - * see drm_send_event_locked() for callers which already hold this lock. + * to its associated userspace DRM file. This function acquires + * &drm_device.event_lock, see drm_send_event_lo
[Intel-gfx] [PATCH 06/17] drm/doc: use preferred struct reference in kernel-doc
sed -e 's/\( \* .*\)struct &\([_a-z]*\)/\1\&struct \2/' -i Originally I wasnt a friend of this style because I thought a line-break between the "&struct" and "foo" part would break it. But a quick test shows that " * &struct \n * foo\n" works pefectly well with current kernel-doc. So time to mass-apply these changes! Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_atomic.c | 6 +++--- drivers/gpu/drm/drm_atomic_helper.c | 8 drivers/gpu/drm/drm_auth.c | 8 drivers/gpu/drm/drm_bridge.c | 4 ++-- drivers/gpu/drm/drm_color_mgmt.c | 4 ++-- drivers/gpu/drm/drm_connector.c | 2 +- drivers/gpu/drm/drm_crtc_helper.c| 14 +++--- drivers/gpu/drm/drm_drv.c| 10 +- drivers/gpu/drm/drm_dumb_buffers.c | 2 +- drivers/gpu/drm/drm_encoder.c| 4 ++-- drivers/gpu/drm/drm_fb_cma_helper.c | 2 +- drivers/gpu/drm/drm_framebuffer.c| 6 +++--- drivers/gpu/drm/drm_irq.c| 2 +- drivers/gpu/drm/drm_plane.c | 2 +- drivers/gpu/drm/drm_plane_helper.c | 2 +- drivers/gpu/drm/drm_probe_helper.c | 2 +- drivers/gpu/drm/drm_property.c | 2 +- drivers/gpu/drm/drm_simple_kms_helper.c | 2 +- include/drm/drm_atomic.h | 2 +- include/drm/drm_auth.h | 2 +- include/drm/drm_bridge.h | 8 include/drm/drm_connector.h | 10 +- include/drm/drm_crtc.h | 8 include/drm/drm_fb_helper.h | 2 +- include/drm/drm_framebuffer.h| 6 +++--- include/drm/drm_irq.h| 4 ++-- include/drm/drm_mode_config.h| 10 +- include/drm/drm_modeset_helper_vtables.h | 2 +- include/drm/drm_plane.h | 4 ++-- include/drm/drm_print.h | 4 ++-- include/drm/drm_simple_kms_helper.h | 8 31 files changed, 76 insertions(+), 76 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index b1b54011a92c..681d5f97639d 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -1882,7 +1882,7 @@ EXPORT_SYMBOL(drm_atomic_clean_old_fb); * As a contrast, with implicit fencing the kernel keeps track of any * ongoing rendering, and automatically ensures that the atomic update waits * for any pending rendering to complete. For shared buffers represented with - * a struct &dma_buf this is tracked in &reservation_object structures. + * a &struct dma_buf this is tracked in &reservation_object structures. * Implicit syncing is how Linux traditionally worked (e.g. DRI2/3 on X.org), * whereas explicit fencing is what Android wants. * @@ -1898,7 +1898,7 @@ EXPORT_SYMBOL(drm_atomic_clean_old_fb); * it will only check if the Sync File is a valid one. * * On the driver side the fence is stored on the @fence parameter of - * struct &drm_plane_state. Drivers which also support implicit fencing + * &struct drm_plane_state. Drivers which also support implicit fencing * should set the implicit fence using drm_atomic_set_fence_for_plane(), * to make sure there's consistent behaviour between drivers in precedence * of implicit vs. explicit fencing. @@ -1917,7 +1917,7 @@ EXPORT_SYMBOL(drm_atomic_clean_old_fb); * DRM_MODE_ATOMIC_TEST_ONLY flag the out fence will also be set to -1. * * Note that out-fences don't have a special interface to drivers and are - * internally represented by a struct &drm_pending_vblank_event in struct + * internally represented by a &struct drm_pending_vblank_event in struct * &drm_crtc_state, which is also used by the nonblocking atomic commit * helpers and for the DRM event handling for existing userspace. */ diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 799c1564a4f8..8eab8944c736 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -56,9 +56,9 @@ * implement these functions themselves but must use the provided helpers. * * The atomic helper uses the same function table structures as all other - * modesetting helpers. See the documentation for struct &drm_crtc_helper_funcs, - * struct &drm_encoder_helper_funcs and struct &drm_connector_helper_funcs. It - * also shares the struct &drm_plane_helper_funcs function table with the plane + * modesetting helpers. See the documentation for &struct drm_crtc_helper_funcs, + * struct &drm_encoder_helper_funcs and &struct drm_connector_helper_funcs. It + * also shares the &struct drm_plane_helper_funcs function table with the plane * helpers. */ static void @@ -1369,7 +1369,7 @@ static int stall_checks(struct drm_crtc *crtc, bool nonblock) * actually committing the hardware state, and for nonblocking commits this call
[Intel-gfx] [PATCH 16/17] drm/gem|prime|mm: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty even. It doesn't (yet) link to the member directly though, which would be really good for big structures or vfunc tables (where the per-member kerneldoc tends to be long). Also some minor drive-by polish where it makes sense, I read a lot of docs ... Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_gem.c | 24 drivers/gpu/drm/drm_mm.c| 4 ++-- drivers/gpu/drm/drm_prime.c | 2 +- include/drm/drm_gem.h | 16 4 files changed, 23 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c index 465bacd0a630..bc93de308673 100644 --- a/drivers/gpu/drm/drm_gem.c +++ b/drivers/gpu/drm/drm_gem.c @@ -316,8 +316,8 @@ EXPORT_SYMBOL(drm_gem_handle_delete); * @dev: corresponding drm_device * @handle: the dumb handle to remove * - * This implements the ->dumb_destroy kms driver callback for drivers which use - * gem to manage their backing storage. + * This implements the &drm_driver.dumb_destroy kms driver callback for drivers + * which use gem to manage their backing storage. */ int drm_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev, @@ -333,9 +333,9 @@ EXPORT_SYMBOL(drm_gem_dumb_destroy); * @obj: object to register * @handlep: pointer to return the created handle to the caller * - * This expects the dev->object_name_lock to be held already and will drop it - * before returning. Used to avoid races in establishing new handles when - * importing an object from either an flink name or a dma-buf. + * This expects the &drm_device.object_name_lock to be held already and will + * drop it before returning. Used to avoid races in establishing new handles + * when importing an object from either an flink name or a dma-buf. * * Handles must be release again through drm_gem_handle_delete(). This is done * when userspace closes @file_priv for all attached handles, or through the @@ -447,8 +447,8 @@ EXPORT_SYMBOL(drm_gem_free_mmap_offset); * structures. * * This routine allocates and attaches a fake offset for @obj, in cases where - * the virtual size differs from the physical size (ie. obj->size). Otherwise - * just use drm_gem_create_mmap_offset(). + * the virtual size differs from the physical size (ie. &drm_gem_object.size). + * Otherwise just use drm_gem_create_mmap_offset(). * * This function is idempotent and handles an already allocated mmap offset * transparently. Drivers do not need to check for this case. @@ -787,7 +787,7 @@ EXPORT_SYMBOL(drm_gem_object_release); * @kref: kref of the object to free * * Called after the last reference to the object has been lost. - * Must be called holding &drm_device->struct_mutex. + * Must be called holding &drm_device.struct_mutex. * * Frees the object */ @@ -813,7 +813,7 @@ EXPORT_SYMBOL(drm_gem_object_free); * @obj: GEM buffer object * * This releases a reference to @obj. Callers must not hold the - * dev->struct_mutex lock when calling this function. + * &drm_device.struct_mutex lock when calling this function. * * See also __drm_gem_object_unreference(). */ @@ -840,9 +840,9 @@ EXPORT_SYMBOL(drm_gem_object_unreference_unlocked); * drm_gem_object_unreference - release a GEM BO reference * @obj: GEM buffer object * - * This releases a reference to @obj. Callers must hold the dev->struct_mutex - * lock when calling this function, even when the driver doesn't use - * dev->struct_mutex for anything. + * This releases a reference to @obj. Callers must hold the + * &drm_device.struct_mutex lock when calling this function, even when the + * driver doesn't use &drm_device.struct_mutex for anything. * * For drivers not encumbered with legacy locking use * drm_gem_object_unreference_unlocked() instead. diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c index 229b3f525dee..e51876e588d6 100644 --- a/drivers/gpu/drm/drm_mm.c +++ b/drivers/gpu/drm/drm_mm.c @@ -552,8 +552,8 @@ EXPORT_SYMBOL(drm_mm_replace_node); * objects to the roster, probably by walking an LRU list, but this can be * freely implemented. Eviction candiates are added using * drm_mm_scan_add_block() until a suitable hole is found or there are no - * further evictable objects. Eviction roster metadata is tracked in struct - * &drm_mm_scan. + * further evictable objects. Eviction roster metadata is tracked in &struct + * drm_mm_scan. * * The driver must walk through all objects again in exactly the reverse * order to restore the allocator state. Note that while the allocator is used diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c index 8d77b2462594..485e558d6661 100644 --- a/drivers/gpu/drm/drm_prime.c +++ b/drivers/gpu/drm/drm_prime.c @@ -291,7 +291,7 @@ static void drm_gem_unmap_dma_buf(struct dma_buf_attachment *attach, * This wraps dma_buf_export() for use by generi
[Intel-gfx] [PATCH 15/17] drm/kms-core: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty even. It doesn't (yet) link to the member directly though, which would be really good for big structures or vfunc tables (where the per-member kerneldoc tends to be long). Also some minor drive-by polish where it makes sense, I read a lot of docs ... Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_atomic.c| 71 ++--- drivers/gpu/drm/drm_blend.c | 11 +++--- drivers/gpu/drm/drm_connector.c | 12 +++ drivers/gpu/drm/drm_crtc.c | 7 ++-- drivers/gpu/drm/drm_dumb_buffers.c | 4 +-- drivers/gpu/drm/drm_encoder.c | 2 +- drivers/gpu/drm/drm_encoder_slave.c | 2 +- drivers/gpu/drm/drm_framebuffer.c | 10 +++--- drivers/gpu/drm/drm_modeset_lock.c | 10 +++--- drivers/gpu/drm/drm_plane.c | 2 +- drivers/gpu/drm/drm_property.c | 2 +- include/drm/drm_atomic.h| 6 ++-- include/drm/drm_color_mgmt.h| 2 +- include/drm/drm_connector.h | 40 ++--- include/drm/drm_crtc.h | 29 +++ include/drm/drm_framebuffer.h | 15 include/drm/drm_mode_config.h | 12 +++ include/drm/drm_mode_object.h | 13 --- include/drm/drm_modeset_lock.h | 2 +- include/drm/drm_plane.h | 18 +- include/drm/drm_property.h | 8 ++--- 21 files changed, 141 insertions(+), 137 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c index 681d5f97639d..eea7e15bb1cf 100644 --- a/drivers/gpu/drm/drm_atomic.c +++ b/drivers/gpu/drm/drm_atomic.c @@ -200,8 +200,8 @@ EXPORT_SYMBOL(drm_atomic_state_default_clear); * all locks. So someone else could sneak in and change the current modeset * configuration. Which means that all the state assembled in @state is no * longer an atomic update to the current state, but to some arbitrary earlier - * state. Which could break assumptions the driver's ->atomic_check likely - * relies on. + * state. Which could break assumptions the driver's + * &drm_mode_config_funcs.atomic_check likely relies on. * * Hence we must clear all cached state and completely start over, using this * function. @@ -461,11 +461,10 @@ drm_atomic_replace_property_blob_from_id(struct drm_crtc *crtc, * @property: the property to set * @val: the new property value * - * Use this instead of calling crtc->atomic_set_property directly. - * This function handles generic/core properties and calls out to - * driver's ->atomic_set_property() for driver properties. To ensure - * consistent behavior you must call this function rather than the - * driver hook directly. + * This function handles generic/core properties and calls out to driver's + * &drm_crtc_funcs.atomic_set_property for driver properties. To ensure + * consistent behavior you must call this function rather than the driver hook + * directly. * * RETURNS: * Zero on success, error code on failure @@ -537,10 +536,10 @@ EXPORT_SYMBOL(drm_atomic_crtc_set_property); * @property: the property to set * @val: return location for the property value * - * This function handles generic/core properties and calls out to - * driver's ->atomic_get_property() for driver properties. To ensure - * consistent behavior you must call this function rather than the - * driver hook directly. + * This function handles generic/core properties and calls out to driver's + * &drm_crtc_funcs.atomic_get_property for driver properties. To ensure + * consistent behavior you must call this function rather than the driver hook + * directly. * * RETURNS: * Zero on success, error code on failure @@ -721,11 +720,10 @@ EXPORT_SYMBOL(drm_atomic_get_plane_state); * @property: the property to set * @val: the new property value * - * Use this instead of calling plane->atomic_set_property directly. - * This function handles generic/core properties and calls out to - * driver's ->atomic_set_property() for driver properties. To ensure - * consistent behavior you must call this function rather than the - * driver hook directly. + * This function handles generic/core properties and calls out to driver's + * &drm_plane_funcs.atomic_set_property for driver properties. To ensure + * consistent behavior you must call this function rather than the driver hook + * directly. * * RETURNS: * Zero on success, error code on failure @@ -796,10 +794,10 @@ EXPORT_SYMBOL(drm_atomic_plane_set_property); * @property: the property to set * @val: return location for the property value * - * This function handles generic/core properties and calls out to - * driver's ->atomic_get_property() for driver properties. To ensure - * consistent behavior you must call this function rather than the - * driver hook directly. + * This function handles generic/core properties and calls out to driver's + * &drm_plane_funcs.atomic_get_property for drive
[Intel-gfx] [PATCH 12/17] drm/kms-helpers: Use recommened kerneldoc for struct member refs
I just learned that &struct_name.member_name works and looks pretty even. It doesn't (yet) link to the member directly though, which would be really good for big structures or vfunc tables (where the per-member kerneldoc tends to be long). Also some minor drive-by polish where it makes sense, I read a lot of docs ... Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- drivers/gpu/drm/drm_atomic_helper.c | 97 ++-- drivers/gpu/drm/drm_crtc_helper.c| 28 +++--- drivers/gpu/drm/drm_dp_helper.c | 2 +- drivers/gpu/drm/drm_fb_helper.c | 48 +- drivers/gpu/drm/drm_plane_helper.c | 9 +- drivers/gpu/drm/drm_probe_helper.c | 14 +-- include/drm/drm_atomic_helper.h | 13 +-- include/drm/drm_dp_mst_helper.h | 7 +- include/drm/drm_flip_work.h | 2 +- include/drm/drm_modeset_helper_vtables.h | 146 --- include/drm/drm_simple_kms_helper.h | 12 +-- 11 files changed, 197 insertions(+), 181 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index 5e5224460042..8ef1f5923468 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -458,22 +458,25 @@ mode_fixup(struct drm_atomic_state *state) * Check the state object to see if the requested state is physically possible. * This does all the crtc and connector related computations for an atomic * update and adds any additional connectors needed for full modesets and calls - * down into ->mode_fixup functions of the driver backend. - * - * crtc_state->mode_changed is set when the input mode is changed. - * crtc_state->connectors_changed is set when a connector is added or - * removed from the crtc. - * crtc_state->active_changed is set when crtc_state->active changes, - * which is used for dpms. + * down into &drm_crtc_helper_funcs.mode_fixup and + * &drm_encoder_helper_funcs.mode_fixup or + * &drm_encoder_helper_funcs.atomic_check functions of the driver backend. + * + * &drm_crtc_state.mode_changed is set when the input mode is changed. + * &drm_crtc_state.connectors_changed is set when a connector is added or + * removed from the crtc. &drm_crtc_state.active_changed is set when + * &drm_crtc_state.active changes, which is used for DPMS. * See also: drm_atomic_crtc_needs_modeset() * * IMPORTANT: * - * Drivers which set ->mode_changed (e.g. in their ->atomic_check hooks if a - * plane update can't be done without a full modeset) _must_ call this function - * afterwards after that change. It is permitted to call this function multiple - * times for the same update, e.g. when the ->atomic_check functions depend upon - * the adjusted dotclock for fifo space allocation and watermark computation. + * Drivers which set &drm_crtc_state.mode_changed (e.g. in their + * &drm_plane_helper_funcs.atomic_check hooks if a plane update can't be done + * without a full modeset) _must_ call this function afterwards after that + * change. It is permitted to call this function multiple times for the same + * update, e.g. when the &drm_crtc_helper_funcs.atomic_check functions depend + * upon the adjusted dotclock for fifo space allocation and watermark + * computation. * * RETURNS: * Zero for success or -errno @@ -584,9 +587,10 @@ EXPORT_SYMBOL(drm_atomic_helper_check_modeset); * * Check the state object to see if the requested state is physically possible. * This does all the plane update related checks using by calling into the - * ->atomic_check hooks provided by the driver. + * &drm_crtc_helper_funcs.atomic_check and &drm_plane_helper_funcs.atomic_check + * hooks provided by the driver. * - * It also sets crtc_state->planes_changed to indicate that a crtc has + * It also sets &drm_crtc_state.planes_changed to indicate that a crtc has * updated planes. * * RETURNS: @@ -648,14 +652,15 @@ EXPORT_SYMBOL(drm_atomic_helper_check_planes); * Check the state object to see if the requested state is physically possible. * Only crtcs and planes have check callbacks, so for any additional (global) * checking that a driver needs it can simply wrap that around this function. - * Drivers without such needs can directly use this as their ->atomic_check() - * callback. + * Drivers without such needs can directly use this as their + * &drm_mode_config_funcs.atomic_check callback. * * This just wraps the two parts of the state checking for planes and modeset * state in the default order: First it calls drm_atomic_helper_check_modeset() * and then drm_atomic_helper_check_planes(). The assumption is that the - * ->atomic_check functions depend upon an updated adjusted_mode.clock to - * e.g. properly compute watermarks. + * @drm_plane_helper_funcs.atomic_check and @drm_crtc_helper_funcs.atomic_check + * functions depend upon an updated adjusted_mode.clock to e.g. properly compute + * watermarks. * * RETURNS: *
[Intel-gfx] [PATCH 08/17] drm/doc: Update styleguide
The new cool is &struct foo (kernel-doc now copes with linebreaks), and structure members should be referenced using &foo.bar. Cc: Jani Nikula Cc: Chris Wilson Signed-off-by: Daniel Vetter --- Documentation/gpu/introduction.rst | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/Documentation/gpu/introduction.rst b/Documentation/gpu/introduction.rst index 6960e31f71e1..eb284eb748ba 100644 --- a/Documentation/gpu/introduction.rst +++ b/Documentation/gpu/introduction.rst @@ -23,13 +23,12 @@ For consistency this documentation uses American English. Abbreviations are written as all-uppercase, for example: DRM, KMS, IOCTL, CRTC, and so on. To aid in reading, documentations make full use of the markup characters kerneldoc provides: @parameter for function parameters, -@member for structure members, &structure to reference structures and -function() for functions. These all get automatically hyperlinked if -kerneldoc for the referenced objects exists. When referencing entries in -function vtables please use ->vfunc(). Note that kerneldoc does not -support referencing struct members directly, so please add a reference -to the vtable struct somewhere in the same paragraph or at least -section. +@member for structure members (within the same structure), &struct structure to +reference structures and function() for functions. These all get automatically +hyperlinked if kerneldoc for the referenced objects exists. When referencing +entries in function vtables (and structure members in general) please use +&vtable_name.vfunc. Unfortunately this does not yet yield a direct link to the +member, only the structure. Except in special situations (to separate locked from unlocked variants) locking requirements for functions aren't documented in the kerneldoc. -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/17] drm/docs: Small cleanup in drm-uapi.rst
== Series Details == Series: series starting with [01/17] drm/docs: Small cleanup in drm-uapi.rst URL : https://patchwork.freedesktop.org/series/17280/ State : failure == Summary == Series 17280v1 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/17280/revisions/1/mbox/ Test gem_busy: Subgroup basic-hang-default: pass -> FAIL (fi-hsw-4770r) Test kms_force_connector_basic: Subgroup force-connector-state: pass -> SKIP (fi-snb-2520m) Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:226 dwarn:0 dfail:0 fail:1 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest af82ef6 drm/core: Use recommened kerneldoc for struct member refs d634e8f drm/gem|prime|mm: Use recommened kerneldoc for struct member refs ff5204b drm/kms-core: Use recommened kerneldoc for struct member refs 9a415fa drm/cma-helpers: Use recommened kerneldoc for struct member refs e79e7b5 drm/bridge: Use recommened kerneldoc for struct member refs 8691c35 drm/kms-helpers: Use recommened kerneldoc for struct member refs 9b6a09f drm/cma-helper: simplify setup for drivers with ->dirty callbacks 3d08675 drm/atomic-helpers: Remove outdated comment f7bc5ea drm/rect: Fix formatting of example code a0cde21 drm/doc: Update styleguide c75289d drm: Nuke connector_list locking assert 97396f5 drm/doc: use preferred struct reference in kernel-doc c213cc7 dma-buf: Use recommended structure member reference f72696e dma-buf: use preferred struct reference in kernel-doc effd65b drm/mm: Some doc polish ad5c521 drm/doc: link style-guide to doc-guide 00dccc7 drm/docs: Small cleanup in drm-uapi.rst == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3404/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 07/17] drm: Nuke connector_list locking assert
On Thu, Dec 29, 2016 at 3:48 PM, Daniel Vetter wrote:
> I've forgotten to remove this when revamping the
> connector_list locking.
>
> Cc: seanp...@chromium.org
Reviewed-by: Sean Paul
> Signed-off-by: Daniel Vetter
> ---
> include/drm/drm_connector.h | 6 +-
> include/drm/drm_crtc.h | 14 --
> 2 files changed, 1 insertion(+), 19 deletions(-)
>
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index acb4241bff7d..d489cc003b7e 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -875,11 +875,7 @@ void drm_mode_put_tile_group(struct drm_device *dev,
> * deprecated. Use drm_for_each_connector_iter() instead.
> */
> #define drm_for_each_connector(connector, dev) \
> - for (assert_drm_connector_list_read_locked(&(dev)->mode_config),
> \
> -connector = list_first_entry(&(dev)->mode_config.connector_list,
> \
> - struct drm_connector, head);
> \
> -&connector->head != (&(dev)->mode_config.connector_list);
> \
> -connector = list_next_entry(connector, head))
> + list_for_each_entry(connector, &(dev)->mode_config.connector_list,
> head)
>
> /**
> * struct drm_connector_list_iter - connector_list iterator
> diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
> index 0b9ec7245c7e..c0817fa205d4 100644
> --- a/include/drm/drm_crtc.h
> +++ b/include/drm/drm_crtc.h
> @@ -835,18 +835,4 @@ static inline struct drm_crtc *drm_crtc_find(struct
> drm_device *dev,
> #define drm_for_each_crtc(crtc, dev) \
> list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
>
> -static inline void
> -assert_drm_connector_list_read_locked(struct drm_mode_config *mode_config)
> -{
> - /*
> -* The connector hotadd/remove code currently grabs both locks when
> -* updating lists. Hence readers need only hold either of them to be
> -* safe and the check amounts to
> -*
> -* WARN_ON(not_holding(A) && not_holding(B)).
> -*/
> - WARN_ON(!mutex_is_locked(&mode_config->mutex) &&
> - !drm_modeset_is_locked(&mode_config->connection_mutex));
> -}
> -
> #endif /* __DRM_CRTC_H__ */
> --
> 2.7.4
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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[Intel-gfx] [PATCH] drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder
From: Daniele Ceraolo Spurio
The mmio_start offset for the whitelist is the first FORCE_TO_NONPRIV
register the GuC can use to restore the provided whitelist when an
engine reset via GuC (which we still don't support) is triggered.
We're currently adding the mmio_base of the engine to the absolute
address of the RCS version of the register, which results in the wrong
offset. Fix it by using the definition we already have instead of
re-defining it in the GuC FW header.
Also add a comment to avoid future issues with FORCE_TO_NONPRIV
registers, which are also used by the workaround framework.
Compile tested only as my SKL died early this week.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Michal Wajdeczko
Cc: Arkadiusz Hiler
---
drivers/gpu/drm/i915/i915_guc_submission.c | 9 +++--
drivers/gpu/drm/i915/intel_guc_fwif.h | 1 -
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
b/drivers/gpu/drm/i915/i915_guc_submission.c
index 30e012b..7a1c6a0 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -1336,9 +1336,14 @@ static void guc_addon_create(struct intel_guc *guc)
for_each_engine(engine, dev_priv, id) {
reg_state->mmio_white_list[engine->guc_id].mmio_start =
- engine->mmio_base + GUC_MMIO_WHITE_LIST_START;
+
i915_mmio_reg_offset(RING_FORCE_TO_NONPRIV(engine->mmio_base, 0));
- /* Nothing to be saved or restored for now. */
+ /*
+* Nothing to be saved or restored for now.
+* XXX: when adding registers to the whitelist, make sure to not
+* conflict with what the workaround framework is doing with
+* the FORCE_TO_NONPRIV registers.
+*/
reg_state->mmio_white_list[engine->guc_id].count = 0;
}
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h
b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 3202b32..2841d59 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -371,7 +371,6 @@ struct guc_policies {
#define GUC_REGSET_SAVE_CURRENT_VALUE 0x10
#define GUC_REGSET_MAX_REGISTERS 25
-#define GUC_MMIO_WHITE_LIST_START 0x24d0
#define GUC_MMIO_WHITE_LIST_MAX12
#define GUC_S3_SAVE_SPACE_PAGES10
--
1.9.1
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Re: [Intel-gfx] [Mesa-dev] [PATCH 00/27] Renderbuffer Decompression (and GBM modifiers)
On 16-12-06 13:34:02, Paulo Zanoni wrote: 2016-12-01 20:09 GMT-02:00 Ben Widawsky : From: Ben Widawsky This patch series ultimately adds support within the i965 driver for Renderbuffer Decompression with GBM. In short, this feature reduces memory bandwidth by allowing the GPU to work with losslessly compressed data and having that compression scheme understood by the display engine for decompression. The display engine will decompress on the fly and scanout the image. Quoting from the final patch, the bandwidth savings on a SKL GT4 with a 19x10 display running kmscube: Without compression: Read bandwidth: 603.91 MiB/s Write bandwidth: 615.28 MiB/s With compression: Read bandwidth: 259.34 MiB/s Write bandwidth: 337.83 MiB/s The hardware achieves this savings by maintaining an auxiliary buffer containing "opaque" compression information. It's opaque in the sense that the low level compression scheme is not needed, but, knowledge of the overall layout of the compressed data is required. The auxiliary buffer is created by the driver on behalf of the client when requested. That buffer needs to be passed along wherever the main image's buffer goes. The overall strategy is that the buffer/surface is created with a list of modifiers. The list of modifiers the hardware is capable of using will come from a new kernel API that is aware of the hardware and general constraints. A client will request the list of modifiers and pass it directly back in during buffer creation (potentially the client can prune the list, but as of now there is no reason to.) This new API is being developed by Kristian. I did not get far enough to play with that. For EGL, a similar mechanism would exist whereby when importing a buffer into EGL, one would provide a modifier and probably a pointer to the auxiliary data upon import. (Import therefore might require multiple dma-buf fds), but for i965 and Intel, this wouldn't be necessary. Here is a brief description of the series: 1-6 Adds support in GBM for per plane functions where necessary. This is required because the kernel expects the auxiliary buffer to be passed along as a plane. It has its own offset, and stride, and the client shouldn't need to calculate those. 7-9 Adds support in GBM to understand modifiers. When creating a buffer or surface, the client is expected to pass in a list of modifiers that the driver will optimally choose from. As a result of this, the GBM APIs need to support modifiers. 10-12 Support Y-tiled modifier. Y-tiling was already a modifier exposed by the kernel. With the previous patches in place, it's easy to support this too. 13-26 Plumbing to support sending CCS buffers to display. Leveraging much of the existing code for MCS buffers, these patches creating an MCS for the scanout buffer. The trickery here is that a single BO contains both the main surface and the auxiliary data. Previously, auxiliary data always lived in its own BO. 27 Support CCS-modifier. Finally, the code can parse the CCS fb modifier(s) and realize the bandwidth savings that come with it. This was tested using kmscube (https://github.com/bwidawsk/kmscube/tree/modifiers). The kmscube implementation is missing support for GET_PLANE2 - which is currently being worked on by Kristian. Upstream plan: First of all, I'd like to point that I haven't really been following this feature closely, so maybe my questions are irrelevant to this series. But still, I feel I have to poitn these things since maybe they are relevant. Please tell me if I'm not talking about the same thing as you are. The main question is: where's the matching i915.ko series? Shouldn't that be step 0 in your upstream plan? Ville is working on it. All patches except the last can be merged without kernel support. That is assuming that we agree upon the general solution, using the modifiers and having both buffers be part of the same BO. There is also a requisite series from Kristian which will allow the client to query per plane modifiers. I do recall seeing BSpec text containing "do this thing if render decompression is enabled" and, at that time, our code wasn't implementing those instructions. AFAIU, the Kernel didn't really had support for render decompression, so its specific bits were just ignored. I was assuming that whoever implemented the feature would add all the necessary bits, especially since we didn't seem to have any sort of "if (has_render_decompression(dev_priv))" to call. I am 100% sure there's such an example in the Gen 9 Watermarks instructions, but I'm sure I saw more somewhere else (Display WA page?). And reember: missing watermarks workarounds equals flickering screens. Is this relevant to your series? How will Mesa be able to detect that the Kernel it's running on contains the necessary Render Decompression checks/WAs/code it needs? How can the Kernel detect that Render Decompression is in use and start doing the things it should do? Mesa doesn't need to detect
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder
== Series Details == Series: drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder URL : https://patchwork.freedesktop.org/series/17287/ State : success == Summary == Series 17287v1 drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder https://patchwork.freedesktop.org/api/1.0/series/17287/revisions/1/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest b0128ed drm/i915/guc: fix mmio whitelist mmio_start offset and add reminder == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3405/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 02/10] drm/i915/psr: program vsc header for psr2
Function hsw_psr_setup handles vsc header setup for psr1 and
skl_psr_setup_vsc handles vsc header setup for psr2.
Setup VSC header in function skl_psr_setup_vsc for psr2 support,
as per edp 1.4 spec, table 6-11:VSC SDP HEADER Extension for psr2
operation.
v2: (Jani)
- Initialize variables to 0
- intel_dp_get_y_cord_status and intel_dp_get_y_cord_status made static
- Correct indentation for continuation lines
- Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED
- Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX_*
- Change VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED to DP_VSC_*
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/intel_dp.c | 26 ++
drivers/gpu/drm/i915/intel_psr.c | 17 +++--
3 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1d8761c..4c7a088 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1233,6 +1233,8 @@ struct i915_psr {
bool psr2_support;
bool aux_frame_sync;
bool link_standby;
+ bool y_cord_support;
+ bool colorimetry_support;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index fb12896..da577c9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3042,6 +3042,24 @@ static void chv_dp_post_pll_disable(struct intel_encoder
*encoder,
DP_LINK_STATUS_SIZE) == DP_LINK_STATUS_SIZE;
}
+static bool intel_dp_get_y_cord_status(struct intel_dp *intel_dp)
+{
+ uint8_t psr_caps = 0;
+
+ drm_dp_dpcd_readb(&intel_dp->aux, DP_PSR_CAPS, &psr_caps);
+ return psr_caps & DP_PSR2_SU_Y_COORDINATE_REQUIRED;
+}
+
+static bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)
+{
+ uint8_t dprx = 0;
+
+ drm_dp_dpcd_readb(&intel_dp->aux,
+ DP_DPRX_FEATURE_ENUMERATION_LIST,
+ &dprx);
+ return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
+}
+
/* These are source-specific values. */
uint8_t
intel_dp_voltage_max(struct intel_dp *intel_dp)
@@ -3620,6 +3638,14 @@ void intel_dp_set_idle_link_train(struct intel_dp
*intel_dp)
dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync;
DRM_DEBUG_KMS("PSR2 %s on sink",
dev_priv->psr.psr2_support ? "supported" : "not
supported");
+
+ if (dev_priv->psr.psr2_support) {
+ dev_priv->psr.y_cord_support =
+ intel_dp_get_y_cord_status(intel_dp);
+ dev_priv->psr.colorimetry_support =
+ intel_dp_get_colorimetry_status(intel_dp);
+ }
+
}
/* Read the eDP Display control capabilities registers */
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 6aca8ff..c3aa649 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -122,13 +122,26 @@ static void vlv_psr_setup_vsc(struct intel_dp *intel_dp)
static void skl_psr_setup_su_vsc(struct intel_dp *intel_dp)
{
struct edp_vsc_psr psr_vsc;
+ struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = intel_dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
/* Prepare VSC Header for SU as per EDP 1.4 spec, Table 6.11 */
memset(&psr_vsc, 0, sizeof(psr_vsc));
psr_vsc.sdp_header.HB0 = 0;
psr_vsc.sdp_header.HB1 = 0x7;
- psr_vsc.sdp_header.HB2 = 0x3;
- psr_vsc.sdp_header.HB3 = 0xb;
+ if (dev_priv->psr.colorimetry_support &&
+ dev_priv->psr.y_cord_support) {
+ psr_vsc.sdp_header.HB2 = 0x5;
+ psr_vsc.sdp_header.HB3 = 0x13;
+ } else if (dev_priv->psr.y_cord_support) {
+ psr_vsc.sdp_header.HB2 = 0x4;
+ psr_vsc.sdp_header.HB3 = 0xe;
+ } else {
+ psr_vsc.sdp_header.HB2 = 0x3;
+ psr_vsc.sdp_header.HB3 = 0xc;
+ }
+
intel_psr_write_vsc(intel_dp, &psr_vsc);
}
--
1.9.1
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[Intel-gfx] [PATCH 06/10] drm/i915/psr: set CHICKEN_TRANS for psr2
As per bpsec, CHICKEN_TRANS_EDP bit 12 ,15
must be programmed.
Enable bit 12 for programmable header packet.
Enable bit 15 for Y cordinate support.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: vathsala nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_reg.h | 7 +++
drivers/gpu/drm/i915/intel_psr.c | 7 +++
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7830e6e..5ca506a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6449,6 +6449,13 @@ enum {
#define BDW_DPRS_MASK_VBLANK_SRD (1 << 0)
#define CHICKEN_PIPESL_1(pipe) _MMIO_PIPE(pipe, _CHICKEN_PIPESL_1_A,
_CHICKEN_PIPESL_1_B)
+#define CHICKEN_TRANS_A 0x420c0
+#define CHICKEN_TRANS_B 0x420c4
+#define CHICKEN_TRANS(trans) _MMIO_TRANS(trans, CHICKEN_TRANS_A,
CHICKEN_TRANS_B)
+#define TRANS_EDP 3
+#define CHICKEN_TRANS_BIT12(1<<12)
+#define CHICKEN_TRANS_BIT15(1<<15)
+
#define DISP_ARB_CTL _MMIO(0x45000)
#define DISP_FBC_MEMORY_WAKE (1<<31)
#define DISP_TILE_SURFACE_SWIZZLING (1<<13)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 494e4b2..2e75ef6 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -332,6 +332,7 @@ static void hsw_enable_source_psr2(struct intel_dp
*intel_dp)
*/
uint32_t idle_frames = max(6, dev_priv->vbt.psr.idle_frames);
uint32_t val = EDP_PSR_ENABLE;
+ uint32_t chicken_trans = 0;
val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;
@@ -349,6 +350,12 @@ static void hsw_enable_source_psr2(struct intel_dp
*intel_dp)
else
val |= EDP_PSR2_TP2_TIME_50;
+ /* Set CHICKEN_TRANS_BIT15 if Y coordinate is supported */
+ if (dev_priv->psr.y_cord_support)
+ chicken_trans = CHICKEN_TRANS_BIT15;
+ /* Set CHICKEN_TRANS_BIT12 for programable header */
+ chicken_trans = chicken_trans | CHICKEN_TRANS_BIT12;
+ I915_WRITE(CHICKEN_TRANS(TRANS_EDP), chicken_trans);
I915_WRITE(EDP_PSR2_CTL, val);
}
--
1.9.1
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[Intel-gfx] [PATCH 05/10] drm/i915/psr: enable ALPM for psr2
As per edp1.4 spec , alpm is required for psr2 operation as it's
used for all psr2 main link power down management and alpm enable
bit must be set for psr2 operation.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: vathsala nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_dp.c | 10 ++
drivers/gpu/drm/i915/intel_psr.c | 6 +-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4c7a088..a173e38 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1235,6 +1235,7 @@ struct i915_psr {
bool link_standby;
bool y_cord_support;
bool colorimetry_support;
+ bool alpm;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index da577c9..9b313a3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3060,6 +3060,14 @@ static bool intel_dp_get_colorimetry_status(struct
intel_dp *intel_dp)
return dprx & DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED;
}
+bool intel_dp_get_alpm_status(struct intel_dp *intel_dp)
+{
+ uint8_t alpm_caps = 0;
+
+ drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &alpm_caps);
+ return alpm_caps & DP_ALPM_CAP;
+}
+
/* These are source-specific values. */
uint8_t
intel_dp_voltage_max(struct intel_dp *intel_dp)
@@ -3644,6 +3652,8 @@ void intel_dp_set_idle_link_train(struct intel_dp
*intel_dp)
intel_dp_get_y_cord_status(intel_dp);
dev_priv->psr.colorimetry_support =
intel_dp_get_colorimetry_status(intel_dp);
+ dev_priv->psr.alpm =
+ intel_dp_get_alpm_status(intel_dp);
}
}
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 93eb0f0..494e4b2 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -209,7 +209,11 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
drm_dp_dpcd_writeb(&intel_dp->aux,
DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
DP_AUX_FRAME_SYNC_ENABLE);
-
+ /* Enable ALPM at sink for psr2 */
+ if (dev_priv->psr.psr2_support && dev_priv->psr.alpm)
+ drm_dp_dpcd_writeb(&intel_dp->aux,
+ DP_RECEIVER_ALPM_CONFIG,
+ DP_ALPM_ENABLE);
if (dev_priv->psr.link_standby)
drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
--
1.9.1
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[Intel-gfx] [PATCH 10/10] drm/i915/psr: EDP_PSR_PERF_CNT not valid for psr2
PSR1 and PSR2 enable sequence are mutually exclusive.
Register SRD_PERF_COUNT increments while system is in psr1.
This register is not valid for psr2.while in psr2,SRD_PERF_COUNT
is always 0.
Reporting psr perfcount from SRD_PERF_COUNT is not valid for psr2 case.
Also, if dc6 is disabled via kernel parameter i915.enable_dc=0,
EDP_PSR_PERF_CNT can be reported for SKL+ platforms for debug
purpose.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
---
drivers/gpu/drm/i915/i915_debugfs.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 55bcdd2..265474d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2539,6 +2539,7 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
u32 stat[3];
enum pipe pipe;
bool enabled = false;
+ bool dc6_enabled = false;
if (!HAS_PSR(dev_priv)) {
seq_puts(m, "PSR not supported\n");
@@ -2598,11 +2599,20 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
/*
* VLV/CHV PSR has no kind of performance counter
+* EDP_PSR_PERF_CNT is not valid for psr2.
* SKL+ Perf counter is reset to 0 everytime DC state is entered
+* if we want to read EDP_PSR_PERF_CNT for debug purpose on SKL+,
+* disable dc state in kernel parameter i915.enable_dc=0.
*/
- if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
+
+ dc6_enabled = ((I915_READ(DC_STATE_EN) &
+ DC_STATE_EN_UPTO_DC5_DC6_MASK) ==
+ DC_STATE_EN_UPTO_DC6);
+
+ if ((!dev_priv->psr.psr2_support && !dc6_enabled) ||
+IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
psrperf = I915_READ(EDP_PSR_PERF_CNT) &
- EDP_PSR_PERF_CNT_MASK;
+ EDP_PSR_PERF_CNT_MASK;
seq_printf(m, "Performance_Counter: %u\n", psrperf);
}
--
1.9.1
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[Intel-gfx] [PATCH 01/10] drm : adds Y-coordinate and Colorimetry Format
PSR2 vsc revision number hb2( as per table 6-11)is updated to 4 or 5 based on Y cordinate and Colorimetry Format as below 04h = 3D stereo + PSR/PSR2 + Y-coordinate. 05h = -3D stereo- + PSR/PSR2 + Y-coordinate + Pixel Encoding/Colorimetry Format indication. A DP Source device is allowed to indicate the pixel encoding/colorimetry format to the DP Sink device with VSC SDP only when the DP Sink device supports it ( i.e.,VSC_SDP_EXTENSION_FOR_COLORIMETRY_SUPPORTED bit in the DPRX_FEATURE_ENUMERATION_LIST register (DPCD Address 02210h, bit 3; is set to 1). v2: (Jani) - Change DP_PSR_Y_COORDINATE to DP_PSR2_SU_Y_COORDINATE_REQUIRED. - Add DP_PSR2_SU_GRANULARITY_REQUIRED. - Change DPRX_FEATURE_ENUMERATION_LIST to DP_DPRX. - Add GTC_CAP and AV_SYNC_CAP, other bits in DPRX_FEATURE_ENUMERATION_LIST. v3: (Jani) - Add support for bits 7:4 and 1 as per DP v1.4 for DPRX_FEATURE_ENUMERATION_LIST. Cc: Rodrigo Vivi Cc: Jim Bride Signed-off-by: Vathsala Nagaraju Signed-off-by: Patil Deepti --- include/drm/drm_dp_helper.h | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 55bbeb0..0468135 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h @@ -194,7 +194,8 @@ # define DP_PSR_SETUP_TIME_0(6 << 1) # define DP_PSR_SETUP_TIME_MASK (7 << 1) # define DP_PSR_SETUP_TIME_SHIFT1 - +# define DP_PSR2_SU_Y_COORDINATE_REQUIRED (1 << 4) /* eDP 1.4a */ +# define DP_PSR2_SU_GRANULARITY_REQUIRED(1 << 5) /* eDP 1.4b */ /* * 0x80-0x8f describe downstream port capabilities, but there are two layouts * based on whether DP_DETAILED_CAP_INFO_AVAILABLE was set. If it was not, @@ -568,6 +569,16 @@ #define DP_RECEIVER_ALPM_STATUS0x200b /* eDP 1.4 */ # define DP_ALPM_LOCK_TIMEOUT_ERROR(1 << 0) +#define DP_DPRX_FEATURE_ENUMERATION_LIST0x2210 /* DP 1.3 */ +# define DP_GTC_CAP(1 << 0) /* DP 1.3 */ +# define DP_SST_SPLIT_SDP_CAP (1 << 1) /* DP 1.4 */ +# define DP_AV_SYNC_CAP(1 << 2) /* DP 1.3 */ +# define DP_VSC_SDP_EXT_FOR_COLORIMETRY_SUPPORTED (1 << 3) /* DP 1.3 */ +# define DP_VSC_EXT_VESA_SDP_SUPPORTED (1 << 4) /* DP 1.4 */ +# define DP_VSC_EXT_VESA_SDP_CHAINING_SUPPORTED(1 << 5) /* DP 1.4 */ +# define DP_VSC_EXT_CEA_SDP_SUPPORTED (1 << 6) /* DP 1.4 */ +# define DP_VSC_EXT_CEA_SDP_CHAINING_SUPPORTED (1 << 7) /* DP 1.4 */ + /* DP 1.2 Sideband message defines */ /* peer device type - DP 1.2a Table 2-92 */ #define DP_PEER_DEVICE_NONE0x0 -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 00/10] enable psr2 for idle_screen on y-cordinate panel
This series enables psr2 on idle on screen for y cordinate panel. Code is tested on sharp 32X18 edp 1.4 y cordinate enabled panel. if system enters psr2, the system must go to deep sleep state. Can be verifed by checking psr2_status register bit 31:28. DEEP_SLEEP[value 8] must be entered while in idle on screen with psr2 panel. PSR1 and PSR2 are mutually exclusive. In the current code, when PSR2 is enabled , psr1 is also enabled, and for psr2 the status is read from psr1 registers, leading to blank screen. 1-3: Fixes vsc header programming for psr2 as per edp1.4 a table 6-11 and blank screen issue for psr2 panel. 4-5: Enables alpm and disables aux frame sync , need for psr2. 6-7: Progarms CHICKEN_TRANS and PSR_MASK for deep sleep state, as per bspec 8: Psr2 is enabled only for y cordinate enabled psr2 panel. this restriction will be removed after adding gtc support. 9-10: Adds debug support for psr2.It also enables reading of EDP_PSR_PERF_CNT on skl+ platforms, when dc6 is disabled through kernel parameter i915.enable_dc=0 Vathsala Nagaraju (10): drm : adds Y-coordinate and Colorimetry Format drm/i915/psr: program vsc header for psr2 drm/i915/psr: fix blank screen issue for psr2 drm/i915/psr: disable aux_frame_sync on psr2 exit drm/i915/psr: enable ALPM for psr2 drm/i915/psr: set CHICKEN_TRANS for psr2 drm/i915/psr: set PSR_MASK bits for deep sleep drm/i915/psr: enable psr2 for y cordinate panels drm/i915/psr: report live PSR2 State drm/i915/psr: EDP_PSR_PERF_CNT not valid for psr2 drivers/gpu/drm/i915/i915_debugfs.c | 38 ++- drivers/gpu/drm/i915/i915_drv.h | 3 + drivers/gpu/drm/i915/i915_reg.h | 19 drivers/gpu/drm/i915/intel_dp.c | 35 +++ drivers/gpu/drm/i915/intel_psr.c| 199 include/drm/drm_dp_helper.h | 13 ++- 6 files changed, 263 insertions(+), 44 deletions(-) -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 03/10] drm/i915/psr: fix blank screen issue for psr2
Psr1 and psr2 are mutually exclusive,ie when psr2 is enabled,
psr1 should be disabled.When psr2 is exited , bit 31 of reg
PSR2_CTL must be set to 0 but currently bit 31 of SRD_CTL
(psr1 control register)is set to 0.
Also ,PSR2_IDLE state is looked up from SRD_STATUS(psr1 register)
instead of PSR2_STATUS register, which has wrong data, resulting
in blankscreen.
hsw_enable_source is split into hsw_enable_source_psr1 and
hsw_enable_source_psr2 for easier code review and maintenance,
as suggested by rodrigo and jim.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_reg.h | 3 +
drivers/gpu/drm/i915/intel_psr.c | 124 +--
2 files changed, 97 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 00970aa..7830e6e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3615,6 +3615,9 @@ enum {
#define EDP_PSR2_FRAME_BEFORE_SU_MASK(0xf<<4)
#define EDP_PSR2_IDLE_MASK 0xf
+#define EDP_PSR2_STATUS_CTL_MMIO(0x6f940)
+#define EDP_PSR2_STATUS_STATE_MASK (0xf<<28)
+
/* VGA port control */
#define ADPA _MMIO(0x61100)
#define PCH_ADPA_MMIO(0xe1100)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index c3aa649..ff2ecfd 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -261,12 +261,11 @@ static void vlv_psr_activate(struct intel_dp *intel_dp)
VLV_EDP_PSR_ACTIVE_ENTRY);
}
-static void hsw_psr_enable_source(struct intel_dp *intel_dp)
+static void hsw_enable_source_psr1(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
struct drm_device *dev = dig_port->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
-
uint32_t max_sleep_time = 0x1f;
/*
* Let's respect VBT in case VBT asks a higher idle_frame value.
@@ -312,14 +311,30 @@ static void hsw_psr_enable_source(struct intel_dp
*intel_dp)
val |= EDP_PSR_TP1_TP2_SEL;
I915_WRITE(EDP_PSR_CTL, val);
+}
- if (!dev_priv->psr.psr2_support)
- return;
+static void hsw_enable_source_psr2(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+
+ /*
+* Let's respect VBT in case VBT asks a higher idle_frame value.
+* Let's use 6 as the minimum to cover all known cases including
+* the off-by-one issue that HW has in some cases. Also there are
+* cases where sink should be able to train
+* with the 5 or 6 idle patterns.
+*/
+ uint32_t idle_frames = max(6, dev_priv->vbt.psr.idle_frames);
+ uint32_t val = EDP_PSR_ENABLE;
+
+ val |= idle_frames << EDP_PSR_IDLE_FRAME_SHIFT;
/* FIXME: selective update is probably totally broken because it doesn't
* mesh at all with our frontbuffer tracking. And the hw alone isn't
* good enough. */
- val = EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
+ val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
val |= EDP_PSR2_TP2_TIME_2500;
@@ -333,6 +348,20 @@ static void hsw_psr_enable_source(struct intel_dp
*intel_dp)
I915_WRITE(EDP_PSR2_CTL, val);
}
+
+static void hsw_psr_enable_source(struct intel_dp *intel_dp)
+{
+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
+ struct drm_device *dev = dig_port->base.base.dev;
+ struct drm_i915_private *dev_priv = to_i915(dev);
+
+ /* psr1 and psr2 are mutually exclusive.*/
+ if (dev_priv->psr.psr2_support)
+ hsw_enable_source_psr2(intel_dp);
+ else
+ hsw_enable_source_psr1(intel_dp);
+}
+
static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
{
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -410,7 +439,10 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
struct drm_device *dev = intel_dig_port->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
+ if (dev_priv->psr.psr2_support)
+ WARN_ON(I915_READ(EDP_PSR2_CTL) & EDP_PSR2_ENABLE);
+ else
+ WARN_ON(I915_READ(EDP_PSR_CTL) & EDP_PSR_ENABLE);
WARN_ON(dev_priv->psr.active);
lockdep_assert_held(&dev_priv->psr.lock);
@@ -462,8 +494,6 @@ void intel_psr_enable(struct intel_dp *intel_dp)
dev_priv->psr.busy_frontbuffer_bits = 0;
if (HAS_DDI(dev_priv)) {
- hsw_psr_setup_vsc(intel_dp);
-
if (dev_priv->ps
[Intel-gfx] [PATCH 08/10] drm/i915/psr: enable psr2 for y cordinate panels
Psr2 is enabled only for y cordinate panels.Once GTC (global time code)
is implemented,this restriction is removed so that psr2
can work on panels without y cordinate support.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/intel_psr.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 19cd4d7..ca3ef3e 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -495,6 +495,15 @@ void intel_psr_enable(struct intel_dp *intel_dp)
return;
}
+ /*
+* FIXME:enable psr2 only for y-cordinate psr2 panels
+* After gtc implementation , remove this restriction.
+*/
+ if (!dev_priv->psr.y_cord_support && dev_priv->psr.psr2_support) {
+ DRM_DEBUG_KMS("PSR2 disabled, panel does not support Y
coordinate\n");
+ return;
+ }
+
mutex_lock(&dev_priv->psr.lock);
if (dev_priv->psr.enabled) {
DRM_DEBUG_KMS("PSR already in use\n");
--
1.9.1
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[Intel-gfx] [PATCH 04/10] drm/i915/psr: disable aux_frame_sync on psr2 exit
Screen freeze observed if AUX_FRAME_SYNC is not disabled
on psr2 exit.AUX_FRAME_SYNC needed for psr2 is enabled during
psr2 entry. It must be disabled on psr2 exit.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/intel_psr.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index ff2ecfd..93eb0f0 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -589,6 +589,11 @@ static void hsw_psr_disable(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = to_i915(dev);
if (dev_priv->psr.active) {
+ if (dev_priv->psr.aux_frame_sync)
+ drm_dp_dpcd_writeb(&intel_dp->aux,
+ DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
+ 0);
+
if (dev_priv->psr.psr2_support)
I915_WRITE(EDP_PSR2_CTL,
I915_READ(EDP_PSR2_CTL) &
@@ -729,6 +734,10 @@ static void intel_psr_exit(struct drm_i915_private
*dev_priv)
return;
if (HAS_DDI(dev_priv)) {
+ if (dev_priv->psr.aux_frame_sync)
+ drm_dp_dpcd_writeb(&intel_dp->aux,
+ DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF,
+ 0);
if (dev_priv->psr.psr2_support) {
val = I915_READ(EDP_PSR2_CTL);
WARN_ON(!(val & EDP_PSR2_ENABLE));
--
1.9.1
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[Intel-gfx] [PATCH 09/10] drm/i915/psr: report live PSR2 State
Reports live state of PSR2 form PSR2_STATUS register.
bit field 31:28 gives the live state of PSR2.
It can be used to check if system is in deep sleep,
selective update or selective update standby.
During video play back, we can use this to check
if system is entering SU mode or not.
when system is in idle state, DEEP_SLEEP(8) must be entered.
When video playback is happening, system must be in
SLEEP(3 / selective update) or SU_STANDBY( 6 / selective update standby)
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_debugfs.c | 24
drivers/gpu/drm/i915/i915_reg.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 655b671..55bcdd2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2606,6 +2606,30 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
seq_printf(m, "Performance_Counter: %u\n", psrperf);
}
+ if (dev_priv->psr.psr2_support) {
+ static const char * const live_status[] = {
+ "IDLE",
+ "CAPTURE",
+ "CAPTURE_Fs",
+ "SLEEP",
+ "BUFON_FW",
+ "ML_UP",
+ "SU_STANDBY",
+ "FAST_SLEEP",
+ "DEEP_SLEEP",
+ "BUF_ON",
+ "TG_ON" };
+ u8 pos = (I915_READ(EDP_PSR2_STATUS_CTL) &
+ EDP_PSR2_STATUS_STATE_MASK) >>
+ EDP_PSR2_STATUS_STATE_SHIFT;
+
+ seq_printf(m, "PSR2_STATUS_EDP: %x\n",
+ I915_READ(EDP_PSR2_STATUS_CTL));
+
+ if (pos <= EDP_PSR2_STATUS_TG_ON)
+ seq_printf(m, "PSR2 live state %s\n",
+ live_status[pos]);
+ }
mutex_unlock(&dev_priv->psr.lock);
intel_runtime_pm_put(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0cbe564..03a14d9 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3624,6 +3624,8 @@ enum {
#define EDP_PSR2_STATUS_CTL_MMIO(0x6f940)
#define EDP_PSR2_STATUS_STATE_MASK (0xf<<28)
+#define EDP_PSR2_STATUS_STATE_SHIFT28
+#define EDP_PSR2_STATUS_TG_ON 0xa
/* VGA port control */
#define ADPA _MMIO(0x61100)
--
1.9.1
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[Intel-gfx] [PATCH 07/10] drm/i915/psr: set PSR_MASK bits for deep sleep
Program EDP_PSR_DEBUG_CTL (PSR_MASK) to enable system
to go to deep sleep while in psr2.PSR2_STATUS bit 31:28
should report value 8 , if system enters deep sleep state.
Also, EDP_FRAMES_BEFORE_SU_ENTRY is set 1 , if not set,
flickering is observed on psr2 panel.
Cc: Rodrigo Vivi
Cc: Jim Bride
Signed-off-by: Vathsala Nagaraju
Signed-off-by: Patil Deepti
---
drivers/gpu/drm/i915/i915_reg.h | 7 +++
drivers/gpu/drm/i915/intel_dp.c | 1 -
drivers/gpu/drm/i915/intel_psr.c | 29 -
3 files changed, 27 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5ca506a..0cbe564 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3600,6 +3600,12 @@ enum {
#define EDP_PSR_DEBUG_MASK_LPSP (1<<27)
#define EDP_PSR_DEBUG_MASK_MEMUP (1<<26)
#define EDP_PSR_DEBUG_MASK_HPD (1<<25)
+#define EDP_PSR_DEBUG_MASK_MAX_SLEEP (1<<28)
+#define EDP_PSR_DEBUG_MASK_LPSP (1<<27)
+#define EDP_PSR_DEBUG_MASK_MEMUP (1<<26)
+#define EDP_PSR_DEBUG_MASK_HPD (1<<25)
+#define EDP_PSR_DEBUG_MASK_DISP_REG_WRITE(1<<16)
+#define EDP_PSR_DEBUG_EXIT_ON_PIXEL_UNDERRUN (1<<15)
#define EDP_PSR2_CTL _MMIO(0x6f900)
#define EDP_PSR2_ENABLE (1<<31)
@@ -3614,6 +3620,7 @@ enum {
#define EDP_PSR2_FRAME_BEFORE_SU_SHIFT 4
#define EDP_PSR2_FRAME_BEFORE_SU_MASK(0xf<<4)
#define EDP_PSR2_IDLE_MASK 0xf
+#define EDP_FRAMES_BEFORE_SU_ENTRY (1<<4)
#define EDP_PSR2_STATUS_CTL_MMIO(0x6f940)
#define EDP_PSR2_STATUS_STATE_MASK (0xf<<28)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 9b313a3..0a10858 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3655,7 +3655,6 @@ void intel_dp_set_idle_link_train(struct intel_dp
*intel_dp)
dev_priv->psr.alpm =
intel_dp_get_alpm_status(intel_dp);
}
-
}
/* Read the eDP Display control capabilities registers */
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 2e75ef6..19cd4d7 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -339,7 +339,9 @@ static void hsw_enable_source_psr2(struct intel_dp
*intel_dp)
/* FIXME: selective update is probably totally broken because it doesn't
* mesh at all with our frontbuffer tracking. And the hw alone isn't
* good enough. */
- val |= EDP_PSR2_ENABLE | EDP_SU_TRACK_ENABLE;
+ val |= EDP_PSR2_ENABLE |
+ EDP_SU_TRACK_ENABLE |
+ EDP_FRAMES_BEFORE_SU_ENTRY;
if (dev_priv->vbt.psr.tp2_tp3_wakeup_time > 5)
val |= EDP_PSR2_TP2_TIME_2500;
@@ -512,18 +514,27 @@ void intel_psr_enable(struct intel_dp *intel_dp)
dev_priv->psr.psr2_support = false;
else
skl_psr_setup_su_vsc(intel_dp);
+ I915_WRITE(EDP_PSR_DEBUG_CTL,
+ EDP_PSR_DEBUG_MASK_MEMUP |
+ EDP_PSR_DEBUG_MASK_HPD |
+ EDP_PSR_DEBUG_MASK_LPSP |
+ EDP_PSR_DEBUG_MASK_MAX_SLEEP |
+ EDP_PSR_DEBUG_MASK_DISP_REG_WRITE);
} else {
/* set up vsc header for psr1 */
hsw_psr_setup_vsc(intel_dp);
+ /*
+* Per Spec: Avoid continuous PSR exit by masking MEMUP
+* and HPD. also mask LPSP to avoid dependency on other
+* drivers that might block runtime_pm besides
+* preventing other hw tracking issues now we can rely
+* on frontbuffer tracking.
+*/
+ I915_WRITE(EDP_PSR_DEBUG_CTL,
+ EDP_PSR_DEBUG_MASK_MEMUP |
+ EDP_PSR_DEBUG_MASK_HPD |
+ EDP_PSR_DEBUG_MASK_LPSP);
}
- /*
-* Per Spec: Avoid continuous PSR exit by masking MEMUP and HPD.
-* Also mask LPSP to avoid dependency on other drivers that
-* might block runtime_pm besides preventing other hw tracking
-* issues now we can rely on frontbuffer tracking.
-*/
- I915_WRITE(EDP_PSR_DEBUG_CTL, EDP_PSR_DEBUG_MASK_MEMUP |
- EDP_PSR_DEBUG_MASK_HPD | EDP_PSR_DEBUG_MASK_LPSP);
/* Enable PSR on the panel */
hsw_psr_enable_sink(intel_dp);
--
1.9.1
_
[Intel-gfx] ✓ Fi.CI.BAT: success for enable psr2 for idle_screen on y-cordinate panel
== Series Details == Series: enable psr2 for idle_screen on y-cordinate panel URL : https://patchwork.freedesktop.org/series/17295/ State : success == Summary == Series 17295v1 enable psr2 for idle_screen on y-cordinate panel https://patchwork.freedesktop.org/api/1.0/series/17295/revisions/1/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest cd65d62 drm/i915/psr: EDP_PSR_PERF_CNT not valid for psr2 f5d6e10 drm/i915/psr: report live PSR2 State 05d57cd drm/i915/psr: enable psr2 for y cordinate panels 7d12fe8 drm/i915/psr: set PSR_MASK bits for deep sleep 02d656b drm/i915/psr: set CHICKEN_TRANS for psr2 ebbaa85 drm/i915/psr: enable ALPM for psr2 84a5810 drm/i915/psr: disable aux_frame_sync on psr2 exit a6e0842 drm/i915/psr: fix blank screen issue for psr2 7207dd4 drm/i915/psr: program vsc header for psr2 d096147 drm : adds Y-coordinate and Colorimetry Format == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3406/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/6] Introduce DP MST Topology state
Link bandwidth is shared between multiple display streams in DP MST configurations. The DP MST topology manager structure maintains the shared link bandwidth for a primary link directly connected to the GPU. For atomic modesetting drivers, checking if there is sufficient link bandwidth for a mode needs to be done during the atomic_check phase to avoid failed modesets. Using the new helpers is optional and the changes should not affect drivers that don't support atomic modesetting. Patches 1-3/6 include cleanups and refactoring. Patch 4/6 adds the MST topology state, 5/6 adds helpers to alter the state and 6/6 contains i915 changes to use the helpers . Dhinakaran Pandiyan (6): drm/dp: Store drm_device in MST topology manager drm/dp: Kill unused MST vcpi slot availability tracking drm/dp: Split drm_dp_mst_allocate_vcpi drm/dp: Introduce DP MST topology manager state to track DP link bw drm/dp: Add DP MST helpers to atomically find and release vcpi slots drm/i915/dp: Track available DP MST vcpi time slots drivers/gpu/drm/drm_atomic.c | 66 + drivers/gpu/drm/drm_atomic_helper.c| 10 drivers/gpu/drm/drm_dp_mst_topology.c | 89 ++ drivers/gpu/drm/i915/intel_display.c | 39 ++- drivers/gpu/drm/i915/intel_dp_mst.c| 42 ++-- drivers/gpu/drm/i915/intel_drv.h | 3 ++ drivers/gpu/drm/nouveau/nv50_display.c | 5 +- drivers/gpu/drm/radeon/radeon_dp_mst.c | 5 +- include/drm/drm_atomic.h | 11 + include/drm/drm_dp_mst_helper.h| 35 - 10 files changed, 263 insertions(+), 42 deletions(-) -- 2.7.4 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/6] drm/dp: Kill unused MST vcpi slot availability tracking
The avail_slots member in the MST topology manager is never updated to
reflect the available vcpi slots. The check is effectively against
total_slots. So, let's make that check obvious. Secondly, since the total
vcpi time slots is always 63 and does not depend on the link BW, remove
total_slots from MST topology manager struct. The third change is to
remove total_pbn which is hardcoded to 2560. The total PBN that the
topology manager allocates from depends on the link rate and is not a
constant. So, fix this by removing the total_pbn member itself.
Finally, make debug messages more informative.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_dp_mst_topology.c | 14 ++
include/drm/drm_dp_mst_helper.h | 12
2 files changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 122a1b0..5df00ae 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2042,10 +2042,6 @@ int drm_dp_mst_topology_mgr_set_mst(struct
drm_dp_mst_topology_mgr *mgr, bool ms
goto out_unlock;
}
- mgr->total_pbn = 2560;
- mgr->total_slots = DIV_ROUND_UP(mgr->total_pbn, mgr->pbn_div);
- mgr->avail_slots = mgr->total_slots;
-
/* add initial branch device at LCT 1 */
mstb = drm_dp_add_mst_branch_device(1, NULL);
if (mstb == NULL) {
@@ -2475,7 +2471,8 @@ int drm_dp_find_vcpi_slots(struct drm_dp_mst_topology_mgr
*mgr,
num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
- if (num_slots > mgr->avail_slots)
+ /* max. time slots - one slot for MTP header */
+ if (num_slots > 63)
return -ENOSPC;
return num_slots;
}
@@ -2489,7 +2486,8 @@ static int drm_dp_init_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
- if (num_slots > mgr->avail_slots)
+ /* max. time slots - one slot for MTP header */
+ if (num_slots > 63)
return -ENOSPC;
vcpi->pbn = pbn;
@@ -2528,10 +2526,10 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp
ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn);
if (ret) {
- DRM_DEBUG_KMS("failed to init vcpi %d %d %d\n",
DIV_ROUND_UP(pbn, mgr->pbn_div), mgr->avail_slots, ret);
+ DRM_DEBUG_KMS("failed to init vcpi slots=%d max=63 ret=%d\n",
DIV_ROUND_UP(pbn, mgr->pbn_div), ret);
goto out;
}
- DRM_DEBUG_KMS("initing vcpi for %d %d\n", pbn, port->vcpi.num_slots);
+ DRM_DEBUG_KMS("initing vcpi for pbn=%d slots=%d\n", pbn,
port->vcpi.num_slots);
*slots = port->vcpi.num_slots;
drm_dp_put_port(port);
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 27f3e99..b0f4a09 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -479,18 +479,6 @@ struct drm_dp_mst_topology_mgr {
* @pbn_div: PBN to slots divisor.
*/
int pbn_div;
- /**
-* @total_slots: Total slots that can be allocated.
-*/
- int total_slots;
- /**
-* @avail_slots: Still available slots that can be allocated.
-*/
- int avail_slots;
- /**
-* @total_pbn: Total PBN count.
-*/
- int total_pbn;
/**
* @qlock: protects @tx_msg_downq, the tx_slots in struct
--
2.7.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 6/6] drm/i915/dp: Track available DP MST vcpi time slots
Make use of the added MST helpers to find, allocate and release link bw
for atomic modesets.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_display.c | 39 +++-
drivers/gpu/drm/i915/intel_dp_mst.c | 36 -
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files changed, 76 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d8effd4..cefaee7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14109,6 +14109,40 @@ static int calc_watermark_data(struct drm_atomic_state
*state)
return 0;
}
+static int intel_mst_clear_config(struct drm_atomic_state *state)
+{
+ struct drm_crtc_state *crtc_state;
+ struct drm_crtc *crtc;
+ struct drm_connector *connector;
+ struct drm_connector_state *connector_state;
+ int i, j;
+
+ for_each_crtc_in_state(state, crtc, crtc_state, i) {
+ if (!crtc_state->active_changed || crtc_state->active)
+ continue;
+
+ for_each_connector_in_state(state, connector, connector_state,
j) {
+ struct intel_encoder *encoder;
+ struct drm_crtc *curr_crtc;
+ int slots;
+
+ encoder =
to_intel_encoder(connector->state->best_encoder);
+ if (encoder->type != INTEL_OUTPUT_DP_MST)
+ continue;
+
+ curr_crtc = connector->state->crtc;
+ if (curr_crtc && crtc == curr_crtc) {
+ slots =
to_intel_crtc_state(crtc->state)->dp_m_n.tu;
+ return intel_dp_mst_reset_vcpi(encoder,
+ connector_state,
+ slots);
+ }
+ }
+ }
+
+ return 0;
+}
+
/**
* intel_atomic_check - validate state object
* @dev: drm device
@@ -14179,8 +14213,11 @@ static int intel_atomic_check(struct drm_device *dev,
}
if (any_ms) {
- ret = intel_modeset_checks(state);
+ ret = intel_mst_clear_config(state);
+ if (ret)
+ return ret;
+ ret = intel_modeset_checks(state);
if (ret)
return ret;
} else {
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 02a1e2c..331909b 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -44,6 +44,7 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
int lane_count, slots;
const struct drm_display_mode *adjusted_mode =
&pipe_config->base.adjusted_mode;
int mst_pbn;
+ struct drm_dp_mst_topology_state *topology_state;
pipe_config->has_pch_encoder = false;
bpp = 24;
@@ -65,7 +66,18 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
pipe_config->pbn = mst_pbn;
- slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
+
+ topology_state = drm_atomic_get_mst_topology_state(state,
+ &intel_dp->mst_mgr);
+ if (topology_state == NULL)
+ return false;
+
+ slots = drm_dp_atomic_find_vcpi_slots(topology_state, connector->port,
+ mst_pbn);
+ if (slots < 0) {
+ DRM_DEBUG_KMS("not enough link bw for this mode\n");
+ return false;
+ }
intel_link_compute_m_n(bpp, lane_count,
adjusted_mode->crtc_clock,
@@ -78,6 +90,28 @@ static bool intel_dp_mst_compute_config(struct intel_encoder
*encoder,
}
+int intel_dp_mst_reset_vcpi(struct intel_encoder *encoder,
+struct drm_connector_state *conn_state, int slots)
+{
+ struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
+ struct drm_dp_mst_topology_mgr *mgr = &intel_mst->primary->dp.mst_mgr;
+ struct drm_dp_mst_topology_state *topology_state;
+ struct intel_connector *connector =
+ to_intel_connector(conn_state->connector);
+ int released;
+
+ topology_state = drm_atomic_get_mst_topology_state(conn_state->state,
mgr);
+ if (IS_ERR(topology_state))
+ return PTR_ERR(topology_state);
+
+ released = drm_dp_atomic_release_vcpi_slots(topology_state,
connector->port);
+
+ if (WARN_ON(released != slots))
+ return -EINVAL;
+
+ return 0;
+}
+
static void intel_mst_disable_dp(struct intel_encoder *encoder,
[Intel-gfx] [PATCH 1/6] drm/dp: Store drm_device in MST topology manager
struct drm_dp_mst_topology_mgr currently stores a pointer to struct dev.
Changing this to instead hold a pointer to drm_device is more useful as it
can give us access to DRM structures from the topology manager. This
also makes it consistent with other DRM structures like drm_crtc,
drm_connector etc.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_dp_mst_topology.c | 6 +++---
drivers/gpu/drm/i915/intel_dp_mst.c| 3 ++-
drivers/gpu/drm/nouveau/nv50_display.c | 2 +-
drivers/gpu/drm/radeon/radeon_dp_mst.c | 2 +-
include/drm/drm_dp_mst_helper.h| 7 +--
5 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index aa64448..122a1b0 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -1086,7 +1086,7 @@ static void build_mst_prop_path(const struct
drm_dp_mst_branch *mstb,
}
static void drm_dp_add_port(struct drm_dp_mst_branch *mstb,
- struct device *dev,
+ struct drm_device *dev,
struct drm_dp_link_addr_reply_port *port_msg)
{
struct drm_dp_mst_port *port;
@@ -1104,7 +1104,7 @@ static void drm_dp_add_port(struct drm_dp_mst_branch
*mstb,
port->port_num = port_msg->port_number;
port->mgr = mstb->mgr;
port->aux.name = "DPMST";
- port->aux.dev = dev;
+ port->aux.dev = dev->dev;
created = true;
} else {
old_pdt = port->pdt;
@@ -2949,7 +2949,7 @@ static void drm_dp_destroy_connector_work(struct
work_struct *work)
* Return 0 for success, or negative error code on failure
*/
int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr,
-struct device *dev, struct drm_dp_aux *aux,
+struct drm_device *dev, struct drm_dp_aux *aux,
int max_dpcd_transaction_bytes,
int max_payloads, int conn_base_id)
{
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 205fe47..38e3ca2 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -587,7 +587,8 @@ intel_dp_mst_encoder_init(struct intel_digital_port
*intel_dig_port, int conn_ba
/* create encoders */
intel_dp_create_fake_mst_encoders(intel_dig_port);
- ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev,
&intel_dp->aux, 16, 3, conn_base_id);
+ ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
+ &intel_dp->aux, 16, 3, conn_base_id);
if (ret) {
intel_dp->can_mst = false;
return ret;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c
b/drivers/gpu/drm/nouveau/nv50_display.c
index cb85cb7..452da48 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -3417,7 +3417,7 @@ nv50_mstm_new(struct nouveau_encoder *outp, struct
drm_dp_aux *aux, int aux_max,
mstm->outp = outp;
mstm->mgr.cbs = &nv50_mstm;
- ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev->dev, aux, aux_max,
+ ret = drm_dp_mst_topology_mgr_init(&mstm->mgr, dev, aux, aux_max,
max_payloads, conn_base_id);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c
b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index 6d1237d..7d5ada3 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -667,7 +667,7 @@ radeon_dp_mst_init(struct radeon_connector
*radeon_connector)
return 0;
radeon_connector->mst_mgr.cbs = &mst_cbs;
- return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr,
dev->dev,
+ return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev,
&radeon_connector->ddc_bus->aux,
16, 6,
radeon_connector->base.base.id);
}
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 0032076..27f3e99 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -414,7 +414,7 @@ struct drm_dp_mst_topology_mgr {
/**
* @dev: device pointer for adding i2c devices etc.
*/
- struct device *dev;
+ struct drm_device *dev;
/**
* @cbs: callbacks for connector addition and destruction.
*/
@@ -556,7 +556,10 @@ struct drm_dp_mst_topology_mgr {
struct work_struct destroy_connector_work;
};
-int drm_dp_mst_topology_mgr_init(struct drm_dp_mst_topology_mgr *mgr, struct
device *dev, struct drm_dp_aux *aux, int max_dpcd_transaction_bytes, int
max_payloads, int conn_base_id);
[Intel-gfx] [PATCH 4/6] drm/dp: Introduce DP MST topology manager state to track DP link bw
Link bandwidth is shared between multiple display streams in DP MST
configurations. The DP MST topology manager structure maintains the shared
link bandwidth for a primary link directly connected to the GPU. For atomic
modesetting drivers, checking if there is sufficient link bandwidth for a
mode needs to be done during the atomic_check phase to avoid failed
modesets. Let's encsapsulate the available link bw information in a state
structure so that bw can be allocated and released atomically for each of
the ports sharing the primary link.
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_atomic.c | 66 +++
drivers/gpu/drm/drm_atomic_helper.c | 10 ++
drivers/gpu/drm/drm_dp_mst_topology.c | 10 ++
include/drm/drm_atomic.h | 11 ++
include/drm/drm_dp_mst_helper.h | 13 +++
5 files changed, 110 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index b1b5401..5f2fc96 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -31,6 +31,7 @@
#include
#include
#include
+#include
#include
#include "drm_crtc_internal.h"
@@ -62,6 +63,7 @@ void drm_atomic_state_default_release(struct drm_atomic_state
*state)
kfree(state->connectors);
kfree(state->crtcs);
kfree(state->planes);
+ kfree(state->dp_mst_topologies);
}
EXPORT_SYMBOL(drm_atomic_state_default_release);
@@ -189,6 +191,18 @@ void drm_atomic_state_default_clear(struct
drm_atomic_state *state)
state->planes[i].ptr = NULL;
state->planes[i].state = NULL;
}
+
+ for (i = 0; i < state->num_mst_topologies; i++) {
+ struct drm_dp_mst_topology_mgr *mgr =
state->dp_mst_topologies[i].ptr;
+
+ if (!mgr)
+ continue;
+
+ kfree(state->dp_mst_topologies[i].state);
+ state->dp_mst_topologies[i].ptr = NULL;
+ state->dp_mst_topologies[i].state = NULL;
+ }
+
}
EXPORT_SYMBOL(drm_atomic_state_default_clear);
@@ -981,6 +995,58 @@ static void drm_atomic_plane_print_state(struct
drm_printer *p,
plane->funcs->atomic_print_state(p, state);
}
+struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct
drm_atomic_state *state,
+ struct drm_dp_mst_topology_mgr *mgr)
+{
+
+ int ret, i;
+ size_t new_size;
+ struct __drm_dp_mst_topology_state *new_arr;
+ struct drm_dp_mst_topology_state *new_mst_state;
+ int num_topologies;
+ struct drm_mode_config *config = &mgr->dev->mode_config;
+
+ WARN_ON(!state->acquire_ctx);
+
+ ret = drm_modeset_lock(&config->connection_mutex, state->acquire_ctx);
+ if (ret)
+ return ERR_PTR(ret);
+
+ for (i = 0; i < state->num_mst_topologies; i++) {
+ if (mgr == state->dp_mst_topologies[i].ptr &&
+ state->dp_mst_topologies[i].state) {
+ return state->dp_mst_topologies[i].state;
+ }
+ }
+
+ num_topologies = state->num_mst_topologies + 1;
+ new_size = sizeof(*state->dp_mst_topologies) * num_topologies;
+ new_arr = krealloc(state->dp_mst_topologies, new_size, GFP_KERNEL);
+ if (!new_arr)
+ return ERR_PTR(-ENOMEM);
+
+ state->dp_mst_topologies = new_arr;
+ memset(&state->dp_mst_topologies[state->num_mst_topologies], 0,
+ sizeof(*state->dp_mst_topologies));
+
+ new_mst_state = kmalloc(sizeof(*mgr->state), GFP_KERNEL);
+ if (!new_mst_state)
+ return ERR_PTR(-ENOMEM);
+
+ new_mst_state->avail_slots = mgr->state->avail_slots;
+ state->dp_mst_topologies[state->num_mst_topologies].state =
new_mst_state;
+ state->dp_mst_topologies[state->num_mst_topologies].ptr = mgr;
+ state->num_mst_topologies = num_topologies;
+ new_mst_state->mgr = mgr;
+ mgr->state->state = state;
+
+ DRM_DEBUG_ATOMIC("Added [MST Topology w/ base connector:%d] %p state to
%p\n",
+mgr->conn_base_id, new_mst_state, state);
+
+ return new_mst_state;
+}
+EXPORT_SYMBOL(drm_atomic_get_mst_topology_state);
+
/**
* drm_atomic_get_connector_state - get connector state
* @state: global atomic state object
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 799c156..0c0e497 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
#include
#include "drm_crtc_internal.h"
@@ -1992,6 +1993,15 @@ void drm_atomic_helper_swap_state(struct
drm_atomic_state *state,
connector->state->state = NULL;
}
+ for (i = 0; i < state->num_mst_topologies; i++) {
+ struct drm_dp_mst_topology_mgr *mgr;
+
+ mgr = state->dp_mst_topologies[i].pt
[Intel-gfx] [PATCH 3/6] drm/dp: Split drm_dp_mst_allocate_vcpi
drm_dp_mst_allocate_vcpi() apart from setting up the vcpi structure,
also finds if there are enough slots available. This check is a duplicate
of that implemented in drm_dp_mst_find_vcpi_slots(). Let's move this check
out and reuse the existing drm_dp_mst_find_vcpi_slots() function to check
if there are enough vcpi slots before allocating them.
This brings the check to one place. Additionally drivers that will use MST
state tracking for atomic modesets can uses the atomic version of
find_vcpi_slots() and reuse drm_dp_mst_allocate_vcpi()
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_dp_mst_topology.c | 20 +---
drivers/gpu/drm/i915/intel_dp_mst.c| 3 +--
drivers/gpu/drm/nouveau/nv50_display.c | 3 ++-
drivers/gpu/drm/radeon/radeon_dp_mst.c | 3 ++-
include/drm/drm_dp_mst_helper.h| 2 +-
5 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 5df00ae..d42a6c0 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2479,20 +2479,17 @@ int drm_dp_find_vcpi_slots(struct
drm_dp_mst_topology_mgr *mgr,
EXPORT_SYMBOL(drm_dp_find_vcpi_slots);
static int drm_dp_init_vcpi(struct drm_dp_mst_topology_mgr *mgr,
- struct drm_dp_vcpi *vcpi, int pbn)
+ struct drm_dp_vcpi *vcpi, int pbn, int slots)
{
- int num_slots;
int ret;
- num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
-
/* max. time slots - one slot for MTP header */
- if (num_slots > 63)
+ if (slots > 63)
return -ENOSPC;
vcpi->pbn = pbn;
- vcpi->aligned_pbn = num_slots * mgr->pbn_div;
- vcpi->num_slots = num_slots;
+ vcpi->aligned_pbn = slots * mgr->pbn_div;
+ vcpi->num_slots = slots;
ret = drm_dp_mst_assign_payload_id(mgr, vcpi);
if (ret < 0)
@@ -2507,7 +2504,7 @@ static int drm_dp_init_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
* @pbn: payload bandwidth number to request
* @slots: returned number of slots for this PBN.
*/
-bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct
drm_dp_mst_port *port, int pbn, int *slots)
+bool drm_dp_mst_allocate_vcpi(struct drm_dp_mst_topology_mgr *mgr, struct
drm_dp_mst_port *port, int pbn, int slots)
{
int ret;
@@ -2515,22 +2512,23 @@ bool drm_dp_mst_allocate_vcpi(struct
drm_dp_mst_topology_mgr *mgr, struct drm_dp
if (!port)
return false;
+ if (slots < 0)
+ return false;
+
if (port->vcpi.vcpi > 0) {
DRM_DEBUG_KMS("payload: vcpi %d already allocated for pbn %d -
requested pbn %d\n", port->vcpi.vcpi, port->vcpi.pbn, pbn);
if (pbn == port->vcpi.pbn) {
- *slots = port->vcpi.num_slots;
drm_dp_put_port(port);
return true;
}
}
- ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn);
+ ret = drm_dp_init_vcpi(mgr, &port->vcpi, pbn, slots);
if (ret) {
DRM_DEBUG_KMS("failed to init vcpi slots=%d max=63 ret=%d\n",
DIV_ROUND_UP(pbn, mgr->pbn_div), ret);
goto out;
}
DRM_DEBUG_KMS("initing vcpi for pbn=%d slots=%d\n", pbn,
port->vcpi.num_slots);
- *slots = port->vcpi.num_slots;
drm_dp_put_port(port);
return true;
diff --git a/drivers/gpu/drm/i915/intel_dp_mst.c
b/drivers/gpu/drm/i915/intel_dp_mst.c
index 38e3ca2..02a1e2c 100644
--- a/drivers/gpu/drm/i915/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/intel_dp_mst.c
@@ -147,7 +147,6 @@ static void intel_mst_pre_enable_dp(struct intel_encoder
*encoder,
to_intel_connector(conn_state->connector);
int ret;
uint32_t temp;
- int slots;
/* MST encoders are bound to a crtc, not to a connector,
* force the mapping here for get_hw_state.
@@ -177,7 +176,7 @@ static void intel_mst_pre_enable_dp(struct intel_encoder
*encoder,
ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
connector->port,
- pipe_config->pbn, &slots);
+ pipe_config->pbn,
pipe_config->dp_m_n.tu);
if (ret == false) {
DRM_ERROR("failed to allocate vcpi\n");
return;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c
b/drivers/gpu/drm/nouveau/nv50_display.c
index 452da48..9d4000e 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -2959,7 +2959,8 @@ nv50_msto_enable(struct drm_encoder *encoder)
if (WARN_ON(!mstc))
return;
- r = drm_dp_mst_allocate_vcpi(&mstm->mgr, mstc->port, mstc->pbn, &slots);
+ slots = drm_dp_mst_find_vcpi_slots(&mstm->mgr, mstc->pbn);
+ r = drm_dp_mst_allocate_vcpi(&ms
[Intel-gfx] [PATCH 5/6] drm/dp: Add DP MST helpers to atomically find and release vcpi slots
drm_dp_atomic_find_vcpi_slots() should be called from ->atomic_check() to
check there are sufficient vcpi slots for a mode and to add that to the
state. This should be followed by a call to drm_dp_mst_allocate_vcpi()
in ->atomic_commit() to initialize a struct vcpi for the port.
drm_dp_atomic_release_vcpi_slots() should be called from
->atomic_check() to release a port's vcpi slot allocation from the
state.
Drivers that do not make use of this atomic helper are expected to call
drm_dp_find_vcpi_slots() instead before calling
drm_dp_mst_allocate_vcpi().
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/drm_dp_mst_topology.c | 43 +++
include/drm/drm_dp_mst_helper.h | 5
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 1be19e1..737d61f 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -2501,6 +2501,49 @@ static int drm_dp_init_vcpi(struct
drm_dp_mst_topology_mgr *mgr,
}
/**
+ * drm_dp_atomic_release_vcpi_slots() - Release allocated vcpi slots from the
state
+ * @topology_state: MST topology state
+ * @port: port to release the vcpi slots for
+ */
+int drm_dp_atomic_release_vcpi_slots(struct drm_dp_mst_topology_state
*topology_state,
+struct drm_dp_mst_port *port)
+{
+ int alloc = drm_dp_mst_get_vcpi_slots(topology_state->mgr, port);
+
+ topology_state->avail_slots += alloc;
+ DRM_DEBUG_KMS("vcpi slots released=%d, avail=%d\n",
+ alloc, topology_state->avail_slots);
+ return alloc;
+}
+EXPORT_SYMBOL(drm_dp_atomic_release_vcpi_slots);
+
+/**
+ * drm_dp_atomic_find_vcpi_slots() - Find and add vcpi slots to the state
+ * @topology_state: MST topology state
+ * @port: port to find vcpi slots for
+ * @pbn: bandwidth required for the mode in PBN
+ */
+int drm_dp_atomic_find_vcpi_slots(struct drm_dp_mst_topology_state
*topology_state,
+ struct drm_dp_mst_port *port, int pbn)
+{
+ int num_slots, curr_alloc;
+ struct drm_dp_mst_topology_mgr *mgr = topology_state->mgr;
+
+ num_slots = DIV_ROUND_UP(pbn, mgr->pbn_div);
+ curr_alloc = drm_dp_mst_get_vcpi_slots(mgr, port);
+ DRM_DEBUG_KMS("vcpi slots new=%d, curr=%d, avail=%d\n",
+ num_slots, curr_alloc, topology_state->avail_slots);
+
+ if (num_slots - curr_alloc > topology_state->avail_slots)
+ return -ENOSPC;
+
+ topology_state->avail_slots -= (num_slots - curr_alloc);
+ DRM_DEBUG_KMS("vcpi slots avail=%d", topology_state->avail_slots);
+ return num_slots;
+}
+EXPORT_SYMBOL(drm_dp_atomic_find_vcpi_slots);
+
+/**
* drm_dp_mst_allocate_vcpi() - Allocate a virtual channel
* @mgr: manager for this port
* @port: port to allocate a virtual channel for.
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 0a9bf20..90395d8 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -609,4 +609,9 @@ void drm_dp_mst_topology_mgr_suspend(struct
drm_dp_mst_topology_mgr *mgr);
int drm_dp_mst_topology_mgr_resume(struct drm_dp_mst_topology_mgr *mgr);
struct drm_dp_mst_topology_state *drm_atomic_get_mst_topology_state(struct
drm_atomic_state *state,
struct drm_dp_mst_topology_mgr *mgr);
+int drm_dp_atomic_find_vcpi_slots(struct drm_dp_mst_topology_state
*topology_state,
+ struct drm_dp_mst_port *port, int pbn);
+int drm_dp_atomic_release_vcpi_slots(struct drm_dp_mst_topology_state
*topology_state,
+struct drm_dp_mst_port *port);
+
#endif
--
2.7.4
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[Intel-gfx] [PATCH v3] drm/i915/dp: Do not reset detect_done flag in intel_dp_detect
From: "Navare, Manasi D"
The detect_done flag was introduced in the 'commit 7d23e3c37bb3
("drm/i915: Cleaning up intel_dp_hpd_pulse")' in order to avoid multiple
detects on hotplug where intel_dp_long_pulse() was called from HPD handler
as well as intel_dp_detect(). Later, 'commit 1015811609c0
("drm/i915: Move long hpd handling into the hotplug work")' deferred long
hpd handling to hotplug work to avoid handling it twice. But, resetting the
flag after long hpd handling leads to the code being executed again during
mode enumeration.
So, do not reset the detect_done flag to False in intel_dp_detect(). The
flag is reset in intel_dp_hpd_pulse() to allow a full detect and set when
the hotplug work does a full DPCD detect. However if ->detect() gets called
during mode enumeration after a DPCD detect, return the cached connector
status.
Resetting the flag in the encoder's reset callback should take care of
hotplug between suspend/resume.
v2:
Allow full detect after encoder reset. (Ville)
Set the detect_done flag for connector disconnected case too. (DK)
Commit message changes.
Cc: sta...@vger.kernel.org
Cc: Ville Syrjala
Cc: Ander Conselvande Oliveira
Cc: Jani Nikula
Fixes: commit 7d23e3c37bb3 ("drm/i915: Cleaning up intel_dp_hpd_pulse")
Signed-off-by: Manasi Navare
Signed-off-by: Dhinakaran Pandiyan
---
drivers/gpu/drm/i915/intel_dp.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index fb12896..6732c17 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4516,7 +4516,6 @@ intel_dp_long_pulse(struct intel_connector
*intel_connector)
intel_dp_set_edid(intel_dp);
if (is_edp(intel_dp) || intel_connector->detect_edid)
status = connector_status_connected;
- intel_dp->detect_done = true;
/* Try to read the source of the interrupt */
if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
@@ -4551,10 +4550,10 @@ intel_dp_detect(struct drm_connector *connector, bool
force)
connector->base.id, connector->name);
/* If full detect is not performed yet, do a full detect */
- if (!intel_dp->detect_done)
+ if (!intel_dp->detect_done) {
+ intel_dp->detect_done = true;
status = intel_dp_long_pulse(intel_dp->attached_connector);
-
- intel_dp->detect_done = false;
+ }
return status;
}
@@ -4859,6 +4858,8 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
if (lspcon->active)
lspcon_resume(lspcon);
+ intel_dp->detect_done = false;
+
pps_lock(intel_dp);
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
--
2.7.4
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Re: [Intel-gfx] [PATCH 3/6] drm/dp: Split drm_dp_mst_allocate_vcpi
Hi Dhinakaran,
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v4.10-rc1 next-20161224]
[cannot apply to drm/drm-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Dhinakaran-Pandiyan/Introduce-DP-MST-Topology-state/20161230-151546
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x007-201652 (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/radeon/radeon_dp_mst.c: In function
'radeon_mst_encoder_dpms':
>> drivers/gpu/drm/radeon/radeon_dp_mst.c:456:11: error: implicit declaration
>> of function 'drm_dp_mst_find_vcpi_slots'
>> [-Werror=implicit-function-declaration]
slots = drm_dp_mst_find_vcpi_slots(&radeon_connector->mst_port->mst_mgr,
mst_enc->pbn);
^~
cc1: some warnings being treated as errors
vim +/drm_dp_mst_find_vcpi_slots +456 drivers/gpu/drm/radeon/radeon_dp_mst.c
450 atombios_set_mst_encoder_crtc_source(encoder,
mst_enc->fe);
451 }
452
453 DRM_DEBUG_KMS("dig encoder is %d %d %d\n",
dig_enc->dig_encoder,
454dig_enc->linkb, radeon_crtc->crtc_id);
455
> 456 slots =
> drm_dp_mst_find_vcpi_slots(&radeon_connector->mst_port->mst_mgr,
> mst_enc->pbn);
457 ret =
drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
458 radeon_connector->port,
459 mst_enc->pbn, slots);
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
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[Intel-gfx] ✓ Fi.CI.BAT: success for Introduce DP MST Topology state
== Series Details == Series: Introduce DP MST Topology state URL : https://patchwork.freedesktop.org/series/17303/ State : success == Summary == Series 17303v1 Introduce DP MST Topology state https://patchwork.freedesktop.org/api/1.0/series/17303/revisions/1/mbox/ Test pm_rpm: Subgroup basic-pci-d3-state: incomplete -> PASS (fi-byt-n2820) fi-bdw-5557u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14 fi-bsw-n3050 total:246 pass:207 dwarn:0 dfail:0 fail:0 skip:39 fi-bxt-j4205 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22 fi-bxt-t5700 total:82 pass:69 dwarn:0 dfail:0 fail:0 skip:12 fi-byt-j1900 total:246 pass:219 dwarn:0 dfail:0 fail:0 skip:27 fi-byt-n2820 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-hsw-4770 total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-hsw-4770r total:246 pass:227 dwarn:0 dfail:0 fail:0 skip:19 fi-ivb-3520m total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-ivb-3770 total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-kbl-7500u total:246 pass:225 dwarn:0 dfail:0 fail:0 skip:21 fi-skl-6260u total:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-skl-6700hqtotal:246 pass:226 dwarn:0 dfail:0 fail:0 skip:20 fi-skl-6700k total:246 pass:222 dwarn:3 dfail:0 fail:0 skip:21 fi-skl-6770hqtotal:246 pass:233 dwarn:0 dfail:0 fail:0 skip:13 fi-snb-2520m total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31 fi-snb-2600 total:246 pass:214 dwarn:0 dfail:0 fail:0 skip:32 584adc8f6687d7f6832ce060c3f6022282119f18 drm-tip: 2016y-12m-28d-13h-55m-14s UTC integration manifest 257b66d drm/i915/dp: Track available DP MST vcpi time slots c3eeaba drm/dp: Add DP MST helpers to atomically find and release vcpi slots 6911228 drm/dp: Introduce DP MST topology manager state to track DP link bw 922eb1b drm/dp: Split drm_dp_mst_allocate_vcpi 0d48ef4 drm/dp: Kill unused MST vcpi slot availability tracking e7ee031 drm/dp: Store drm_device in MST topology manager == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3407/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
