[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Convert connector properties to atomic. (rev6)
== Series Details == Series: drm/i915: Convert connector properties to atomic. (rev6) URL : https://patchwork.freedesktop.org/series/22634/ State : warning == Summary == Series 22634v6 drm/i915: Convert connector properties to atomic. https://patchwork.freedesktop.org/api/1.0/series/22634/revisions/6/mbox/ Test drv_module_reload: Subgroup basic-reload: pass -> DMESG-WARN (fi-kbl-7560u) pass -> DMESG-WARN (fi-ivb-3520m) pass -> DMESG-WARN (fi-skl-6700hq) pass -> DMESG-WARN (fi-snb-2520m) Subgroup basic-reload-final: pass -> DMESG-WARN (fi-kbl-7560u) pass -> DMESG-WARN (fi-ivb-3520m) pass -> DMESG-WARN (fi-skl-6700hq) pass -> DMESG-WARN (fi-snb-2520m) Subgroup basic-reload-inject: pass -> DMESG-WARN (fi-kbl-7560u) pass -> DMESG-WARN (fi-ivb-3520m) pass -> DMESG-WARN (fi-skl-6700hq) pass -> DMESG-WARN (fi-snb-2520m) Test gem_exec_suspend: Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-kbl-7560u) fdo#100125 fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:425s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:428s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:577s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:508s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:481s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:485s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:407s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:407s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:414s fi-ivb-3520m total:278 pass:257 dwarn:3 dfail:0 fail:0 skip:18 time:490s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:467s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:455s fi-kbl-7560u total:278 pass:264 dwarn:4 dfail:0 fail:0 skip:10 time:566s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:457s fi-skl-6700hqtotal:278 pass:258 dwarn:3 dfail:0 fail:0 skip:17 time:567s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:465s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:496s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:427s fi-snb-2520m total:278 pass:247 dwarn:3 dfail:0 fail:0 skip:28 time:529s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time:396s 7ffb3045557cbc7b49695b20416351e4e812179c drm-tip: 2017y-04m-25d-14h-42m-59s UTC integration manifest c8f5abe drm/i915: Convert intel_sdvo connector properties to atomic. a4be5dc drm/i915: Handle force_audio correctly in intel_sdvo a9820ea drm/i915: Convert intel_hdmi connector properties to atomic 194eb6f drm/i915: Convert intel_dp properties to atomic, v2. a2f3fb7 drm/i915: Make intel_dp->has_audio reflect hw state only 2daa751 drm/i915: Convert LVDS connector properties to atomic. d17be70 drm/i915: Convert DSI connector properties to atomic. a1bcc1a drm/i915: Add plumbing for digital connector state, v3. 65520e9 drm/i915: Use per-connector scaling mode property 5c8606a drm/core: Allow attaching custom scaling mode properties 13d6d3f drm/atomic: Handle aspect ratio and scaling mode in core, v3. == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4549/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 03/11] drm/i915: Stop pretending to mask/unmask LPE audio interrupts
On 4/25/17 3:27 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
vlv_display_irq_postinstall() enables the LPE audio interrupts
regardless of whether the LPE audio irq chip has masked/unmasked
them. Also the irqchip masking/unmasking doesn't consider the state
of the display power well or the device, and hence just leads to
dmesg spew when it tries to access the hardware while it's powered
down.
If the current way works, then we don't need to do anything in the
mask/unmask hooks. If it doesn't work, well, then we'd need to properly
track whether the irqchip has masked/unmasked the interrupts when
we enable display interrupts. And the mask/unmask hooks would need
to check whether display interrupts are even enabled before frobbing
with he registers.
So let's just assume the current way works and neuter the mask/unmask
hooks. Also clean up vlv_display_irq_postinstall() a bit and stop
it from trying to unmask/enable the LPE C interrupt on VLV since it
doesn't exist.
No objections, I assumed that we did want to update VLV_IMR and VLV_IIR
in the mask/unmask, that was the initial recommendation IIRC
There was also a comment where we removed all tests in
vlv_display_irq_postinstall:
>> + if (IS_LPE_AUDIO_ENABLED(dev_priv))
>> + if (IS_LPE_AUDIO_IRQ_VALID(dev_priv))
>
>I think both of these checks can be removed. We won't unmask the
>interrupts unless lpe is enabled, so the IIR bits will never be set in
>that case.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c| 15 ++
drivers/gpu/drm/i915/intel_lpe_audio.c | 36 --
2 files changed, 6 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index fd97fe00cd0d..190f6aa5d15e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2953,7 +2953,6 @@ static void vlv_display_irq_postinstall(struct
drm_i915_private *dev_priv)
u32 pipestat_mask;
u32 enable_mask;
enum pipe pipe;
- u32 val;
pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |
PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2964,18 +2963,16 @@ static void vlv_display_irq_postinstall(struct
drm_i915_private *dev_priv)
enable_mask = I915_DISPLAY_PORT_INTERRUPT |
I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ I915_LPE_PIPE_A_INTERRUPT |
+ I915_LPE_PIPE_B_INTERRUPT;
+
if (IS_CHERRYVIEW(dev_priv))
- enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT;
+ enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT |
+ I915_LPE_PIPE_C_INTERRUPT;
WARN_ON(dev_priv->irq_mask != ~0);
- val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT |
- I915_LPE_PIPE_C_INTERRUPT);
-
- enable_mask |= val;
-
dev_priv->irq_mask = ~enable_mask;
GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask);
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 668f00480d97..292fedf30b00 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -149,44 +149,10 @@ static void lpe_audio_platdev_destroy(struct
drm_i915_private *dev_priv)
static void lpe_audio_irq_unmask(struct irq_data *d)
{
- struct drm_i915_private *dev_priv = d->chip_data;
- unsigned long irqflags;
- u32 val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT);
-
- if (IS_CHERRYVIEW(dev_priv))
- val |= I915_LPE_PIPE_C_INTERRUPT;
-
- spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
- dev_priv->irq_mask &= ~val;
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IMR, dev_priv->irq_mask);
- POSTING_READ(VLV_IMR);
-
- spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
}
static void lpe_audio_irq_mask(struct irq_data *d)
{
- struct drm_i915_private *dev_priv = d->chip_data;
- unsigned long irqflags;
- u32 val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT);
-
- if (IS_CHERRYVIEW(dev_priv))
- val |= I915_LPE_PIPE_C_INTERRUPT;
-
- spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
- dev_priv->irq_mask |= val;
- I915_WRITE(VLV_IMR, dev_priv->irq_mask);
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IIR, val);
- POSTING_READ(VLV_IIR);
-
- spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
}
static struct irq_chip lpe_audio_irqchip = {
@@ -330,8 +296,6 @@ void intel_lpe_audio_teardown(struct drm_i915_private
*dev_priv)
desc = irq_to_desc(dev_priv->lpe_audio.irq);
-
Re: [Intel-gfx] [alsa-devel] [PATCH 05/11] drm/i915: Replace tmds_clock_speed and link_rate with just ls_clock
On 4/25/17 3:27 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
There's no need to distinguish between the DP link rate and HDMI TMDS
clock for the purposes of the LPE audio. Both are actually the same
thing more or less, which is the link symbol clock. So let's just
call the thing ls_clock and simplify the code.
there are still occurences of 'tmds' in sound/x86 and there are are
couple of debug messages that don't make sense any longer.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
drivers/gpu/drm/i915/intel_audio.c | 19 ---
drivers/gpu/drm/i915/intel_lpe_audio.c | 14 ++
include/drm/intel_lpe_audio.h | 3 +--
sound/x86/intel_hdmi_audio.c | 11 ---
5 files changed, 21 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 357b6c6c2f04..876eee56a958 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3721,8 +3721,8 @@ int intel_lpe_audio_init(struct drm_i915_private
*dev_priv);
void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);
void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv);
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int tmds_clk_speed,
- bool dp_output, int link_rate);
+ void *eld, int port, int pipe, int ls_clock,
+ bool dp_output);
/* intel_i2c.c */
extern int intel_setup_gmbus(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_audio.c
b/drivers/gpu/drm/i915/intel_audio.c
index 52c207e81f41..79eeef25321f 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -632,20 +632,9 @@ void intel_audio_codec_enable(struct intel_encoder
*intel_encoder,
(int) port, (int) pipe);
}
- switch (intel_encoder->type) {
- case INTEL_OUTPUT_HDMI:
- intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
- crtc_state->port_clock,
- false, 0);
- break;
- case INTEL_OUTPUT_DP:
- intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
- adjusted_mode->crtc_clock,
- true, crtc_state->port_clock);
- break;
- default:
- break;
- }
+ intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
+ crtc_state->port_clock,
+ intel_encoder->type == INTEL_OUTPUT_DP);
}
/**
@@ -680,7 +669,7 @@ void intel_audio_codec_disable(struct intel_encoder
*intel_encoder)
(int) port, (int) pipe);
}
- intel_lpe_audio_notify(dev_priv, NULL, port, pipe, 0, false, 0);
+ intel_lpe_audio_notify(dev_priv, NULL, port, pipe, 0, false);
}
/**
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 79b9dca985ff..5a1a37e963f1 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -309,13 +309,14 @@ void intel_lpe_audio_teardown(struct drm_i915_private
*dev_priv)
* @eld : ELD data
* @pipe: pipe id
* @port: port id
- * @tmds_clk_speed: tmds clock frequency in Hz
+ * @ls_clock: Link symbol clock in kHz
+ * @dp_output: Driving a DP output?
*
* Notify lpe audio driver of eld change.
*/
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int tmds_clk_speed,
- bool dp_output, int link_rate)
+ void *eld, int port, int pipe, int ls_clock,
+ bool dp_output)
{
unsigned long irq_flags;
struct intel_hdmi_lpe_audio_pdata *pdata = NULL;
@@ -337,12 +338,8 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
pdata->eld.port_id = port;
pdata->eld.pipe_id = pipe;
pdata->hdmi_connected = true;
-
+ pdata->ls_clock = ls_clock;
pdata->dp_output = dp_output;
- if (tmds_clk_speed)
- pdata->tmds_clock_speed = tmds_clk_speed;
- if (link_rate)
- pdata->link_rate = link_rate;
/* Unmute the amp for both DP and HDMI */
I915_WRITE(VLV_AUD_PORT_EN_DBG(port),
@@ -352,6 +349,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
memset(pdata->eld.eld_data, 0,
HDMI_MAX_ELD_BYTES);
pdata->hdmi_connected =
Re: [Intel-gfx] [alsa-devel] [PATCH 11/11] ALSA: x86: Register multiple PCM devices for the LPE audio card
On 04/25/2017 03:27 PM, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä
Now that everything is in place let's register a PCM device for
each pipe of the display engine. This will make it possible to
actually output audio to multiple displays at the same time. And
it avoids modesets on unrelated displays from clobbering up the
ELD and whatnot for the display currently doing the playback.
The alternative would be to have a PCM device per port, but per-pipe
is easier since the hardware actually works that way.
Very nice. I just tested on a CHT Zotac box which has two connectors (1
HDMI and 1 DP), and I get sound concurrently on both, with hdmi being
listed as device 2 and DP as device 0.
I thought there were hardware restrictions but you proved me wrong. Kudos.
The only point that I find weird is that the jacks are reported as 'on'
on the 3 pipes, is there a way to tie them to an actual cable being used?
[plb@ZOTAC ~]$ amixer -Dhw:0 controls | grep Jack
numid=5,iface=CARD,name='HDMI/DP,pcm=0 Jack'
numid=10,iface=CARD,name='HDMI/DP,pcm=1 Jack'
numid=15,iface=CARD,name='HDMI/DP,pcm=2 Jack'
[plb@ZOTAC ~]$ amixer -Dhw:0 cget numid=5
numid=5,iface=CARD,name='HDMI/DP,pcm=0 Jack'
; type=BOOLEAN,access=r---,values=1
: values=on
[plb@ZOTAC ~]$ amixer -Dhw:0 cset numid=5 off
amixer: Control hw:0 element write error: Operation not permitted
[plb@ZOTAC ~]$ amixer -Dhw:0 cget numid=10
numid=10,iface=CARD,name='HDMI/DP,pcm=1 Jack'
; type=BOOLEAN,access=r---,values=1
: values=on
[plb@ZOTAC ~]$ amixer -Dhw:0 cget numid=15
numid=15,iface=CARD,name='HDMI/DP,pcm=2 Jack'
; type=BOOLEAN,access=r---,values=1
: values=on
The ELD controls do show a null set of values for device 1, maybe the
jack value should be set in accordance with the ELD validity?
Also I am wondering if the display number could be used for the PCM
device number, or as a hint in the device description to help the user
know which PCM device to use.
Anyway thanks for this patchset, nicely done.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 14 -
include/drm/intel_lpe_audio.h | 6 ++--
sound/x86/intel_hdmi_audio.c | 53 +++---
sound/x86/intel_hdmi_audio.h | 3 +-
4 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index a593fdf73171..270aa3e3f0e2 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -111,6 +111,7 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
pinfo.size_data = sizeof(*pdata);
pinfo.dma_mask = DMA_BIT_MASK(32);
+ pdata->num_pipes = INTEL_INFO(dev_priv)->num_pipes;
spin_lock_init(&pdata->lpe_audio_slock);
platdev = platform_device_register_full(&pinfo);
@@ -318,7 +319,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
enum pipe pipe, enum port port,
const void *eld, int ls_clock, bool dp_output)
{
- unsigned long irq_flags;
+ unsigned long irqflags;
struct intel_hdmi_lpe_audio_pdata *pdata;
struct intel_hdmi_lpe_audio_pipe_pdata *ppdata;
u32 audio_enable;
@@ -327,14 +328,12 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
return;
pdata = dev_get_platdata(&dev_priv->lpe_audio.platdev->dev);
- ppdata = &pdata->pipe;
+ ppdata = &pdata->pipe[pipe];
- spin_lock_irqsave(&pdata->lpe_audio_slock, irq_flags);
+ spin_lock_irqsave(&pdata->lpe_audio_slock, irqflags);
audio_enable = I915_READ(VLV_AUD_PORT_EN_DBG(port));
- pdata->pipe_id = pipe;
-
if (eld != NULL) {
memcpy(ppdata->eld, eld, HDMI_MAX_ELD_BYTES);
ppdata->port = port;
@@ -356,8 +355,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
}
if (pdata->notify_audio_lpe)
- pdata->notify_audio_lpe(dev_priv->lpe_audio.platdev);
+ pdata->notify_audio_lpe(dev_priv->lpe_audio.platdev, pipe);
- spin_unlock_irqrestore(&pdata->lpe_audio_slock,
- irq_flags);
+ spin_unlock_irqrestore(&pdata->lpe_audio_slock, irqflags);
}
diff --git a/include/drm/intel_lpe_audio.h b/include/drm/intel_lpe_audio.h
index 26e569ad8683..b391b2822140 100644
--- a/include/drm/intel_lpe_audio.h
+++ b/include/drm/intel_lpe_audio.h
@@ -39,10 +39,10 @@ struct intel_hdmi_lpe_audio_pipe_pdata {
};
struct intel_hdmi_lpe_audio_pdata {
- struct intel_hdmi_lpe_audio_pipe_pdata pipe;
- int pipe_id;
+ struct intel_hdmi_lpe_audio_pipe_pdata pipe[3];
+ int num_pipes;
- void (*notify_audio_lpe)(struct platform_device *pdev);
+ void (*notify_audio_lpe)(struct platform_device *pdev, int pipe);
spinlock_t lpe_au
[Intel-gfx] [PATCH i-g-t 29/29] igt/perf: remove unused frequency functions
Now that we've found that frequency changes happen mostly outside of
our control and don't seem to be following our requests through sysfs,
let's drop a bunch code/variables.
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 83 +++-
1 file changed, 3 insertions(+), 80 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 3d033b3a..7088d723 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -259,12 +259,9 @@ static int card = -1;
static int n_eus;
static uint64_t test_metric_set_id = UINT64_MAX;
-static uint64_t gt_min_freq_mhz_saved = 0;
-static uint64_t gt_max_freq_mhz_saved = 0;
-static uint64_t gt_min_freq_mhz = 0;
-static uint64_t gt_max_freq_mhz = 0;
static uint64_t timestamp_frequency = 1250;
+static uint64_t gt_max_freq_mhz = 0;
static enum drm_i915_oa_format test_oa_format;
static bool *undefined_a_counters;
static uint64_t oa_exp_1_millisec;
@@ -377,16 +374,6 @@ sysfs_read(const char *file)
return read_u64_file(buf);
}
-static void
-sysfs_write(const char *file, uint64_t val)
-{
- char buf[512];
-
- snprintf(buf, sizeof(buf), "/sys/class/drm/card%d/%s", card, file);
-
- write_u64_file(buf, val);
-}
-
static char *
read_debugfs_record(int device, const char *file, const char *key)
{
@@ -1103,66 +1090,6 @@ init_sys_info(void)
return try_read_u64_file(buf, &test_metric_set_id);
}
-static void
-gt_frequency_range_save(void)
-{
- gt_min_freq_mhz_saved = sysfs_read("gt_min_freq_mhz");
- gt_max_freq_mhz_saved = sysfs_read("gt_boost_freq_mhz");
-
- gt_min_freq_mhz = gt_min_freq_mhz_saved;
- gt_max_freq_mhz = gt_max_freq_mhz_saved;
-}
-
-static void wait_freq_settle(void)
-{
- struct timespec ts;
-
- /* FIXME: Lazy sleep without check. */
- ts.tv_sec = 0;
- ts.tv_nsec = 2;
- clock_nanosleep(CLOCK_MONOTONIC, 0, &ts, NULL);
-}
-
-static void
-gt_frequency_pin(int gt_freq_mhz)
-{
- igt_debug("requesting pinned GT freq = %dmhz\n", gt_freq_mhz);
-
- if (gt_freq_mhz > gt_max_freq_mhz) {
- sysfs_write("gt_max_freq_mhz", gt_freq_mhz);
- sysfs_write("gt_min_freq_mhz", gt_freq_mhz);
- } else {
- sysfs_write("gt_min_freq_mhz", gt_freq_mhz);
- sysfs_write("gt_max_freq_mhz", gt_freq_mhz);
- }
- gt_min_freq_mhz = gt_freq_mhz;
- gt_max_freq_mhz = gt_freq_mhz;
-
- wait_freq_settle();
-}
-
-static void
-gt_frequency_range_restore(void)
-{
- igt_debug("restoring GT frequency range: min = %dmhz, max =%dmhz,
current: min=%dmhz, max=%dmhz\n",
- (int)gt_min_freq_mhz_saved,
- (int)gt_max_freq_mhz_saved,
- (int)gt_min_freq_mhz,
- (int)gt_max_freq_mhz);
-
- /* Assume current min/max are the same */
- if (gt_min_freq_mhz_saved > gt_max_freq_mhz) {
- sysfs_write("gt_max_freq_mhz", gt_max_freq_mhz_saved);
- sysfs_write("gt_min_freq_mhz", gt_min_freq_mhz_saved);
- } else {
- sysfs_write("gt_min_freq_mhz", gt_min_freq_mhz_saved);
- sysfs_write("gt_max_freq_mhz", gt_max_freq_mhz_saved);
- }
-
- gt_min_freq_mhz = gt_min_freq_mhz_saved;
- gt_max_freq_mhz = gt_max_freq_mhz_saved;
-}
-
static int
i915_read_reports_until_timestamp(enum drm_i915_oa_format oa_format,
uint8_t *buf,
@@ -2155,8 +2082,6 @@ test_oa_exponents(void)
igt_assert(n_time_delta_matches >= 9);
}
- gt_frequency_range_restore();
-
load_helper_stop();
load_helper_deinit();
}
@@ -4148,11 +4073,11 @@ igt_main
igt_require(init_sys_info());
- gt_frequency_range_save();
-
write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 10);
+ gt_max_freq_mhz = sysfs_read("gt_boost_freq_mhz");
+
render_copy = igt_get_render_copyfunc(devid);
igt_require_f(render_copy, "no render-copy function\n");
}
@@ -4235,8 +4160,6 @@ igt_main
write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 10);
write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
- gt_frequency_range_restore();
-
close(drm_fd);
}
}
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 24/29] igt/perf: fix rc6 test
From: Robert Bragg
When measuring that rc6 doesn't happen, we need to do so after opening
the OA stream.
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 887836e2..9fd40ff0 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -3444,12 +3444,13 @@ test_rc6_disable(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- uint64_t n_events_start = read_debugfs_u64_record(drm_fd,
"i915_drpc_info",
- "RC6 residency since
boot");
- uint64_t n_events_end;
+ uint64_t n_events_start, n_events_end;
stream_fd = __perf_open(drm_fd, ¶m);
+ n_events_start = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
+"RC6 residency since boot");
+
nanosleep(&(struct timespec){ .tv_sec = 0, .tv_nsec = 5 },
NULL);
n_events_end = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
@@ -3462,7 +3463,7 @@ test_rc6_disable(void)
n_events_start = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
- nanosleep(&(struct timespec){ .tv_sec = 0, .tv_nsec = 5 },
NULL);
+ nanosleep(&(struct timespec){ .tv_sec = 1, .tv_nsec = 0 }, NULL);
n_events_end = read_debugfs_u64_record(drm_fd, "i915_drpc_info",
"RC6 residency since boot");
--
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[Intel-gfx] [PATCH i-g-t 10/29] igt/perf: wrap emission of MI_REPORT_PERF_COUNT
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 44
1 file changed, 32 insertions(+), 12 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 600fa7d9..864c465c 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -43,6 +43,7 @@
IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming interface");
#define GEN6_MI_REPORT_PERF_COUNT ((0x28 << 23) | (3 - 2))
+#define GEN8_MI_REPORT_PERF_COUNT ((0x28 << 23) | (4 - 2))
#define GFX_OP_PIPE_CONTROL ((3 << 29) | (3 << 27) | (2 << 24))
#define PIPE_CONTROL_CS_STALL (1 << 20)
@@ -1949,6 +1950,32 @@ test_disabled_read_error(void)
}
static void
+emit_report_perf_count(struct intel_batchbuffer *batch,
+ drm_intel_bo *dst_bo,
+ int dst_offset,
+ uint32_t report_id)
+{
+ if (IS_HASWELL(devid)) {
+ BEGIN_BATCH(3, 1);
+ OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT);
+ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION,
+ dst_offset);
+ OUT_BATCH(report_id);
+ ADVANCE_BATCH();
+ } else {
+ /* XXX: NB: n dwords arg is actually magic since it internally
+* automatically accounts for larger addresses on gen >= 8...
+*/
+ BEGIN_BATCH(3, 1);
+ OUT_BATCH(GEN8_MI_REPORT_PERF_COUNT);
+ OUT_RELOC(dst_bo, I915_GEM_DOMAIN_INSTRUCTION,
I915_GEM_DOMAIN_INSTRUCTION,
+ dst_offset);
+ OUT_BATCH(report_id);
+ ADVANCE_BATCH();
+ }
+}
+
+static void
test_mi_rpc(void)
{
uint64_t properties[] = {
@@ -1991,12 +2018,10 @@ test_mi_rpc(void)
memset(bo->virtual, 0x80, 4096);
drm_intel_bo_unmap(bo);
- BEGIN_BATCH(3, 1);
- OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT);
- OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
- 0); /* offset in bytes */
- OUT_BATCH(0xdeadbeef); /* report ID */
- ADVANCE_BATCH();
+ emit_report_perf_count(batch,
+ bo, /* dst */
+ 0, /* dst offset in bytes */
+ 0xdeadbeef); /* report ID */
intel_batchbuffer_flush_with_context(batch, context);
@@ -2063,12 +2088,7 @@ emit_stall_timestamp_and_rpc(struct intel_batchbuffer
*batch,
OUT_BATCH(0); /* imm upper */
ADVANCE_BATCH();
- BEGIN_BATCH(3, 1);
- OUT_BATCH(GEN6_MI_REPORT_PERF_COUNT);
- OUT_RELOC(dst, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
- report_dst_offset);
- OUT_BATCH(report_id);
- ADVANCE_BATCH();
+ emit_report_perf_count(batch, dst, report_dst_offset, report_id);
}
/* Tests the INTEL_performance_query use case where an unprivileged process
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 27/29] igt/perf: make buffer-fill more reliable
Filling rate of the buffer must discard context switch reports as they
do not depend upon the periodicity, instead they're a factor on the
amount of different applications concurrently running on the system.
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 113 ++-
1 file changed, 96 insertions(+), 17 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 8639a5a2..6026811b 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -2702,22 +2702,29 @@ test_buffer_fill(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
+ struct drm_i915_perf_record_header *header;
int buf_size = 65536 * (256 + sizeof(struct
drm_i915_perf_record_header));
uint8_t *buf = malloc(buf_size);
+ int len;
size_t oa_buf_size = 16 * 1024 * 1024;
size_t report_size = oa_formats[test_oa_format].size;
int n_full_oa_reports = oa_buf_size / report_size;
uint64_t fill_duration = n_full_oa_reports * oa_period;
+ load_helper_init();
+ load_helper_run(HIGH);
+
igt_assert(fill_duration < 10);
stream_fd = __perf_open(drm_fd, ¶m);
for (int i = 0; i < 5; i++) {
- struct drm_i915_perf_record_header *header;
bool overflow_seen;
- int offset = 0;
- int len;
+ uint32_t n_periodic_reports;
+ uint32_t first_timestamp = 0, last_timestamp = 0;
+ uint32_t last_periodic_report[64];
+
+ do_ioctl(stream_fd, I915_PERF_IOCTL_ENABLE, 0);
nanosleep(&(struct timespec){ .tv_sec = 0,
.tv_nsec = fill_duration * 1.25 },
@@ -2729,7 +2736,7 @@ test_buffer_fill(void)
igt_assert_neq(len, -1);
overflow_seen = false;
- for (offset = 0; offset < len; offset += header->size) {
+ for (int offset = 0; offset < len; offset += header->size) {
header = (void *)(buf + offset);
if (header->type == DRM_I915_PERF_RECORD_OA_BUFFER_LOST)
@@ -2738,32 +2745,104 @@ test_buffer_fill(void)
igt_assert_eq(overflow_seen, true);
+ do_ioctl(stream_fd, I915_PERF_IOCTL_DISABLE, 0);
+
+ igt_debug("fill_duration = %luns, oa_exponent = %u\n",
+ fill_duration, oa_exponent);
+
+ do_ioctl(stream_fd, I915_PERF_IOCTL_ENABLE, 0);
+
nanosleep(&(struct timespec){ .tv_sec = 0,
- .tv_nsec = fill_duration / 2 },
- NULL);
+ .tv_nsec = fill_duration / 2 },
+ NULL);
- while ((len = read(stream_fd, buf, buf_size)) == -1 && errno ==
EINTR)
- ;
+ n_periodic_reports = 0;
- igt_assert_neq(len, -1);
+ /* Because of the race condition between notification of new
+* reports and reports landing in memory, we need to rely on
+* timestamps to figure whether we've read enough of them.
+*/
+ while (((last_timestamp - first_timestamp) *
oa_exponent_to_ns(oa_exponent)) <
+ (fill_duration / 2)) {
- igt_assert(len > report_size * n_full_oa_reports * 0.45);
- igt_assert(len < report_size * n_full_oa_reports * 0.55);
+ igt_debug("dts=%u elapsed=%lu duration=%lu\n",
+ last_timestamp - first_timestamp,
+ (last_timestamp - first_timestamp) *
oa_exponent_to_ns(oa_exponent),
+ fill_duration / 2);
- overflow_seen = false;
- for (offset = 0; offset < len; offset += header->size) {
- header = (void *)(buf + offset);
+ while ((len = read(stream_fd, buf, buf_size)) == -1 &&
errno == EINTR)
+ ;
- if (header->type == DRM_I915_PERF_RECORD_OA_BUFFER_LOST)
- overflow_seen = true;
+ igt_assert_neq(len, -1);
+
+ for (int offset = 0; offset < len; offset +=
header->size) {
+ uint32_t *report;
+
+ header = (void *) (buf + offset);
+ report = (void *) (header + 1);
+
+ switch (header->type) {
+ case DRM_I915_PERF_RECORD_OA_REPORT_LOST:
+ igt_debug("report loss, trying
again\n");
+ break;
+ case DRM_I915_PERF_RECORD_SAMPLE:
+
[Intel-gfx] [PATCH i-g-t 19/29] igt/perf: update print_reports to print context ID
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/perf.c b/tests/perf.c
index ab8db296..d057d943 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -1215,6 +1215,9 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1,
int fmt)
const char *reason0 = gen8_read_report_reason(oa_report0);
const char *reason1 = gen8_read_report_reason(oa_report1);
+ igt_debug("CTX ID: 1st = %"PRIu32", 2nd = %"PRIu32"\n",
+ oa_report0[2], oa_report1[2]);
+
gen8_read_report_clock_ratios(oa_report0,
&slice_freq0, &unslice_freq0);
gen8_read_report_clock_ratios(oa_report1,
--
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[Intel-gfx] [PATCH i-g-t 13/29] igt/perf: allow 10% margin matching oa/sysfs freq in test_oa_exponents
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index d47e45c8..c8092eaa 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -,6 +,8 @@ test_oa_formats(void)
static void
test_oa_exponents(int gt_freq_mhz)
{
+ uint32_t freq_margin;
+
/* This test tries to use the sysfs interface for pinning the GT
* frequency so we have another point of reference for comparing with
* the clock frequency as derived from OA reports.
@@ -1129,11 +1131,17 @@ test_oa_exponents(int gt_freq_mhz)
igt_debug("Testing OA timer exponents with requested GT frequency =
%dmhz\n",
gt_freq_mhz);
+ /* allow a +- 10% error margin when checking that the frequency
+* calculated from the OA reports matches the frequency according to
+* sysfs.
+*/
+ freq_margin = gt_freq_mhz * 0.1;
+
/* It's asking a lot to sample with a 160 nanosecond period and the
* test can fail due to buffer overflows if it wasn't possible to
* keep up, so we don't start from an exponent of zero...
*/
- for (int i = 2; i < 20; i++) {
+ for (int i = 5; i < 20; i++) {
uint32_t expected_timestamp_delta;
uint32_t timestamp_delta;
uint32_t oa_report0[64];
@@ -1157,8 +1165,10 @@ test_oa_exponents(int gt_freq_mhz)
gt_freq_mhz_0 = sysfs_read("gt_act_freq_mhz");
- igt_debug("ITER %d: testing OA exponent %d with sysfs
GT freq = %dmhz\n",
- j, i, gt_freq_mhz_0);
+ igt_debug("ITER %d: testing OA exponent %d (period =
%"PRIu64"ns) with sysfs GT freq = %dmhz +- %u\n",
+ j, i,
+ oa_exponent_to_ns(i),
+ gt_freq_mhz_0, freq_margin);
open_and_read_2_oa_reports(test_oa_format,
i, /* exponent */
@@ -1199,7 +1209,8 @@ test_oa_exponents(int gt_freq_mhz)
igt_debug("ITER %d: time delta = %"PRIu32"(ns) clock
delta = %"PRIu32" freq = %"PRIu32"(mhz)\n",
j, time_delta, clock_delta, freq);
- if (freq == gt_freq_mhz_1)
+if (freq < (gt_freq_mhz_1 + freq_margin) &&
+freq > (gt_freq_mhz_1 - freq_margin))
n_freq_matches++;
n_tested++;
--
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[Intel-gfx] [PATCH i-g-t 26/29] igt/perf: make enable-disable more reliable
Estimation of the amount of reports can only refer to periodic ones,
as context switch reports completely depend on what happens on the
system. Also generate some load to prevent clock frequency changes to
impact our measurement.
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 88 +++-
1 file changed, 82 insertions(+), 6 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 922c692d..8639a5a2 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -2794,10 +2794,17 @@ test_enable_disable(void)
int n_full_oa_reports = oa_buf_size / report_size;
uint64_t fill_duration = n_full_oa_reports * oa_period;
+ load_helper_init();
+ load_helper_run(HIGH);
+
stream_fd = __perf_open(drm_fd, ¶m);
for (int i = 0; i < 5; i++) {
int len;
+ uint32_t n_periodic_reports;
+ struct drm_i915_perf_record_header *header;
+ uint32_t first_timestamp = 0, last_timestamp = 0;
+ uint32_t last_periodic_report[64];
/* Giving enough time for an overflow might help catch whether
* the OA unit has been enabled even if the driver might at
@@ -2817,18 +2824,84 @@ test_enable_disable(void)
nanosleep(&(struct timespec){ .tv_sec = 0,
.tv_nsec = fill_duration / 2 },
- NULL);
+ NULL);
- while ((len = read(stream_fd, buf, buf_size)) == -1 && errno ==
EINTR)
- ;
+ n_periodic_reports = 0;
- igt_assert_neq(len, -1);
+ /* Because of the race condition between notification of new
+* reports and reports landing in memory, we need to rely on
+* timestamps to figure whether we've read enough of them.
+*/
+ while (((last_timestamp - first_timestamp) *
oa_exponent_to_ns(oa_exponent)) <
+ (fill_duration / 2)) {
- igt_assert(len > report_size * n_full_oa_reports * 0.45);
- igt_assert(len < report_size * n_full_oa_reports * 0.55);
+ while ((len = read(stream_fd, buf, buf_size)) == -1 &&
errno == EINTR)
+ ;
+
+ igt_assert_neq(len, -1);
+
+ for (int offset = 0; offset < len; offset +=
header->size) {
+ uint32_t *report;
+
+ header = (void *) (buf + offset);
+ report = (void *) (header + 1);
+
+ switch (header->type) {
+ case DRM_I915_PERF_RECORD_OA_REPORT_LOST:
+ break;
+ case DRM_I915_PERF_RECORD_SAMPLE:
+ if (first_timestamp == 0)
+ first_timestamp = report[1];
+ last_timestamp = report[1];
+
+ if (n_periodic_reports > 0 &&
+ oa_report_is_periodic(oa_exponent,
report)) {
+ if
(oa_reports_have_clock_change(last_periodic_report,
+
report))
+ igt_debug("clock
change!\n");
+
+ igt_debug(" > report ts=%u"
+ "
ts_delta_last_periodic=%8u is_timer=%i ctx_id=%8x gpu_ticks=%u
nb_periodic=%u\n",
+ report[1],
+ report[1] -
last_periodic_report[1],
+
oa_report_is_periodic(oa_exponent, report),
+
oa_report_get_ctx_id(report),
+ report[3] -
last_periodic_report[3],
+ n_periodic_reports);
+
+ memcpy(last_periodic_report,
report,
+
sizeof(last_periodic_report));
+ }
+
+ /* We want to measure only the periodic
+* reports, ctx-switch might inflate the
+* content of the buffer and skew or
+* measurement.
+*/
+ n_periodic_reports +=
+
[Intel-gfx] [PATCH i-g-t 06/29] igt/perf: fix a counter indexing
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 3eef82d2..5a6bd05a 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -863,17 +863,15 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1,
int fmt)
} else
igt_debug("CLOCK = N/A\n");
- for (int j = oa_formats[fmt].first_a;
-j < oa_formats[fmt].n_a;
-j++)
- {
+ for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ int a_id = oa_formats[fmt].first_a + j;
uint32_t delta = a1[j] - a0[j];
- if (hsw_undefined_a_counters[j])
+ if (hsw_undefined_a_counters[a_id])
continue;
igt_debug("A%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
- j, a0[j], a1[j], delta);
+ a_id, a0[j], a1[j], delta);
}
for (int j = 0; j < oa_formats[fmt].n_b; j++) {
@@ -976,16 +974,14 @@ test_oa_formats(void)
*/
max_delta = clock_delta * 40;
- for (int j = oa_formats[i].first_a;
-j < oa_formats[i].n_a;
-j++)
- {
+ for (int j = 0; j < oa_formats[i].n_a; j++) {
+ int a_id = oa_formats[i].first_a + j;
uint32_t delta = a1[j] - a0[j];
- if (hsw_undefined_a_counters[j])
+ if (hsw_undefined_a_counters[a_id])
continue;
- igt_debug("A%d: delta = %"PRIu32"\n", j, delta);
+ igt_debug("A%d: delta = %"PRIu32"\n", a_id, delta);
igt_assert(delta <= max_delta);
}
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 21/29] igt/perf: make stream_fd a global variable
When debugging unstable tests on new platforms we currently we don't
cleanup everything well in between different tests. Since only a
single OA stream fd can be opened at a time, having the stream_fd as a
global variable helps us cleanup the state between tests.
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 108 ---
1 file changed, 58 insertions(+), 50 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index f8ac06c3..b7af1c3b 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -243,6 +243,7 @@ static bool hsw_undefined_a_counters[45] = {
static bool gen8_undefined_a_counters[45];
static int drm_fd = -1;
+static int stream_fd = -1;
static uint32_t devid;
static int card = -1;
static int n_eus;
@@ -264,10 +265,22 @@ static uint32_t (*read_report_ticks)(uint32_t *report,
static void (*sanity_check_reports)(uint32_t *oa_report0, uint32_t *oa_report1,
enum drm_i915_oa_format format);
+static void
+__perf_close(int fd)
+{
+ close(fd);
+ stream_fd = -1;
+}
+
static int
__perf_open(int fd, struct drm_i915_perf_open_param *param)
{
- int ret = igt_ioctl(fd, DRM_IOCTL_I915_PERF_OPEN, param);
+ int ret;
+
+ if (stream_fd >= 0)
+ __perf_close(stream_fd);
+
+ ret = igt_ioctl(fd, DRM_IOCTL_I915_PERF_OPEN, param);
igt_assert(ret >= 0);
errno = 0;
@@ -918,14 +931,12 @@ test_system_wide_paranoid(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- int stream_fd;
-
write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 0);
igt_drop_root();
stream_fd = __perf_open(drm_fd, ¶m);
- close(stream_fd);
+ __perf_close(stream_fd);
}
igt_waitchildren();
@@ -973,7 +984,6 @@ test_invalid_oa_metric_set_id(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- int stream_fd;
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -983,7 +993,7 @@ test_invalid_oa_metric_set_id(void)
/* Check that we aren't just seeing false positives... */
properties[ARRAY_SIZE(properties) - 1] = test_metric_set_id;
stream_fd = __perf_open(drm_fd, ¶m);
- close(stream_fd);
+ __perf_close(stream_fd);
/* There's no valid default OA metric set ID... */
param.num_properties--;
@@ -1008,7 +1018,6 @@ test_invalid_oa_format_id(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- int stream_fd;
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
@@ -1018,7 +1027,7 @@ test_invalid_oa_format_id(void)
/* Check that we aren't just seeing false positives... */
properties[ARRAY_SIZE(properties) - 1] = test_oa_format;
stream_fd = __perf_open(drm_fd, ¶m);
- close(stream_fd);
+ __perf_close(stream_fd);
/* There's no valid default OA format... */
param.num_properties--;
@@ -1046,8 +1055,7 @@ test_missing_sample_flags(void)
}
static void
-read_2_oa_reports(int stream_fd,
- int format_id,
+read_2_oa_reports(int format_id,
int exponent,
uint32_t *oa_report0,
uint32_t *oa_report1,
@@ -1181,12 +1189,13 @@ open_and_read_2_oa_reports(int format_id,
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- int stream_fd = __perf_open(drm_fd, ¶m);
- read_2_oa_reports(stream_fd, format_id, exponent,
+ stream_fd = __perf_open(drm_fd, ¶m);
+
+ read_2_oa_reports(format_id, exponent,
oa_report0, oa_report1, timer_only);
- close(stream_fd);
+ __perf_close(stream_fd);
}
static void
@@ -1486,9 +1495,10 @@ test_invalid_oa_exponent(void)
.num_properties = sizeof(properties) / 16,
.properties_ptr = to_user_pointer(properties),
};
- int stream_fd = __perf_open(drm_fd, ¶m);
- close(stream_fd);
+ stream_fd = __perf_open(drm_fd, ¶m);
+
+ __perf_close(stream_fd);
for (int i = 32; i < 65; i++) {
properties[7] = i;
@@ -1538,12 +1548,10 @@ test_low_oa_exponent_permissions(void)
properties[7] = ok_exponent;
igt_fork(child, 1) {
- int stream_fd;
-
igt_drop_root();
stream_fd = __perf_open(drm_fd, ¶m);
- close(stream_fd);
+ __perf_close(stream_fd);
}
igt_waitchildren();
@@ -1592,7 +1600,6 @@ test_per_context_mode_unprivileged(void)
igt_fork(child, 1) {
[Intel-gfx] [PATCH i-g-t 20/29] igt/perf: add utility function for checking periodic reports
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 55 +--
1 file changed, 29 insertions(+), 26 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index d057d943..f8ac06c3 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -450,6 +450,29 @@ gen8_read_report_reason(const uint32_t *report)
return "unknown";
}
+static bool
+oa_report_is_periodic(uint32_t oa_exponent, const uint32_t *report)
+{
+
+ if (IS_HASWELL(devid)) {
+ /* For Haswell we don't have a documented report reason field
+* (though empirically report[0] bit 10 does seem to correlate
+* with a timer trigger reason) so we instead infer which
+* reports are timer triggered by checking if the least
+* significant bits are zero and the exponent bit is set.
+*/
+ uint32_t oa_exponent_mask = (1 << (oa_exponent + 1)) - 1;
+ if ((report[1] & oa_exponent_mask) != (1 << oa_exponent))
+ return true;
+ } else {
+ if ((report[0] >> OAREPORT_REASON_SHIFT) &
+ OAREPORT_REASON_TIMER)
+ return true;
+ }
+
+ return false;
+}
+
static uint64_t
timebase_scale(uint32_t u32_delta)
{
@@ -1115,22 +1138,8 @@ read_2_oa_reports(int stream_fd,
igt_assert_neq(report[1], 0);
if (timer_only) {
- /* For Haswell we don't have a documented
-* report reason field (though empirically
-* report[0] bit 10 does seem to correlate with
-* a timer trigger reason) so we instead infer
-* which reports are timer triggered by
-* checking if the least significant bits are
-* zero and the exponent bit is set.
-*/
- if ((report[1] & exponent_mask) != (1 <<
exponent)) {
- igt_debug("skipping non timer report
reason=%x\n",
- report[0]);
-
- /* Also assert our hypothesis about the
-* reason bit...
-*/
- igt_assert_eq(report[0] & (1 << 10), 0);
+ if (!oa_report_is_periodic(exponent, report)) {
+ igt_debug("skipping non timer
report\n");
continue;
}
}
@@ -1740,11 +1749,8 @@ test_blocking(void)
if (header->type ==
DRM_I915_PERF_RECORD_SAMPLE) {
uint32_t *report = (void *)(header + 1);
- uint32_t reason = ((report[0] >>
-
OAREPORT_REASON_SHIFT) &
-
OAREPORT_REASON_MASK);
-
- if (reason & OAREPORT_REASON_TIMER)
+ if (oa_report_is_periodic(oa_exponent,
+ report))
timer_report_read = true;
else
non_timer_report_read = true;
@@ -1914,11 +1920,8 @@ test_polling(void)
if (header->type ==
DRM_I915_PERF_RECORD_SAMPLE) {
uint32_t *report = (void *)(header + 1);
- uint32_t reason = ((report[0] >>
-
OAREPORT_REASON_SHIFT) &
-
OAREPORT_REASON_MASK);
-
- if (reason & OAREPORT_REASON_TIMER)
+ if (oa_report_is_periodic(oa_exponent,
+ report))
timer_report_read = true;
else
non_timer_report_read = true;
--
2.11.0
___
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[Intel-gfx] [PATCH i-g-t 23/29] igt/perf: update max buffer size for reading reports
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 98f80bfd..887836e2 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -1245,9 +1245,7 @@ read_2_oa_reports(int format_id,
/* Note: we allocate a large buffer so that each read() iteration
* should scrape *all* pending records.
*
-* The largest buffer the OA unit supports is 16MB and the smallest
-* OA report format is 64bytes allowing up to 262144 reports to
-* be buffered.
+* The largest buffer the OA unit supports is 16MB.
*
* Being sure we are fetching all buffered reports allows us to
* potentially throw away / skip all reports whenever we see
@@ -1260,7 +1258,8 @@ read_2_oa_reports(int format_id,
* to indicate that the OA unit may be over taxed if lots of reports
* are being lost.
*/
- int buf_size = 262144 * (64 + sizeof(struct
drm_i915_perf_record_header));
+ int max_reports = (16 * 1024 * 1024) / format_size;
+ int buf_size = sample_size * max_reports * 1.5;
uint8_t *buf = malloc(buf_size);
int n = 0;
@@ -1272,6 +1271,7 @@ read_2_oa_reports(int format_id,
;
igt_assert(len > 0);
+ igt_debug("read %d bytes\n", (int)len);
for (size_t offset = 0; offset < len; offset += header->size) {
const uint32_t *report;
--
2.11.0
___
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[Intel-gfx] [PATCH i-g-t 22/29] igt/perf: add per context filtering test for gen8+
From: Robert Bragg
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 813 ---
1 file changed, 775 insertions(+), 38 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index b7af1c3b..98f80bfd 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -48,7 +48,9 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming
interface");
#define OAREPORT_REASON_MASK 0x3f
#define OAREPORT_REASON_SHIFT 19
#define OAREPORT_REASON_TIMER (1<<0)
+#define OAREPORT_REASON_INTERNAL (3<<1)
#define OAREPORT_REASON_CTX_SWITCH (1<<3)
+#define OAREPORT_REASON_GO (1<<4)
#define OAREPORT_REASON_CLK_RATIO (1<<5)
#define GFX_OP_PIPE_CONTROL ((3 << 29) | (3 << 27) | (2 << 24))
@@ -143,6 +145,13 @@ enum drm_i915_perf_record_type {
};
#endif /* !DRM_I915_PERF_OPEN */
+struct accumulator {
+#define MAX_RAW_OA_COUNTERS 62
+ enum drm_i915_oa_format format;
+
+ uint64_t deltas[MAX_RAW_OA_COUNTERS];
+};
+
static struct {
const char *name;
size_t size;
@@ -532,6 +541,22 @@ oa_exponent_to_ns(int exponent)
return 10ULL * (2ULL << exponent) / timestamp_frequency;
}
+static bool
+oa_report_ctx_is_valid(uint32_t *report)
+{
+ if (IS_HASWELL(devid)) {
+ return false; /* TODO */
+ } else if (IS_GEN8(devid)) {
+ return report[0] & (1ul << 25);
+ } else if (IS_GEN9(devid)) {
+ return report[0] & (1ul << 16);
+ }
+
+ /* Need to update this function for newer Gen. */
+ igt_assert(!"reached");
+}
+
+
static void
hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t
*oa_report1,
enum drm_i915_oa_format fmt)
@@ -636,6 +661,100 @@ gen8_40bit_a_delta(uint64_t value0, uint64_t value1)
return value1 - value0;
}
+static void
+accumulate_uint32(size_t offset,
+ uint32_t *report0,
+ uint32_t *report1,
+ uint64_t *delta)
+{
+ uint32_t value0 = *(uint32_t *)(((uint8_t *)report0) + offset);
+ uint32_t value1 = *(uint32_t *)(((uint8_t *)report1) + offset);
+
+ *delta += (uint32_t)(value1 - value0);
+}
+
+static void
+accumulate_uint40(int a_index,
+ uint32_t *report0,
+ uint32_t *report1,
+ enum drm_i915_oa_format format,
+ uint64_t *delta)
+{
+ uint64_t value0 = gen8_read_40bit_a_counter(report0, format, a_index),
+value1 = gen8_read_40bit_a_counter(report1, format, a_index);
+
+ *delta += gen8_40bit_a_delta(value0, value1);
+}
+
+static void
+accumulate_reports(struct accumulator *accumulator,
+ uint32_t *start,
+ uint32_t *end)
+{
+ enum drm_i915_oa_format format = accumulator->format;
+ uint64_t *deltas = accumulator->deltas;
+ int idx = 0;
+
+ if (intel_gen(devid) >= 8) {
+ /* timestamp */
+ accumulate_uint32(4, start, end, deltas + idx++);
+
+ /* clock cycles */
+ accumulate_uint32(12, start, end, deltas + idx++);
+ } else {
+ /* timestamp */
+ accumulate_uint32(4, start, end, deltas + idx++);
+ }
+
+ for (int i = 0; i < oa_formats[format].n_a40; i++)
+ accumulate_uint40(i, start, end, format, deltas + idx++);
+
+ for (int i = 0; i < oa_formats[format].n_a; i++) {
+ accumulate_uint32(oa_formats[format].a_off + 4 * i,
+ start, end, deltas + idx++);
+ }
+
+ for (int i = 0; i < oa_formats[format].n_b; i++) {
+ accumulate_uint32(oa_formats[format].b_off + 4 * i,
+ start, end, deltas + idx++);
+ }
+
+ for (int i = 0; i < oa_formats[format].n_c; i++) {
+ accumulate_uint32(oa_formats[format].c_off + 4 * i,
+ start, end, deltas + idx++);
+ }
+}
+
+static void
+accumulator_print(struct accumulator *accumulator, const char *title)
+{
+ enum drm_i915_oa_format format = accumulator->format;
+ uint64_t *deltas = accumulator->deltas;
+ int idx = 0;
+
+ igt_debug("%s:\n", title);
+ if (intel_gen(devid) >= 8) {
+ igt_debug("\ttime delta = %lu\n", deltas[idx++]);
+ igt_debug("\tclock cycle delta = %lu\n", deltas[idx++]);
+
+ for (int i = 0; i < oa_formats[format].n_a40; i++)
+ igt_debug("\tA%u = %lu\n", i, deltas[idx++]);
+ } else {
+ igt_debug("\ttime delta = %lu\n", deltas[idx++]);
+ }
+
+ for (int i = 0; i < oa_formats[format].n_a; i++) {
+ int a_id = oa_formats[format].first_a + i;
+ igt_debug("\tA%u = %lu\n", a_id, deltas[idx++]);
+ }
+
+ for (int i =
[Intel-gfx] [PATCH i-g-t 05/29] igt/perf: add gen8 formats
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 78 +---
1 file changed, 64 insertions(+), 14 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 29487cdf..3eef82d2 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -139,43 +139,79 @@ enum drm_i915_perf_record_type {
static struct {
const char *name;
size_t size;
- int a_off; /* bytes */
+ int a40_high_off; /* bytes */
+ int a40_low_off;
+ int n_a40;
+ int a_off;
int n_a;
int first_a;
int b_off;
int n_b;
int c_off;
int n_c;
+ int min_gen;
+ int max_gen;
} oa_formats[I915_OA_FORMAT_MAX] = {
- [I915_OA_FORMAT_A13] = {
+ [I915_OA_FORMAT_A13] = { /* HSW only */
"A13", .size = 64,
- .a_off = 12, .n_a = 13 },
- [I915_OA_FORMAT_A29] = {
+ .a_off = 12, .n_a = 13,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_A29] = { /* HSW only */
"A29", .size = 128,
- .a_off = 12, .n_a = 29 },
- [I915_OA_FORMAT_A13_B8_C8] = {
+ .a_off = 12, .n_a = 29,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_A13_B8_C8] = { /* HSW only */
"A13_B8_C8", .size = 128,
.a_off = 12, .n_a = 13,
.b_off = 64, .n_b = 8,
- .c_off = 96, .n_c = 8 },
- [I915_OA_FORMAT_A45_B8_C8] = {
+ .c_off = 96, .n_c = 8,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_A45_B8_C8] = { /* HSW only */
"A45_B8_C8", .size = 256,
.a_off = 12, .n_a = 45,
.b_off = 192, .n_b = 8,
- .c_off = 224, .n_c = 8 },
- [I915_OA_FORMAT_B4_C8] = {
+ .c_off = 224, .n_c = 8,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_B4_C8] = { /* HSW only */
"B4_C8", .size = 64,
.b_off = 16, .n_b = 4,
- .c_off = 32, .n_c = 8 },
- [I915_OA_FORMAT_B4_C8_A16] = {
+ .c_off = 32, .n_c = 8,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_B4_C8_A16] = { /* HSW only */
"B4_C8_A16", .size = 128,
.b_off = 16, .n_b = 4,
.c_off = 32, .n_c = 8,
- .a_off = 60, .n_a = 16, .first_a = 29 },
- [I915_OA_FORMAT_C4_B8] = {
+ .a_off = 60, .n_a = 16, .first_a = 29,
+ .max_gen = 7 },
+ [I915_OA_FORMAT_C4_B8] = { /* HSW+ (header differs from HSW-Gen8+) */
"C4_B8", .size = 64,
.c_off = 16, .n_c = 4,
.b_off = 28, .n_b = 8 },
+
+ /* Gen8+ */
+
+ [I915_OA_FORMAT_A12] = {
+ "A12", .size = 64,
+ .a_off = 12, .n_a = 12, .first_a = 7,
+ .min_gen = 8 },
+ [I915_OA_FORMAT_A12_B8_C8] = {
+ "A12_B8_C8", .size = 128,
+ .a_off = 12, .n_a = 12,
+ .b_off = 64, .n_b = 8,
+ .c_off = 96, .n_c = 8, .first_a = 7,
+ .min_gen = 8 },
+ [I915_OA_FORMAT_A32u40_A4u32_B8_C8] = {
+ "A32u40_A4u32_B8_C8", .size = 256,
+ .a40_high_off = 160, .a40_low_off = 16, .n_a40 = 32,
+ .a_off = 144, .n_a = 4, .first_a = 32,
+ .b_off = 192, .n_b = 8,
+ .c_off = 224, .n_c = 8,
+ .min_gen = 8 },
+ [I915_OA_FORMAT_C4_B8] = {
+ "C4_B8", .size = 64,
+ .c_off = 16, .n_c = 4,
+ .b_off = 32, .n_b = 8,
+ .min_gen = 8 },
};
static bool hsw_undefined_a_counters[45] = {
@@ -870,6 +906,20 @@ test_oa_formats(void)
if (!oa_formats[i].name) /* sparse, indexed by ID */
continue;
+ if (oa_formats[i].min_gen &&
+ intel_gen(devid) < oa_formats[i].min_gen) {
+ igt_debug("skipping unsupported OA format %s\n",
+ oa_formats[i].name);
+ continue;
+ }
+
+ if (oa_formats[i].max_gen &&
+ intel_gen(devid) > oa_formats[i].max_gen) {
+ igt_debug("skipping unsupported OA format %s\n",
+ oa_formats[i].name);
+ continue;
+ }
+
igt_debug("Checking OA format %s\n", oa_formats[i].name);
open_and_read_2_oa_reports(i,
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 16/29] igt/perf: consider ctx-switch reports while polling/blocking
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 92
1 file changed, 86 insertions(+), 6 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 9a8c54fc..fe5ff0fc 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -45,6 +45,12 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming
interface");
#define GEN6_MI_REPORT_PERF_COUNT ((0x28 << 23) | (3 - 2))
#define GEN8_MI_REPORT_PERF_COUNT ((0x28 << 23) | (4 - 2))
+#define OAREPORT_REASON_MASK 0x3f
+#define OAREPORT_REASON_SHIFT 19
+#define OAREPORT_REASON_TIMER (1<<0)
+#define OAREPORT_REASON_CTX_SWITCH (1<<3)
+#define OAREPORT_REASON_CLK_RATIO (1<<5)
+
#define GFX_OP_PIPE_CONTROL ((3 << 29) | (3 << 27) | (2 << 24))
#define PIPE_CONTROL_CS_STALL (1 << 20)
#define PIPE_CONTROL_GLOBAL_SNAPSHOT_COUNT_RESET (1 << 19)
@@ -1478,6 +1484,7 @@ test_blocking(void)
int64_t test_duration_ns = tick_ns * 1000;
int max_iterations = (test_duration_ns / oa_period) + 1;
+ int n_extra_iterations = 0;
/* It's a bit tricky to put a lower limit here, but we expect a
* relatively low latency for seeing reports, while we don't currently
@@ -1518,6 +1525,9 @@ test_blocking(void)
* We Loop for 1000 x tick_ns so one tick corresponds to 0.1%
*/
for (start = get_time(); (get_time() - start) < test_duration_ns; /*
nop */) {
+ struct drm_i915_perf_record_header *header;
+ bool timer_report_read = false;
+ bool non_timer_report_read = false;
int ret;
while ((ret = read(stream_fd, buf, sizeof(buf))) < 0 &&
@@ -1526,6 +1536,36 @@ test_blocking(void)
igt_assert(ret > 0);
+ /* For Haswell reports don't contain a well defined reason
+* field we so assume all reports to be 'periodic'. For gen8+
+* we want to to consider that the HW automatically writes some
+* non periodic reports (e.g. on context switch) which might
+* lead to more successful read()s than expected due to
+* periodic sampling and we don't want these extra reads to
+* cause the test to fail...
+*/
+ if (intel_gen(devid) >= 8) {
+ for (int offset = 0; offset < ret; offset +=
header->size) {
+ header = (void *)(buf + offset);
+
+ if (header->type ==
DRM_I915_PERF_RECORD_SAMPLE) {
+ uint32_t *report = (void *)(header + 1);
+
+ uint32_t reason = ((report[0] >>
+
OAREPORT_REASON_SHIFT) &
+
OAREPORT_REASON_MASK);
+
+ if (reason & OAREPORT_REASON_TIMER)
+ timer_report_read = true;
+ else
+ non_timer_report_read = true;
+ }
+ }
+ }
+
+ if (non_timer_report_read && !timer_report_read)
+ n_extra_iterations++;
+
n++;
}
@@ -1537,7 +1577,10 @@ test_blocking(void)
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads during test with ~25Hz OA sampling\n", n);
+ igt_debug("%d blocking reads during test with ~25Hz OA sampling (expect
no more than %d)\n",
+ n, max_iterations);
+ igt_debug("%d extra iterations seen, not related to periodic sampling
(e.g. context switches)\n",
+ n_extra_iterations);
igt_debug("time in userspace = %"PRIu64"ns (+-%dns) (start utime = %d,
end = %d)\n",
user_ns, (int)tick_ns,
(int)start_times.tms_utime, (int)end_times.tms_utime);
@@ -1548,12 +1591,12 @@ test_blocking(void)
/* With completely broken blocking (but also not returning an error) we
* could end up with an open loop,
*/
- igt_assert(n <= max_iterations);
+ igt_assert(n <= (max_iterations + n_extra_iterations));
/* Make sure the driver is reporting new samples with a reasonably
* low latency...
*/
- igt_assert(n > min_iterations);
+ igt_assert(n > (min_iterations + n_extra_iterations));
igt_assert(kernel_ns <= (test_duration_ns / 100ull));
@@ -1595,6 +1638,7 @@ test_polling(void)
int64_t test_duration_ns = tick_ns * 1000;
int max_iterations = (test_duration_ns / oa_period) + 1;
+ int n
[Intel-gfx] [PATCH i-g-t 15/29] igt/perf: don't assume constant of 40 EUs
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 62bfd80f..9a8c54fc 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -239,6 +239,7 @@ static bool gen8_undefined_a_counters[45];
static int drm_fd = -1;
static uint32_t devid;
static int card = -1;
+static int n_eus;
static uint64_t test_metric_set_id = UINT64_MAX;
static uint64_t gt_min_freq_mhz_saved = 0;
@@ -506,7 +507,20 @@ init_sys_info(void)
test_oa_format = I915_OA_FORMAT_A45_B8_C8;
undefined_a_counters = hsw_undefined_a_counters;
read_report_ticks = hsw_read_report_ticks;
+
+ if (intel_gt(devid) == 0)
+ n_eus = 10;
+ else if (intel_gt(devid) == 1)
+ n_eus = 20;
+ else if (intel_gt(devid) == 2)
+ n_eus = 40;
+ else {
+ igt_assert(!"reached");
+ return false;
+ }
} else {
+ drm_i915_getparam_t gp;
+
test_set_name = "TestOa";
test_oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
undefined_a_counters = gen8_undefined_a_counters;
@@ -537,6 +551,10 @@ init_sys_info(void)
timestamp_frequency = 1920;
} else
return false;
+
+ gp.param = I915_PARAM_EU_TOTAL;
+ gp.value = &n_eus;
+ do_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
}
igt_debug("%s metric set UUID = %s\n",
@@ -1077,11 +1095,11 @@ test_oa_formats(void)
igt_debug("clock delta = %"PRIu32"\n", clock_delta);
/* The maximum rate for any HSW counter =
-* clock_delta * 40 EUs
+* clock_delta * N EUs
*
* Sanity check that no counters exceed this delta.
*/
- max_delta = clock_delta * 40;
+ max_delta = clock_delta * n_eus;
for (int j = 0; j < oa_formats[i].n_a; j++) {
int a_id = oa_formats[i].first_a + j;
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 25/29] igt/perf: rework oa-exponent test
New issues that were discovered while making the tests work on Gen8+ :
- we need to measure timings between periodic reports and discard all
other kind of reports
- it seems periodicity of the reports can be affected outside of RC6
(frequency change), we can detect this by looking at the amount of
clock cycles per timestamp deltas
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 765 ---
1 file changed, 573 insertions(+), 192 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 9fd40ff0..922c692d 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -28,6 +28,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -274,6 +275,15 @@ static uint32_t (*read_report_ticks)(uint32_t *report,
static void (*sanity_check_reports)(uint32_t *oa_report0, uint32_t *oa_report1,
enum drm_i915_oa_format format);
+static bool
+timestamp_delta_within(uint32_t delta,
+ uint32_t expected_delta,
+ uint32_t margin)
+{
+ return delta > (expected_delta - margin) &&
+ delta < (expected_delta + margin);
+}
+
static void
__perf_close(int fd)
{
@@ -450,6 +460,20 @@ gen8_read_report_ticks(uint32_t *report, enum
drm_i915_oa_format format)
return report[3];
}
+static void
+gen8_read_report_clock_ratios(uint32_t *report,
+ uint32_t *slice_freq_mhz,
+ uint32_t *unslice_freq_mhz)
+{
+ uint32_t unslice_freq = report[0] & 0x1ff;
+ uint32_t slice_freq_low = (report[0] >> 25) & 0x7f;
+ uint32_t slice_freq_high = (report[0] >> 9) & 0x3;
+ uint32_t slice_freq = slice_freq_low | (slice_freq_high << 7);
+
+ *slice_freq_mhz = (slice_freq * 1) / 1000;
+ *unslice_freq_mhz = (unslice_freq * 1) / 1000;
+}
+
static const char *
gen8_read_report_reason(const uint32_t *report)
{
@@ -472,29 +496,6 @@ gen8_read_report_reason(const uint32_t *report)
return "unknown";
}
-static bool
-oa_report_is_periodic(uint32_t oa_exponent, const uint32_t *report)
-{
-
- if (IS_HASWELL(devid)) {
- /* For Haswell we don't have a documented report reason field
-* (though empirically report[0] bit 10 does seem to correlate
-* with a timer trigger reason) so we instead infer which
-* reports are timer triggered by checking if the least
-* significant bits are zero and the exponent bit is set.
-*/
- uint32_t oa_exponent_mask = (1 << (oa_exponent + 1)) - 1;
- if ((report[1] & oa_exponent_mask) != (1 << oa_exponent))
- return true;
- } else {
- if ((report[0] >> OAREPORT_REASON_SHIFT) &
- OAREPORT_REASON_TIMER)
- return true;
- }
-
- return false;
-}
-
static uint64_t
timebase_scale(uint32_t u32_delta)
{
@@ -542,6 +543,29 @@ oa_exponent_to_ns(int exponent)
}
static bool
+oa_report_is_periodic(uint32_t oa_exponent, const uint32_t *report)
+{
+
+ if (IS_HASWELL(devid)) {
+ /* For Haswell we don't have a documented report reason field
+* (though empirically report[0] bit 10 does seem to correlate
+* with a timer trigger reason) so we instead infer which
+* reports are timer triggered by checking if the least
+* significant bits are zero and the exponent bit is set.
+*/
+ uint32_t oa_exponent_mask = (1 << (oa_exponent + 1)) - 1;
+ if ((report[1] & oa_exponent_mask) != (1 << oa_exponent))
+ return true;
+ } else {
+ if ((report[0] >> OAREPORT_REASON_SHIFT) &
+ OAREPORT_REASON_TIMER)
+ return true;
+ }
+
+ return false;
+}
+
+static bool
oa_report_ctx_is_valid(uint32_t *report)
{
if (IS_HASWELL(devid)) {
@@ -556,6 +580,130 @@ oa_report_ctx_is_valid(uint32_t *report)
igt_assert(!"reached");
}
+static uint32_t
+oa_report_get_ctx_id(uint32_t *report)
+{
+ if (!oa_report_ctx_is_valid(report))
+ return 0x;
+ return report[2];
+}
+
+static bool
+oa_reports_have_clock_change(uint32_t *report0, uint32_t *report1)
+{
+ double tick_per_period;
+
+ if (intel_gen(devid) < 8)
+ return false;
+
+ /* Measure the number GPU tick delta to timestamp delta. */
+ tick_per_period =
+ (report1[3] - report0[3]) / (report1[1] - report0[1]);
+
+ if ((tick_per_period / 80.0) >= 0.97)
+ return false;
+
+ return true;
+}
+
+static void
+scratch_buf_memset(drm_intel_bo *bo, int width, int height, uint32_t color)
+{
+ int ret;
+
+ ret = drm_intel_bo_map(bo, true /* writable */);
+ igt_ass
[Intel-gfx] [PATCH i-g-t 28/29] igt/perf: load gt_boost_freq_mhz as max gt frequency
We want the absolute max the hardware can do, not the max value
set by a previous application/user.
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/perf.c b/tests/perf.c
index 6026811b..3d033b3a 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -1107,7 +1107,7 @@ static void
gt_frequency_range_save(void)
{
gt_min_freq_mhz_saved = sysfs_read("gt_min_freq_mhz");
- gt_max_freq_mhz_saved = sysfs_read("gt_max_freq_mhz");
+ gt_max_freq_mhz_saved = sysfs_read("gt_boost_freq_mhz");
gt_min_freq_mhz = gt_min_freq_mhz_saved;
gt_max_freq_mhz = gt_max_freq_mhz_saved;
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 08/29] igt/perf: generalize reading gpu ticks from reports
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 67 +---
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index fe39f4dd..48e8750f 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -250,6 +250,8 @@ static enum drm_i915_oa_format test_oa_format;
static bool *undefined_a_counters;
static igt_render_copyfunc_t render_copy = NULL;
+static uint32_t (*read_report_ticks)(uint32_t *report,
+enum drm_i915_oa_format format);
static int
__perf_open(int fd, struct drm_i915_perf_open_param *param)
@@ -393,6 +395,28 @@ read_debugfs_u64_record(int fd, const char *file, const
char *key)
return val;
}
+/* XXX: For Haswell this utility is only applicable to the render basic
+ * metric set.
+ *
+ * C2 corresponds to a clock counter for the Haswell render basic metric set
+ * but it's not included in all of the formats.
+ */
+static uint32_t
+hsw_read_report_ticks(uint32_t *report, enum drm_i915_oa_format format)
+{
+ uint32_t *c = (uint32_t *)(((uint8_t *)report) +
oa_formats[format].c_off);
+
+ igt_assert_neq(oa_formats[format].n_c, 0);
+
+ return c[2];
+}
+
+static uint32_t
+gen8_read_report_ticks(uint32_t *report, enum drm_i915_oa_format format)
+{
+ return report[3];
+}
+
static bool
init_sys_info(void)
{
@@ -413,10 +437,12 @@ init_sys_info(void)
test_set_uuid = "403d8832-1a27-4aa6-a64e-f5389ce7b212";
test_oa_format = I915_OA_FORMAT_A45_B8_C8;
undefined_a_counters = hsw_undefined_a_counters;
+ read_report_ticks = hsw_read_report_ticks;
} else {
test_set_name = "TestOa";
test_oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
undefined_a_counters = gen8_undefined_a_counters;
+ read_report_ticks = gen8_read_report_ticks;
if (IS_BROADWELL(devid)) {
test_set_uuid = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
@@ -945,30 +971,28 @@ test_oa_formats(void)
time_delta = timebase_scale(oa_report1[1] - oa_report0[1]);
igt_assert_neq(time_delta, 0);
- /* C2 corresponds to a clock counter for the Haswell render
-* basic metric set but it's not included in all of the
-* formats.
+ /* As a special case we have to consider that on Haswell we
+* can't explicitly derive a clock delta for all OA report
+* formats...
*/
- if (oa_formats[i].n_c) {
+ if (IS_HASWELL(devid) && oa_formats[i].n_c == 0) {
+ /* Assume running at max freq for sake of
+* below sanity check on counters... */
+ clock_delta = (gt_max_freq_mhz *
+ (uint64_t)time_delta) / 1000;
+ } else {
+ uint32_t ticks0 = read_report_ticks(oa_report0, i);
+ uint32_t ticks1 = read_report_ticks(oa_report1, i);
uint64_t freq;
- /* The first report might have a clock count of zero
-* but we wouldn't expect that in the second report...
-*/
- igt_assert_neq(c1[2], 0);
+ clock_delta = ticks1 - ticks0;
- clock_delta = c1[2] - c0[2];
igt_assert_neq(clock_delta, 0);
freq = ((uint64_t)clock_delta * 1000) / time_delta;
igt_debug("freq = %"PRIu64"\n", freq);
igt_assert(freq <= gt_max_freq_mhz);
- } else {
- /* Assume running at max freq for sake of
-* below sanity check on counters... */
- clock_delta = (gt_max_freq_mhz *
- (uint64_t)time_delta) / 1000;
}
igt_debug("clock delta = %"PRIu32"\n", clock_delta);
@@ -1035,7 +1059,6 @@ test_oa_exponents(int gt_freq_mhz)
uint32_t timestamp_delta;
uint32_t oa_report0[64];
uint32_t oa_report1[64];
- uint32_t *c0, *c1;
uint32_t time_delta;
uint32_t clock_delta;
uint32_t freq;
@@ -1051,7 +1074,7 @@ test_oa_exponents(int gt_freq_mhz)
for (int j = 0; n_tested < 10 && j < 100; j++) {
int gt_freq_mhz_0, gt_freq_mhz_1;
- int c_off;
+ uint32_t ticks0, ticks1;
gt_freq_mhz_0 = sysfs_read("gt_act_freq_mhz");
@@ -1087,15 +1110,9 @@ test_oa_exponents(int gt_freq_mhz)
igt_assert_eq(timestamp_delta,
[Intel-gfx] [PATCH i-g-t 12/29] igt/perf: avoid assumptions about oa exponent <-> freq mappings
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 135 +--
1 file changed, 84 insertions(+), 51 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 15f41246..d47e45c8 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -249,6 +249,7 @@ static uint64_t gt_max_freq_mhz = 0;
static uint64_t timestamp_frequency = 1250;
static enum drm_i915_oa_format test_oa_format;
static bool *undefined_a_counters;
+static uint64_t oa_exp_1_millisec;
static igt_render_copyfunc_t render_copy = NULL;
static uint32_t (*read_report_ticks)(uint32_t *report,
@@ -424,11 +425,11 @@ timebase_scale(uint32_t u32_delta)
return ((uint64_t)u32_delta * NSEC_PER_SEC) / timestamp_frequency;
}
-/* Return the largest OA exponent that will still result in a sampling
- * frequency higher than the given frequency.
+/* Returns: the largest OA exponent that will still result in a sampling period
+ * less than or equal to the given @period.
*/
static int
-max_oa_exponent_for_higher_freq(uint64_t freq)
+max_oa_exponent_for_period_lte(uint64_t period)
{
/* NB: timebase_scale() takes a uint32_t and an exponent of 30
* would already represent a period of ~3 minutes so there's
@@ -436,9 +437,8 @@ max_oa_exponent_for_higher_freq(uint64_t freq)
*/
for (int i = 0; i < 30; i++) {
uint64_t oa_period = timebase_scale(2 << i);
- uint32_t oa_freq = NSEC_PER_SEC / oa_period;
- if (oa_freq <= freq)
+ if (oa_period > period)
return max(0, i - 1);
}
@@ -446,6 +446,25 @@ max_oa_exponent_for_higher_freq(uint64_t freq)
return -1;
}
+/* Return: the largest OA exponent that will still result in a sampling
+ * frequency greater than the given @frequency.
+ */
+static int
+max_oa_exponent_for_freq_gt(uint64_t frequency)
+{
+ uint64_t period = NSEC_PER_SEC / frequency;
+
+ igt_assert_neq(period, 0);
+
+ return max_oa_exponent_for_period_lte(period - 1);
+}
+
+static uint64_t
+oa_exponent_to_ns(int exponent)
+{
+ return 10ULL * (2ULL << exponent) / timestamp_frequency;
+}
+
static uint64_t
gen8_read_40bit_a_counter(uint32_t *report, enum drm_i915_oa_format fmt, int
a_id)
{
@@ -524,6 +543,8 @@ init_sys_info(void)
test_set_name,
test_set_uuid);
+ oa_exp_1_millisec = max_oa_exponent_for_period_lte(100);
+
snprintf(buf, sizeof(buf),
"/sys/class/drm/card%d/metrics/%s/id",
card,
@@ -593,7 +614,7 @@ test_system_wide_paranoid(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
- DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
+ DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
@@ -619,7 +640,7 @@ test_system_wide_paranoid(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
- DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
+ DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
};
struct drm_i915_perf_open_param param = {
.flags = I915_PERF_FLAG_FD_CLOEXEC |
@@ -653,7 +674,7 @@ test_invalid_open_flags(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
- DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
+ DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
};
struct drm_i915_perf_open_param param = {
.flags = ~0, /* Undefined flag bits set! */
@@ -673,7 +694,7 @@ test_invalid_oa_metric_set_id(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
- DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
+ DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
DRM_I915_PERF_PROP_OA_METRICS_SET, UINT64_MAX,
};
struct drm_i915_perf_open_param param = {
@@ -708,7 +729,7 @@ test_invalid_oa_format_id(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
- DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
+ DRM_I915_PERF_PROP_OA_EXPONENT, oa_exp_1_millisec,
DRM_I915_PERF_PROP_OA_
[Intel-gfx] [PATCH i-g-t 00/29] Update i915 perf tests for Gen8+
Hi, Apologies for this unfriendly series, in the end squashing everything into a single commit didn't look too good. We went through quite a few iterations to figure all the instability issues on Gen8+. This has finally reached a state where you can run the tests on a machine with other applications using the GPU in parallel. This gives us confidence that we now have a pretty good understanding of how the filtering of reports should be done as well as things that might affect periodic report timings. Most of Rob's patches are already reviewed or co-authored. I'm not really expecting a someone to thoroughly review all of these changes as it takes a fair amount of time to get into all of the fiddly details, but if someone could look at the end result and quickly read through to check there isn't something terribly wrong, that would be helpful. Thanks a lot, Lionel Landwerlin (8): igt/perf: add utility function for checking periodic reports igt/perf: make stream_fd a global variable igt/perf: update max buffer size for reading reports igt/perf: rework oa-exponent test igt/perf: make enable-disable more reliable igt/perf: make buffer-fill more reliable igt/perf: load gt_boost_freq_mhz as max gt frequency igt/perf: remove unused frequency functions Robert Bragg (21): igt/perf: generalize lookup for test metric set igt/perf: improve robustness of polling/blocking tests igt/perf: init timestamp freq and oa format per devid igt/perf: update init_sys_info for skl with per-gt configs igt/perf: add gen8 formats igt/perf: fix a counter indexing igt/perf: generalize checks for undefined A counters igt/perf: generalize reading gpu ticks from reports igt/perf: move timebase + oa exponent utilities up igt/perf: wrap emission of MI_REPORT_PERF_COUNT igt/perf: handling printing gen8 formats igt/perf: avoid assumptions about oa exponent <-> freq mappings igt/perf: allow 10% margin matching oa/sysfs freq in test_oa_exponents igt/perf: s/test_perf_ctx_mi_rpc/hsw_test_single_ctx_counters/ igt/perf: don't assume constant of 40 EUs igt/perf: consider ctx-switch reports while polling/blocking igt/perf: factor out oa report sanity checking igt/perf: print [un]slice freq and report reasons in debug igt/perf: update print_reports to print context ID igt/perf: add per context filtering test for gen8+ igt/perf: fix rc6 test tests/perf.c | 2896 +++--- 1 file changed, 2339 insertions(+), 557 deletions(-) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 14/29] igt/perf: s/test_perf_ctx_mi_rpc/hsw_test_single_ctx_counters/
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index c8092eaa..62bfd80f 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -2177,9 +2177,15 @@ emit_stall_timestamp_and_rpc(struct intel_batchbuffer
*batch,
* should be able to configure the OA unit for per-context metrics (for a
* context associated with that process' drm file descriptor) and the counters
* should only relate to that specific context.
+ *
+ * Unfortunately only Haswell limits the progression of OA counters for a
+ * single context and so this unit test is Haswell specific. For Gen8+ although
+ * reports read via i915 perf can be filtered for a single context the counters
+ * themselves always progress as global/system-wide counters affected by all
+ * contexts.
*/
static void
-test_per_ctx_mi_rpc(void)
+hsw_test_single_ctx_counters(void)
{
uint64_t properties[] = {
DRM_I915_PERF_PROP_CTX_HANDLE, UINT64_MAX, /* updated below */
@@ -2638,8 +2644,16 @@ igt_main
igt_subtest("mi-rpc")
test_mi_rpc();
- igt_subtest("mi-rpc-per-ctx")
- test_per_ctx_mi_rpc();
+ igt_subtest("unprivileged-singled-ctx-counters") {
+ /* For Gen8+ the OA unit can no longer be made to clock gate
+* for a specific context. Additionally the partial-replacement
+* functionality to HW filter timer reports for a specific
+* context (SKL+) can't stop multiple applications viewing
+* system-wide data via MI_REPORT_PERF_COUNT commands.
+*/
+ igt_require(IS_HASWELL(devid));
+ hsw_test_single_ctx_counters();
+ }
igt_subtest("rc6-disable")
test_rc6_disable();
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 04/29] igt/perf: update init_sys_info for skl with per-gt configs
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/tests/perf.c b/tests/perf.c
index f518bcc1..29487cdf 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -381,7 +381,20 @@ init_sys_info(void)
} else if (IS_CHERRYVIEW(devid)) {
test_set_uuid = "4a534b07-cba3-414d-8d60-874830e883aa";
} else if (IS_SKYLAKE(devid)) {
- test_set_uuid = "544a0c1f-5863-4682-bc59-778b7eab8303";
+ switch (intel_gt(devid)) {
+ case 1:
+ test_set_uuid =
"1651949f-0ac0-4cb1-a06f-dafd74a407d1";
+ break;
+ case 2:
+ test_set_uuid =
"2b985803-d3c9-4629-8a4f-634bfecba0e8";
+ break;
+ case 3:
+ test_set_uuid =
"882fa433-1f4a-4a67-a962-c741888fe5f5";
+ break;
+ default:
+ igt_debug("unsupport Skylake GT size\n");
+ return false;
+ }
timestamp_frequency = 1200;
} else if (IS_BROXTON(devid)) {
test_set_uuid = "5ee72f5c-092f-421e-8b70-225f7c3e9612";
--
2.11.0
___
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[Intel-gfx] [PATCH i-g-t 17/29] igt/perf: factor out oa report sanity checking
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 274 +++
1 file changed, 202 insertions(+), 72 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index fe5ff0fc..08ee8665 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -261,6 +261,8 @@ static uint64_t oa_exp_1_millisec;
static igt_render_copyfunc_t render_copy = NULL;
static uint32_t (*read_report_ticks)(uint32_t *report,
enum drm_i915_oa_format format);
+static void (*sanity_check_reports)(uint32_t *oa_report0, uint32_t *oa_report1,
+ enum drm_i915_oa_format format);
static int
__perf_open(int fd, struct drm_i915_perf_open_param *param)
@@ -472,6 +474,90 @@ oa_exponent_to_ns(int exponent)
return 10ULL * (2ULL << exponent) / timestamp_frequency;
}
+static void
+hsw_sanity_check_render_basic_reports(uint32_t *oa_report0, uint32_t
*oa_report1,
+ enum drm_i915_oa_format fmt)
+{
+ uint32_t time_delta = timebase_scale(oa_report1[1] - oa_report0[1]);
+ uint32_t clock_delta;
+ uint32_t max_delta;
+
+ igt_assert_neq(time_delta, 0);
+
+ /* As a special case we have to consider that on Haswell we
+* can't explicitly derive a clock delta for all OA report
+* formats...
+*/
+ if (oa_formats[fmt].n_c == 0) {
+ /* Assume running at max freq for sake of
+* below sanity check on counters... */
+ clock_delta = (gt_max_freq_mhz *
+ (uint64_t)time_delta) / 1000;
+ } else {
+ uint32_t ticks0 = read_report_ticks(oa_report0, fmt);
+ uint32_t ticks1 = read_report_ticks(oa_report1, fmt);
+ uint64_t freq;
+
+ clock_delta = ticks1 - ticks0;
+
+ igt_assert_neq(clock_delta, 0);
+
+ freq = ((uint64_t)clock_delta * 1000) / time_delta;
+ igt_debug("freq = %"PRIu64"\n", freq);
+
+ igt_assert(freq <= gt_max_freq_mhz);
+ }
+
+ igt_debug("clock delta = %"PRIu32"\n", clock_delta);
+
+ /* The maximum rate for any HSW counter =
+* clock_delta * N EUs
+*
+* Sanity check that no counters exceed this delta.
+*/
+ max_delta = clock_delta * n_eus;
+
+ /* 40bit A counters were only introduced for Gen8+ */
+ igt_assert_eq(oa_formats[fmt].n_a40, 0);
+
+ for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ uint32_t *a0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].a_off);
+ uint32_t *a1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].a_off);
+ int a_id = oa_formats[fmt].first_a + j;
+ uint32_t delta = a1[j] - a0[j];
+
+ if (undefined_a_counters[a_id])
+ continue;
+
+ igt_debug("A%d: delta = %"PRIu32"\n", a_id, delta);
+ igt_assert(delta <= max_delta);
+ }
+
+ for (int j = 0; j < oa_formats[fmt].n_b; j++) {
+ uint32_t *b0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].b_off);
+ uint32_t *b1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].b_off);
+ uint32_t delta = b1[j] - b0[j];
+
+ igt_debug("B%d: delta = %"PRIu32"\n", j, delta);
+ igt_assert(delta <= max_delta);
+ }
+
+ for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ uint32_t *c0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].c_off);
+ uint32_t *c1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].c_off);
+ uint32_t delta = c1[j] - c0[j];
+
+ igt_debug("C%d: delta = %"PRIu32"\n", j, delta);
+ igt_assert(delta <= max_delta);
+ }
+}
+
static uint64_t
gen8_read_40bit_a_counter(uint32_t *report, enum drm_i915_oa_format fmt, int
a_id)
{
@@ -492,6 +578,119 @@ gen8_40bit_a_delta(uint64_t value0, uint64_t value1)
return value1 - value0;
}
+/* The TestOa metric set is designed so */
+static void
+gen8_sanity_check_test_oa_reports(uint32_t *oa_report0, uint32_t *oa_report1,
+ enum drm_i915_oa_format fmt)
+{
+ uint32_t time_delta = timebase_scale(oa_report1[1] - oa_report0[1]);
+ uint32_t ticks0 = read_report_ticks(oa_report0, fmt);
+ uint32_t ticks1 = read_report_ticks(oa_report1, fmt);
+ uint32_t clock_delta = ticks1 - ticks0;
+ uint32_t max_delta;
+ uint64_t freq;
+ uint32_t *rpt0_b = (uint32_t *)(((uint
[Intel-gfx] [PATCH i-g-t 18/29] igt/perf: print [un]slice freq and report reasons in debug
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 58 +-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/tests/perf.c b/tests/perf.c
index 08ee8665..ab8db296 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -428,6 +428,28 @@ gen8_read_report_ticks(uint32_t *report, enum
drm_i915_oa_format format)
return report[3];
}
+static const char *
+gen8_read_report_reason(const uint32_t *report)
+{
+ uint32_t reason = ((report[0] >> OAREPORT_REASON_SHIFT) &
+ OAREPORT_REASON_MASK);
+
+ if (reason & (1<<0))
+ return "timer";
+ else if (reason & (1<<1))
+ return "internal trigger 1";
+ else if (reason & (1<<2))
+ return "internal trigger 2";
+ else if (reason & (1<<3))
+ return "context switch";
+ else if (reason & (1<<4))
+ return "GO 1->0 transition (enter RC6)";
+ else if (reason & (1<<5))
+ return "[un]slice clock ratio change";
+ else
+ return "unknown";
+}
+
static uint64_t
timebase_scale(uint32_t u32_delta)
{
@@ -749,7 +771,7 @@ init_sys_info(void)
test_set_uuid =
"882fa433-1f4a-4a67-a962-c741888fe5f5";
break;
default:
- igt_debug("unsupport Skylake GT size\n");
+ igt_debug("unsupported Skylake GT size\n");
return false;
}
timestamp_frequency = 1200;
@@ -1159,6 +1181,20 @@ open_and_read_2_oa_reports(int format_id,
}
static void
+gen8_read_report_clock_ratios(uint32_t *report,
+ uint32_t *slice_freq_mhz,
+ uint32_t *unslice_freq_mhz)
+{
+ uint32_t unslice_freq = report[0] & 0x1ff;
+ uint32_t slice_freq_low = (report[0] >> 25) & 0x7f;
+ uint32_t slice_freq_high = (report[0] >> 9) & 0x3;
+ uint32_t slice_freq = slice_freq_low | (slice_freq_high << 7);
+
+ *slice_freq_mhz = (slice_freq * 1) / 1000;
+ *unslice_freq_mhz = (unslice_freq * 1) / 1000;
+}
+
+static void
print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
{
igt_debug("TIMESTAMP: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
@@ -1174,6 +1210,26 @@ print_reports(uint32_t *oa_report0, uint32_t
*oa_report1, int fmt)
clock0, clock1, clock1 - clock0);
}
+ if (intel_gen(devid) >= 8) {
+ uint32_t slice_freq0, slice_freq1, unslice_freq0, unslice_freq1;
+ const char *reason0 = gen8_read_report_reason(oa_report0);
+ const char *reason1 = gen8_read_report_reason(oa_report1);
+
+ gen8_read_report_clock_ratios(oa_report0,
+ &slice_freq0, &unslice_freq0);
+ gen8_read_report_clock_ratios(oa_report1,
+ &slice_freq1, &unslice_freq1);
+
+ igt_debug("SLICE CLK: 1st = %umhz, 2nd = %umhz, delta = %d\n",
+ slice_freq0, slice_freq1,
+ ((int)slice_freq1 - (int)slice_freq0));
+ igt_debug("UNSLICE CLK: 1st = %umhz, 2nd = %umhz, delta = %d\n",
+ unslice_freq0, unslice_freq1,
+ ((int)unslice_freq1 - (int)unslice_freq0));
+
+ igt_debug("REASONS: 1st = \"%s\", 2nd = \"%s\"\n", reason0,
reason1);
+ }
+
/* Gen8+ has some 40bit A counters... */
for (int j = 0; j < oa_formats[fmt].n_a40; j++) {
uint64_t value0 = gen8_read_40bit_a_counter(oa_report0, fmt, j);
--
2.11.0
___
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[Intel-gfx] [PATCH i-g-t 03/29] igt/perf: init timestamp freq and oa format per devid
From: Robert Bragg
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
---
tests/perf.c | 120 +--
1 file changed, 67 insertions(+), 53 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index df0120b2..f518bcc1 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -82,15 +82,20 @@ IGT_TEST_DESCRIPTION("Test the i915 perf metrics streaming
interface");
#define DRM_IOCTL_I915_PERF_OPEN DRM_IOW(DRM_COMMAND_BASE +
DRM_I915_PERF_OPEN, struct drm_i915_perf_open_param)
enum drm_i915_oa_format {
- I915_OA_FORMAT_A13 = 1,
- I915_OA_FORMAT_A29,
- I915_OA_FORMAT_A13_B8_C8,
- I915_OA_FORMAT_B4_C8,
- I915_OA_FORMAT_A45_B8_C8,
- I915_OA_FORMAT_B4_C8_A16,
- I915_OA_FORMAT_C4_B8,
-
- I915_OA_FORMAT_MAX /* non-ABI */
+ I915_OA_FORMAT_A13 = 1, /* HSW only */
+ I915_OA_FORMAT_A29, /* HSW only */
+ I915_OA_FORMAT_A13_B8_C8, /* HSW only */
+ I915_OA_FORMAT_B4_C8, /* HSW only */
+ I915_OA_FORMAT_A45_B8_C8, /* HSW only */
+ I915_OA_FORMAT_B4_C8_A16, /* HSW only */
+ I915_OA_FORMAT_C4_B8, /* HSW+ */
+
+ /* Gen8+ */
+ I915_OA_FORMAT_A12,
+ I915_OA_FORMAT_A12_B8_C8,
+ I915_OA_FORMAT_A32u40_A4u32_B8_C8,
+
+ I915_OA_FORMAT_MAX /* non-ABI */
};
enum drm_i915_perf_property_id {
@@ -202,6 +207,7 @@ static uint64_t gt_min_freq_mhz = 0;
static uint64_t gt_max_freq_mhz = 0;
static uint64_t timestamp_frequency = 1250;
+static enum drm_i915_oa_format test_oa_format;
static igt_render_copyfunc_t render_copy = NULL;
@@ -348,7 +354,7 @@ read_debugfs_u64_record(int fd, const char *file, const
char *key)
}
static bool
-lookup_test_metric_set_id(void)
+init_sys_info(void)
{
const char *test_set_name = NULL;
const char *test_set_uuid = NULL;
@@ -357,26 +363,32 @@ lookup_test_metric_set_id(void)
igt_assert_neq(card, -1);
igt_assert_neq(devid, 0);
+ timestamp_frequency = 1250;
+
if (IS_HASWELL(devid)) {
/* We don't have a TestOa metric set for Haswell so use
* RenderBasic
*/
test_set_name = "RenderBasic";
test_set_uuid = "403d8832-1a27-4aa6-a64e-f5389ce7b212";
- } else if (IS_BROADWELL(devid)) {
- test_set_name = "TestOa";
- test_set_uuid = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
- } else if (IS_CHERRYVIEW(devid)) {
- test_set_name = "TestOa";
- test_set_uuid = "4a534b07-cba3-414d-8d60-874830e883aa";
- } else if (IS_SKYLAKE(devid)) {
- test_set_name = "TestOa";
- test_set_uuid = "544a0c1f-5863-4682-bc59-778b7eab8303";
- } else if (IS_BROXTON(devid)) {
+ test_oa_format = I915_OA_FORMAT_A45_B8_C8;
+ } else {
test_set_name = "TestOa";
- test_set_uuid = "5ee72f5c-092f-421e-8b70-225f7c3e9612";
- } else
- return false;
+ test_oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
+
+ if (IS_BROADWELL(devid)) {
+ test_set_uuid = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
+ } else if (IS_CHERRYVIEW(devid)) {
+ test_set_uuid = "4a534b07-cba3-414d-8d60-874830e883aa";
+ } else if (IS_SKYLAKE(devid)) {
+ test_set_uuid = "544a0c1f-5863-4682-bc59-778b7eab8303";
+ timestamp_frequency = 1200;
+ } else if (IS_BROXTON(devid)) {
+ test_set_uuid = "5ee72f5c-092f-421e-8b70-225f7c3e9612";
+ timestamp_frequency = 1920;
+ } else
+ return false;
+ }
igt_debug("%s metric set UUID = %s\n",
test_set_name,
@@ -456,7 +468,7 @@ test_system_wide_paranoid(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
- DRM_I915_PERF_PROP_OA_FORMAT, I915_OA_FORMAT_A45_B8_C8,
+ DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
};
struct drm_i915_perf_open_param param = {
@@ -482,7 +494,7 @@ test_system_wide_paranoid(void)
/* OA unit configuration */
DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
- DRM_I915_PERF_PROP_OA_FORMAT, I915_OA_FORMAT_A45_B8_C8,
+ DRM_I915_PERF_PROP_OA_FORMAT, test_oa_format,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
};
struct drm_i915_perf_open_param param = {
@@ -516,7 +528,7 @@ test_invalid_open_flags(void)
/* OA unit configurati
[Intel-gfx] [PATCH i-g-t 01/29] igt/perf: generalize lookup for test metric set
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 85
1 file changed, 57 insertions(+), 28 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 2a66bb63..0422e517 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -195,7 +195,7 @@ static int drm_fd = -1;
static uint32_t devid;
static int card = -1;
-static uint64_t hsw_render_basic_id = UINT64_MAX;
+static uint64_t test_metric_set_id = UINT64_MAX;
static uint64_t gt_min_freq_mhz_saved = 0;
static uint64_t gt_max_freq_mhz_saved = 0;
static uint64_t gt_min_freq_mhz = 0;
@@ -348,17 +348,46 @@ read_debugfs_u64_record(int fd, const char *file, const
char *key)
}
static bool
-lookup_hsw_render_basic_id(void)
+lookup_test_metric_set_id(void)
{
+ const char *test_set_name = NULL;
+ const char *test_set_uuid = NULL;
char buf[256];
igt_assert_neq(card, -1);
+ igt_assert_neq(devid, 0);
+
+ if (IS_HASWELL(devid)) {
+ /* We don't have a TestOa metric set for Haswell so use
+* RenderBasic
+*/
+ test_set_name = "RenderBasic";
+ test_set_uuid = "403d8832-1a27-4aa6-a64e-f5389ce7b212";
+ } else if (IS_BROADWELL(devid)) {
+ test_set_name = "TestOa";
+ test_set_uuid = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
+ } else if (IS_CHERRYVIEW(devid)) {
+ test_set_name = "TestOa";
+ test_set_uuid = "4a534b07-cba3-414d-8d60-874830e883aa";
+ } else if (IS_SKYLAKE(devid)) {
+ test_set_name = "TestOa";
+ test_set_uuid = "544a0c1f-5863-4682-bc59-778b7eab8303";
+ } else if (IS_BROXTON(devid)) {
+ test_set_name = "TestOa";
+ test_set_uuid = "5ee72f5c-092f-421e-8b70-225f7c3e9612";
+ } else
+ return false;
+
+ igt_debug("%s metric set UUID = %s\n",
+ test_set_name,
+ test_set_uuid);
snprintf(buf, sizeof(buf),
-
"/sys/class/drm/card%d/metrics/403d8832-1a27-4aa6-a64e-f5389ce7b212/id",
-card);
+"/sys/class/drm/card%d/metrics/%s/id",
+card,
+test_set_uuid);
- return try_read_u64_file(buf, &hsw_render_basic_id);
+ return try_read_u64_file(buf, &test_metric_set_id);
}
static void
@@ -426,7 +455,7 @@ test_system_wide_paranoid(void)
DRM_I915_PERF_PROP_SAMPLE_OA, true,
/* OA unit configuration */
- DRM_I915_PERF_PROP_OA_METRICS_SET, hsw_render_basic_id,
+ DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, I915_OA_FORMAT_A45_B8_C8,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
};
@@ -452,7 +481,7 @@ test_system_wide_paranoid(void)
DRM_I915_PERF_PROP_SAMPLE_OA, true,
/* OA unit configuration */
- DRM_I915_PERF_PROP_OA_METRICS_SET, hsw_render_basic_id,
+ DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, I915_OA_FORMAT_A45_B8_C8,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
};
@@ -486,7 +515,7 @@ test_invalid_open_flags(void)
DRM_I915_PERF_PROP_SAMPLE_OA, true,
/* OA unit configuration */
- DRM_I915_PERF_PROP_OA_METRICS_SET, hsw_render_basic_id,
+ DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_FORMAT, I915_OA_FORMAT_A45_B8_C8,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
};
@@ -525,7 +554,7 @@ test_invalid_oa_metric_set_id(void)
do_ioctl_err(drm_fd, DRM_IOCTL_I915_PERF_OPEN, ¶m, EINVAL);
/* Check that we aren't just seeing false positives... */
- properties[ARRAY_SIZE(properties) - 1] = hsw_render_basic_id;
+ properties[ARRAY_SIZE(properties) - 1] = test_metric_set_id;
stream_fd = __perf_open(drm_fd, ¶m);
close(stream_fd);
@@ -542,7 +571,7 @@ test_invalid_oa_format_id(void)
DRM_I915_PERF_PROP_SAMPLE_OA, true,
/* OA unit configuration */
- DRM_I915_PERF_PROP_OA_METRICS_SET, hsw_render_basic_id,
+ DRM_I915_PERF_PROP_OA_METRICS_SET, test_metric_set_id,
DRM_I915_PERF_PROP_OA_EXPONENT, 13, /* 1 millisecond */
DRM_I915_PERF_PROP_OA_FORMAT, UINT64_MAX,
};
@@ -576,7 +605,7 @@ test_missing_sample_flags(void)
/* No _PROP_SAMPLE_xyz flags */
/* OA unit configuration */
- DRM_I915_PERF_PROP_OA_METRICS_SET, hsw_render_basic_id,
+ DRM_I
[Intel-gfx] [PATCH i-g-t 11/29] igt/perf: handling printing gen8 formats
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 73 +---
1 file changed, 55 insertions(+), 18 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 864c465c..15f41246 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -446,6 +446,26 @@ max_oa_exponent_for_higher_freq(uint64_t freq)
return -1;
}
+static uint64_t
+gen8_read_40bit_a_counter(uint32_t *report, enum drm_i915_oa_format fmt, int
a_id)
+{
+ uint8_t *a40_high = (((uint8_t *)report) +
oa_formats[fmt].a40_high_off);
+ uint32_t *a40_low = (uint32_t *)(((uint8_t *)report) +
+oa_formats[fmt].a40_low_off);
+ uint64_t high = (uint64_t)(a40_high[a_id]) << 32;
+
+ return a40_low[a_id] | high;
+}
+
+static uint64_t
+gen8_40bit_a_delta(uint64_t value0, uint64_t value1)
+{
+ if (value0 > value1)
+ return (1ULL << 40) + value1 - value0;
+ else
+ return value1 - value0;
+}
+
static bool
init_sys_info(void)
{
@@ -895,30 +915,37 @@ open_and_read_2_oa_reports(int format_id,
static void
print_reports(uint32_t *oa_report0, uint32_t *oa_report1, int fmt)
{
- uint32_t *a0, *b0, *c0;
- uint32_t *a1, *b1, *c1;
-
- /* Not ideal naming here with a0 or a1
-* differentiating report0 or 1 not A counter 0 or 1
-*/
- a0 = (uint32_t *)(((uint8_t *)oa_report0) + oa_formats[fmt].a_off);
- b0 = (uint32_t *)(((uint8_t *)oa_report0) + oa_formats[fmt].b_off);
- c0 = (uint32_t *)(((uint8_t *)oa_report0) + oa_formats[fmt].c_off);
-
- a1 = (uint32_t *)(((uint8_t *)oa_report1) + oa_formats[fmt].a_off);
- b1 = (uint32_t *)(((uint8_t *)oa_report1) + oa_formats[fmt].b_off);
- c1 = (uint32_t *)(((uint8_t *)oa_report1) + oa_formats[fmt].c_off);
-
igt_debug("TIMESTAMP: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
oa_report0[1], oa_report1[1], oa_report1[1] - oa_report0[1]);
- if (oa_formats[fmt].n_c) {
- igt_debug("CLOCK: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
- c0[2], c1[2], c1[2] - c0[2]);
- } else
+ if (IS_HASWELL(devid) && oa_formats[fmt].n_c == 0) {
igt_debug("CLOCK = N/A\n");
+ } else {
+ uint32_t clock0 = read_report_ticks(oa_report0, fmt);
+ uint32_t clock1 = read_report_ticks(oa_report1, fmt);
+
+ igt_debug("CLOCK: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
+ clock0, clock1, clock1 - clock0);
+ }
+
+ /* Gen8+ has some 40bit A counters... */
+ for (int j = 0; j < oa_formats[fmt].n_a40; j++) {
+ uint64_t value0 = gen8_read_40bit_a_counter(oa_report0, fmt, j);
+ uint64_t value1 = gen8_read_40bit_a_counter(oa_report1, fmt, j);
+ uint64_t delta = gen8_40bit_a_delta(value0, value1);
+
+ if (undefined_a_counters[j])
+ continue;
+
+ igt_debug("A%d: 1st = %"PRIu64", 2nd = %"PRIu64", delta =
%"PRIu64"\n",
+ j, value0, value1, delta);
+ }
for (int j = 0; j < oa_formats[fmt].n_a; j++) {
+ uint32_t *a0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].a_off);
+ uint32_t *a1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].a_off);
int a_id = oa_formats[fmt].first_a + j;
uint32_t delta = a1[j] - a0[j];
@@ -930,13 +957,23 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1,
int fmt)
}
for (int j = 0; j < oa_formats[fmt].n_b; j++) {
+ uint32_t *b0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].b_off);
+ uint32_t *b1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].b_off);
uint32_t delta = b1[j] - b0[j];
+
igt_debug("B%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
j, b0[j], b1[j], delta);
}
for (int j = 0; j < oa_formats[fmt].n_c; j++) {
+ uint32_t *c0 = (uint32_t *)(((uint8_t *)oa_report0) +
+ oa_formats[fmt].c_off);
+ uint32_t *c1 = (uint32_t *)(((uint8_t *)oa_report1) +
+ oa_formats[fmt].c_off);
uint32_t delta = c1[j] - c0[j];
+
igt_debug("C%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
j, c0[j], c1[j], delta);
}
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 07/29] igt/perf: generalize checks for undefined A counters
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 5a6bd05a..fe39f4dd 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -232,6 +232,9 @@ static bool hsw_undefined_a_counters[45] = {
[44] = true,
};
+/* No A counters currently reserved/undefined for gen8+ so far */
+static bool gen8_undefined_a_counters[45];
+
static int drm_fd = -1;
static uint32_t devid;
static int card = -1;
@@ -244,6 +247,7 @@ static uint64_t gt_max_freq_mhz = 0;
static uint64_t timestamp_frequency = 1250;
static enum drm_i915_oa_format test_oa_format;
+static bool *undefined_a_counters;
static igt_render_copyfunc_t render_copy = NULL;
@@ -408,9 +412,11 @@ init_sys_info(void)
test_set_name = "RenderBasic";
test_set_uuid = "403d8832-1a27-4aa6-a64e-f5389ce7b212";
test_oa_format = I915_OA_FORMAT_A45_B8_C8;
+ undefined_a_counters = hsw_undefined_a_counters;
} else {
test_set_name = "TestOa";
test_oa_format = I915_OA_FORMAT_A32u40_A4u32_B8_C8;
+ undefined_a_counters = gen8_undefined_a_counters;
if (IS_BROADWELL(devid)) {
test_set_uuid = "d6de6f55-e526-4f79-a6a6-d7315c09044e";
@@ -867,7 +873,7 @@ print_reports(uint32_t *oa_report0, uint32_t *oa_report1,
int fmt)
int a_id = oa_formats[fmt].first_a + j;
uint32_t delta = a1[j] - a0[j];
- if (hsw_undefined_a_counters[a_id])
+ if (undefined_a_counters[a_id])
continue;
igt_debug("A%d: 1st = %"PRIu32", 2nd = %"PRIu32", delta =
%"PRIu32"\n",
@@ -978,7 +984,7 @@ test_oa_formats(void)
int a_id = oa_formats[i].first_a + j;
uint32_t delta = a1[j] - a0[j];
- if (hsw_undefined_a_counters[a_id])
+ if (undefined_a_counters[a_id])
continue;
igt_debug("A%d: delta = %"PRIu32"\n", a_id, delta);
--
2.11.0
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[Intel-gfx] [PATCH i-g-t 02/29] igt/perf: improve robustness of polling/blocking tests
From: Robert Bragg
There were a couple of problems with both of these tests that could lead
to false negatives addressed by this patch.
1) The upper limit for the number of iterations missed a +1 to consider
that there might be a sample immediately available at the start of the
loop.
2) The tests didn't consider that a duration measured in terms of
(end-start) ticks could be +- 1 tick since we don't know the
fractional part of the tick counts. Our threshold for stime being <
one tick could have a false negative for any real stime between 1 to
10 milliseconds depending on luck.
The tests now both run for a lot longer (1000 x tick duration, or
typically 10 seconds each) so that a single tick represents a much
smaller proportion of the total duration (0.1%) and the stime thresholds
are now set at 1% of the total duration.
Signed-off-by: Robert Bragg
---
tests/perf.c | 139 +++
1 file changed, 93 insertions(+), 46 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 0422e517..df0120b2 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -1294,18 +1294,50 @@ test_blocking(void)
struct tms end_times;
int64_t user_ns, kernel_ns;
int64_t tick_ns = 10 / sysconf(_SC_CLK_TCK);
+ int64_t test_duration_ns = tick_ns * 1000;
+
+ /* Based on the 40ms OA sampling period set above: max OA samples: */
+ int max_iterations = (test_duration_ns / 4000ull) + 1;
+
+ /* It's a bit tricky to put a lower limit here, but we expect a
+* relatively low latency for seeing reports, while we don't currently
+* give any control over this in the api.
+*
+* We assume a maximum latency of 6 millisecond to deliver a POLLIN and
+* read() after a new sample is written (46ms per iteration) considering
+* the knowledge that that the driver uses a 200Hz hrtimer (5ms period)
+* to check for data and giving some time to read().
+*/
+ int min_iterations = (test_duration_ns / 4600ull);
+
int64_t start;
int n = 0;
times(&start_times);
- /* Loop for 600ms performing blocking reads while the HW is sampling at
+ igt_debug("tick length = %dns, test duration = %"PRIu64"ns, min iter. =
%d, max iter. = %d\n",
+ (int)tick_ns, test_duration_ns,
+ min_iterations, max_iterations);
+
+ /* In the loop we perform blocking polls while the HW is sampling at
* ~25Hz, with the expectation that we spend most of our time blocked
* in the kernel, and shouldn't be burning cpu cycles in the kernel in
* association with this process (verified by looking at stime before
* and after loop).
+*
+* We're looking to assert that less than 1% of the test duration is
+* spent in the kernel dealing with polling and read()ing.
+*
+* The test runs for a relatively long time considering the very low
+* resolution of stime in ticks of typically 10 milliseconds. Since we
+* don't know the fractional part of tick values we read from userspace
+* so our minimum threshold needs to be >= one tick since any
+* measurement might really be +- tick_ns (assuming we effectively get
+* floor(real_stime)).
+*
+* We Loop for 1000 x tick_ns so one tick corresponds to 0.1%
*/
- for (start = get_time(); (get_time() - start) < 6; /* nop */) {
+ for (start = get_time(); (get_time() - start) < test_duration_ns; /*
nop */) {
int ret;
while ((ret = read(stream_fd, buf, sizeof(buf))) < 0 &&
@@ -1325,33 +1357,25 @@ test_blocking(void)
user_ns = (end_times.tms_utime - start_times.tms_utime) * tick_ns;
kernel_ns = (end_times.tms_stime - start_times.tms_stime) * tick_ns;
- igt_debug("%d blocking reads in 500 milliseconds, with 1KHz OA
sampling\n", n);
- igt_debug("time in userspace = %"PRIu64"ns (start utime = %d, end = %d,
ns ticks per sec = %d)\n",
- user_ns, (int)start_times.tms_utime,
(int)end_times.tms_utime, (int)tick_ns);
- igt_debug("time in kernelspace = %"PRIu64"ns (start stime = %d, end =
%d, ns ticks per sec = %d)\n",
- kernel_ns, (int)start_times.tms_stime,
(int)end_times.tms_stime, (int)tick_ns);
+ igt_debug("%d blocking reads during test with 25Hz OA sampling\n", n);
+ igt_debug("time in userspace = %"PRIu64"ns (+-%dns) (start utime = %d,
end = %d)\n",
+ user_ns, (int)tick_ns,
+ (int)start_times.tms_utime, (int)end_times.tms_utime);
+ igt_debug("time in kernelspace = %"PRIu64"ns (+-%dns) (start stime =
%d, end = %d)\n",
+ kernel_ns, (int)tick_ns,
+ (int)start_times.tms_stime, (int)end_times.tms_stime);
/* With completely broken blocking (but also not ret
[Intel-gfx] [PATCH i-g-t 09/29] igt/perf: move timebase + oa exponent utilities up
From: Robert Bragg
Signed-off-by: Robert Bragg
Reviewed-by: Lionel Landwerlin
---
tests/perf.c | 56
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/tests/perf.c b/tests/perf.c
index 48e8750f..600fa7d9 100644
--- a/tests/perf.c
+++ b/tests/perf.c
@@ -417,6 +417,34 @@ gen8_read_report_ticks(uint32_t *report, enum
drm_i915_oa_format format)
return report[3];
}
+static uint64_t
+timebase_scale(uint32_t u32_delta)
+{
+ return ((uint64_t)u32_delta * NSEC_PER_SEC) / timestamp_frequency;
+}
+
+/* Return the largest OA exponent that will still result in a sampling
+ * frequency higher than the given frequency.
+ */
+static int
+max_oa_exponent_for_higher_freq(uint64_t freq)
+{
+ /* NB: timebase_scale() takes a uint32_t and an exponent of 30
+* would already represent a period of ~3 minutes so there's
+* really no need to consider higher exponents.
+*/
+ for (int i = 0; i < 30; i++) {
+ uint64_t oa_period = timebase_scale(2 << i);
+ uint32_t oa_freq = NSEC_PER_SEC / oa_period;
+
+ if (oa_freq <= freq)
+ return max(0, i - 1);
+ }
+
+ igt_assert(!"reached");
+ return -1;
+}
+
static bool
init_sys_info(void)
{
@@ -531,12 +559,6 @@ gt_frequency_range_restore(void)
gt_max_freq_mhz = gt_max_freq_mhz_saved;
}
-static uint64_t
-timebase_scale(uint32_t u32_delta)
-{
- return ((uint64_t)u32_delta * NSEC_PER_SEC) / timestamp_frequency;
-}
-
/* CAP_SYS_ADMIN is required to open system wide metrics, unless the system
* control parameter dev.i915.perf_stream_paranoid == 0 */
static void
@@ -1184,28 +1206,6 @@ test_invalid_oa_exponent(void)
}
}
-/* Return the largest OA exponent that will still result in a sampling
- * frequency higher than the given frequency.
- */
-static int
-max_oa_exponent_for_higher_freq(uint64_t freq)
-{
- /* NB: timebase_scale() takes a uint32_t and an exponent of 30
-* would already represent a period of ~3 minutes so there's
-* really no need to consider higher exponents.
-*/
- for (int i = 0; i < 30; i++) {
- uint64_t oa_period = timebase_scale(2 << i);
- uint32_t oa_freq = NSEC_PER_SEC / oa_period;
-
- if (oa_freq <= freq)
- return max(0, i - 1);
- }
-
- igt_assert(!"reached");
- return -1;
-}
-
/* The lowest periodic sampling exponent equates to a period of 160 nanoseconds
* or a frequency of 6.25MHz which is only possible to request as root by
* default. By default the maximum OA sampling rate is 100KHz
--
2.11.0
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: LPE audio runtime PM and multipipe
== Series Details == Series: drm/i915: LPE audio runtime PM and multipipe URL : https://patchwork.freedesktop.org/series/23526/ State : success == Summary == Series 23526v1 drm/i915: LPE audio runtime PM and multipipe https://patchwork.freedesktop.org/api/1.0/series/23526/revisions/1/mbox/ Test gem_exec_suspend: Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-kbl-7560u) fdo#100125 fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:428s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:424s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:587s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:507s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:493s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:479s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:410s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:408s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:418s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:492s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:482s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:452s fi-kbl-7560u total:278 pass:267 dwarn:1 dfail:0 fail:0 skip:10 time:571s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:452s fi-skl-6700hqtotal:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:574s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:457s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:500s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:436s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:530s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time:414s 7ffb3045557cbc7b49695b20416351e4e812179c drm-tip: 2017y-04m-25d-14h-42m-59s UTC integration manifest 1e6aff4 ALSA: x86: Register multiple PCM devices for the LPE audio card 94e8ba1 ALSA: x86: Split snd_intelhad into card and PCM specific structures 5efb22e ALSA: x86: Prepare LPE audio ctls for multiple PCMs d070759 drm/i915: Clean up the LPE audio platform data e00a731 drm/i915: Reorganize intel_lpe_audio_notify() arguments c9354d7 drm/i915: Remove hdmi_connected from LPE audio pdata b97f535 drm/i915: Replace tmds_clock_speed and link_rate with just ls_clock eed2aa0 drm/i915: Remove the unsued pending_notify from LPE platform data d947cd9 drm/i915: Stop pretending to mask/unmask LPE audio interrupts 7a53acb ALSA: x86: Clear the pdata.notify_lpe_audio pointer before teardown 8c0286e drm/i915: Fix runtime PM for LPE audio == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4548/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 07/11] drm/i915: Reorganize intel_lpe_audio_notify() arguments
From: Ville Syrjälä
Shuffle the arguments to intel_lpe_audio_notify() around a bit. Pipe
and port being the most important things, so let's put the first, and
thre rest can come in as is. Also constify the eld argument.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
drivers/gpu/drm/i915/intel_audio.c | 4 ++--
drivers/gpu/drm/i915/intel_lpe_audio.c | 8
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 876eee56a958..e6230f68ee80 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3721,8 +3721,8 @@ int intel_lpe_audio_init(struct drm_i915_private
*dev_priv);
void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);
void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv);
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int ls_clock,
- bool dp_output);
+ enum pipe pipe, enum port port,
+ const void *eld, int ls_clock, bool dp_output);
/* intel_i2c.c */
extern int intel_setup_gmbus(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_audio.c
b/drivers/gpu/drm/i915/intel_audio.c
index 79eeef25321f..d805b6e6fe71 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -632,7 +632,7 @@ void intel_audio_codec_enable(struct intel_encoder
*intel_encoder,
(int) port, (int) pipe);
}
- intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
+ intel_lpe_audio_notify(dev_priv, pipe, port, connector->eld,
crtc_state->port_clock,
intel_encoder->type == INTEL_OUTPUT_DP);
}
@@ -669,7 +669,7 @@ void intel_audio_codec_disable(struct intel_encoder
*intel_encoder)
(int) port, (int) pipe);
}
- intel_lpe_audio_notify(dev_priv, NULL, port, pipe, 0, false);
+ intel_lpe_audio_notify(dev_priv, pipe, port, NULL, 0, false);
}
/**
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 1696359bf6e5..d6aecf1d382b 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -306,17 +306,17 @@ void intel_lpe_audio_teardown(struct drm_i915_private
*dev_priv)
* intel_lpe_audio_notify() - notify lpe audio event
* audio driver and i915
* @dev_priv: the i915 drm device private data
+ * @pipe: pipe
+ * @port: port
* @eld : ELD data
- * @pipe: pipe id
- * @port: port id
* @ls_clock: Link symbol clock in kHz
* @dp_output: Driving a DP output?
*
* Notify lpe audio driver of eld change.
*/
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int ls_clock,
- bool dp_output)
+ enum pipe pipe, enum port port,
+ const void *eld, int ls_clock, bool dp_output)
{
unsigned long irq_flags;
struct intel_hdmi_lpe_audio_pdata *pdata = NULL;
--
2.10.2
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[Intel-gfx] [PATCH 05/11] drm/i915: Replace tmds_clock_speed and link_rate with just ls_clock
From: Ville Syrjälä
There's no need to distinguish between the DP link rate and HDMI TMDS
clock for the purposes of the LPE audio. Both are actually the same
thing more or less, which is the link symbol clock. So let's just
call the thing ls_clock and simplify the code.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_drv.h| 4 ++--
drivers/gpu/drm/i915/intel_audio.c | 19 ---
drivers/gpu/drm/i915/intel_lpe_audio.c | 14 ++
include/drm/intel_lpe_audio.h | 3 +--
sound/x86/intel_hdmi_audio.c | 11 ---
5 files changed, 21 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 357b6c6c2f04..876eee56a958 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3721,8 +3721,8 @@ int intel_lpe_audio_init(struct drm_i915_private
*dev_priv);
void intel_lpe_audio_teardown(struct drm_i915_private *dev_priv);
void intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv);
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int tmds_clk_speed,
- bool dp_output, int link_rate);
+ void *eld, int port, int pipe, int ls_clock,
+ bool dp_output);
/* intel_i2c.c */
extern int intel_setup_gmbus(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_audio.c
b/drivers/gpu/drm/i915/intel_audio.c
index 52c207e81f41..79eeef25321f 100644
--- a/drivers/gpu/drm/i915/intel_audio.c
+++ b/drivers/gpu/drm/i915/intel_audio.c
@@ -632,20 +632,9 @@ void intel_audio_codec_enable(struct intel_encoder
*intel_encoder,
(int) port, (int) pipe);
}
- switch (intel_encoder->type) {
- case INTEL_OUTPUT_HDMI:
- intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
- crtc_state->port_clock,
- false, 0);
- break;
- case INTEL_OUTPUT_DP:
- intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
- adjusted_mode->crtc_clock,
- true, crtc_state->port_clock);
- break;
- default:
- break;
- }
+ intel_lpe_audio_notify(dev_priv, connector->eld, port, pipe,
+ crtc_state->port_clock,
+ intel_encoder->type == INTEL_OUTPUT_DP);
}
/**
@@ -680,7 +669,7 @@ void intel_audio_codec_disable(struct intel_encoder
*intel_encoder)
(int) port, (int) pipe);
}
- intel_lpe_audio_notify(dev_priv, NULL, port, pipe, 0, false, 0);
+ intel_lpe_audio_notify(dev_priv, NULL, port, pipe, 0, false);
}
/**
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 79b9dca985ff..5a1a37e963f1 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -309,13 +309,14 @@ void intel_lpe_audio_teardown(struct drm_i915_private
*dev_priv)
* @eld : ELD data
* @pipe: pipe id
* @port: port id
- * @tmds_clk_speed: tmds clock frequency in Hz
+ * @ls_clock: Link symbol clock in kHz
+ * @dp_output: Driving a DP output?
*
* Notify lpe audio driver of eld change.
*/
void intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- void *eld, int port, int pipe, int tmds_clk_speed,
- bool dp_output, int link_rate)
+ void *eld, int port, int pipe, int ls_clock,
+ bool dp_output)
{
unsigned long irq_flags;
struct intel_hdmi_lpe_audio_pdata *pdata = NULL;
@@ -337,12 +338,8 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
pdata->eld.port_id = port;
pdata->eld.pipe_id = pipe;
pdata->hdmi_connected = true;
-
+ pdata->ls_clock = ls_clock;
pdata->dp_output = dp_output;
- if (tmds_clk_speed)
- pdata->tmds_clock_speed = tmds_clk_speed;
- if (link_rate)
- pdata->link_rate = link_rate;
/* Unmute the amp for both DP and HDMI */
I915_WRITE(VLV_AUD_PORT_EN_DBG(port),
@@ -352,6 +349,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
memset(pdata->eld.eld_data, 0,
HDMI_MAX_ELD_BYTES);
pdata->hdmi_connected = false;
+ pdata->ls_clock = 0;
pdata->dp_output = false;
/* Mute the amp for both DP and HDMI */
diff --git a/include/drm/intel_lpe_audio.h
[Intel-gfx] [PATCH 10/11] ALSA: x86: Split snd_intelhad into card and PCM specific structures
From: Ville Syrjälä
To allow multiple PCM devices to be registered for the LPE audio card,
split the private data into card and PCM specific chunks. For now we'll
stick to just one PCM device as before.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
sound/x86/intel_hdmi_audio.c | 228 +--
sound/x86/intel_hdmi_audio.h | 16 ++-
2 files changed, 144 insertions(+), 100 deletions(-)
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index a3d15482f07e..5e2149fe5218 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -42,6 +42,9 @@
#include
#include "intel_hdmi_audio.h"
+#define for_each_pipe(card_ctx, pipe) \
+ for ((pipe) = 0; (pipe) < (card_ctx)->num_pipes; (pipe)++)
+
/*standard module options for ALSA. This module supports only one card*/
static int hdmi_card_index = SNDRV_DEFAULT_IDX1;
static char *hdmi_card_id = SNDRV_DEFAULT_STR1;
@@ -192,12 +195,12 @@ static void had_substream_put(struct snd_intelhad
*intelhaddata)
/* Register access functions */
static u32 had_read_register_raw(struct snd_intelhad *ctx, u32 reg)
{
- return ioread32(ctx->mmio_start + ctx->had_config_offset + reg);
+ return ioread32(ctx->card_ctx->mmio_start + ctx->had_config_offset +
reg);
}
static void had_write_register_raw(struct snd_intelhad *ctx, u32 reg, u32 val)
{
- iowrite32(val, ctx->mmio_start + ctx->had_config_offset + reg);
+ iowrite32(val, ctx->card_ctx->mmio_start + ctx->had_config_offset +
reg);
}
static void had_read_register(struct snd_intelhad *ctx, u32 reg, u32 *val)
@@ -1519,22 +1522,27 @@ static const struct snd_kcontrol_new had_controls[] = {
*/
static irqreturn_t display_pipe_interrupt_handler(int irq, void *dev_id)
{
- struct snd_intelhad *ctx = dev_id;
- u32 audio_stat;
+ struct snd_intelhad_card *card_ctx = dev_id;
+ int pipe;
- /* use raw register access to ack IRQs even while disconnected */
- audio_stat = had_read_register_raw(ctx, AUD_HDMI_STATUS);
+ for_each_pipe(card_ctx, pipe) {
+ struct snd_intelhad *ctx = &card_ctx->pcm_ctx[pipe];
+ u32 audio_stat;
- if (audio_stat & HDMI_AUDIO_UNDERRUN) {
- had_write_register_raw(ctx, AUD_HDMI_STATUS,
- HDMI_AUDIO_UNDERRUN);
- had_process_buffer_underrun(ctx);
- }
+ /* use raw register access to ack IRQs even while disconnected
*/
+ audio_stat = had_read_register_raw(ctx, AUD_HDMI_STATUS);
+
+ if (audio_stat & HDMI_AUDIO_UNDERRUN) {
+ had_write_register_raw(ctx, AUD_HDMI_STATUS,
+ HDMI_AUDIO_UNDERRUN);
+ had_process_buffer_underrun(ctx);
+ }
- if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
- had_write_register_raw(ctx, AUD_HDMI_STATUS,
- HDMI_AUDIO_BUFFER_DONE);
- had_process_buffer_done(ctx);
+ if (audio_stat & HDMI_AUDIO_BUFFER_DONE) {
+ had_write_register_raw(ctx, AUD_HDMI_STATUS,
+ HDMI_AUDIO_BUFFER_DONE);
+ had_process_buffer_done(ctx);
+ }
}
return IRQ_HANDLED;
@@ -1545,9 +1553,14 @@ static irqreturn_t display_pipe_interrupt_handler(int
irq, void *dev_id)
*/
static void notify_audio_lpe(struct platform_device *pdev)
{
- struct snd_intelhad *ctx = platform_get_drvdata(pdev);
+ struct snd_intelhad_card *card_ctx = platform_get_drvdata(pdev);
+ int pipe;
+
+ for_each_pipe(card_ctx, pipe) {
+ struct snd_intelhad *ctx = &card_ctx->pcm_ctx[pipe];
- schedule_work(&ctx->hdmi_audio_wq);
+ schedule_work(&ctx->hdmi_audio_wq);
+ }
}
/* the work to handle monitor hot plug/unplug */
@@ -1618,7 +1631,8 @@ static int had_create_jack(struct snd_intelhad *ctx,
snprintf(hdmi_str, sizeof(hdmi_str),
"HDMI/DP,pcm=%d", pcm->device);
- err = snd_jack_new(ctx->card, hdmi_str, SND_JACK_AVOUT, &ctx->jack,
+ err = snd_jack_new(ctx->card_ctx->card, hdmi_str,
+ SND_JACK_AVOUT, &ctx->jack,
true, false);
if (err < 0)
return err;
@@ -1632,13 +1646,18 @@ static int had_create_jack(struct snd_intelhad *ctx,
static int hdmi_lpe_audio_runtime_suspend(struct device *dev)
{
- struct snd_intelhad *ctx = dev_get_drvdata(dev);
- struct snd_pcm_substream *substream;
+ struct snd_intelhad_card *card_ctx = dev_get_drvdata(dev);
+ int pipe;
- substream = had_substream_get(ctx);
- if (substream) {
- snd_pcm_suspend(substream);
- had_substream_put(ctx);
+ for_each_pipe(card_c
[Intel-gfx] [PATCH 11/11] ALSA: x86: Register multiple PCM devices for the LPE audio card
From: Ville Syrjälä
Now that everything is in place let's register a PCM device for
each pipe of the display engine. This will make it possible to
actually output audio to multiple displays at the same time. And
it avoids modesets on unrelated displays from clobbering up the
ELD and whatnot for the display currently doing the playback.
The alternative would be to have a PCM device per port, but per-pipe
is easier since the hardware actually works that way.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 14 -
include/drm/intel_lpe_audio.h | 6 ++--
sound/x86/intel_hdmi_audio.c | 53 +++---
sound/x86/intel_hdmi_audio.h | 3 +-
4 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index a593fdf73171..270aa3e3f0e2 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -111,6 +111,7 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
pinfo.size_data = sizeof(*pdata);
pinfo.dma_mask = DMA_BIT_MASK(32);
+ pdata->num_pipes = INTEL_INFO(dev_priv)->num_pipes;
spin_lock_init(&pdata->lpe_audio_slock);
platdev = platform_device_register_full(&pinfo);
@@ -318,7 +319,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
enum pipe pipe, enum port port,
const void *eld, int ls_clock, bool dp_output)
{
- unsigned long irq_flags;
+ unsigned long irqflags;
struct intel_hdmi_lpe_audio_pdata *pdata;
struct intel_hdmi_lpe_audio_pipe_pdata *ppdata;
u32 audio_enable;
@@ -327,14 +328,12 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
return;
pdata = dev_get_platdata(&dev_priv->lpe_audio.platdev->dev);
- ppdata = &pdata->pipe;
+ ppdata = &pdata->pipe[pipe];
- spin_lock_irqsave(&pdata->lpe_audio_slock, irq_flags);
+ spin_lock_irqsave(&pdata->lpe_audio_slock, irqflags);
audio_enable = I915_READ(VLV_AUD_PORT_EN_DBG(port));
- pdata->pipe_id = pipe;
-
if (eld != NULL) {
memcpy(ppdata->eld, eld, HDMI_MAX_ELD_BYTES);
ppdata->port = port;
@@ -356,8 +355,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
}
if (pdata->notify_audio_lpe)
- pdata->notify_audio_lpe(dev_priv->lpe_audio.platdev);
+ pdata->notify_audio_lpe(dev_priv->lpe_audio.platdev, pipe);
- spin_unlock_irqrestore(&pdata->lpe_audio_slock,
- irq_flags);
+ spin_unlock_irqrestore(&pdata->lpe_audio_slock, irqflags);
}
diff --git a/include/drm/intel_lpe_audio.h b/include/drm/intel_lpe_audio.h
index 26e569ad8683..b391b2822140 100644
--- a/include/drm/intel_lpe_audio.h
+++ b/include/drm/intel_lpe_audio.h
@@ -39,10 +39,10 @@ struct intel_hdmi_lpe_audio_pipe_pdata {
};
struct intel_hdmi_lpe_audio_pdata {
- struct intel_hdmi_lpe_audio_pipe_pdata pipe;
- int pipe_id;
+ struct intel_hdmi_lpe_audio_pipe_pdata pipe[3];
+ int num_pipes;
- void (*notify_audio_lpe)(struct platform_device *pdev);
+ void (*notify_audio_lpe)(struct platform_device *pdev, int pipe);
spinlock_t lpe_audio_slock;
};
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index 5e2149fe5218..e5863a6d3aa9 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -195,12 +195,12 @@ static void had_substream_put(struct snd_intelhad
*intelhaddata)
/* Register access functions */
static u32 had_read_register_raw(struct snd_intelhad *ctx, u32 reg)
{
- return ioread32(ctx->card_ctx->mmio_start + ctx->had_config_offset +
reg);
+ return ioread32(ctx->mmio_start + reg);
}
static void had_write_register_raw(struct snd_intelhad *ctx, u32 reg, u32 val)
{
- iowrite32(val, ctx->card_ctx->mmio_start + ctx->had_config_offset +
reg);
+ iowrite32(val, ctx->mmio_start + reg);
}
static void had_read_register(struct snd_intelhad *ctx, u32 reg, u32 *val)
@@ -1551,16 +1551,12 @@ static irqreturn_t display_pipe_interrupt_handler(int
irq, void *dev_id)
/*
* monitor plug/unplug notification from i915; just kick off the work
*/
-static void notify_audio_lpe(struct platform_device *pdev)
+static void notify_audio_lpe(struct platform_device *pdev, int pipe)
{
struct snd_intelhad_card *card_ctx = platform_get_drvdata(pdev);
- int pipe;
-
- for_each_pipe(card_ctx, pipe) {
- struct snd_intelhad *ctx = &card_ctx->pcm_ctx[pipe];
+ struct snd_intelhad *ctx = &card_ctx->pcm_ctx[pipe];
- schedule_work(&ctx->hdmi_audio_wq);
- }
+ schedule_work(&ctx->hdmi_audio_wq);
}
/* the work to handle monito
[Intel-gfx] [PATCH 09/11] ALSA: x86: Prepare LPE audio ctls for multiple PCMs
From: Ville Syrjälä
In preparation for register a PCM device for each pipe adjust
link up the ctl elements with the corresponding PCM device.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
sound/x86/intel_hdmi_audio.c | 23 +++
1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index bfb712444098..a3d15482f07e 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1609,11 +1609,16 @@ static void had_audio_wq(struct work_struct *work)
/*
* Jack interface
*/
-static int had_create_jack(struct snd_intelhad *ctx)
+static int had_create_jack(struct snd_intelhad *ctx,
+ struct snd_pcm *pcm)
{
+ char hdmi_str[32];
int err;
- err = snd_jack_new(ctx->card, "HDMI/DP", SND_JACK_AVOUT, &ctx->jack,
+ snprintf(hdmi_str, sizeof(hdmi_str),
+"HDMI/DP,pcm=%d", pcm->device);
+
+ err = snd_jack_new(ctx->card, hdmi_str, SND_JACK_AVOUT, &ctx->jack,
true, false);
if (err < 0)
return err;
@@ -1793,7 +1798,17 @@ static int hdmi_lpe_audio_probe(struct platform_device
*pdev)
/* create controls */
for (i = 0; i < ARRAY_SIZE(had_controls); i++) {
- ret = snd_ctl_add(card, snd_ctl_new1(&had_controls[i], ctx));
+ struct snd_kcontrol *kctl;
+
+ kctl = snd_ctl_new1(&had_controls[i], ctx);
+ if (!kctl) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ kctl->id.device = pcm->device;
+
+ ret = snd_ctl_add(card, kctl);
if (ret < 0)
goto err;
}
@@ -1805,7 +1820,7 @@ static int hdmi_lpe_audio_probe(struct platform_device
*pdev)
if (ret < 0)
goto err;
- ret = had_create_jack(ctx);
+ ret = had_create_jack(ctx, pcm);
if (ret < 0)
goto err;
--
2.10.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 08/11] drm/i915: Clean up the LPE audio platform data
From: Ville Syrjälä
Split the LPE audio platform data into a pipe specific
chunk and device specific chunk. Eventually we'll have
a pipe specific chunk for each pipe, but for now we'll
stick to just one.
We'll also get rid of the intel_hdmi_lpe_audio_eld structure
which doesn't seem to have any real reason to exist.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 29 ++---
include/drm/intel_lpe_audio.h | 15 ---
sound/x86/intel_hdmi_audio.c | 19 +--
3 files changed, 31 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index d6aecf1d382b..a593fdf73171 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -319,37 +319,36 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
const void *eld, int ls_clock, bool dp_output)
{
unsigned long irq_flags;
- struct intel_hdmi_lpe_audio_pdata *pdata = NULL;
+ struct intel_hdmi_lpe_audio_pdata *pdata;
+ struct intel_hdmi_lpe_audio_pipe_pdata *ppdata;
u32 audio_enable;
if (!HAS_LPE_AUDIO(dev_priv))
return;
- pdata = dev_get_platdata(
- &(dev_priv->lpe_audio.platdev->dev));
+ pdata = dev_get_platdata(&dev_priv->lpe_audio.platdev->dev);
+ ppdata = &pdata->pipe;
spin_lock_irqsave(&pdata->lpe_audio_slock, irq_flags);
audio_enable = I915_READ(VLV_AUD_PORT_EN_DBG(port));
+ pdata->pipe_id = pipe;
+
if (eld != NULL) {
- memcpy(pdata->eld.eld_data, eld,
- HDMI_MAX_ELD_BYTES);
- pdata->eld.pipe_id = pipe;
- pdata->port = port;
- pdata->ls_clock = ls_clock;
- pdata->dp_output = dp_output;
+ memcpy(ppdata->eld, eld, HDMI_MAX_ELD_BYTES);
+ ppdata->port = port;
+ ppdata->ls_clock = ls_clock;
+ ppdata->dp_output = dp_output;
/* Unmute the amp for both DP and HDMI */
I915_WRITE(VLV_AUD_PORT_EN_DBG(port),
audio_enable & ~VLV_AMP_MUTE);
-
} else {
- memset(pdata->eld.eld_data, 0,
- HDMI_MAX_ELD_BYTES);
- pdata->port = -1;
- pdata->ls_clock = 0;
- pdata->dp_output = false;
+ memset(ppdata->eld, 0, HDMI_MAX_ELD_BYTES);
+ ppdata->port = -1;
+ ppdata->ls_clock = 0;
+ ppdata->dp_output = false;
/* Mute the amp for both DP and HDMI */
I915_WRITE(VLV_AUD_PORT_EN_DBG(port),
diff --git a/include/drm/intel_lpe_audio.h b/include/drm/intel_lpe_audio.h
index 826d531c3ecc..26e569ad8683 100644
--- a/include/drm/intel_lpe_audio.h
+++ b/include/drm/intel_lpe_audio.h
@@ -31,16 +31,17 @@ struct platform_device;
#define HDMI_MAX_ELD_BYTES 128
-struct intel_hdmi_lpe_audio_eld {
- int pipe_id;
- unsigned char eld_data[HDMI_MAX_ELD_BYTES];
-};
-
-struct intel_hdmi_lpe_audio_pdata {
+struct intel_hdmi_lpe_audio_pipe_pdata {
+ u8 eld[HDMI_MAX_ELD_BYTES];
int port;
int ls_clock;
bool dp_output;
- struct intel_hdmi_lpe_audio_eld eld;
+};
+
+struct intel_hdmi_lpe_audio_pdata {
+ struct intel_hdmi_lpe_audio_pipe_pdata pipe;
+ int pipe_id;
+
void (*notify_audio_lpe)(struct platform_device *pdev);
spinlock_t lpe_audio_slock;
};
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index 71f14a2a7fe4..bfb712444098 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1556,21 +1556,20 @@ static void had_audio_wq(struct work_struct *work)
struct snd_intelhad *ctx =
container_of(work, struct snd_intelhad, hdmi_audio_wq);
struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
+ struct intel_hdmi_lpe_audio_pipe_pdata *ppdata = &pdata->pipe;
pm_runtime_get_sync(ctx->dev);
mutex_lock(&ctx->mutex);
- if (pdata->port < 0) {
+ if (ppdata->port < 0) {
dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
__func__);
memset(ctx->eld, 0, sizeof(ctx->eld)); /* clear the old ELD */
had_process_hot_unplug(ctx);
} else {
- struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
-
dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
- __func__, pdata->port, pdata->ls_clock);
+ __func__, ppdata->port, ppdata->ls_clock);
- switch (eld->pipe_id) {
+ switch (pdata->pipe_id) {
case 0:
ctx->had_
[Intel-gfx] [PATCH 06/11] drm/i915: Remove hdmi_connected from LPE audio pdata
From: Ville Syrjälä
We can determine that the pipe was shut down from port<0, so there's
no point in duplicating that information as 'hdmi_connected'.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 5 ++---
include/drm/intel_lpe_audio.h | 3 +--
sound/x86/intel_hdmi_audio.c | 4 ++--
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 5a1a37e963f1..1696359bf6e5 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -335,9 +335,8 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
if (eld != NULL) {
memcpy(pdata->eld.eld_data, eld,
HDMI_MAX_ELD_BYTES);
- pdata->eld.port_id = port;
pdata->eld.pipe_id = pipe;
- pdata->hdmi_connected = true;
+ pdata->port = port;
pdata->ls_clock = ls_clock;
pdata->dp_output = dp_output;
@@ -348,7 +347,7 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
} else {
memset(pdata->eld.eld_data, 0,
HDMI_MAX_ELD_BYTES);
- pdata->hdmi_connected = false;
+ pdata->port = -1;
pdata->ls_clock = 0;
pdata->dp_output = false;
diff --git a/include/drm/intel_lpe_audio.h b/include/drm/intel_lpe_audio.h
index 8bf804ce8905..826d531c3ecc 100644
--- a/include/drm/intel_lpe_audio.h
+++ b/include/drm/intel_lpe_audio.h
@@ -32,14 +32,13 @@ struct platform_device;
#define HDMI_MAX_ELD_BYTES 128
struct intel_hdmi_lpe_audio_eld {
- int port_id;
int pipe_id;
unsigned char eld_data[HDMI_MAX_ELD_BYTES];
};
struct intel_hdmi_lpe_audio_pdata {
+ int port;
int ls_clock;
- bool hdmi_connected;
bool dp_output;
struct intel_hdmi_lpe_audio_eld eld;
void (*notify_audio_lpe)(struct platform_device *pdev);
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index 4eaf5de54f61..71f14a2a7fe4 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1559,7 +1559,7 @@ static void had_audio_wq(struct work_struct *work)
pm_runtime_get_sync(ctx->dev);
mutex_lock(&ctx->mutex);
- if (!pdata->hdmi_connected) {
+ if (pdata->port < 0) {
dev_dbg(ctx->dev, "%s: Event: HAD_NOTIFY_HOT_UNPLUG\n",
__func__);
memset(ctx->eld, 0, sizeof(ctx->eld)); /* clear the old ELD */
@@ -1568,7 +1568,7 @@ static void had_audio_wq(struct work_struct *work)
struct intel_hdmi_lpe_audio_eld *eld = &pdata->eld;
dev_dbg(ctx->dev, "%s: HAD_NOTIFY_ELD : port = %d, tmds = %d\n",
- __func__, eld->port_id, pdata->ls_clock);
+ __func__, pdata->port, pdata->ls_clock);
switch (eld->pipe_id) {
case 0:
--
2.10.2
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[Intel-gfx] [PATCH 03/11] drm/i915: Stop pretending to mask/unmask LPE audio interrupts
From: Ville Syrjälä
vlv_display_irq_postinstall() enables the LPE audio interrupts
regardless of whether the LPE audio irq chip has masked/unmasked
them. Also the irqchip masking/unmasking doesn't consider the state
of the display power well or the device, and hence just leads to
dmesg spew when it tries to access the hardware while it's powered
down.
If the current way works, then we don't need to do anything in the
mask/unmask hooks. If it doesn't work, well, then we'd need to properly
track whether the irqchip has masked/unmasked the interrupts when
we enable display interrupts. And the mask/unmask hooks would need
to check whether display interrupts are even enabled before frobbing
with he registers.
So let's just assume the current way works and neuter the mask/unmask
hooks. Also clean up vlv_display_irq_postinstall() a bit and stop
it from trying to unmask/enable the LPE C interrupt on VLV since it
doesn't exist.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/i915_irq.c| 15 ++
drivers/gpu/drm/i915/intel_lpe_audio.c | 36 --
2 files changed, 6 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index fd97fe00cd0d..190f6aa5d15e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2953,7 +2953,6 @@ static void vlv_display_irq_postinstall(struct
drm_i915_private *dev_priv)
u32 pipestat_mask;
u32 enable_mask;
enum pipe pipe;
- u32 val;
pipestat_mask = PLANE_FLIP_DONE_INT_STATUS_VLV |
PIPE_CRC_DONE_INTERRUPT_STATUS;
@@ -2964,18 +2963,16 @@ static void vlv_display_irq_postinstall(struct
drm_i915_private *dev_priv)
enable_mask = I915_DISPLAY_PORT_INTERRUPT |
I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ I915_LPE_PIPE_A_INTERRUPT |
+ I915_LPE_PIPE_B_INTERRUPT;
+
if (IS_CHERRYVIEW(dev_priv))
- enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT;
+ enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT |
+ I915_LPE_PIPE_C_INTERRUPT;
WARN_ON(dev_priv->irq_mask != ~0);
- val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT |
- I915_LPE_PIPE_C_INTERRUPT);
-
- enable_mask |= val;
-
dev_priv->irq_mask = ~enable_mask;
GEN5_IRQ_INIT(VLV_, dev_priv->irq_mask, enable_mask);
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 668f00480d97..292fedf30b00 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -149,44 +149,10 @@ static void lpe_audio_platdev_destroy(struct
drm_i915_private *dev_priv)
static void lpe_audio_irq_unmask(struct irq_data *d)
{
- struct drm_i915_private *dev_priv = d->chip_data;
- unsigned long irqflags;
- u32 val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT);
-
- if (IS_CHERRYVIEW(dev_priv))
- val |= I915_LPE_PIPE_C_INTERRUPT;
-
- spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
- dev_priv->irq_mask &= ~val;
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IMR, dev_priv->irq_mask);
- POSTING_READ(VLV_IMR);
-
- spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
}
static void lpe_audio_irq_mask(struct irq_data *d)
{
- struct drm_i915_private *dev_priv = d->chip_data;
- unsigned long irqflags;
- u32 val = (I915_LPE_PIPE_A_INTERRUPT |
- I915_LPE_PIPE_B_INTERRUPT);
-
- if (IS_CHERRYVIEW(dev_priv))
- val |= I915_LPE_PIPE_C_INTERRUPT;
-
- spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
-
- dev_priv->irq_mask |= val;
- I915_WRITE(VLV_IMR, dev_priv->irq_mask);
- I915_WRITE(VLV_IIR, val);
- I915_WRITE(VLV_IIR, val);
- POSTING_READ(VLV_IIR);
-
- spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
}
static struct irq_chip lpe_audio_irqchip = {
@@ -330,8 +296,6 @@ void intel_lpe_audio_teardown(struct drm_i915_private
*dev_priv)
desc = irq_to_desc(dev_priv->lpe_audio.irq);
- lpe_audio_irq_mask(&desc->irq_data);
-
lpe_audio_platdev_destroy(dev_priv);
irq_free_desc(dev_priv->lpe_audio.irq);
--
2.10.2
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[Intel-gfx] [PATCH 04/11] drm/i915: Remove the unsued pending_notify from LPE platform data
From: Ville Syrjälä
The pending_notify flag in the LPE audio platform data is pointless,
actually unused. So let's kill it off.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 2 --
include/drm/intel_lpe_audio.h | 1 -
sound/x86/intel_hdmi_audio.c | 1 -
3 files changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 292fedf30b00..79b9dca985ff 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -361,8 +361,6 @@ void intel_lpe_audio_notify(struct drm_i915_private
*dev_priv,
if (pdata->notify_audio_lpe)
pdata->notify_audio_lpe(dev_priv->lpe_audio.platdev);
- else
- pdata->notify_pending = true;
spin_unlock_irqrestore(&pdata->lpe_audio_slock,
irq_flags);
diff --git a/include/drm/intel_lpe_audio.h b/include/drm/intel_lpe_audio.h
index e9892b4c3af1..c201d39cdfea 100644
--- a/include/drm/intel_lpe_audio.h
+++ b/include/drm/intel_lpe_audio.h
@@ -38,7 +38,6 @@ struct intel_hdmi_lpe_audio_eld {
};
struct intel_hdmi_lpe_audio_pdata {
- bool notify_pending;
int tmds_clock_speed;
bool hdmi_connected;
bool dp_output;
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index 5b89662493c9..cbba4a78afb5 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1811,7 +1811,6 @@ static int hdmi_lpe_audio_probe(struct platform_device
*pdev)
spin_lock_irq(&pdata->lpe_audio_slock);
pdata->notify_audio_lpe = notify_audio_lpe;
- pdata->notify_pending = false;
spin_unlock_irq(&pdata->lpe_audio_slock);
pm_runtime_use_autosuspend(&pdev->dev);
--
2.10.2
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[Intel-gfx] [PATCH 02/11] ALSA: x86: Clear the pdata.notify_lpe_audio pointer before teardown
From: Ville Syrjälä
Clear the notify function pointer in the platform data before we tear
down the driver. Otherwise i915 would end up calling a stale function
pointer and possibly explode.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Signed-off-by: Ville Syrjälä
---
sound/x86/intel_hdmi_audio.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index bfac6f21ae5e..5b89662493c9 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1665,6 +1665,11 @@ static int __maybe_unused hdmi_lpe_audio_resume(struct
device *dev)
static void hdmi_lpe_audio_free(struct snd_card *card)
{
struct snd_intelhad *ctx = card->private_data;
+ struct intel_hdmi_lpe_audio_pdata *pdata = ctx->dev->platform_data;
+
+ spin_lock_irq(&pdata->lpe_audio_slock);
+ pdata->notify_audio_lpe = NULL;
+ spin_unlock_irq(&pdata->lpe_audio_slock);
cancel_work_sync(&ctx->hdmi_audio_wq);
--
2.10.2
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[Intel-gfx] [PATCH 00/11] drm/i915: LPE audio runtime PM and multipipe
From: Ville Syrjälä I was wondering why my VLV no longer runtime suspended, and after some thinking I decided it had to be the LPE audio preventing it. Turns out I was right, so here's my attempt at fixing it. And while looking at the code I couldn't help but notice that it couldn't actually handle multiple pipes playing back audio at the same time. And even having multiple displays active even if only one was playing audio was probably a recipe for failure. So I tried to fix that by registering a separate PCM device for each pipe. Note that the patch subjects may not reflect the subsystem very well since most of these straddle the border between drm and alsa. I think I just slapped on drm/i915 to most where there was no clear winner. Entire series available here: git://github.com/vsyrjala/linux.git lpe_audio_multipipe Cc: Takashi Iwai Cc: Pierre-Louis Bossart Ville Syrjälä (11): drm/i915: Fix runtime PM for LPE audio ALSA: x86: Clear the pdata.notify_lpe_audio pointer before teardown drm/i915: Stop pretending to mask/unmask LPE audio interrupts drm/i915: Remove the unsued pending_notify from LPE platform data drm/i915: Replace tmds_clock_speed and link_rate with just ls_clock drm/i915: Remove hdmi_connected from LPE audio pdata drm/i915: Reorganize intel_lpe_audio_notify() arguments drm/i915: Clean up the LPE audio platform data ALSA: x86: Prepare LPE audio ctls for multiple PCMs ALSA: x86: Split snd_intelhad into card and PCM specific structures ALSA: x86: Register multiple PCM devices for the LPE audio card drivers/gpu/drm/i915/i915_drv.h| 4 +- drivers/gpu/drm/i915/i915_irq.c| 15 +- drivers/gpu/drm/i915/intel_audio.c | 19 +-- drivers/gpu/drm/i915/intel_lpe_audio.c | 95 --- include/drm/intel_lpe_audio.h | 20 ++- sound/x86/intel_hdmi_audio.c | 288 +++-- sound/x86/intel_hdmi_audio.h | 17 +- 7 files changed, 230 insertions(+), 228 deletions(-) -- 2.10.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 01/11] drm/i915: Fix runtime PM for LPE audio
From: Ville Syrjälä
Not calling pm_runtime_enable() means that runtime PM can't be
enabled at all via sysfs. So we definitely need to call it
from somewhere.
Calling it from the driver seems like a bad idea because it
would have to be paired with a pm_runtime_disable() at driver
unload time, otherwise the core gets upset. Also if there's
no LPE audio driver loaded then we couldn't runtime suspend
i915 either.
So it looks like a better plan is to call it from i915 when
we register the platform device. That seems to match how
pci generally does things. I cargo culted the
pm_runtime_forbid() and pm_runtime_set_active() calls from
pci as well.
The exposed runtime PM API is massive an thorougly misleading, so
I don't actually know if this is how you're supposed to use the API
or not. But it seems to work. I can now runtime suspend i915 again
with or without the LPE audio driver loaded, and reloading the
LPE audio driver also seems to work.
Note that powertop won't auto-tune runtime PM for platform devices,
which is a little annoying. So I'm not sure that leaving runtime
PM in "on" mode by default is the best choice here. But I've left
it like that for now at least.
Also remove the comment about there not being much benefit from
LPE audio runtime PM. Not allowing runtime PM blocks i915 runtime
PM, which will also block s0ix, and that could have a measurable
impact on power consumption.
Cc: Takashi Iwai
Cc: Pierre-Louis Bossart
Fixes: 0b6b524f3915 ("ALSA: x86: Don't enable runtime PM as default")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_lpe_audio.c | 5 +
sound/x86/intel_hdmi_audio.c | 4
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lpe_audio.c
b/drivers/gpu/drm/i915/intel_lpe_audio.c
index 25d8e76489e4..668f00480d97 100644
--- a/drivers/gpu/drm/i915/intel_lpe_audio.c
+++ b/drivers/gpu/drm/i915/intel_lpe_audio.c
@@ -63,6 +63,7 @@
#include
#include
#include
+#include
#include "i915_drv.h"
#include
@@ -121,6 +122,10 @@ lpe_audio_platdev_create(struct drm_i915_private *dev_priv)
kfree(rsc);
+ pm_runtime_forbid(&platdev->dev);
+ pm_runtime_set_active(&platdev->dev);
+ pm_runtime_enable(&platdev->dev);
+
return platdev;
err:
diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
index c505b019e09c..bfac6f21ae5e 100644
--- a/sound/x86/intel_hdmi_audio.c
+++ b/sound/x86/intel_hdmi_audio.c
@@ -1809,10 +1809,6 @@ static int hdmi_lpe_audio_probe(struct platform_device
*pdev)
pdata->notify_pending = false;
spin_unlock_irq(&pdata->lpe_audio_slock);
- /* runtime PM isn't enabled as default, since it won't save much on
-* BYT/CHT devices; user who want the runtime PM should adjust the
-* power/ontrol and power/autosuspend_delay_ms sysfs entries instead
-*/
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
--
2.10.2
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Re: [Intel-gfx] GPU hangs and X shot down with 4.11-rc6
On Tue, Apr 25, 2017 at 06:41:20PM +0200, Michal Hocko wrote: > Hi, > I have just experienced X being shut down once with 4.11-rc2 and 2 times > with 4.11-rc6 kernel. I do not remember seeing something like this > before but it is quite possible I was just lucky to not trigger this > issue before. It always happened while I was working on a presentation > in LibreOffice which I do very seldom. The kernel log contains: > > [ 7456.721893] [drm] GPU HANG: ecode 9:0:0x86dd, in Xorg [3594], reason: > Hang on render ring, action: reset > [ 7456.721897] [drm] GPU hangs can indicate a bug anywhere in the entire gfx > stack, including userspace. > [ 7456.721898] [drm] Please file a _new_ bug report on bugs.freedesktop.org > against DRI -> DRM/Intel > [ 7456.721900] [drm] drm/i915 developers can then reassign to the right > component if it's not a kernel issue. > [ 7456.721901] [drm] The gpu crash dump is required to analyze gpu hangs, so > please always attach it. > [ 7456.721902] [drm] GPU crash dump saved to /sys/class/drm/card0/error > [ 7456.721925] drm/i915: Resetting chip after gpu hang > [ 7456.722117] [drm] RC6 on > [ 7456.734588] [drm] GuC firmware load skipped > [ 7464.686209] drm/i915: Resetting chip after gpu hang > [ 7464.686284] [drm] RC6 on > [ 7464.702469] [drm] GuC firmware load skipped > [ 7472.686180] drm/i915: Resetting chip after gpu hang > [ 7472.686241] [drm] RC6 on > [ 7472.704565] [drm] GuC firmware load skipped > [ 7480.686179] drm/i915: Resetting chip after gpu hang > [ 7480.686241] [drm] RC6 on > [ 7480.704583] [drm] GuC firmware load skipped > [ 7493.678130] drm/i915: Resetting chip after gpu hang > [ 7493.678206] [drm] RC6 on > [ 7493.696505] [drm] GuC firmware load skipped > > The kernel message tells that the problem might be anywhere and I should > report to freedesktop but I haven't changed the userspace recently so it > smells more like a kernel bug to me. Does this ring bells? The GPU crash > dump is attached in case it is useful. There are lots of very similar GPU hangs for mesa across a wide range of kernels, with several reports noting a correlation with libreoffice. At first glance, I would say you were just unlucky to hit it. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t 3/7] lib: Stop igt_get_all_cairo_formats memory leak
On Tue, Apr 25, 2017 at 02:43:13PM -0300, Gabriel Krisman Bertazi wrote: Brian Starkey writes: igt_get_all_cairo_formats() allocates the format list on the heap, but returns it in a const pointer. Change this so that callers can free the array without a warning, and free the array in all callers. Signed-off-by: Brian Starkey --- Hi, Assuming I'm not missing anything, I think if you free formats here, the static variable in igt_get_all_cairo_formats() will point to garbage and further calls to that function will return uninitialized memory. Hi! Yes, sorry you're quite right. I'd managed to completely miss the fact the pointer is static. Please ignore this patch then, Thanks, Brian -- Gabriel Krisman Bertazi ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for Introduce common scatterlist map function (rev2)
== Series Details == Series: Introduce common scatterlist map function (rev2) URL : https://patchwork.freedesktop.org/series/23149/ State : success == Summary == Series 23149v2 Introduce common scatterlist map function https://patchwork.freedesktop.org/api/1.0/series/23149/revisions/2/mbox/ Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: pass -> FAIL (fi-snb-2600) fdo#17 Test gem_exec_suspend: Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-kbl-7560u) fdo#100125 fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17 fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:430s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:428s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:570s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:508s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:479s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:484s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:415s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:401s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:422s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:495s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:465s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:462s fi-kbl-7560u total:278 pass:267 dwarn:1 dfail:0 fail:0 skip:10 time:570s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:450s fi-skl-6700hqtotal:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:569s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:458s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:493s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:431s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:528s fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time:408s 7ffb3045557cbc7b49695b20416351e4e812179c drm-tip: 2017y-04m-25d-14h-42m-59s UTC integration manifest 3d4af0f libiscsi: Make use of new the sg_map helper function d8b9160 libiscsi: Add an internal error code 3004316 scatterlist: Introduce sg_map helper functions == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4547/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 16/21] mmc: sdhci: Make use of the new sg_map helper function
Straightforward conversion, except due to the lack of an error path we
have to use SG_MAP_MUST_NOT_FAIL which may BUG_ON in certain cases
in the future.
Signed-off-by: Logan Gunthorpe
Cc: Adrian Hunter
Cc: Ulf Hansson
---
drivers/mmc/host/sdhci.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index ecd0d43..239507f 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -513,15 +513,19 @@ static int sdhci_pre_dma_transfer(struct sdhci_host *host,
return sg_count;
}
+/*
+ * Note this function may return PTR_ERR and must be checked.
+ */
static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
{
local_irq_save(*flags);
- return kmap_atomic(sg_page(sg)) + sg->offset;
+ return sg_map(sg, 0, SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
}
-static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
+static void sdhci_kunmap_atomic(struct scatterlist *sg, void *buffer,
+ unsigned long *flags)
{
- kunmap_atomic(buffer);
+ sg_unmap(sg, buffer, 0, SG_KMAP_ATOMIC);
local_irq_restore(*flags);
}
@@ -585,7 +589,7 @@ static void sdhci_adma_table_pre(struct sdhci_host *host,
if (data->flags & MMC_DATA_WRITE) {
buffer = sdhci_kmap_atomic(sg, &flags);
memcpy(align, buffer, offset);
- sdhci_kunmap_atomic(buffer, &flags);
+ sdhci_kunmap_atomic(sg, buffer, &flags);
}
/* tran, valid */
@@ -663,7 +667,7 @@ static void sdhci_adma_table_post(struct sdhci_host *host,
buffer = sdhci_kmap_atomic(sg, &flags);
memcpy(buffer, align, size);
- sdhci_kunmap_atomic(buffer, &flags);
+ sdhci_kunmap_atomic(sg, buffer, &flags);
align += SDHCI_ADMA2_ALIGN;
}
--
2.1.4
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[Intel-gfx] [PATCH v2 01/21] scatterlist: Introduce sg_map helper functions
This patch introduces functions which kmap the pages inside an sgl.
These functions replace a common pattern of kmap(sg_page(sg)) that is
used in more than 50 places within the kernel.
The motivation for this work is to eventually safely support sgls that
contain io memory. In order for that to work, any access to the contents
of an iomem SGL will need to be done with iomemcpy or hit some warning.
(The exact details of how this will work have yet to be worked out.)
Having all the kmaps in one place is just a first step in that
direction. Additionally, seeing this helps cut down the users of sg_page,
it should make any effort to go to struct-page-less DMAs a little
easier (should that idea ever swing back into favour again).
A flags option is added to select between a regular or atomic mapping so
these functions can replace kmap(sg_page or kmap_atomic(sg_page.
Future work may expand this to have flags for using page_address or
vmap. We include a flag to require the function not to fail to
support legacy code that has no easy error path. Much further in the
future, there may be a flag to allocate memory and copy the data
from/to iomem.
We also add the semantic that sg_map can fail to create a mapping,
despite the fact that the current code this is replacing is assumed to
never fail and the current version of these functions cannot fail. This
is to support iomem which may either have to fail to create the mapping or
allocate memory as a bounce buffer which itself can fail.
Also, in terms of cleanup, a few of the existing kmap(sg_page) users
play things a bit loose in terms of whether they apply sg->offset
so using these helper functions should help avoid such issues.
Signed-off-by: Logan Gunthorpe
---
include/linux/scatterlist.h | 85 +
1 file changed, 85 insertions(+)
diff --git a/include/linux/scatterlist.h b/include/linux/scatterlist.h
index cb3c8fe..fad170b 100644
--- a/include/linux/scatterlist.h
+++ b/include/linux/scatterlist.h
@@ -5,6 +5,7 @@
#include
#include
#include
+#include
#include
struct scatterlist {
@@ -126,6 +127,90 @@ static inline struct page *sg_page(struct scatterlist *sg)
return (struct page *)((sg)->page_link & ~0x3);
}
+#define SG_KMAP (1 << 0) /* create a mapping with kmap */
+#define SG_KMAP_ATOMIC (1 << 1) /* create a mapping with kmap_atomic */
+#define SG_MAP_MUST_NOT_FAIL (1 << 2) /* indicate sg_map should not fail */
+
+/**
+ * sg_map - kmap a page inside an sgl
+ * @sg:SG entry
+ * @offset:Offset into entry
+ * @flags: Flags for creating the mapping
+ *
+ * Description:
+ * Use this function to map a page in the scatterlist at the specified
+ * offset. sg->offset is already added for you. Note: the semantics of
+ * this function are that it may fail. Thus, its output should be checked
+ * with IS_ERR and PTR_ERR. Otherwise, a pointer to the specified offset
+ * in the mapped page is returned.
+ *
+ * Flags can be any of:
+ * * SG_KMAP - Use kmap to create the mapping
+ * * SG_KMAP_ATOMIC- Use kmap_atomic to map the page atommically.
+ * Thus, the rules of that function apply: the
+ * cpu may not sleep until it is unmaped.
+ * * SG_MAP_MUST_NOT_FAIL - Indicate that sg_map must not fail.
+ * If it does, it will issue a BUG_ON instead.
+ * This is intended for legacy code only, it
+ * is not to be used in new code.
+ *
+ * Also, consider carefully whether this function is appropriate. It is
+ * largely not recommended for new code and if the sgl came from another
+ * subsystem and you don't know what kind of memory might be in the list
+ * then you definitely should not call it. Non-mappable memory may be in
+ * the sgl and thus this function may fail unexpectedly. Consider using
+ * sg_copy_to_buffer instead.
+ **/
+static inline void *sg_map(struct scatterlist *sg, size_t offset, int flags)
+{
+ struct page *pg;
+ unsigned int pg_off;
+ void *ret;
+
+ offset += sg->offset;
+ pg = nth_page(sg_page(sg), offset >> PAGE_SHIFT);
+ pg_off = offset_in_page(offset);
+
+ if (flags & SG_KMAP_ATOMIC)
+ ret = kmap_atomic(pg) + pg_off;
+ else if (flags & SG_KMAP)
+ ret = kmap(pg) + pg_off;
+ else
+ ret = ERR_PTR(-EINVAL);
+
+ /*
+* In theory, this can't happen yet. Once we start adding
+* unmapable memory, it also shouldn't happen unless developers
+* start putting unmappable struct pages in sgls and passing
+* it to code that doesn't support it.
+*/
+ BUG_ON(flags & SG_MAP_MUST_NOT_FAIL && IS_ERR(ret));
+
+ return ret;
+}
+
+/**
+ * sg_unmap - unmap a page that was mapped with sg_map_offset
+ * @sg:
[Intel-gfx] [PATCH v2 10/21] RDS: Make use of the new sg_map helper function
Straightforward conversion except there's no error path, so we
make use of SG_MAP_MUST_NOT_FAIL which may BUG_ON in certain cases
in the future.
Signed-off-by: Logan Gunthorpe
Cc: Santosh Shilimkar
Cc: "David S. Miller"
---
net/rds/ib_recv.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/net/rds/ib_recv.c b/net/rds/ib_recv.c
index e10624a..c665689 100644
--- a/net/rds/ib_recv.c
+++ b/net/rds/ib_recv.c
@@ -800,10 +800,10 @@ static void rds_ib_cong_recv(struct rds_connection *conn,
to_copy = min(RDS_FRAG_SIZE - frag_off, PAGE_SIZE - map_off);
BUG_ON(to_copy & 7); /* Must be 64bit aligned. */
+ addr = sg_map(&frag->f_sg, 0,
+ SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
- addr = kmap_atomic(sg_page(&frag->f_sg));
-
- src = addr + frag->f_sg.offset + frag_off;
+ src = addr + frag_off;
dst = (void *)map->m_page_addrs[map_page] + map_off;
for (k = 0; k < to_copy; k += 8) {
/* Record ports that became uncongested, ie
@@ -811,7 +811,7 @@ static void rds_ib_cong_recv(struct rds_connection *conn,
uncongested |= ~(*src) & *dst;
*dst++ = *src++;
}
- kunmap_atomic(addr);
+ sg_unmap(&frag->f_sg, addr, 0, SG_KMAP_ATOMIC);
copied += to_copy;
--
2.1.4
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[Intel-gfx] [PATCH v2 19/21] mmc: sdricoh_cs: Make use of the new sg_map helper function
This is a straightforward conversion to the new function.
Signed-off-by: Logan Gunthorpe
Cc: Sascha Sommer
Cc: Ulf Hansson
---
drivers/mmc/host/sdricoh_cs.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c
index 5ff26ab..03225c3 100644
--- a/drivers/mmc/host/sdricoh_cs.c
+++ b/drivers/mmc/host/sdricoh_cs.c
@@ -319,16 +319,20 @@ static void sdricoh_request(struct mmc_host *mmc, struct
mmc_request *mrq)
for (i = 0; i < data->blocks; i++) {
size_t len = data->blksz;
u8 *buf;
- struct page *page;
int result;
- page = sg_page(data->sg);
- buf = kmap(page) + data->sg->offset + (len * i);
+ buf = sg_map(data->sg, (len * i), SG_KMAP);
+ if (IS_ERR(buf)) {
+ cmd->error = PTR_ERR(buf);
+ break;
+ }
+
result =
sdricoh_blockio(host,
data->flags & MMC_DATA_READ, buf, len);
- kunmap(page);
- flush_dcache_page(page);
+ sg_unmap(data->sg, buf, (len * i), SG_KMAP);
+
+ flush_dcache_page(sg_page(data->sg));
if (result) {
dev_err(dev, "sdricoh_request: cmd %i "
"block transfer failed\n", cmd->opcode);
--
2.1.4
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[Intel-gfx] [PATCH v2 13/21] scsi: arcmsr, ips, megaraid: Make use of the new sg_map helper function
Very straightforward conversion of three scsi drivers
Signed-off-by: Logan Gunthorpe
Cc: Adaptec OEM Raid Solutions
Cc: Kashyap Desai
Cc: Sumit Saxena
Cc: Shivasharan S
---
drivers/scsi/arcmsr/arcmsr_hba.c | 16
drivers/scsi/ips.c | 8
drivers/scsi/megaraid.c | 9 +++--
3 files changed, 23 insertions(+), 10 deletions(-)
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c
index af032c4..8c2de17 100644
--- a/drivers/scsi/arcmsr/arcmsr_hba.c
+++ b/drivers/scsi/arcmsr/arcmsr_hba.c
@@ -2306,7 +2306,10 @@ static int arcmsr_iop_message_xfer(struct
AdapterControlBlock *acb,
use_sg = scsi_sg_count(cmd);
sg = scsi_sglist(cmd);
- buffer = kmap_atomic(sg_page(sg)) + sg->offset;
+ buffer = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(buffer))
+ return ARCMSR_MESSAGE_FAIL;
+
if (use_sg > 1) {
retvalue = ARCMSR_MESSAGE_FAIL;
goto message_out;
@@ -2539,7 +2542,7 @@ static int arcmsr_iop_message_xfer(struct
AdapterControlBlock *acb,
message_out:
if (use_sg) {
struct scatterlist *sg = scsi_sglist(cmd);
- kunmap_atomic(buffer - sg->offset);
+ sg_unmap(sg, buffer, 0, SG_KMAP_ATOMIC);
}
return retvalue;
}
@@ -2590,11 +2593,16 @@ static void arcmsr_handle_virtual_command(struct
AdapterControlBlock *acb,
strncpy(&inqdata[32], "R001", 4); /* Product Revision */
sg = scsi_sglist(cmd);
- buffer = kmap_atomic(sg_page(sg)) + sg->offset;
+ buffer = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(buffer)) {
+ cmd->result = (DID_ERROR << 16);
+ cmd->scsi_done(cmd);
+ return;
+ }
memcpy(buffer, inqdata, sizeof(inqdata));
sg = scsi_sglist(cmd);
- kunmap_atomic(buffer - sg->offset);
+ sg_unmap(sg, buffer, 0, SG_KMAP_ATOMIC);
cmd->scsi_done(cmd);
}
diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c
index 3419e1b..6e91729 100644
--- a/drivers/scsi/ips.c
+++ b/drivers/scsi/ips.c
@@ -1506,14 +1506,14 @@ static int ips_is_passthru(struct scsi_cmnd *SC)
/* kmap_atomic() ensures addressability of the user buffer.*/
/* local_irq_save() protects the KM_IRQ0 address slot. */
local_irq_save(flags);
-buffer = kmap_atomic(sg_page(sg)) + sg->offset;
-if (buffer && buffer[0] == 'C' && buffer[1] == 'O' &&
+buffer = sg_map(sg, 0, SG_KMAP_ATOMIC);
+if (!IS_ERR(buffer) && buffer[0] == 'C' && buffer[1] == 'O' &&
buffer[2] == 'P' && buffer[3] == 'P') {
-kunmap_atomic(buffer - sg->offset);
+sg_unmap(sg, buffer, 0, SG_KMAP_ATOMIC);
local_irq_restore(flags);
return 1;
}
-kunmap_atomic(buffer - sg->offset);
+sg_unmap(sg, buffer, 0, SG_KMAP_ATOMIC);
local_irq_restore(flags);
}
return 0;
diff --git a/drivers/scsi/megaraid.c b/drivers/scsi/megaraid.c
index 3c63c29..f8aee59 100644
--- a/drivers/scsi/megaraid.c
+++ b/drivers/scsi/megaraid.c
@@ -663,10 +663,15 @@ mega_build_cmd(adapter_t *adapter, Scsi_Cmnd *cmd, int
*busy)
struct scatterlist *sg;
sg = scsi_sglist(cmd);
- buf = kmap_atomic(sg_page(sg)) + sg->offset;
+ buf = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(buf)) {
+cmd->result = (DID_ERROR << 16);
+ cmd->scsi_done(cmd);
+ return NULL;
+ }
memset(buf, 0, cmd->cmnd[4]);
- kunmap_atomic(buf - sg->offset);
+ sg_unmap(sg, buf, 0, SG_KMAP_ATOMIC);
cmd->result = (DID_OK << 16);
cmd->scsi_done(cmd);
--
2.1.4
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[Intel-gfx] [PATCH v2 17/21] mmc: spi: Make use of the new sg_map helper function
We use the sg_map helper but it's slightly more complicated
as we only check for the error when the mapping actually gets used.
Such that if the mapping failed but wasn't needed then no
error occurs.
Signed-off-by: Logan Gunthorpe
Cc: Ulf Hansson
---
drivers/mmc/host/mmc_spi.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c
index 476e53d..d614f36 100644
--- a/drivers/mmc/host/mmc_spi.c
+++ b/drivers/mmc/host/mmc_spi.c
@@ -676,9 +676,15 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct
spi_transfer *t,
struct scratch *scratch = host->data;
u32 pattern;
- if (host->mmc->use_spi_crc)
+ if (host->mmc->use_spi_crc) {
+ if (IS_ERR(t->tx_buf))
+ return PTR_ERR(t->tx_buf);
+
scratch->crc_val = cpu_to_be16(
crc_itu_t(0, t->tx_buf, t->len));
+ t->tx_buf += t->len;
+ }
+
if (host->dma_dev)
dma_sync_single_for_device(host->dma_dev,
host->data_dma, sizeof(*scratch),
@@ -743,7 +749,6 @@ mmc_spi_writeblock(struct mmc_spi_host *host, struct
spi_transfer *t,
return status;
}
- t->tx_buf += t->len;
if (host->dma_dev)
t->tx_dma += t->len;
@@ -809,6 +814,11 @@ mmc_spi_readblock(struct mmc_spi_host *host, struct
spi_transfer *t,
}
leftover = status << 1;
+ if (bitshift || host->mmc->use_spi_crc) {
+ if (IS_ERR(t->rx_buf))
+ return PTR_ERR(t->rx_buf);
+ }
+
if (host->dma_dev) {
dma_sync_single_for_device(host->dma_dev,
host->data_dma, sizeof(*scratch),
@@ -860,9 +870,10 @@ mmc_spi_readblock(struct mmc_spi_host *host, struct
spi_transfer *t,
scratch->crc_val, crc, t->len);
return -EILSEQ;
}
+
+ t->rx_buf += t->len;
}
- t->rx_buf += t->len;
if (host->dma_dev)
t->rx_dma += t->len;
@@ -933,11 +944,11 @@ mmc_spi_data_do(struct mmc_spi_host *host, struct
mmc_command *cmd,
}
/* allow pio too; we don't allow highmem */
- kmap_addr = kmap(sg_page(sg));
+ kmap_addr = sg_map(sg, 0, SG_KMAP);
if (direction == DMA_TO_DEVICE)
- t->tx_buf = kmap_addr + sg->offset;
+ t->tx_buf = kmap_addr;
else
- t->rx_buf = kmap_addr + sg->offset;
+ t->rx_buf = kmap_addr;
/* transfer each block, and update request status */
while (length) {
@@ -967,7 +978,8 @@ mmc_spi_data_do(struct mmc_spi_host *host, struct
mmc_command *cmd,
/* discard mappings */
if (direction == DMA_FROM_DEVICE)
flush_kernel_dcache_page(sg_page(sg));
- kunmap(sg_page(sg));
+ if (!IS_ERR(kmap_addr))
+ sg_unmap(sg, kmap_addr, 0, SG_KMAP);
if (dma_dev)
dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir);
--
2.1.4
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[Intel-gfx] [PATCH v2 21/21] memstick: Make use of the new sg_map helper function
Straightforward conversion, but we have to make use of
SG_MAP_MUST_NOT_FAIL which may BUG_ON in certain cases
in the future.
Signed-off-by: Logan Gunthorpe
Cc: Alex Dubov
---
drivers/memstick/host/jmb38x_ms.c | 11 ++-
drivers/memstick/host/tifm_ms.c | 11 ++-
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/memstick/host/jmb38x_ms.c
b/drivers/memstick/host/jmb38x_ms.c
index 48db922..9019e37 100644
--- a/drivers/memstick/host/jmb38x_ms.c
+++ b/drivers/memstick/host/jmb38x_ms.c
@@ -303,7 +303,6 @@ static int jmb38x_ms_transfer_data(struct jmb38x_ms_host
*host)
unsigned int off;
unsigned int t_size, p_cnt;
unsigned char *buf;
- struct page *pg;
unsigned long flags = 0;
if (host->req->long_data) {
@@ -318,14 +317,14 @@ static int jmb38x_ms_transfer_data(struct jmb38x_ms_host
*host)
unsigned int uninitialized_var(p_off);
if (host->req->long_data) {
- pg = nth_page(sg_page(&host->req->sg),
- off >> PAGE_SHIFT);
p_off = offset_in_page(off);
p_cnt = PAGE_SIZE - p_off;
p_cnt = min(p_cnt, length);
local_irq_save(flags);
- buf = kmap_atomic(pg) + p_off;
+ buf = sg_map(&host->req->sg,
+off - host->req->sg.offset,
+SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
} else {
buf = host->req->data + host->block_pos;
p_cnt = host->req->data_len - host->block_pos;
@@ -341,7 +340,9 @@ static int jmb38x_ms_transfer_data(struct jmb38x_ms_host
*host)
: jmb38x_ms_read_reg_data(host, buf, p_cnt);
if (host->req->long_data) {
- kunmap_atomic(buf - p_off);
+ sg_unmap(&host->req->sg, buf,
+off - host->req->sg.offset,
+SG_KMAP_ATOMIC);
local_irq_restore(flags);
}
diff --git a/drivers/memstick/host/tifm_ms.c b/drivers/memstick/host/tifm_ms.c
index 7bafa72..304985d 100644
--- a/drivers/memstick/host/tifm_ms.c
+++ b/drivers/memstick/host/tifm_ms.c
@@ -186,7 +186,6 @@ static unsigned int tifm_ms_transfer_data(struct tifm_ms
*host)
unsigned int off;
unsigned int t_size, p_cnt;
unsigned char *buf;
- struct page *pg;
unsigned long flags = 0;
if (host->req->long_data) {
@@ -203,14 +202,14 @@ static unsigned int tifm_ms_transfer_data(struct tifm_ms
*host)
unsigned int uninitialized_var(p_off);
if (host->req->long_data) {
- pg = nth_page(sg_page(&host->req->sg),
- off >> PAGE_SHIFT);
p_off = offset_in_page(off);
p_cnt = PAGE_SIZE - p_off;
p_cnt = min(p_cnt, length);
local_irq_save(flags);
- buf = kmap_atomic(pg) + p_off;
+ buf = sg_map(&host->req->sg,
+off - host->req->sg.offset,
+SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
} else {
buf = host->req->data + host->block_pos;
p_cnt = host->req->data_len - host->block_pos;
@@ -221,7 +220,9 @@ static unsigned int tifm_ms_transfer_data(struct tifm_ms
*host)
: tifm_ms_read_data(host, buf, p_cnt);
if (host->req->long_data) {
- kunmap_atomic(buf - p_off);
+ sg_unmap(&host->req->sg, buf,
+off - host->req->sg.offset,
+SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
local_irq_restore(flags);
}
--
2.1.4
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[Intel-gfx] [PATCH v2 11/21] scsi: ipr, pmcraid, isci: Make use of the new sg_map helper
Very straightforward conversion of three scsi drivers.
Signed-off-by: Logan Gunthorpe
Cc: Brian King
Cc: Artur Paszkiewicz
---
drivers/scsi/ipr.c | 27 ++-
drivers/scsi/isci/request.c | 42 +-
drivers/scsi/pmcraid.c | 19 ---
3 files changed, 51 insertions(+), 37 deletions(-)
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index b0c68d2..b2324e1 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -3895,7 +3895,7 @@ static void ipr_free_ucode_buffer(struct ipr_sglist
*sglist)
static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
u8 *buffer, u32 len)
{
- int bsize_elem, i, result = 0;
+ int bsize_elem, i;
struct scatterlist *scatterlist;
void *kaddr;
@@ -3905,32 +3905,33 @@ static int ipr_copy_ucode_buffer(struct ipr_sglist
*sglist,
scatterlist = sglist->scatterlist;
for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
- struct page *page = sg_page(&scatterlist[i]);
+ kaddr = sg_map(&scatterlist[i], 0, SG_KMAP);
+ if (IS_ERR(kaddr)) {
+ ipr_trace;
+ return PTR_ERR(kaddr);
+ }
- kaddr = kmap(page);
memcpy(kaddr, buffer, bsize_elem);
- kunmap(page);
+ sg_unmap(&scatterlist[i], kaddr, 0, SG_KMAP);
scatterlist[i].length = bsize_elem;
-
- if (result != 0) {
- ipr_trace;
- return result;
- }
}
if (len % bsize_elem) {
- struct page *page = sg_page(&scatterlist[i]);
+ kaddr = sg_map(&scatterlist[i], 0, SG_KMAP);
+ if (IS_ERR(kaddr)) {
+ ipr_trace;
+ return PTR_ERR(kaddr);
+ }
- kaddr = kmap(page);
memcpy(kaddr, buffer, len % bsize_elem);
- kunmap(page);
+ sg_unmap(&scatterlist[i], kaddr, 0, SG_KMAP);
scatterlist[i].length = len % bsize_elem;
}
sglist->buffer_len = len;
- return result;
+ return 0;
}
/**
diff --git a/drivers/scsi/isci/request.c b/drivers/scsi/isci/request.c
index 47f66e9..6f5521b 100644
--- a/drivers/scsi/isci/request.c
+++ b/drivers/scsi/isci/request.c
@@ -1424,12 +1424,14 @@ sci_stp_request_pio_data_in_copy_data_buffer(struct
isci_stp_request *stp_req,
sg = task->scatter;
while (total_len > 0) {
- struct page *page = sg_page(sg);
-
copy_len = min_t(int, total_len, sg_dma_len(sg));
- kaddr = kmap_atomic(page);
- memcpy(kaddr + sg->offset, src_addr, copy_len);
- kunmap_atomic(kaddr);
+ kaddr = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(kaddr))
+ return SCI_FAILURE;
+
+ memcpy(kaddr, src_addr, copy_len);
+ sg_unmap(sg, kaddr, 0, SG_KMAP_ATOMIC);
+
total_len -= copy_len;
src_addr += copy_len;
sg = sg_next(sg);
@@ -1771,14 +1773,16 @@ sci_io_request_frame_handler(struct isci_request *ireq,
case SCI_REQ_SMP_WAIT_RESP: {
struct sas_task *task = isci_request_access_task(ireq);
struct scatterlist *sg = &task->smp_task.smp_resp;
- void *frame_header, *kaddr;
+ void *frame_header;
u8 *rsp;
sci_unsolicited_frame_control_get_header(&ihost->uf_control,
frame_index,
&frame_header);
- kaddr = kmap_atomic(sg_page(sg));
- rsp = kaddr + sg->offset;
+ rsp = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(rsp))
+ return SCI_FAILURE;
+
sci_swab32_cpy(rsp, frame_header, 1);
if (rsp[0] == SMP_RESPONSE) {
@@ -1814,7 +1818,7 @@ sci_io_request_frame_handler(struct isci_request *ireq,
ireq->sci_status =
SCI_FAILURE_CONTROLLER_SPECIFIC_IO_ERR;
sci_change_state(&ireq->sm, SCI_REQ_COMPLETED);
}
- kunmap_atomic(kaddr);
+ sg_unmap(sg, rsp, 0, SG_KMAP_ATOMIC);
sci_controller_release_frame(ihost, frame_index);
@@ -2919,15 +2923,18 @@ static void isci_request_io_request_complete(struct
isci_host *ihost,
case SAS_PROTOCOL_SMP: {
struct scatterlist *sg = &task->smp_task.smp_req;
struct smp_req *smp_req;
- void *kaddr;
dma
[Intel-gfx] [PATCH v2 20/21] mmc: tifm_sd: Make use of the new sg_map helper function
This conversion is a bit complicated. We modiy the read_fifo,
write_fifo and copy_page functions to take a scatterlist instead of a
page. Thus we can use sg_map instead of kmap_atomic. There's a bit of
accounting that needed to be done for the offset for this to work.
(Seeing sg_map takes care of the offset but it's already added and
used earlier in the code.)
There's also no error path, so we use SG_MAP_MUST_NOT_FAIL which may
BUG_ON in certain cases in the future.
Signed-off-by: Logan Gunthorpe
Cc: Alex Dubov
Cc: Ulf Hansson
---
drivers/mmc/host/tifm_sd.c | 50 +++---
1 file changed, 29 insertions(+), 21 deletions(-)
diff --git a/drivers/mmc/host/tifm_sd.c b/drivers/mmc/host/tifm_sd.c
index 93c4b40..e64345a 100644
--- a/drivers/mmc/host/tifm_sd.c
+++ b/drivers/mmc/host/tifm_sd.c
@@ -111,14 +111,16 @@ struct tifm_sd {
};
/* for some reason, host won't respond correctly to readw/writew */
-static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
+static void tifm_sd_read_fifo(struct tifm_sd *host, struct scatterlist *sg,
unsigned int off, unsigned int cnt)
{
struct tifm_dev *sock = host->dev;
unsigned char *buf;
unsigned int pos = 0, val;
- buf = kmap_atomic(pg) + off;
+ buf = sg_map(sg, off - sg->offset,
+SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
+
if (host->cmd_flags & DATA_CARRY) {
buf[pos++] = host->bounce_buf_data[0];
host->cmd_flags &= ~DATA_CARRY;
@@ -134,17 +136,19 @@ static void tifm_sd_read_fifo(struct tifm_sd *host,
struct page *pg,
}
buf[pos++] = (val >> 8) & 0xff;
}
- kunmap_atomic(buf - off);
+ sg_unmap(sg, buf, off - sg->offset, SG_KMAP_ATOMIC);
}
-static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
+static void tifm_sd_write_fifo(struct tifm_sd *host, struct scatterlist *sg,
unsigned int off, unsigned int cnt)
{
struct tifm_dev *sock = host->dev;
unsigned char *buf;
unsigned int pos = 0, val;
- buf = kmap_atomic(pg) + off;
+ buf = sg_map(sg, off - sg->offset,
+SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
+
if (host->cmd_flags & DATA_CARRY) {
val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
writel(val, sock->addr + SOCK_MMCSD_DATA);
@@ -161,7 +165,7 @@ static void tifm_sd_write_fifo(struct tifm_sd *host, struct
page *pg,
val |= (buf[pos++] << 8) & 0xff00;
writel(val, sock->addr + SOCK_MMCSD_DATA);
}
- kunmap_atomic(buf - off);
+ sg_unmap(sg, buf, off - sg->offset, SG_KMAP_ATOMIC);
}
static void tifm_sd_transfer_data(struct tifm_sd *host)
@@ -170,7 +174,6 @@ static void tifm_sd_transfer_data(struct tifm_sd *host)
struct scatterlist *sg = r_data->sg;
unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
unsigned int p_off, p_cnt;
- struct page *pg;
if (host->sg_pos == host->sg_len)
return;
@@ -192,33 +195,39 @@ static void tifm_sd_transfer_data(struct tifm_sd *host)
}
off = sg[host->sg_pos].offset + host->block_pos;
- pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
p_off = offset_in_page(off);
p_cnt = PAGE_SIZE - p_off;
p_cnt = min(p_cnt, cnt);
p_cnt = min(p_cnt, t_size);
if (r_data->flags & MMC_DATA_READ)
- tifm_sd_read_fifo(host, pg, p_off, p_cnt);
+ tifm_sd_read_fifo(host, &sg[host->sg_pos], p_off,
+ p_cnt);
else if (r_data->flags & MMC_DATA_WRITE)
- tifm_sd_write_fifo(host, pg, p_off, p_cnt);
+ tifm_sd_write_fifo(host, &sg[host->sg_pos], p_off,
+ p_cnt);
t_size -= p_cnt;
host->block_pos += p_cnt;
}
}
-static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
- struct page *src, unsigned int src_off,
+static void tifm_sd_copy_page(struct scatterlist *dst, unsigned int dst_off,
+ struct scatterlist *src, unsigned int src_off,
unsigned int count)
{
- unsigned char *src_buf = kmap_atomic(src) + src_off;
- unsigned char *dst_buf = kmap_atomic(dst) + dst_off;
+ unsigned char *src_buf, *dst_buf;
+
+ src_off -= src->offset;
+ dst_off -= dst->offset;
+
+ src_buf = sg_map(src, src_off, SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
+ dst_buf = sg_map(dst, dst_off, SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
memcpy(dst_buf, src_buf, count);
- kunmap_atomic(dst_buf - dst_off);
-
[Intel-gfx] [PATCH v2 06/21] crypto: hifn_795x: Make use of the new sg_map helper function
Conversion of a couple kmap_atomic instances to the sg_map helper
function.
However, it looks like there was a bug in the original code: the source
scatter lists offset (t->offset) was passed to ablkcipher_get which
added it to the destination address. This doesn't make a lot of
sense, but t->offset is likely always zero anyway. So, this patch cleans
that brokeness up.
Also, a change to the error path: if ablkcipher_get failed, everything
seemed to proceed as if it hadn't. Setting 'error' should hopefully
clear that up.
Signed-off-by: Logan Gunthorpe
Cc: Herbert Xu
Cc: "David S. Miller"
---
drivers/crypto/hifn_795x.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c
index e09d405..34b1870 100644
--- a/drivers/crypto/hifn_795x.c
+++ b/drivers/crypto/hifn_795x.c
@@ -1619,7 +1619,7 @@ static int hifn_start_device(struct hifn_device *dev)
return 0;
}
-static int ablkcipher_get(void *saddr, unsigned int *srestp, unsigned int
offset,
+static int ablkcipher_get(void *saddr, unsigned int *srestp,
struct scatterlist *dst, unsigned int size, unsigned int
*nbytesp)
{
unsigned int srest = *srestp, nbytes = *nbytesp, copy;
@@ -1632,15 +1632,17 @@ static int ablkcipher_get(void *saddr, unsigned int
*srestp, unsigned int offset
while (size) {
copy = min3(srest, dst->length, size);
- daddr = kmap_atomic(sg_page(dst));
- memcpy(daddr + dst->offset + offset, saddr, copy);
- kunmap_atomic(daddr);
+ daddr = sg_map(dst, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(daddr))
+ return PTR_ERR(daddr);
+
+ memcpy(daddr, saddr, copy);
+ sg_unmap(dst, daddr, 0, SG_KMAP_ATOMIC);
nbytes -= copy;
size -= copy;
srest -= copy;
saddr += copy;
- offset = 0;
pr_debug("%s: copy: %u, size: %u, srest: %u, nbytes: %u.\n",
__func__, copy, size, srest, nbytes);
@@ -1671,11 +1673,12 @@ static inline void hifn_complete_sa(struct hifn_device
*dev, int i)
static void hifn_process_ready(struct ablkcipher_request *req, int error)
{
+ int err;
struct hifn_request_context *rctx = ablkcipher_request_ctx(req);
if (rctx->walk.flags & ASYNC_FLAGS_MISALIGNED) {
unsigned int nbytes = req->nbytes;
- int idx = 0, err;
+ int idx = 0;
struct scatterlist *dst, *t;
void *saddr;
@@ -1695,17 +1698,24 @@ static void hifn_process_ready(struct
ablkcipher_request *req, int error)
continue;
}
- saddr = kmap_atomic(sg_page(t));
+ saddr = sg_map(t, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(saddr)) {
+ if (!error)
+ error = PTR_ERR(saddr);
+ break;
+ }
+
+ err = ablkcipher_get(saddr, &t->length,
+dst, nbytes, &nbytes);
+ sg_unmap(t, saddr, 0, SG_KMAP_ATOMIC);
- err = ablkcipher_get(saddr, &t->length, t->offset,
- dst, nbytes, &nbytes);
if (err < 0) {
- kunmap_atomic(saddr);
+ if (!error)
+ error = err;
break;
}
idx += err;
- kunmap_atomic(saddr);
}
hifn_cipher_walk_exit(&rctx->walk);
--
2.1.4
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[Intel-gfx] [PATCH v2 12/21] scsi: hisi_sas, mvsas, gdth: Make use of the new sg_map helper function
Very straightforward conversion of three scsi drivers.
Signed-off-by: Logan Gunthorpe
Cc: Achim Leubner
Cc: John Garry
---
drivers/scsi/gdth.c| 9 +++--
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 14 +-
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 13 +
drivers/scsi/mvsas/mv_sas.c| 10 +-
4 files changed, 30 insertions(+), 16 deletions(-)
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c
index d020a13..c70248a2 100644
--- a/drivers/scsi/gdth.c
+++ b/drivers/scsi/gdth.c
@@ -2301,10 +2301,15 @@ static void gdth_copy_internal_data(gdth_ha_str *ha,
Scsi_Cmnd *scp,
return;
}
local_irq_save(flags);
-address = kmap_atomic(sg_page(sl)) + sl->offset;
+address = sg_map(sl, 0, SG_KMAP_ATOMIC);
+if (IS_ERR(address)) {
+scp->result = DID_ERROR << 16;
+return;
+ }
+
memcpy(address, buffer, cpnow);
flush_dcache_page(sg_page(sl));
-kunmap_atomic(address);
+sg_unmap(sl, address, 0, SG_KMAP_ATOMIC);
local_irq_restore(flags);
if (cpsum == cpcount)
break;
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
index fc1c1b2..b3953e3 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
@@ -1381,18 +1381,22 @@ static int slot_complete_v1_hw(struct hisi_hba
*hisi_hba,
void *to;
struct scatterlist *sg_resp = &task->smp_task.smp_resp;
- ts->stat = SAM_STAT_GOOD;
- to = kmap_atomic(sg_page(sg_resp));
+ to = sg_map(sg_resp, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(to)) {
+ dev_err(dev, "slot complete: error mapping memory");
+ ts->stat = SAS_SG_ERR;
+ break;
+ }
+ ts->stat = SAM_STAT_GOOD;
dma_unmap_sg(dev, &task->smp_task.smp_resp, 1,
DMA_FROM_DEVICE);
dma_unmap_sg(dev, &task->smp_task.smp_req, 1,
DMA_TO_DEVICE);
- memcpy(to + sg_resp->offset,
- slot->status_buffer +
+ memcpy(to, slot->status_buffer +
sizeof(struct hisi_sas_err_record),
sg_dma_len(sg_resp));
- kunmap_atomic(to);
+ sg_unmap(sg_resp, to, 0, SG_KMAP_ATOMIC);
break;
}
case SAS_PROTOCOL_SATA:
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index e241921..3e674a4 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -2307,18 +2307,23 @@ slot_complete_v2_hw(struct hisi_hba *hisi_hba, struct
hisi_sas_slot *slot)
struct scatterlist *sg_resp = &task->smp_task.smp_resp;
void *to;
+ to = sg_map(sg_resp, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(to)) {
+ dev_err(dev, "slot complete: error mapping memory");
+ ts->stat = SAS_SG_ERR;
+ break;
+ }
+
ts->stat = SAM_STAT_GOOD;
- to = kmap_atomic(sg_page(sg_resp));
dma_unmap_sg(dev, &task->smp_task.smp_resp, 1,
DMA_FROM_DEVICE);
dma_unmap_sg(dev, &task->smp_task.smp_req, 1,
DMA_TO_DEVICE);
- memcpy(to + sg_resp->offset,
- slot->status_buffer +
+ memcpy(to, slot->status_buffer +
sizeof(struct hisi_sas_err_record),
sg_dma_len(sg_resp));
- kunmap_atomic(to);
+ sg_unmap(sg_resp, to, 0, SG_KMAP_ATOMIC);
break;
}
case SAS_PROTOCOL_SATA:
diff --git a/drivers/scsi/mvsas/mv_sas.c b/drivers/scsi/mvsas/mv_sas.c
index c7cc803..a72e0ce 100644
--- a/drivers/scsi/mvsas/mv_sas.c
+++ b/drivers/scsi/mvsas/mv_sas.c
@@ -1798,11 +1798,11 @@ int mvs_slot_complete(struct mvs_info *mvi, u32
rx_desc, u32 flags)
case SAS_PROTOCOL_SMP: {
struct scatterlist *sg_resp = &task->smp_task.smp_resp;
tstat->stat = SAM_STAT_GOOD;
- to = kmap_atomic(sg_page(sg_resp));
- memcpy(to + sg_resp->offset,
- slot->response + sizeof(struct mvs_err_info),
- sg_dma_len(sg_resp));
- kunmap_atomic(to);
+ to = sg_map(sg_resp, 0, SG_KMAP_ATOMIC);
+ memcpy(to,
+ slot->response + sizeof(struct mvs_err_info),
+ sg_dma_len(sg_resp));
+
[Intel-gfx] [PATCH v2 15/21] xen-blkfront: Make use of the new sg_map helper function
Straightforward conversion to the new helper, except due to the lack
of error path, we have to use SG_MAP_MUST_NOT_FAIL which may BUG_ON in
certain cases in the future.
Signed-off-by: Logan Gunthorpe
Cc: Boris Ostrovsky
Cc: Juergen Gross
Cc: Konrad Rzeszutek Wilk
Cc: "Roger Pau Monné"
---
drivers/block/xen-blkfront.c | 20 +++-
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c
index 3945963..ed62175 100644
--- a/drivers/block/xen-blkfront.c
+++ b/drivers/block/xen-blkfront.c
@@ -816,8 +816,9 @@ static int blkif_queue_rw_req(struct request *req, struct
blkfront_ring_info *ri
BUG_ON(sg->offset + sg->length > PAGE_SIZE);
if (setup.need_copy) {
- setup.bvec_off = sg->offset;
- setup.bvec_data = kmap_atomic(sg_page(sg));
+ setup.bvec_off = 0;
+ setup.bvec_data = sg_map(sg, 0, SG_KMAP_ATOMIC |
+SG_MAP_MUST_NOT_FAIL);
}
gnttab_foreach_grant_in_range(sg_page(sg),
@@ -827,7 +828,7 @@ static int blkif_queue_rw_req(struct request *req, struct
blkfront_ring_info *ri
&setup);
if (setup.need_copy)
- kunmap_atomic(setup.bvec_data);
+ sg_unmap(sg, setup.bvec_data, 0, SG_KMAP_ATOMIC);
}
if (setup.segments)
kunmap_atomic(setup.segments);
@@ -1053,7 +1054,7 @@ static int xen_translate_vdev(int vdevice, int *minor,
unsigned int *offset)
case XEN_SCSI_DISK5_MAJOR:
case XEN_SCSI_DISK6_MAJOR:
case XEN_SCSI_DISK7_MAJOR:
- *offset = (*minor / PARTS_PER_DISK) +
+ *offset = (*minor / PARTS_PER_DISK) +
((major - XEN_SCSI_DISK1_MAJOR + 1) * 16) +
EMULATED_SD_DISK_NAME_OFFSET;
*minor = *minor +
@@ -1068,7 +1069,7 @@ static int xen_translate_vdev(int vdevice, int *minor,
unsigned int *offset)
case XEN_SCSI_DISK13_MAJOR:
case XEN_SCSI_DISK14_MAJOR:
case XEN_SCSI_DISK15_MAJOR:
- *offset = (*minor / PARTS_PER_DISK) +
+ *offset = (*minor / PARTS_PER_DISK) +
((major - XEN_SCSI_DISK8_MAJOR + 8) * 16) +
EMULATED_SD_DISK_NAME_OFFSET;
*minor = *minor +
@@ -1119,7 +1120,7 @@ static int xlvbd_alloc_gendisk(blkif_sector_t capacity,
if (!VDEV_IS_EXTENDED(info->vdevice)) {
err = xen_translate_vdev(info->vdevice, &minor, &offset);
if (err)
- return err;
+ return err;
nr_parts = PARTS_PER_DISK;
} else {
minor = BLKIF_MINOR_EXT(info->vdevice);
@@ -1483,8 +1484,9 @@ static bool blkif_completion(unsigned long *id,
for_each_sg(s->sg, sg, num_sg, i) {
BUG_ON(sg->offset + sg->length > PAGE_SIZE);
- data.bvec_offset = sg->offset;
- data.bvec_data = kmap_atomic(sg_page(sg));
+ data.bvec_offset = 0;
+ data.bvec_data = sg_map(sg, 0, SG_KMAP_ATOMIC |
+ SG_MAP_MUST_NOT_FAIL);
gnttab_foreach_grant_in_range(sg_page(sg),
sg->offset,
@@ -1492,7 +1494,7 @@ static bool blkif_completion(unsigned long *id,
blkif_copy_from_grant,
&data);
- kunmap_atomic(data.bvec_data);
+ sg_unmap(sg, data.bvec_data, 0, SG_KMAP_ATOMIC);
}
}
/* Add the persistent grant into the list of free grants */
--
2.1.4
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[Intel-gfx] [PATCH v2 09/21] staging: unisys: visorbus: Make use of the new sg_map helper function
Straightforward conversion to the new function.
Signed-off-by: Logan Gunthorpe
Acked-by: David Kershner
---
drivers/staging/unisys/visorhba/visorhba_main.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/staging/unisys/visorhba/visorhba_main.c
b/drivers/staging/unisys/visorhba/visorhba_main.c
index d372115..c77426c 100644
--- a/drivers/staging/unisys/visorhba/visorhba_main.c
+++ b/drivers/staging/unisys/visorhba/visorhba_main.c
@@ -843,7 +843,6 @@ do_scsi_nolinuxstat(struct uiscmdrsp *cmdrsp, struct
scsi_cmnd *scsicmd)
struct scatterlist *sg;
unsigned int i;
char *this_page;
- char *this_page_orig;
int bufind = 0;
struct visordisk_info *vdisk;
struct visorhba_devdata *devdata;
@@ -870,11 +869,14 @@ do_scsi_nolinuxstat(struct uiscmdrsp *cmdrsp, struct
scsi_cmnd *scsicmd)
sg = scsi_sglist(scsicmd);
for (i = 0; i < scsi_sg_count(scsicmd); i++) {
- this_page_orig = kmap_atomic(sg_page(sg + i));
- this_page = (void *)((unsigned long)this_page_orig |
-sg[i].offset);
+ this_page = sg_map(sg + i, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(this_page)) {
+ scsicmd->result = DID_ERROR << 16;
+ return;
+ }
+
memcpy(this_page, buf + bufind, sg[i].length);
- kunmap_atomic(this_page_orig);
+ sg_unmap(sg + i, this_page, 0, SG_KMAP_ATOMIC);
}
} else {
devdata = (struct visorhba_devdata *)scsidev->host->hostdata;
--
2.1.4
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[Intel-gfx] [PATCH v2 05/21] drm/i915: Make use of the new sg_map helper function
This is a single straightforward conversion from kmap to sg_map.
We also create the i915_gem_object_unmap function to common up the
unmap code.
Signed-off-by: Logan Gunthorpe
Acked-by: Daniel Vetter
---
drivers/gpu/drm/i915/i915_gem.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 07e9b27..2c33000 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2202,6 +2202,15 @@ static void __i915_gem_object_reset_page_iter(struct
drm_i915_gem_object *obj)
radix_tree_delete(&obj->mm.get_page.radix, iter.index);
}
+static void i915_gem_object_unmap(const struct drm_i915_gem_object *obj,
+ void *ptr)
+{
+ if (is_vmalloc_addr(ptr))
+ vunmap(ptr);
+ else
+ sg_unmap(obj->mm.pages->sgl, ptr, 0, SG_KMAP);
+}
+
void __i915_gem_object_put_pages(struct drm_i915_gem_object *obj,
enum i915_mm_subclass subclass)
{
@@ -2229,10 +2238,7 @@ void __i915_gem_object_put_pages(struct
drm_i915_gem_object *obj,
void *ptr;
ptr = ptr_mask_bits(obj->mm.mapping);
- if (is_vmalloc_addr(ptr))
- vunmap(ptr);
- else
- kunmap(kmap_to_page(ptr));
+ i915_gem_object_unmap(obj, ptr);
obj->mm.mapping = NULL;
}
@@ -2499,8 +2505,11 @@ static void *i915_gem_object_map(const struct
drm_i915_gem_object *obj,
void *addr;
/* A single page can always be kmapped */
- if (n_pages == 1 && type == I915_MAP_WB)
- return kmap(sg_page(sgt->sgl));
+ if (n_pages == 1 && type == I915_MAP_WB) {
+ addr = sg_map(sgt->sgl, 0, SG_KMAP);
+ if (IS_ERR(addr))
+ return NULL;
+ }
if (n_pages > ARRAY_SIZE(stack_pages)) {
/* Too big for stack -- allocate temporary array instead */
@@ -2567,11 +2576,7 @@ void *i915_gem_object_pin_map(struct drm_i915_gem_object
*obj,
goto err_unpin;
}
- if (is_vmalloc_addr(ptr))
- vunmap(ptr);
- else
- kunmap(kmap_to_page(ptr));
-
+ i915_gem_object_unmap(obj, ptr);
ptr = obj->mm.mapping = NULL;
}
--
2.1.4
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[Intel-gfx] [PATCH v2 07/21] crypto: shash, caam: Make use of the new sg_map helper function
Very straightforward conversion to the new function in the caam driver
and shash library.
Signed-off-by: Logan Gunthorpe
Cc: Herbert Xu
Cc: "David S. Miller"
---
crypto/shash.c| 9 ++---
drivers/crypto/caam/caamalg.c | 8 +++-
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/crypto/shash.c b/crypto/shash.c
index 5e31c8d..5914881 100644
--- a/crypto/shash.c
+++ b/crypto/shash.c
@@ -283,10 +283,13 @@ int shash_ahash_digest(struct ahash_request *req, struct
shash_desc *desc)
if (nbytes < min(sg->length, ((unsigned int)(PAGE_SIZE)) - offset)) {
void *data;
- data = kmap_atomic(sg_page(sg));
- err = crypto_shash_digest(desc, data + offset, nbytes,
+ data = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+
+ err = crypto_shash_digest(desc, data, nbytes,
req->result);
- kunmap_atomic(data);
+ sg_unmap(sg, data, 0, SG_KMAP_ATOMIC);
crypto_yield(desc->flags);
} else
err = crypto_shash_init(desc) ?:
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 398807d..62d2f5d 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -89,7 +89,6 @@ static void dbg_dump_sg(const char *level, const char
*prefix_str,
struct scatterlist *sg, size_t tlen, bool ascii)
{
struct scatterlist *it;
- void *it_page;
size_t len;
void *buf;
@@ -98,19 +97,18 @@ static void dbg_dump_sg(const char *level, const char
*prefix_str,
* make sure the scatterlist's page
* has a valid virtual memory mapping
*/
- it_page = kmap_atomic(sg_page(it));
- if (unlikely(!it_page)) {
+ buf = sg_map(it, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(buf)) {
printk(KERN_ERR "dbg_dump_sg: kmap failed\n");
return;
}
- buf = it_page + it->offset;
len = min_t(size_t, tlen, it->length);
print_hex_dump(level, prefix_str, prefix_type, rowsize,
groupsize, buf, len, ascii);
tlen -= len;
- kunmap_atomic(it_page);
+ sg_unmap(it, buf, 0, SG_KMAP_ATOMIC);
}
}
#endif
--
2.1.4
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[Intel-gfx] [PATCH v2 02/21] libiscsi: Add an internal error code
This is a prep patch to add a new error code to libiscsi. We want to
rework some kmap calls to be able to fail. When we do, we'd like to
use this error code.
This patch simply introduces ISCSI_TCP_INTERNAL_ERR and prints
"Internal Error." when it gets hit.
Signed-off-by: Logan Gunthorpe
---
drivers/scsi/cxgbi/libcxgbi.c | 5 +
include/scsi/libiscsi_tcp.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/drivers/scsi/cxgbi/libcxgbi.c b/drivers/scsi/cxgbi/libcxgbi.c
index bd7d39e..e38d0c1 100644
--- a/drivers/scsi/cxgbi/libcxgbi.c
+++ b/drivers/scsi/cxgbi/libcxgbi.c
@@ -1556,6 +1556,11 @@ static inline int read_pdu_skb(struct iscsi_conn *conn,
*/
iscsi_conn_printk(KERN_ERR, conn, "Invalid pdu or skb.");
return -EFAULT;
+ case ISCSI_TCP_INTERNAL_ERR:
+ pr_info("skb 0x%p, off %u, %d, TCP_INTERNAL_ERR.\n",
+ skb, offset, offloaded);
+ iscsi_conn_printk(KERN_ERR, conn, "Internal error.");
+ return -EFAULT;
case ISCSI_TCP_SEGMENT_DONE:
log_debug(1 << CXGBI_DBG_PDU_RX,
"skb 0x%p, off %u, %d, TCP_SEG_DONE, rc %d.\n",
diff --git a/include/scsi/libiscsi_tcp.h b/include/scsi/libiscsi_tcp.h
index 30520d5..90691ad 100644
--- a/include/scsi/libiscsi_tcp.h
+++ b/include/scsi/libiscsi_tcp.h
@@ -92,6 +92,7 @@ enum {
ISCSI_TCP_SKB_DONE, /* skb is out of data */
ISCSI_TCP_CONN_ERR, /* iscsi layer has fired a conn err */
ISCSI_TCP_SUSPENDED,/* conn is suspended */
+ ISCSI_TCP_INTERNAL_ERR, /* an internal error occurred */
};
extern void iscsi_tcp_hdr_recv_prep(struct iscsi_tcp_conn *tcp_conn);
--
2.1.4
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[Intel-gfx] [PATCH v2 00/21] Introduce common scatterlist map function
Changes since v1: * Rebased onto next-20170424 * Removed the _offset version of these functions per Christoph's suggestion * Added an SG_MAP_MUST_NOT_FAIL flag which will BUG_ON in future cases that can't gracefully fail. This removes a bunch of the noise added in v1 to a couple of the drivers. (Per David Laight's suggestion) This flag is only meant for old code * Split the libiscsi patch into two (per Christoph's suggestion) the prep patch (patch 2 in this series) has already been sent separately * Fixed a locking mistake in the target patch (pointed out by a bot) * Dropped the nvmet patch and handled it with a different patch that has been sent separately * Dropped the chcr patch as they have already removed the code that needed to be changed I'm still hoping to only get Patch 1 in the series merged. (Any volunteers?) I'm willing to chase down the maintainers for the remaining patches separately after the first patch is in. The patchset is based on next-20170424 and can be found in the sg_map_v2 branch from this git tree: https://github.com/sbates130272/linux-p2pmem.git -- Hi Everyone, As part of my effort to enable P2P DMA transactions with PCI cards, we've identified the need to be able to safely put IO memory into scatterlists (and eventually other spots). This probably involves a conversion from struct page to pfn_t but that migration is a ways off and those decisions are yet to be made. As an initial step in that direction, I've started cleaning up some of the scatterlist code by trying to carve out a better defined layer between it and it's users. The longer term goal would be to remove sg_page or replace it with something that can potentially fail. This patchset is the first step in that effort. I've introduced a common function to map scatterlist memory and converted all the common kmap(sg_page()) cases. This removes about 66 sg_page calls (of ~331). Seeing this is a fairly large cleanup set that touches a wide swath of the kernel I have limited the people I've sent this to. I'd suggest we look toward merging the first patch and then I can send the individual subsystem patches on to their respective maintainers and get them merged independantly. (This is to avoid the conflicts I created with my last cleanup set... Sorry) Though, I'm certainly open to other suggestions to get it merged. Logan Gunthorpe (21): scatterlist: Introduce sg_map helper functions libiscsi: Add an internal error code libiscsi: Make use of new the sg_map helper function target: Make use of the new sg_map function at 16 call sites drm/i915: Make use of the new sg_map helper function crypto: hifn_795x: Make use of the new sg_map helper function crypto: shash, caam: Make use of the new sg_map helper function dm-crypt: Make use of the new sg_map helper in 4 call sites staging: unisys: visorbus: Make use of the new sg_map helper function RDS: Make use of the new sg_map helper function scsi: ipr, pmcraid, isci: Make use of the new sg_map helper scsi: hisi_sas, mvsas, gdth: Make use of the new sg_map helper function scsi: arcmsr, ips, megaraid: Make use of the new sg_map helper function scsi: libfc, csiostor: Change to sg_copy_buffer in two drivers xen-blkfront: Make use of the new sg_map helper function mmc: sdhci: Make use of the new sg_map helper function mmc: spi: Make use of the new sg_map helper function mmc: tmio: Make use of the new sg_map helper function mmc: sdricoh_cs: Make use of the new sg_map helper function mmc: tifm_sd: Make use of the new sg_map helper function memstick: Make use of the new sg_map helper function crypto/shash.c | 9 ++- drivers/block/xen-blkfront.c| 20 ++--- drivers/crypto/caam/caamalg.c | 8 +- drivers/crypto/hifn_795x.c | 32 +--- drivers/gpu/drm/i915/i915_gem.c | 27 --- drivers/md/dm-crypt.c | 39 ++--- drivers/memstick/host/jmb38x_ms.c | 11 +-- drivers/memstick/host/tifm_ms.c | 11 +-- drivers/mmc/host/mmc_spi.c | 26 -- drivers/mmc/host/sdhci.c| 14 ++-- drivers/mmc/host/sdricoh_cs.c | 14 ++-- drivers/mmc/host/tifm_sd.c | 50 +++- drivers/mmc/host/tmio_mmc.h | 7 +- drivers/mmc/host/tmio_mmc_pio.c | 12 +++ drivers/scsi/arcmsr/arcmsr_hba.c| 16 +++- drivers/scsi/csiostor/csio_scsi.c | 54 + drivers/scsi/cxgbi/libcxgbi.c | 5 ++ drivers/scsi/gdth.c | 9 ++- drivers/scsi/hisi_sas/hisi_sas_v1_hw.c | 14 ++-- drivers/scsi/hisi_sas/hisi_sas_v2_hw.c | 13 ++- drivers/scsi/ipr.c | 27 --- drivers/scsi/ips.c | 8 +- drivers/s
[Intel-gfx] [PATCH v2 04/21] target: Make use of the new sg_map function at 16 call sites
Fairly straightforward conversions in all spots. In a couple of cases
any error gets propogated up should sg_map fail. In other
cases a warning is issued if the kmap fails seeing there's no
clear error path. This should not be an issue until someone tries to
use unmappable memory in the sgl with this driver.
Signed-off-by: Logan Gunthorpe
Cc: "Nicholas A. Bellinger"
---
drivers/target/iscsi/iscsi_target.c| 29 +++---
drivers/target/target_core_rd.c| 3 +-
drivers/target/target_core_sbc.c | 103 +
drivers/target/target_core_transport.c | 18 --
drivers/target/target_core_user.c | 45 +-
include/target/target_core_backend.h | 4 +-
6 files changed, 134 insertions(+), 68 deletions(-)
diff --git a/drivers/target/iscsi/iscsi_target.c
b/drivers/target/iscsi/iscsi_target.c
index e3f9ed3..3ab8d21 100644
--- a/drivers/target/iscsi/iscsi_target.c
+++ b/drivers/target/iscsi/iscsi_target.c
@@ -578,7 +578,7 @@ iscsit_xmit_nondatain_pdu(struct iscsi_conn *conn, struct
iscsi_cmd *cmd,
}
static int iscsit_map_iovec(struct iscsi_cmd *, struct kvec *, u32, u32);
-static void iscsit_unmap_iovec(struct iscsi_cmd *);
+static void iscsit_unmap_iovec(struct iscsi_cmd *, struct kvec *);
static u32 iscsit_do_crypto_hash_sg(struct ahash_request *, struct iscsi_cmd *,
u32, u32, u32, u8 *);
static int
@@ -645,7 +645,7 @@ iscsit_xmit_datain_pdu(struct iscsi_conn *conn, struct
iscsi_cmd *cmd,
ret = iscsit_fe_sendpage_sg(cmd, conn);
- iscsit_unmap_iovec(cmd);
+ iscsit_unmap_iovec(cmd, &cmd->iov_data[1]);
if (ret < 0) {
iscsit_tx_thread_wait_for_tcp(conn);
@@ -924,7 +924,10 @@ static int iscsit_map_iovec(
while (data_length) {
u32 cur_len = min_t(u32, data_length, sg->length - page_off);
- iov[i].iov_base = kmap(sg_page(sg)) + sg->offset + page_off;
+ iov[i].iov_base = sg_map(sg, page_off, SG_KMAP);
+ if (IS_ERR(iov[i].iov_base))
+ goto map_err;
+
iov[i].iov_len = cur_len;
data_length -= cur_len;
@@ -936,17 +939,25 @@ static int iscsit_map_iovec(
cmd->kmapped_nents = i;
return i;
+
+map_err:
+ cmd->kmapped_nents = i - 1;
+ iscsit_unmap_iovec(cmd, iov);
+ return -1;
}
-static void iscsit_unmap_iovec(struct iscsi_cmd *cmd)
+static void iscsit_unmap_iovec(struct iscsi_cmd *cmd, struct kvec *iov)
{
u32 i;
struct scatterlist *sg;
+ unsigned int page_off = cmd->first_data_sg_off;
sg = cmd->first_data_sg;
- for (i = 0; i < cmd->kmapped_nents; i++)
- kunmap(sg_page(&sg[i]));
+ for (i = 0; i < cmd->kmapped_nents; i++) {
+ sg_unmap(&sg[i], iov[i].iov_base, page_off, SG_KMAP);
+ page_off = 0;
+ }
}
static void iscsit_ack_from_expstatsn(struct iscsi_conn *conn, u32 exp_statsn)
@@ -1609,7 +1620,7 @@ iscsit_get_dataout(struct iscsi_conn *conn, struct
iscsi_cmd *cmd,
rx_got = rx_data(conn, &cmd->iov_data[0], iov_count, rx_size);
- iscsit_unmap_iovec(cmd);
+ iscsit_unmap_iovec(cmd, iov);
if (rx_got != rx_size)
return -1;
@@ -1710,7 +1721,7 @@ int iscsit_setup_nop_out(struct iscsi_conn *conn, struct
iscsi_cmd *cmd,
if (!cmd)
return iscsit_add_reject(conn,
ISCSI_REASON_PROTOCOL_ERROR,
(unsigned char *)hdr);
-
+
return iscsit_reject_cmd(cmd, ISCSI_REASON_PROTOCOL_ERROR,
(unsigned char *)hdr);
}
@@ -2625,7 +2636,7 @@ static int iscsit_handle_immediate_data(
rx_got = rx_data(conn, &cmd->iov_data[0], iov_count, rx_size);
- iscsit_unmap_iovec(cmd);
+ iscsit_unmap_iovec(cmd, cmd->iov_data);
if (rx_got != rx_size) {
iscsit_rx_thread_wait_for_tcp(conn);
diff --git a/drivers/target/target_core_rd.c b/drivers/target/target_core_rd.c
index 5f23f34..348211c 100644
--- a/drivers/target/target_core_rd.c
+++ b/drivers/target/target_core_rd.c
@@ -432,7 +432,8 @@ static sense_reason_t rd_do_prot_rw(struct se_cmd *cmd,
bool is_read)
cmd->t_prot_sg, 0);
}
if (!rc)
- sbc_dif_copy_prot(cmd, sectors, is_read, prot_sg, prot_offset);
+ rc = sbc_dif_copy_prot(cmd, sectors, is_read, prot_sg,
+ prot_offset);
return rc;
}
diff --git a/drivers/target/target_core_sbc.c b/drivers/target/target_core_sbc.c
index ee35c90..8ac07c6 100644
--- a/drivers/target/target_core_sbc.c
+++ b/drivers/target/target_core_sbc.c
@@ -420,17 +420,17 @@ static sense_reason_t xdreadwrite_callback(struct se_cmd
*cmd, bool success,
offset = 0;
for_each_
[Intel-gfx] [PATCH v2 08/21] dm-crypt: Make use of the new sg_map helper in 4 call sites
Very straightforward conversion to the new function in all four spots.
Signed-off-by: Logan Gunthorpe
Cc: Alasdair Kergon
Cc: Mike Snitzer
---
drivers/md/dm-crypt.c | 39 ++-
1 file changed, 26 insertions(+), 13 deletions(-)
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index 8dbecf1..841f1fc 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -635,9 +635,12 @@ static int crypt_iv_lmk_gen(struct crypt_config *cc, u8
*iv,
if (bio_data_dir(dmreq->ctx->bio_in) == WRITE) {
sg = crypt_get_sg_data(cc, dmreq->sg_in);
- src = kmap_atomic(sg_page(sg));
- r = crypt_iv_lmk_one(cc, iv, dmreq, src + sg->offset);
- kunmap_atomic(src);
+ src = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(src))
+ return PTR_ERR(src);
+
+ r = crypt_iv_lmk_one(cc, iv, dmreq, src);
+ sg_unmap(sg, src, 0, SG_KMAP_ATOMIC);
} else
memset(iv, 0, cc->iv_size);
@@ -655,14 +658,18 @@ static int crypt_iv_lmk_post(struct crypt_config *cc, u8
*iv,
return 0;
sg = crypt_get_sg_data(cc, dmreq->sg_out);
- dst = kmap_atomic(sg_page(sg));
- r = crypt_iv_lmk_one(cc, iv, dmreq, dst + sg->offset);
+ dst = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(dst))
+ return PTR_ERR(dst);
+
+ r = crypt_iv_lmk_one(cc, iv, dmreq, dst);
/* Tweak the first block of plaintext sector */
if (!r)
- crypto_xor(dst + sg->offset, iv, cc->iv_size);
+ crypto_xor(dst, iv, cc->iv_size);
+
+ sg_unmap(sg, dst, 0, SG_KMAP_ATOMIC);
- kunmap_atomic(dst);
return r;
}
@@ -786,9 +793,12 @@ static int crypt_iv_tcw_gen(struct crypt_config *cc, u8
*iv,
/* Remove whitening from ciphertext */
if (bio_data_dir(dmreq->ctx->bio_in) != WRITE) {
sg = crypt_get_sg_data(cc, dmreq->sg_in);
- src = kmap_atomic(sg_page(sg));
- r = crypt_iv_tcw_whitening(cc, dmreq, src + sg->offset);
- kunmap_atomic(src);
+ src = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(src))
+ return PTR_ERR(src);
+
+ r = crypt_iv_tcw_whitening(cc, dmreq, src);
+ sg_unmap(sg, src, 0, SG_KMAP_ATOMIC);
}
/* Calculate IV */
@@ -812,9 +822,12 @@ static int crypt_iv_tcw_post(struct crypt_config *cc, u8
*iv,
/* Apply whitening on ciphertext */
sg = crypt_get_sg_data(cc, dmreq->sg_out);
- dst = kmap_atomic(sg_page(sg));
- r = crypt_iv_tcw_whitening(cc, dmreq, dst + sg->offset);
- kunmap_atomic(dst);
+ dst = sg_map(sg, 0, SG_KMAP_ATOMIC);
+ if (IS_ERR(dst))
+ return PTR_ERR(dst);
+
+ r = crypt_iv_tcw_whitening(cc, dmreq, dst);
+ sg_unmap(sg, dst, 0, SG_KMAP_ATOMIC);
return r;
}
--
2.1.4
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[Intel-gfx] [PATCH v2 18/21] mmc: tmio: Make use of the new sg_map helper function
Straightforward conversion to sg_map helper. Seeing there is no
cleare error path, SG_MAP_MUST_NOT_FAIL which may BUG_ON in certain
cases in the future.
Signed-off-by: Logan Gunthorpe
Cc: Wolfram Sang
Cc: Ulf Hansson
---
drivers/mmc/host/tmio_mmc.h | 7 +--
drivers/mmc/host/tmio_mmc_pio.c | 12
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index d0edb57..bc43eb0 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -202,17 +202,20 @@ void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host,
u32 i);
void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
irqreturn_t tmio_mmc_irq(int irq, void *devid);
+/* Note: this function may return PTR_ERR and must be checked! */
static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
unsigned long *flags)
{
+ void *ret;
+
local_irq_save(*flags);
- return kmap_atomic(sg_page(sg)) + sg->offset;
+ return sg_map(sg, 0, SG_KMAP_ATOMIC | SG_MAP_MUST_NOT_FAIL);
}
static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
unsigned long *flags, void *virt)
{
- kunmap_atomic(virt - sg->offset);
+ sg_unmap(sg, virt, 0, SG_KMAP_ATOMIC);
local_irq_restore(*flags);
}
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c
index a2d92f1..bbb4f19 100644
--- a/drivers/mmc/host/tmio_mmc_pio.c
+++ b/drivers/mmc/host/tmio_mmc_pio.c
@@ -506,6 +506,18 @@ static void tmio_mmc_check_bounce_buffer(struct
tmio_mmc_host *host)
if (host->sg_ptr == &host->bounce_sg) {
unsigned long flags;
void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
+ if (IS_ERR(sg_vaddr)) {
+ /*
+* This should really never happen unless
+* the code is changed to use memory that is
+* not mappable in the sg. Seeing there doesn't
+* seem to be any error path out of here,
+* we can only WARN.
+*/
+ WARN(1, "Non-mappable memory used in sg!");
+ return;
+ }
+
memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
}
--
2.1.4
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[Intel-gfx] [PATCH v2 03/21] libiscsi: Make use of new the sg_map helper function
Convert the kmap and kmap_atomic uses to the sg_map function. We now
store the flags for the kmap instead of a boolean to indicate
atomicitiy. We use ISCSI_TCP_INTERNAL_ERR error type that was prepared
earlier for this.
Signed-off-by: Logan Gunthorpe
Cc: Lee Duncan
Cc: Chris Leech
---
drivers/scsi/libiscsi_tcp.c | 32
include/scsi/libiscsi_tcp.h | 2 +-
2 files changed, 21 insertions(+), 13 deletions(-)
diff --git a/drivers/scsi/libiscsi_tcp.c b/drivers/scsi/libiscsi_tcp.c
index 63a1d69..a34e25c 100644
--- a/drivers/scsi/libiscsi_tcp.c
+++ b/drivers/scsi/libiscsi_tcp.c
@@ -133,25 +133,23 @@ static void iscsi_tcp_segment_map(struct iscsi_segment
*segment, int recv)
if (page_count(sg_page(sg)) >= 1 && !recv)
return;
- if (recv) {
- segment->atomic_mapped = true;
- segment->sg_mapped = kmap_atomic(sg_page(sg));
- } else {
- segment->atomic_mapped = false;
- /* the xmit path can sleep with the page mapped so use kmap */
- segment->sg_mapped = kmap(sg_page(sg));
+ /* the xmit path can sleep with the page mapped so don't use atomic */
+ segment->sg_map_flags = recv ? SG_KMAP_ATOMIC : SG_KMAP;
+ segment->sg_mapped = sg_map(sg, 0, segment->sg_map_flags);
+
+ if (IS_ERR(segment->sg_mapped)) {
+ segment->sg_mapped = NULL;
+ return;
}
- segment->data = segment->sg_mapped + sg->offset + segment->sg_offset;
+ segment->data = segment->sg_mapped + segment->sg_offset;
}
void iscsi_tcp_segment_unmap(struct iscsi_segment *segment)
{
if (segment->sg_mapped) {
- if (segment->atomic_mapped)
- kunmap_atomic(segment->sg_mapped);
- else
- kunmap(sg_page(segment->sg));
+ sg_unmap(segment->sg, segment->sg_mapped, 0,
+segment->sg_map_flags);
segment->sg_mapped = NULL;
segment->data = NULL;
}
@@ -304,6 +302,9 @@ iscsi_tcp_segment_recv(struct iscsi_tcp_conn *tcp_conn,
break;
}
+ if (segment->data)
+ return -EFAULT;
+
copy = min(len - copied, segment->size - segment->copied);
ISCSI_DBG_TCP(tcp_conn->iscsi_conn, "copying %d\n", copy);
memcpy(segment->data + segment->copied, ptr + copied, copy);
@@ -927,6 +928,13 @@ int iscsi_tcp_recv_skb(struct iscsi_conn *conn, struct
sk_buff *skb,
avail);
rc = iscsi_tcp_segment_recv(tcp_conn, segment, ptr, avail);
BUG_ON(rc == 0);
+ if (rc < 0) {
+ ISCSI_DBG_TCP(conn, "memory fault. Consumed %d\n",
+ consumed);
+ *status = ISCSI_TCP_INTERNAL_ERR;
+ goto skb_done;
+ }
+
consumed += rc;
if (segment->total_copied >= segment->total_size) {
diff --git a/include/scsi/libiscsi_tcp.h b/include/scsi/libiscsi_tcp.h
index 90691ad..58c79af 100644
--- a/include/scsi/libiscsi_tcp.h
+++ b/include/scsi/libiscsi_tcp.h
@@ -47,7 +47,7 @@ struct iscsi_segment {
struct scatterlist *sg;
void*sg_mapped;
unsigned intsg_offset;
- boolatomic_mapped;
+ int sg_map_flags;
iscsi_segment_done_fn_t *done;
};
--
2.1.4
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[Intel-gfx] [PATCH v2 14/21] scsi: libfc, csiostor: Change to sg_copy_buffer in two drivers
These two drivers appear to duplicate the functionality of
sg_copy_buffer. So we clean them up to use the common code.
This helps us remove a couple of instances that would otherwise be
slightly tricky sg_map usages.
Signed-off-by: Logan Gunthorpe
Cc: Johannes Thumshirn
---
drivers/scsi/csiostor/csio_scsi.c | 54 +++
drivers/scsi/libfc/fc_libfc.c | 49 ---
2 files changed, 14 insertions(+), 89 deletions(-)
diff --git a/drivers/scsi/csiostor/csio_scsi.c
b/drivers/scsi/csiostor/csio_scsi.c
index a1ff75f..bd9d062 100644
--- a/drivers/scsi/csiostor/csio_scsi.c
+++ b/drivers/scsi/csiostor/csio_scsi.c
@@ -1489,60 +1489,14 @@ static inline uint32_t
csio_scsi_copy_to_sgl(struct csio_hw *hw, struct csio_ioreq *req)
{
struct scsi_cmnd *scmnd = (struct scsi_cmnd *)csio_scsi_cmnd(req);
- struct scatterlist *sg;
- uint32_t bytes_left;
- uint32_t bytes_copy;
- uint32_t buf_off = 0;
- uint32_t start_off = 0;
- uint32_t sg_off = 0;
- void *sg_addr;
- void *buf_addr;
struct csio_dma_buf *dma_buf;
+ size_t copied;
- bytes_left = scsi_bufflen(scmnd);
- sg = scsi_sglist(scmnd);
dma_buf = (struct csio_dma_buf *)csio_list_next(&req->gen_list);
+ copied = sg_copy_from_buffer(scsi_sglist(scmnd), scsi_sg_count(scmnd),
+dma_buf->vaddr, scsi_bufflen(scmnd));
- /* Copy data from driver buffer to SGs of SCSI CMD */
- while (bytes_left > 0 && sg && dma_buf) {
- if (buf_off >= dma_buf->len) {
- buf_off = 0;
- dma_buf = (struct csio_dma_buf *)
- csio_list_next(dma_buf);
- continue;
- }
-
- if (start_off >= sg->length) {
- start_off -= sg->length;
- sg = sg_next(sg);
- continue;
- }
-
- buf_addr = dma_buf->vaddr + buf_off;
- sg_off = sg->offset + start_off;
- bytes_copy = min((dma_buf->len - buf_off),
- sg->length - start_off);
- bytes_copy = min((uint32_t)(PAGE_SIZE - (sg_off & ~PAGE_MASK)),
-bytes_copy);
-
- sg_addr = kmap_atomic(sg_page(sg) + (sg_off >> PAGE_SHIFT));
- if (!sg_addr) {
- csio_err(hw, "failed to kmap sg:%p of ioreq:%p\n",
- sg, req);
- break;
- }
-
- csio_dbg(hw, "copy_to_sgl:sg_addr %p sg_off %d buf %p len %d\n",
- sg_addr, sg_off, buf_addr, bytes_copy);
- memcpy(sg_addr + (sg_off & ~PAGE_MASK), buf_addr, bytes_copy);
- kunmap_atomic(sg_addr);
-
- start_off += bytes_copy;
- buf_off += bytes_copy;
- bytes_left -= bytes_copy;
- }
-
- if (bytes_left > 0)
+ if (copied != scsi_bufflen(scmnd))
return DID_ERROR;
else
return DID_OK;
diff --git a/drivers/scsi/libfc/fc_libfc.c b/drivers/scsi/libfc/fc_libfc.c
index d623d08..ce0805a 100644
--- a/drivers/scsi/libfc/fc_libfc.c
+++ b/drivers/scsi/libfc/fc_libfc.c
@@ -113,45 +113,16 @@ u32 fc_copy_buffer_to_sglist(void *buf, size_t len,
u32 *nents, size_t *offset,
u32 *crc)
{
- size_t remaining = len;
- u32 copy_len = 0;
-
- while (remaining > 0 && sg) {
- size_t off, sg_bytes;
- void *page_addr;
-
- if (*offset >= sg->length) {
- /*
-* Check for end and drop resources
-* from the last iteration.
-*/
- if (!(*nents))
- break;
- --(*nents);
- *offset -= sg->length;
- sg = sg_next(sg);
- continue;
- }
- sg_bytes = min(remaining, sg->length - *offset);
-
- /*
-* The scatterlist item may be bigger than PAGE_SIZE,
-* but we are limited to mapping PAGE_SIZE at a time.
-*/
- off = *offset + sg->offset;
- sg_bytes = min(sg_bytes,
- (size_t)(PAGE_SIZE - (off & ~PAGE_MASK)));
- page_addr = kmap_atomic(sg_page(sg) + (off >> PAGE_SHIFT));
- if (crc)
- *crc = crc32(*crc, buf, sg_bytes);
- memcpy((char *)page_addr + (off & ~PAGE_MASK), buf, sg_bytes);
- kunmap_atomic(page_addr);
- buf += sg_bytes;
- *offset += sg_bytes;
- remaining -= sg_bytes;
Re: [Intel-gfx] [PATCH v6 12/15] drm/i915/perf: Add OA unit support for Gen 8+
On 25 April 2017 at 18:10, Lionel Landwerlin
wrote:
> On 25/04/17 09:42, Matthew Auld wrote:
>>
>> On 24 April 2017 at 19:49, Lionel Landwerlin
>> wrote:
>>>
>>> From: Robert Bragg
>>>
>>> Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
>>> share (more-or-less) the same OA unit design.
>>>
>>> Of particular note in comparison to Haswell: some OA unit HW config
>>> state has become per-context state and as a consequence it is somewhat
>>> more complicated to manage synchronous state changes from the cpu while
>>> there's no guarantee of what context (if any) is currently actively
>>> running on the gpu.
>>>
>>> The periodic sampling frequency which can be particularly useful for
>>> system-wide analysis (as opposed to command stream synchronised
>>> MI_REPORT_PERF_COUNT commands) is perhaps the most surprising state to
>>> have become per-context save and restored (while the OABUFFER
>>> destination is still a shared, system-wide resource).
>>>
>>> This support for gen8+ takes care to consider a number of timing
>>> challenges involved in synchronously updating per-context state
>>> primarily by programming all config state from the cpu and updating all
>>> current and saved contexts synchronously while the OA unit is still
>>> disabled.
>>>
>>> The driver intentionally avoids depending on command streamer
>>> programming to update OA state considering the lack of synchronization
>>> between the automatic loading of OACTXCONTROL state (that includes the
>>> periodic sampling state and enable state) on context restore and the
>>> parsing of any general purpose BB the driver can control. I.e. this
>>> implementation is careful to avoid the possibility of a context restore
>>> temporarily enabling any out-of-date periodic sampling state. In
>>> addition to the risk of transiently-out-of-date state being loaded
>>> automatically; there are also internal HW latencies involved in the
>>> loading of MUX configurations which would be difficult to account for
>>> from the command streamer (and we only want to enable the unit when once
>>> the MUX configuration is complete).
>>>
>>> Since the Gen8+ OA unit design no longer supports clock gating the unit
>>> off for a single given context (which effectively stopped any progress
>>> of counters while any other context was running) and instead supports
>>> tagging OA reports with a context ID for filtering on the CPU, it means
>>> we can no longer hide the system-wide progress of counters from a
>>> non-privileged application only interested in metrics for its own
>>> context. Although we could theoretically try and subtract the progress
>>> of other contexts before forwarding reports via read() we aren't in a
>>> position to filter reports captured via MI_REPORT_PERF_COUNT commands.
>>> As a result, for Gen8+, we always require the
>>> dev.i915.perf_stream_paranoid to be unset for any access to OA metrics
>>> if not root.
>>>
>>> v5: Drain submitted requests when enabling metric set to ensure no
>>> lite-restore erases the context image we just updated (Lionel)
>>>
>>> v6: In addition to drain, switch to kernel context & update all
>>> context in place (Chris)
>>>
>>> Signed-off-by: Robert Bragg
>>> Signed-off-by: Lionel Landwerlin
>>> Reviewed-by: Matthew Auld \o/
>>> ---
>>> drivers/gpu/drm/i915/i915_drv.h | 45 +-
>>> drivers/gpu/drm/i915/i915_perf.c | 957
>>> ---
>>> drivers/gpu/drm/i915/i915_reg.h | 22 +
>>> drivers/gpu/drm/i915/intel_lrc.c | 2 +
>>> include/uapi/drm/i915_drm.h | 19 +-
>>> 5 files changed, 952 insertions(+), 93 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/i915_drv.h
>>> b/drivers/gpu/drm/i915/i915_drv.h
>>> index ffa1fc5eddfd..676b1227067c 100644
>>> --- a/drivers/gpu/drm/i915/i915_drv.h
>>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>>> @@ -2064,9 +2064,17 @@ struct i915_oa_ops {
>>> void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
>>>
>>> /**
>>> -* @enable_metric_set: Applies any MUX configuration to set up
>>> the
>>> -* Boolean and Custom (B/C) counters that are part of the counter
>>> -* reports being sampled. May apply system constraints such as
>>> +* @select_metric_set: The auto generated code that checks
>>> whether a
>>> +* requested OA config is applicable to the system and if so sets
>>> up
>>> +* the mux, oa and flex eu register config pointers according to
>>> the
>>> +* current dev_priv->perf.oa.metrics_set.
>>> +*/
>>> + int (*select_metric_set)(struct drm_i915_private *dev_priv);
>>> +
>>> + /**
>>> +* @enable_metric_set: Selects and applies any MUX configuration
>>> to set
>>> +* up the Boolean and Custom (B/C) counters that are part of the
>>> +* counter reports being sampled. May apply system constraints
>>> such as
>>> * disabling EU clock gating as required.
>>> */
>>> i
Re: [Intel-gfx] [PATCH i-g-t 3/7] lib: Stop igt_get_all_cairo_formats memory leak
Brian Starkey writes:
> igt_get_all_cairo_formats() allocates the format list on the heap, but
> returns it in a const pointer. Change this so that callers can free the
> array without a warning, and free the array in all callers.
>
> Signed-off-by: Brian Starkey
> ---
> lib/igt_fb.c |4 +++-
> lib/igt_fb.h |2 +-
> tests/kms_atomic.c |3 ++-
> tests/kms_render.c |4 +++-
> 4 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/lib/igt_fb.c b/lib/igt_fb.c
> index d2b7e9e36606..b958c970973b 100644
> --- a/lib/igt_fb.c
> +++ b/lib/igt_fb.c
> @@ -1277,8 +1277,10 @@ const char *igt_format_str(uint32_t drm_format)
> *
> * This functions returns an array of all the drm fourcc codes supported by
> * cairo and this library.
> + *
> + * The array should be freed by the caller.
> */
> -void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count)
> +void igt_get_all_cairo_formats(uint32_t **formats, int *format_count)
> {
> static uint32_t *drm_formats;
> static int n_formats;
> diff --git a/lib/igt_fb.h b/lib/igt_fb.h
> index 4a680cefb16d..e124910367a3 100644
> --- a/lib/igt_fb.h
> +++ b/lib/igt_fb.h
> @@ -154,7 +154,7 @@ int igt_cairo_printf_line(cairo_t *cr, enum
> igt_text_align align,
> uint32_t igt_bpp_depth_to_drm_format(int bpp, int depth);
> uint32_t igt_drm_format_to_bpp(uint32_t drm_format);
> const char *igt_format_str(uint32_t drm_format);
> -void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count);
> +void igt_get_all_cairo_formats(uint32_t **formats, int *format_count);
>
> #endif /* __IGT_FB_H__ */
>
> diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
> index 6375fede7179..9c03f6e21ebb 100644
> --- a/tests/kms_atomic.c
> +++ b/tests/kms_atomic.c
> @@ -807,7 +807,7 @@ static void atomic_state_free(struct kms_atomic_state
> *state)
> static uint32_t plane_get_igt_format(struct kms_atomic_plane_state *plane)
> {
> drmModePlanePtr plane_kms;
> - const uint32_t *igt_formats;
> + uint32_t *igt_formats;
> uint32_t ret = 0;
> int num_igt_formats;
> int i;
> @@ -827,6 +827,7 @@ static uint32_t plane_get_igt_format(struct
> kms_atomic_plane_state *plane)
> }
> }
>
> + free(igt_formats);
> drmModeFreePlane(plane_kms);
> return ret;
> }
> diff --git a/tests/kms_render.c b/tests/kms_render.c
> index fd33dfb7cafe..bc2ffc750c67 100644
> --- a/tests/kms_render.c
> +++ b/tests/kms_render.c
> @@ -176,7 +176,7 @@ static void test_connector(const char *test_name,
> struct kmstest_connector_config *cconf,
> enum test_flags flags)
> {
> - const uint32_t *formats;
> + uint32_t *formats;
> int format_count;
> int i;
>
> @@ -193,6 +193,8 @@ static void test_connector(const char *test_name,
> cconf, &cconf->connector->modes[0],
> formats[i], flags);
> }
> +
> + free(formats);
Hi,
Assuming I'm not missing anything, I think if you free formats here, the
static variable in igt_get_all_cairo_formats() will point to garbage and
further calls to that function will return uninitialized memory.
--
Gabriel Krisman Bertazi
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[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable OA unit for Gen 8 and 9 in i915 perf (rev8)
== Series Details == Series: Enable OA unit for Gen 8 and 9 in i915 perf (rev8) URL : https://patchwork.freedesktop.org/series/20084/ State : failure == Summary == cc1: all warnings being treated as errors cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_ddi.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_ddi.o] Error 1 cc1: all warnings being treated as errors cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_fbc.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_fbc.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_display.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_display.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/cfg_space.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/cfg_space.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_sprite.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_sprite.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/display.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/display.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_panel.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_panel.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/gvt.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/gvt.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_crt.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_crt.o] Error 1 cc1: all warnings being treated as errors cc1: all warnings being treated as errors cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/i915_oa_hsw.o' failed make[4]: *** [drivers/gpu/drm/i915/i915_oa_hsw.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_dpll_mgr.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_dpll_mgr.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_dsi.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_dsi.o] Error 1 scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/i915_gpu_error.o' failed make[4]: *** [drivers/gpu/drm/i915/i915_gpu_error.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/scheduler.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/scheduler.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/execlist.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/execlist.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/render.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/render.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/gtt.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/gtt.o] Error 1 LD [M] drivers/net/ethernet/intel/igbvf/igbvf.o cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/firmware.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/firmware.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/intel_lpe_audio.o' failed make[4]: *** [drivers/gpu/drm/i915/intel_lpe_audio.o] Error 1 cc1: all warnings being treated as errors scripts/Makefile.build:294: recipe for target 'drivers/gpu/drm/i915/gvt/handlers.o' failed make[4]: *** [drivers/gpu/drm/i915/gvt/handlers.o] Error 1 scripts/Makefile.build:553: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:553: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:553: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 make[1]: *** Waiting for unfinished jobs AR lib/lib.a EXPORTS lib/lib-ksyms.o LD lib/built-in.o LD drivers/usb/core/usbcore.o LD drivers/usb/core/built-in.o CC arch/x86/kernel/cpu/capflags.o LD arch/x86/kernel/cpu/built-in.o LD drivers/scsi/sd_mod.o LD drivers/scsi/built-in.o scripts/Makefile.build:553: recipe for target 'arch/x86/kernel' failed make[1]: *** [arch/x86/kernel] Error 2 Makefile:1002: recipe for target 'arch/x86' failed make: *** [arch/x86] Error 2 make: *** Waiting for unfinished jobs LD drivers/tty/vt/built-in.o LD drivers/tty/built-in.o LD drivers/md/md-mod.o LD fs/btrfs/btrfs.o LD drivers/md/built-in.o LD net/xfrm/built-in.o LD fs/btrfs/built-in.o
[Intel-gfx] [PATCH v7 12/15] drm/i915/perf: Add OA unit support for Gen 8+
From: Robert Bragg
Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
share (more-or-less) the same OA unit design.
Of particular note in comparison to Haswell: some OA unit HW config
state has become per-context state and as a consequence it is somewhat
more complicated to manage synchronous state changes from the cpu while
there's no guarantee of what context (if any) is currently actively
running on the gpu.
The periodic sampling frequency which can be particularly useful for
system-wide analysis (as opposed to command stream synchronised
MI_REPORT_PERF_COUNT commands) is perhaps the most surprising state to
have become per-context save and restored (while the OABUFFER
destination is still a shared, system-wide resource).
This support for gen8+ takes care to consider a number of timing
challenges involved in synchronously updating per-context state
primarily by programming all config state from the cpu and updating all
current and saved contexts synchronously while the OA unit is still
disabled.
The driver intentionally avoids depending on command streamer
programming to update OA state considering the lack of synchronization
between the automatic loading of OACTXCONTROL state (that includes the
periodic sampling state and enable state) on context restore and the
parsing of any general purpose BB the driver can control. I.e. this
implementation is careful to avoid the possibility of a context restore
temporarily enabling any out-of-date periodic sampling state. In
addition to the risk of transiently-out-of-date state being loaded
automatically; there are also internal HW latencies involved in the
loading of MUX configurations which would be difficult to account for
from the command streamer (and we only want to enable the unit when once
the MUX configuration is complete).
Since the Gen8+ OA unit design no longer supports clock gating the unit
off for a single given context (which effectively stopped any progress
of counters while any other context was running) and instead supports
tagging OA reports with a context ID for filtering on the CPU, it means
we can no longer hide the system-wide progress of counters from a
non-privileged application only interested in metrics for its own
context. Although we could theoretically try and subtract the progress
of other contexts before forwarding reports via read() we aren't in a
position to filter reports captured via MI_REPORT_PERF_COUNT commands.
As a result, for Gen8+, we always require the
dev.i915.perf_stream_paranoid to be unset for any access to OA metrics
if not root.
v5: Drain submitted requests when enabling metric set to ensure no
lite-restore erases the context image we just updated (Lionel)
v6: In addition to drain, switch to kernel context & update all
context in place (Chris)
v7: Add missing mutex_unlock() if switching to kernel context fails
(Matthew)
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
Reviewed-by: Matthew Auld \o/
---
drivers/gpu/drm/i915/i915_drv.h | 45 +-
drivers/gpu/drm/i915/i915_perf.c | 959 ---
drivers/gpu/drm/i915/i915_reg.h | 22 +
drivers/gpu/drm/i915/intel_lrc.c | 2 +
include/uapi/drm/i915_drm.h | 19 +-
5 files changed, 954 insertions(+), 93 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ffa1fc5eddfd..676b1227067c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2064,9 +2064,17 @@ struct i915_oa_ops {
void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
/**
-* @enable_metric_set: Applies any MUX configuration to set up the
-* Boolean and Custom (B/C) counters that are part of the counter
-* reports being sampled. May apply system constraints such as
+* @select_metric_set: The auto generated code that checks whether a
+* requested OA config is applicable to the system and if so sets up
+* the mux, oa and flex eu register config pointers according to the
+* current dev_priv->perf.oa.metrics_set.
+*/
+ int (*select_metric_set)(struct drm_i915_private *dev_priv);
+
+ /**
+* @enable_metric_set: Selects and applies any MUX configuration to set
+* up the Boolean and Custom (B/C) counters that are part of the
+* counter reports being sampled. May apply system constraints such as
* disabling EU clock gating as required.
*/
int (*enable_metric_set)(struct drm_i915_private *dev_priv);
@@ -2097,20 +2105,13 @@ struct i915_oa_ops {
size_t *offset);
/**
-* @oa_buffer_check: Check for OA buffer data + update tail
-*
-* This is either called via fops or the poll check hrtimer (atomic
-* ctx) without any locks taken.
+* @oa_hw_tail_read: read the OA tail pointer register
*
-* It's safe to read OA config state here
Re: [Intel-gfx] [PATCH] drm/i915: Report request restarts for both execlists/guc
On 25/04/17 05:30, Chris Wilson wrote:
On Tue, Apr 25, 2017 at 01:21:47PM +0100, Tvrtko Ursulin wrote:
On 25/04/2017 11:38, Chris Wilson wrote:
As we now share the execlist_port[] tracking for both execlists/guc, we
can reset the inflight count on both and report which requests are being
restarted.
Thanks, one less patch for me (and I arrived late to the party, I see
it's already merged).
Suggested-by: Michel Thierry
Signed-off-by: Chris Wilson
Cc: Michel Thierry
Cc: Mika Kuoppala
Cc: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_lrc.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index d3612969098f..961f4a2ad498 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1147,14 +1147,11 @@ static int intel_init_workaround_bb(struct
intel_engine_cs *engine)
return ret;
}
-static u32 port_seqno(struct execlist_port *port)
-{
-return port->request ? port->request->global_seqno : 0;
-}
-
static int gen8_init_common_ring(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
+struct execlist_port *port = engine->execlist_port;
+unsigned int n;
int ret;
ret = intel_mocs_init_engine(engine);
@@ -1175,16 +1172,22 @@ static int gen8_init_common_ring(struct intel_engine_cs
*engine)
/* After a GPU reset, we may have requests to replay */
clear_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
-if (!i915.enable_guc_submission && !execlists_elsp_idle(engine)) {
-DRM_DEBUG_DRIVER("Restarting %s from requests [0x%x, 0x%x]\n",
- engine->name,
- port_seqno(&engine->execlist_port[0]),
- port_seqno(&engine->execlist_port[1]));
-engine->execlist_port[0].count = 0;
-engine->execlist_port[1].count = 0;
-execlists_submit_ports(engine);
+
+for (n = 0; n < ARRAY_SIZE(engine->execlist_port); n++) {
+if (!port[n].request)
+break;
At some point we'll maybe want to start thinking about the
for_each_port_request or something.
Something.
+
+DRM_DEBUG_DRIVER("Restarting %s:%d from 0x%x\n",
+ engine->name, n,
+ port[n].request->global_seqno);
+
+/* Discard the current inflight count */
+port[n].count = 0;
}
+if (!i915.enable_guc_submission && !execlists_elsp_idle(engine))
+execlists_submit_ports(engine);
+
return 0;
}
Looks okay to me. Someone has plans to start using counts in guc mode?
Spoilers. I moved the submission out of a few locks to reduce lock
contention (queued_spin_lock_slowpath exists for guc!), makes the CPU
numbers look better, but bxt/guc is still 3x higher latency. I just hope
it is broken firmware.
Beating a dead horse?
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Re: [Intel-gfx] [PATCH v6 12/15] drm/i915/perf: Add OA unit support for Gen 8+
On 25/04/17 09:42, Matthew Auld wrote:
On 24 April 2017 at 19:49, Lionel Landwerlin
wrote:
From: Robert Bragg
Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
share (more-or-less) the same OA unit design.
Of particular note in comparison to Haswell: some OA unit HW config
state has become per-context state and as a consequence it is somewhat
more complicated to manage synchronous state changes from the cpu while
there's no guarantee of what context (if any) is currently actively
running on the gpu.
The periodic sampling frequency which can be particularly useful for
system-wide analysis (as opposed to command stream synchronised
MI_REPORT_PERF_COUNT commands) is perhaps the most surprising state to
have become per-context save and restored (while the OABUFFER
destination is still a shared, system-wide resource).
This support for gen8+ takes care to consider a number of timing
challenges involved in synchronously updating per-context state
primarily by programming all config state from the cpu and updating all
current and saved contexts synchronously while the OA unit is still
disabled.
The driver intentionally avoids depending on command streamer
programming to update OA state considering the lack of synchronization
between the automatic loading of OACTXCONTROL state (that includes the
periodic sampling state and enable state) on context restore and the
parsing of any general purpose BB the driver can control. I.e. this
implementation is careful to avoid the possibility of a context restore
temporarily enabling any out-of-date periodic sampling state. In
addition to the risk of transiently-out-of-date state being loaded
automatically; there are also internal HW latencies involved in the
loading of MUX configurations which would be difficult to account for
from the command streamer (and we only want to enable the unit when once
the MUX configuration is complete).
Since the Gen8+ OA unit design no longer supports clock gating the unit
off for a single given context (which effectively stopped any progress
of counters while any other context was running) and instead supports
tagging OA reports with a context ID for filtering on the CPU, it means
we can no longer hide the system-wide progress of counters from a
non-privileged application only interested in metrics for its own
context. Although we could theoretically try and subtract the progress
of other contexts before forwarding reports via read() we aren't in a
position to filter reports captured via MI_REPORT_PERF_COUNT commands.
As a result, for Gen8+, we always require the
dev.i915.perf_stream_paranoid to be unset for any access to OA metrics
if not root.
v5: Drain submitted requests when enabling metric set to ensure no
lite-restore erases the context image we just updated (Lionel)
v6: In addition to drain, switch to kernel context & update all
context in place (Chris)
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
Reviewed-by: Matthew Auld \o/
---
drivers/gpu/drm/i915/i915_drv.h | 45 +-
drivers/gpu/drm/i915/i915_perf.c | 957 ---
drivers/gpu/drm/i915/i915_reg.h | 22 +
drivers/gpu/drm/i915/intel_lrc.c | 2 +
include/uapi/drm/i915_drm.h | 19 +-
5 files changed, 952 insertions(+), 93 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ffa1fc5eddfd..676b1227067c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2064,9 +2064,17 @@ struct i915_oa_ops {
void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
/**
-* @enable_metric_set: Applies any MUX configuration to set up the
-* Boolean and Custom (B/C) counters that are part of the counter
-* reports being sampled. May apply system constraints such as
+* @select_metric_set: The auto generated code that checks whether a
+* requested OA config is applicable to the system and if so sets up
+* the mux, oa and flex eu register config pointers according to the
+* current dev_priv->perf.oa.metrics_set.
+*/
+ int (*select_metric_set)(struct drm_i915_private *dev_priv);
+
+ /**
+* @enable_metric_set: Selects and applies any MUX configuration to set
+* up the Boolean and Custom (B/C) counters that are part of the
+* counter reports being sampled. May apply system constraints such as
* disabling EU clock gating as required.
*/
int (*enable_metric_set)(struct drm_i915_private *dev_priv);
@@ -2097,20 +2105,13 @@ struct i915_oa_ops {
size_t *offset);
/**
-* @oa_buffer_check: Check for OA buffer data + update tail
-*
-* This is either called via fops or the poll check hrtimer (atomic
-* ctx) without any locks taken.
+* @oa_hw_tail_read: read the OA tail pointer register
*
-* It's safe t
Re: [Intel-gfx] [PATCH i-g-t 7/7] lib/igt_kms: Use kernel command line mode if specified
On Tue, Apr 25, 2017 at 07:58:18PM +0300, Ville Syrjälä wrote:
On Tue, Apr 25, 2017 at 05:45:13PM +0100, Brian Starkey wrote:
If "video=" is specified on the kernel command-line, use it to override
the default mode in kmstest_get_connector_default_mode.
If a mode override was provided on the command-line, it was probably for
good reason so we should honor it.
Isn't the kernel marking the cmdline mode as preferred already? And if
not, maybe it should.
It doesn't as far as I've seen. It uses the cmdline mode for setting
up the fbdev emulation but I don't think it marks the mode list (or we
aren't calling the helper that does it).
I'll have a look at what it would take to do that.
-Brian
Signed-off-by: Brian Starkey
---
lib/igt_kms.c | 135 +
1 file changed, 135 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 474aa005b9fa..97f80a46354d 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -766,6 +766,131 @@ void kmstest_force_edid(int drm_fd, drmModeConnector
*connector,
igt_assert(ret != -1);
}
+/*
+ * Extract xres, yres, refresh and interlaced from a string of the form:
+ * x[M][R][-][@][i][m][eDd]
+ * xres and yres must be specified, refresh is optional and will be set to
+ * -1 if not present. interlaced defaults to false.
+ */
+static int parse_cmdline_mode(char *video_str, unsigned int *xres,
+ unsigned int *yres,
+ int *refresh, bool *interlaced)
+{
+ int match, len = strlen(video_str);
+ char *token = strtok(video_str, "@");
+
+ if (!token)
+ return -1;
+
+ *interlaced = false;
+ *refresh = -1;
+
+ match = sscanf(token, "%dx%d", xres, yres);
+ if (match != 2)
+ return -1;
+
+ if (strlen(token) < len - 1) {
+ token += strlen(token) + 1;
+
+ match = sscanf(token, "%d", refresh);
+ if (match != 1 || (*refresh < 0))
+ return -1;
+
+ if (strchr(token, 'i'))
+ *interlaced = true;
+ }
+
+ return 0;
+}
+
+static const drmModeModeInfo *
+connector_match_cmdline_mode(const drmModeConnector *connector,
+unsigned int xres, unsigned int yres, int refresh,
+bool interlaced)
+{
+ const drmModeModeInfo *mode = NULL;
+ int i;
+
+ for (i = 0; i < connector->count_modes; i++) {
+ mode = &connector->modes[i];
+ if (mode->hdisplay == xres &&
+ mode->vdisplay == yres &&
+ (refresh < 0 || refresh == mode->vrefresh) &&
+ interlaced == !!(mode->flags & DRM_MODE_FLAG_INTERLACE))
+ return mode;
+ }
+
+ return NULL;
+}
+
+static const drmModeModeInfo *
+kmstest_get_cmdline_mode(int drm_fd, drmModeConnector *connector)
+{
+ char c, *str = NULL, *cursor, *conn_name = NULL;
+ const drmModeModeInfo *mode = NULL;
+ unsigned int size = 0;
+ FILE *fp = NULL;
+
+ fp = fopen("/proc/cmdline", "r");
+ if (!fp)
+ return NULL;
+
+ /* lseek/fseek+ftell/stat don't work on /proc/cmdline */
+ while (fread(&c, 1, 1, fp))
+ size++;
+ rewind(fp);
+
+ str = calloc(1, size + 1);
+ if (!str)
+ goto done;
+
+ if (fread(str, 1, size, fp) != size)
+ goto done;
+
+ if (!asprintf(&conn_name, "%s-%d:",
+ kmstest_connector_type_str(connector->connector_type),
+ connector->connector_type_id))
+ goto done;
+
+ cursor = str;
+ while ((cursor = strstr(cursor, "video="))) {
+ unsigned int xres, yres;
+ bool interlaced;
+ int refresh;
+
+ cursor += strlen("video=");
+ cursor = strtok(cursor, " \n");
+ if (!cursor)
+ break;
+
+ /* Strip the name if it matches ours */
+ if (!strncmp(cursor, conn_name, strlen(conn_name)))
+ cursor += strlen(conn_name);
+
+ /*
+* Consider this "video=" specification only if it has no
+* name. If the name matched, we would have already stripped it
+* above
+*/
+ if (!strstr(cursor, ":") &&
+ !parse_cmdline_mode(cursor, &xres, &yres, &refresh,
&interlaced)) {
+ mode = connector_match_cmdline_mode(connector, xres,
+ yres, refresh,
+ interlaced);
+ if (mode)
+ break;
+ }
+
+ cursor += strlen(cursor) + 1;
+ }
+
+done:
+ free(conn_name
Re: [Intel-gfx] [PATCH i-g-t 7/7] lib/igt_kms: Use kernel command line mode if specified
On Tue, Apr 25, 2017 at 05:45:13PM +0100, Brian Starkey wrote:
> If "video=" is specified on the kernel command-line, use it to override
> the default mode in kmstest_get_connector_default_mode.
>
> If a mode override was provided on the command-line, it was probably for
> good reason so we should honor it.
Isn't the kernel marking the cmdline mode as preferred already? And if
not, maybe it should.
>
> Signed-off-by: Brian Starkey
> ---
> lib/igt_kms.c | 135
> +
> 1 file changed, 135 insertions(+)
>
> diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> index 474aa005b9fa..97f80a46354d 100644
> --- a/lib/igt_kms.c
> +++ b/lib/igt_kms.c
> @@ -766,6 +766,131 @@ void kmstest_force_edid(int drm_fd, drmModeConnector
> *connector,
> igt_assert(ret != -1);
> }
>
> +/*
> + * Extract xres, yres, refresh and interlaced from a string of the form:
> + * x[M][R][-][@][i][m][eDd]
> + * xres and yres must be specified, refresh is optional and will be set to
> + * -1 if not present. interlaced defaults to false.
> + */
> +static int parse_cmdline_mode(char *video_str, unsigned int *xres,
> + unsigned int *yres,
> + int *refresh, bool *interlaced)
> +{
> + int match, len = strlen(video_str);
> + char *token = strtok(video_str, "@");
> +
> + if (!token)
> + return -1;
> +
> + *interlaced = false;
> + *refresh = -1;
> +
> + match = sscanf(token, "%dx%d", xres, yres);
> + if (match != 2)
> + return -1;
> +
> + if (strlen(token) < len - 1) {
> + token += strlen(token) + 1;
> +
> + match = sscanf(token, "%d", refresh);
> + if (match != 1 || (*refresh < 0))
> + return -1;
> +
> + if (strchr(token, 'i'))
> + *interlaced = true;
> + }
> +
> + return 0;
> +}
> +
> +static const drmModeModeInfo *
> +connector_match_cmdline_mode(const drmModeConnector *connector,
> + unsigned int xres, unsigned int yres, int refresh,
> + bool interlaced)
> +{
> + const drmModeModeInfo *mode = NULL;
> + int i;
> +
> + for (i = 0; i < connector->count_modes; i++) {
> + mode = &connector->modes[i];
> + if (mode->hdisplay == xres &&
> + mode->vdisplay == yres &&
> + (refresh < 0 || refresh == mode->vrefresh) &&
> + interlaced == !!(mode->flags & DRM_MODE_FLAG_INTERLACE))
> + return mode;
> + }
> +
> + return NULL;
> +}
> +
> +static const drmModeModeInfo *
> +kmstest_get_cmdline_mode(int drm_fd, drmModeConnector *connector)
> +{
> + char c, *str = NULL, *cursor, *conn_name = NULL;
> + const drmModeModeInfo *mode = NULL;
> + unsigned int size = 0;
> + FILE *fp = NULL;
> +
> + fp = fopen("/proc/cmdline", "r");
> + if (!fp)
> + return NULL;
> +
> + /* lseek/fseek+ftell/stat don't work on /proc/cmdline */
> + while (fread(&c, 1, 1, fp))
> + size++;
> + rewind(fp);
> +
> + str = calloc(1, size + 1);
> + if (!str)
> + goto done;
> +
> + if (fread(str, 1, size, fp) != size)
> + goto done;
> +
> + if (!asprintf(&conn_name, "%s-%d:",
> + kmstest_connector_type_str(connector->connector_type),
> + connector->connector_type_id))
> + goto done;
> +
> + cursor = str;
> + while ((cursor = strstr(cursor, "video="))) {
> + unsigned int xres, yres;
> + bool interlaced;
> + int refresh;
> +
> + cursor += strlen("video=");
> + cursor = strtok(cursor, " \n");
> + if (!cursor)
> + break;
> +
> + /* Strip the name if it matches ours */
> + if (!strncmp(cursor, conn_name, strlen(conn_name)))
> + cursor += strlen(conn_name);
> +
> + /*
> + * Consider this "video=" specification only if it has no
> + * name. If the name matched, we would have already stripped it
> + * above
> + */
> + if (!strstr(cursor, ":") &&
> + !parse_cmdline_mode(cursor, &xres, &yres, &refresh,
> &interlaced)) {
> + mode = connector_match_cmdline_mode(connector, xres,
> + yres, refresh,
> + interlaced);
> + if (mode)
> + break;
> + }
> +
> + cursor += strlen(cursor) + 1;
> + }
> +
> +done:
> + free(conn_name);
> + free(str);
> + fclose(fp);
> + return mode;
> +}
> +
> /**
> * kmstest_get_connector_default_mode:
> * @drm_fd: DRM fd
> @@ -773,6 +898,8 @@ void kmstest_force_edid(i
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Avoid the branch in computing intel_ring_space()
== Series Details == Series: drm/i915: Avoid the branch in computing intel_ring_space() URL : https://patchwork.freedesktop.org/series/23515/ State : success == Summary == Series 23515v1 drm/i915: Avoid the branch in computing intel_ring_space() https://patchwork.freedesktop.org/api/1.0/series/23515/revisions/1/mbox/ Test gem_exec_suspend: Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-kbl-7560u) fdo#100125 fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:431s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:429s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:567s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:509s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:489s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:484s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:409s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:404s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:420s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:498s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:473s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:461s fi-kbl-7560u total:278 pass:267 dwarn:1 dfail:0 fail:0 skip:10 time:569s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:457s fi-skl-6700hqtotal:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:566s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:459s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:493s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:434s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:532s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time:405s 7ffb3045557cbc7b49695b20416351e4e812179c drm-tip: 2017y-04m-25d-14h-42m-59s UTC integration manifest 67314db drm/i915: Avoid the branch in computing intel_ring_space() == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4545/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 4/7] lib/igt_debugfs: Remove igt_debugfs_t
It's not used anymore, so remove it.
Signed-off-by: Brian Starkey
---
lib/igt_debugfs.c |5 -
1 file changed, 5 deletions(-)
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index 7584be5f9cc1..f5ed3dafee8a 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -84,11 +84,6 @@
* General debugfs helpers
*/
-typedef struct {
- char root[128];
- char dri_path[128];
-} igt_debugfs_t;
-
static bool is_mountpoint(const char *path)
{
char buf[strlen(path) + 4];
--
1.7.9.5
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[Intel-gfx] [PATCH i-g-t RESEND 1/7] lib/igt_kms: Fix erroneous assert
In trying to fix igt_display_init() for devices without cursors, I actually made matters worse. Fix the assert. Fixes: 545aa3398223 lib/igt_kms: Remove redundant cursor code Signed-off-by: Brian Starkey --- lib/igt_kms.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/lib/igt_kms.c b/lib/igt_kms.c index 9bfa0e1d0695..5837a9f112a6 100644 --- a/lib/igt_kms.c +++ b/lib/igt_kms.c @@ -1789,11 +1789,11 @@ void igt_display_init(igt_display_t *display, int drm_fd) */ igt_assert_eq(pipe->plane_primary, 0); - /* -* There should be no gaps. If there is, something happened -* which we can't handle (e.g. all planes are cursors). -*/ - igt_assert_eq(p, last_plane); + /* Check that we filled every slot exactly once */ + if (display->has_cursor_plane) + igt_assert_eq(p, last_plane); + else + igt_assert_eq(p, n_planes); pipe->n_planes = n_planes; -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 3/7] lib: Stop igt_get_all_cairo_formats memory leak
igt_get_all_cairo_formats() allocates the format list on the heap, but
returns it in a const pointer. Change this so that callers can free the
array without a warning, and free the array in all callers.
Signed-off-by: Brian Starkey
---
lib/igt_fb.c |4 +++-
lib/igt_fb.h |2 +-
tests/kms_atomic.c |3 ++-
tests/kms_render.c |4 +++-
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index d2b7e9e36606..b958c970973b 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1277,8 +1277,10 @@ const char *igt_format_str(uint32_t drm_format)
*
* This functions returns an array of all the drm fourcc codes supported by
* cairo and this library.
+ *
+ * The array should be freed by the caller.
*/
-void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count)
+void igt_get_all_cairo_formats(uint32_t **formats, int *format_count)
{
static uint32_t *drm_formats;
static int n_formats;
diff --git a/lib/igt_fb.h b/lib/igt_fb.h
index 4a680cefb16d..e124910367a3 100644
--- a/lib/igt_fb.h
+++ b/lib/igt_fb.h
@@ -154,7 +154,7 @@ int igt_cairo_printf_line(cairo_t *cr, enum igt_text_align
align,
uint32_t igt_bpp_depth_to_drm_format(int bpp, int depth);
uint32_t igt_drm_format_to_bpp(uint32_t drm_format);
const char *igt_format_str(uint32_t drm_format);
-void igt_get_all_cairo_formats(const uint32_t **formats, int *format_count);
+void igt_get_all_cairo_formats(uint32_t **formats, int *format_count);
#endif /* __IGT_FB_H__ */
diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c
index 6375fede7179..9c03f6e21ebb 100644
--- a/tests/kms_atomic.c
+++ b/tests/kms_atomic.c
@@ -807,7 +807,7 @@ static void atomic_state_free(struct kms_atomic_state
*state)
static uint32_t plane_get_igt_format(struct kms_atomic_plane_state *plane)
{
drmModePlanePtr plane_kms;
- const uint32_t *igt_formats;
+ uint32_t *igt_formats;
uint32_t ret = 0;
int num_igt_formats;
int i;
@@ -827,6 +827,7 @@ static uint32_t plane_get_igt_format(struct
kms_atomic_plane_state *plane)
}
}
+ free(igt_formats);
drmModeFreePlane(plane_kms);
return ret;
}
diff --git a/tests/kms_render.c b/tests/kms_render.c
index fd33dfb7cafe..bc2ffc750c67 100644
--- a/tests/kms_render.c
+++ b/tests/kms_render.c
@@ -176,7 +176,7 @@ static void test_connector(const char *test_name,
struct kmstest_connector_config *cconf,
enum test_flags flags)
{
- const uint32_t *formats;
+ uint32_t *formats;
int format_count;
int i;
@@ -193,6 +193,8 @@ static void test_connector(const char *test_name,
cconf, &cconf->connector->modes[0],
formats[i], flags);
}
+
+ free(formats);
}
static int run_test(const char *test_name, enum test_flags flags)
--
1.7.9.5
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[Intel-gfx] [PATCH i-g-t 6/7] igt: lib/igt_crc: Split out CRC functionality
Separate out the CRC code for better compartmentalisation. Should ease
the addition of more/different CRC sources in the future.
Signed-off-by: Brian Starkey
---
lib/Makefile.sources |2 +
lib/igt_chamelium.h |1 +
lib/igt_crc.c | 563 +
lib/igt_crc.h | 125
lib/igt_debugfs.c | 547 ---
lib/igt_debugfs.h | 81 --
tests/chamelium.c |1 +
tests/kms_atomic_transition.c |1 +
tests/kms_ccs.c |1 +
tests/kms_chv_cursor_fail.c |1 +
tests/kms_crtc_background_color.c |1 +
tests/kms_cursor_crc.c|1 +
tests/kms_cursor_legacy.c |1 +
tests/kms_draw_crc.c |1 +
tests/kms_fbc_crc.c |1 +
tests/kms_flip_tiling.c |1 +
tests/kms_frontbuffer_tracking.c |1 +
tests/kms_mmap_write_crc.c|1 +
tests/kms_mmio_vs_cs_flip.c |1 +
tests/kms_pipe_color.c|1 +
tests/kms_pipe_crc_basic.c|1 +
tests/kms_plane.c |1 +
tests/kms_plane_lowres.c |1 +
tests/kms_plane_multiple.c|1 +
tests/kms_plane_scaling.c |1 +
tests/kms_pwrite_crc.c|1 +
tests/kms_rotation_crc.c |1 +
tests/kms_universal_plane.c |1 +
tools/intel_display_crc.c |1 +
29 files changed, 714 insertions(+), 628 deletions(-)
create mode 100644 lib/igt_crc.c
create mode 100644 lib/igt_crc.h
diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 6348487f1107..927ff8cb155a 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -11,6 +11,8 @@ lib_source_list = \
igt_debugfs.h \
igt_aux.c \
igt_aux.h \
+ igt_crc.c \
+ igt_crc.h \
igt_edid_template.h \
igt_gt.c\
igt_gt.h\
diff --git a/lib/igt_chamelium.h b/lib/igt_chamelium.h
index f421d8372876..ad6ca7739e4b 100644
--- a/lib/igt_chamelium.h
+++ b/lib/igt_chamelium.h
@@ -28,6 +28,7 @@
#include "config.h"
#include "igt.h"
+#include "igt_crc.h"
#include
struct chamelium;
diff --git a/lib/igt_crc.c b/lib/igt_crc.c
new file mode 100644
index ..91a0b5a8e04d
--- /dev/null
+++ b/lib/igt_crc.c
@@ -0,0 +1,563 @@
+/*
+ * Copyright © 2013 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "igt_aux.h"
+#include "igt_crc.h"
+#include "igt_core.h"
+#include "igt_debugfs.h"
+#include "igt_kms.h"
+
+/**
+ * igt_assert_crc_equal:
+ * @a: first pipe CRC value
+ * @b: second pipe CRC value
+ *
+ * Compares two CRC values and fails the testcase if they don't match with
+ * igt_fail(). Note that due to CRC collisions CRC based testcase can only
+ * assert that CRCs match, never that they are different. Otherwise there might
+ * be random testcase failures when different screen contents end up with the
+ * same CRC by chance.
+ */
+void igt_assert_crc_equal(const igt_crc_t *a, const igt_crc_t *b)
+{
+ int i;
+
+ for (i = 0; i < a->n_words; i++)
+ igt_assert_eq_u32(a->crc[i], b->crc[i]);
+}
+
+/**
+ * igt_crc_to_string:
+ * @crc: pipe CRC value to print
+ *
+ * This formats @crc into a string buffer which is owned by
igt_crc_to_string().
+ * The next call will override the buffer again, which makes this
multithreading
+ * unsafe.
+ *
+ * This should only ever be used for diagnostic debug output.
+ */
+char *igt_crc_to_string(igt_crc_t *crc)
+{
+ int i;
+ char buf[128] = { 0 };
+
+ for (i = 0; i < crc->n_words; i++)
+
[Intel-gfx] [PATCH i-g-t 5/7] lib/igt_debugfs: Only use valid values in igt_crc_to_str()
Not all elements in the crc array may be valid, so only use the valid
ones to generate the string.
Signed-off-by: Brian Starkey
---
lib/igt_debugfs.c |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/lib/igt_debugfs.c b/lib/igt_debugfs.c
index f5ed3dafee8a..80f25c61597c 100644
--- a/lib/igt_debugfs.c
+++ b/lib/igt_debugfs.c
@@ -312,10 +312,11 @@ void igt_assert_crc_equal(const igt_crc_t *a, const
igt_crc_t *b)
*/
char *igt_crc_to_string(igt_crc_t *crc)
{
- char buf[128];
+ int i;
+ char buf[128] = { 0 };
- sprintf(buf, "%08x %08x %08x %08x %08x", crc->crc[0],
- crc->crc[1], crc->crc[2], crc->crc[3], crc->crc[4]);
+ for (i = 0; i < crc->n_words; i++)
+ sprintf(buf + strlen(buf), "%08x ", crc->crc[i]);
return strdup(buf);
}
--
1.7.9.5
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[Intel-gfx] [PATCH i-g-t 7/7] lib/igt_kms: Use kernel command line mode if specified
If "video=" is specified on the kernel command-line, use it to override
the default mode in kmstest_get_connector_default_mode.
If a mode override was provided on the command-line, it was probably for
good reason so we should honor it.
Signed-off-by: Brian Starkey
---
lib/igt_kms.c | 135 +
1 file changed, 135 insertions(+)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 474aa005b9fa..97f80a46354d 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -766,6 +766,131 @@ void kmstest_force_edid(int drm_fd, drmModeConnector
*connector,
igt_assert(ret != -1);
}
+/*
+ * Extract xres, yres, refresh and interlaced from a string of the form:
+ * x[M][R][-][@][i][m][eDd]
+ * xres and yres must be specified, refresh is optional and will be set to
+ * -1 if not present. interlaced defaults to false.
+ */
+static int parse_cmdline_mode(char *video_str, unsigned int *xres,
+ unsigned int *yres,
+ int *refresh, bool *interlaced)
+{
+ int match, len = strlen(video_str);
+ char *token = strtok(video_str, "@");
+
+ if (!token)
+ return -1;
+
+ *interlaced = false;
+ *refresh = -1;
+
+ match = sscanf(token, "%dx%d", xres, yres);
+ if (match != 2)
+ return -1;
+
+ if (strlen(token) < len - 1) {
+ token += strlen(token) + 1;
+
+ match = sscanf(token, "%d", refresh);
+ if (match != 1 || (*refresh < 0))
+ return -1;
+
+ if (strchr(token, 'i'))
+ *interlaced = true;
+ }
+
+ return 0;
+}
+
+static const drmModeModeInfo *
+connector_match_cmdline_mode(const drmModeConnector *connector,
+unsigned int xres, unsigned int yres, int refresh,
+bool interlaced)
+{
+ const drmModeModeInfo *mode = NULL;
+ int i;
+
+ for (i = 0; i < connector->count_modes; i++) {
+ mode = &connector->modes[i];
+ if (mode->hdisplay == xres &&
+ mode->vdisplay == yres &&
+ (refresh < 0 || refresh == mode->vrefresh) &&
+ interlaced == !!(mode->flags & DRM_MODE_FLAG_INTERLACE))
+ return mode;
+ }
+
+ return NULL;
+}
+
+static const drmModeModeInfo *
+kmstest_get_cmdline_mode(int drm_fd, drmModeConnector *connector)
+{
+ char c, *str = NULL, *cursor, *conn_name = NULL;
+ const drmModeModeInfo *mode = NULL;
+ unsigned int size = 0;
+ FILE *fp = NULL;
+
+ fp = fopen("/proc/cmdline", "r");
+ if (!fp)
+ return NULL;
+
+ /* lseek/fseek+ftell/stat don't work on /proc/cmdline */
+ while (fread(&c, 1, 1, fp))
+ size++;
+ rewind(fp);
+
+ str = calloc(1, size + 1);
+ if (!str)
+ goto done;
+
+ if (fread(str, 1, size, fp) != size)
+ goto done;
+
+ if (!asprintf(&conn_name, "%s-%d:",
+ kmstest_connector_type_str(connector->connector_type),
+ connector->connector_type_id))
+ goto done;
+
+ cursor = str;
+ while ((cursor = strstr(cursor, "video="))) {
+ unsigned int xres, yres;
+ bool interlaced;
+ int refresh;
+
+ cursor += strlen("video=");
+ cursor = strtok(cursor, " \n");
+ if (!cursor)
+ break;
+
+ /* Strip the name if it matches ours */
+ if (!strncmp(cursor, conn_name, strlen(conn_name)))
+ cursor += strlen(conn_name);
+
+ /*
+* Consider this "video=" specification only if it has no
+* name. If the name matched, we would have already stripped it
+* above
+*/
+ if (!strstr(cursor, ":") &&
+ !parse_cmdline_mode(cursor, &xres, &yres, &refresh,
&interlaced)) {
+ mode = connector_match_cmdline_mode(connector, xres,
+ yres, refresh,
+ interlaced);
+ if (mode)
+ break;
+ }
+
+ cursor += strlen(cursor) + 1;
+ }
+
+done:
+ free(conn_name);
+ free(str);
+ fclose(fp);
+ return mode;
+}
+
/**
* kmstest_get_connector_default_mode:
* @drm_fd: DRM fd
@@ -773,6 +898,8 @@ void kmstest_force_edid(int drm_fd, drmModeConnector
*connector,
* @mode: libdrm mode
*
* Retrieves the default mode for @connector and stores it in @mode.
+ * If video= is specified (optionally for this specific connector) on the
+ * kernel command line, then it is used as the default.
*
* Returns: true
[Intel-gfx] [PATCH i-g-t 2/7] lib/igt_kms: Fix override_mode handling
igt_display_commit isn't refreshing all outputs anymore, which means
that an override mode may never get picked up.
Instead of forcing a reprobe to handle copying the override_mode into
default_mode, just change igt_output_get_mode() to return the
override_mode if it's been set, and remove the old code which would
directly overwrite default_mode.
This should be more robust, as igt_output_get_mode() will always return
the correct mode, without needing the output to be reprobed.
This change means that output->config.default_mode always contains the
"non-overridden" default mode.
Signed-off-by: Brian Starkey
---
lib/igt_kms.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/lib/igt_kms.c b/lib/igt_kms.c
index 5837a9f112a6..474aa005b9fa 100644
--- a/lib/igt_kms.c
+++ b/lib/igt_kms.c
@@ -1575,9 +1575,6 @@ static void igt_output_refresh(igt_output_t *output)
igt_atomic_fill_connector_props(display, output,
IGT_NUM_CONNECTOR_PROPS, igt_connector_prop_names);
- if (output->use_override_mode)
- output->config.default_mode = output->override_mode;
-
if (output->config.pipe == PIPE_NONE)
return;
@@ -2816,7 +2813,10 @@ const char *igt_output_name(igt_output_t *output)
drmModeModeInfo *igt_output_get_mode(igt_output_t *output)
{
- return &output->config.default_mode;
+ if (output->use_override_mode)
+ return &output->override_mode;
+ else
+ return &output->config.default_mode;
}
/**
@@ -2834,10 +2834,6 @@ void igt_output_override_mode(igt_output_t *output,
drmModeModeInfo *mode)
if (mode)
output->override_mode = *mode;
- else /* restore default_mode, may have been overwritten in
igt_output_refresh */
- kmstest_get_connector_default_mode(output->display->drm_fd,
- output->config.connector,
-
&output->config.default_mode);
output->use_override_mode = !!mode;
--
1.7.9.5
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[Intel-gfx] [PATCH i-g-t 0/7] Misc fixes and cleanup
Hi, This is not really a series but a set of miscellaneous fixes and cleanup. It should be mostly noncontroversial, with the exception of perhaps the last two patches. Patch 6 splits all of the igt_crc code out of igt_debugfs into a separate file. The goal here was to make it easier to add new CRC-related code without falling afoul of churn within igt_debugfs (of which there's been a fair amount while I've been carrying these patches). Eventually, the intention is to add support for igt_crc via writeback connectors here, but I understand if this patch should stay out until then. Patch 7 allows "video=" on the kernel command-line to override a connector's default mode. I don't know if that's widely useful, but we like to use it on our FPGA platforms. All comments/feedback welcome, Thanks, Brian Brian Starkey (7): lib/igt_kms: Fix erroneous assert lib/igt_kms: Fix override_mode handling lib: Stop igt_get_all_cairo_formats memory leak lib/igt_debugfs: Remove igt_debugfs_t lib/igt_debugfs: Only use valid values in igt_crc_to_str() igt: lib/igt_crc: Split out CRC functionality lib/igt_kms: Use kernel command line mode if specified lib/Makefile.sources |2 + lib/igt_chamelium.h |1 + lib/igt_crc.c | 563 + lib/igt_crc.h | 125 lib/igt_debugfs.c | 551 lib/igt_debugfs.h | 81 -- lib/igt_fb.c |4 +- lib/igt_fb.h |2 +- lib/igt_kms.c | 157 ++- tests/chamelium.c |1 + tests/kms_atomic.c|3 +- tests/kms_atomic_transition.c |1 + tests/kms_ccs.c |1 + tests/kms_chv_cursor_fail.c |1 + tests/kms_crtc_background_color.c |1 + tests/kms_cursor_crc.c|1 + tests/kms_cursor_legacy.c |1 + tests/kms_draw_crc.c |1 + tests/kms_fbc_crc.c |1 + tests/kms_flip_tiling.c |1 + tests/kms_frontbuffer_tracking.c |1 + tests/kms_mmap_write_crc.c|1 + tests/kms_mmio_vs_cs_flip.c |1 + tests/kms_pipe_color.c|1 + tests/kms_pipe_crc_basic.c|1 + tests/kms_plane.c |1 + tests/kms_plane_lowres.c |1 + tests/kms_plane_multiple.c|1 + tests/kms_plane_scaling.c |1 + tests/kms_pwrite_crc.c|1 + tests/kms_render.c|4 +- tests/kms_rotation_crc.c |1 + tests/kms_universal_plane.c |1 + tools/intel_display_crc.c |1 + 34 files changed, 867 insertions(+), 649 deletions(-) create mode 100644 lib/igt_crc.c create mode 100644 lib/igt_crc.h -- 1.7.9.5 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 12/15] drm/i915/perf: Add OA unit support for Gen 8+
On 24 April 2017 at 19:49, Lionel Landwerlin
wrote:
> From: Robert Bragg
>
> Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
> share (more-or-less) the same OA unit design.
>
> Of particular note in comparison to Haswell: some OA unit HW config
> state has become per-context state and as a consequence it is somewhat
> more complicated to manage synchronous state changes from the cpu while
> there's no guarantee of what context (if any) is currently actively
> running on the gpu.
>
> The periodic sampling frequency which can be particularly useful for
> system-wide analysis (as opposed to command stream synchronised
> MI_REPORT_PERF_COUNT commands) is perhaps the most surprising state to
> have become per-context save and restored (while the OABUFFER
> destination is still a shared, system-wide resource).
>
> This support for gen8+ takes care to consider a number of timing
> challenges involved in synchronously updating per-context state
> primarily by programming all config state from the cpu and updating all
> current and saved contexts synchronously while the OA unit is still
> disabled.
>
> The driver intentionally avoids depending on command streamer
> programming to update OA state considering the lack of synchronization
> between the automatic loading of OACTXCONTROL state (that includes the
> periodic sampling state and enable state) on context restore and the
> parsing of any general purpose BB the driver can control. I.e. this
> implementation is careful to avoid the possibility of a context restore
> temporarily enabling any out-of-date periodic sampling state. In
> addition to the risk of transiently-out-of-date state being loaded
> automatically; there are also internal HW latencies involved in the
> loading of MUX configurations which would be difficult to account for
> from the command streamer (and we only want to enable the unit when once
> the MUX configuration is complete).
>
> Since the Gen8+ OA unit design no longer supports clock gating the unit
> off for a single given context (which effectively stopped any progress
> of counters while any other context was running) and instead supports
> tagging OA reports with a context ID for filtering on the CPU, it means
> we can no longer hide the system-wide progress of counters from a
> non-privileged application only interested in metrics for its own
> context. Although we could theoretically try and subtract the progress
> of other contexts before forwarding reports via read() we aren't in a
> position to filter reports captured via MI_REPORT_PERF_COUNT commands.
> As a result, for Gen8+, we always require the
> dev.i915.perf_stream_paranoid to be unset for any access to OA metrics
> if not root.
>
> v5: Drain submitted requests when enabling metric set to ensure no
> lite-restore erases the context image we just updated (Lionel)
>
> v6: In addition to drain, switch to kernel context & update all
> context in place (Chris)
>
> Signed-off-by: Robert Bragg
> Signed-off-by: Lionel Landwerlin
> Reviewed-by: Matthew Auld \o/
> ---
> drivers/gpu/drm/i915/i915_drv.h | 45 +-
> drivers/gpu/drm/i915/i915_perf.c | 957
> ---
> drivers/gpu/drm/i915/i915_reg.h | 22 +
> drivers/gpu/drm/i915/intel_lrc.c | 2 +
> include/uapi/drm/i915_drm.h | 19 +-
> 5 files changed, 952 insertions(+), 93 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ffa1fc5eddfd..676b1227067c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2064,9 +2064,17 @@ struct i915_oa_ops {
> void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
>
> /**
> -* @enable_metric_set: Applies any MUX configuration to set up the
> -* Boolean and Custom (B/C) counters that are part of the counter
> -* reports being sampled. May apply system constraints such as
> +* @select_metric_set: The auto generated code that checks whether a
> +* requested OA config is applicable to the system and if so sets up
> +* the mux, oa and flex eu register config pointers according to the
> +* current dev_priv->perf.oa.metrics_set.
> +*/
> + int (*select_metric_set)(struct drm_i915_private *dev_priv);
> +
> + /**
> +* @enable_metric_set: Selects and applies any MUX configuration to
> set
> +* up the Boolean and Custom (B/C) counters that are part of the
> +* counter reports being sampled. May apply system constraints such as
> * disabling EU clock gating as required.
> */
> int (*enable_metric_set)(struct drm_i915_private *dev_priv);
> @@ -2097,20 +2105,13 @@ struct i915_oa_ops {
> size_t *offset);
>
> /**
> -* @oa_buffer_check: Check for OA buffer data + update tail
> -*
> -* This is either called via fops or the poll check hrtimer (atomic
> -
[Intel-gfx] GPU hangs and X shot down with 4.11-rc6
Hi, I have just experienced X being shut down once with 4.11-rc2 and 2 times with 4.11-rc6 kernel. I do not remember seeing something like this before but it is quite possible I was just lucky to not trigger this issue before. It always happened while I was working on a presentation in LibreOffice which I do very seldom. The kernel log contains: [ 7456.721893] [drm] GPU HANG: ecode 9:0:0x86dd, in Xorg [3594], reason: Hang on render ring, action: reset [ 7456.721897] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace. [ 7456.721898] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel [ 7456.721900] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue. [ 7456.721901] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it. [ 7456.721902] [drm] GPU crash dump saved to /sys/class/drm/card0/error [ 7456.721925] drm/i915: Resetting chip after gpu hang [ 7456.722117] [drm] RC6 on [ 7456.734588] [drm] GuC firmware load skipped [ 7464.686209] drm/i915: Resetting chip after gpu hang [ 7464.686284] [drm] RC6 on [ 7464.702469] [drm] GuC firmware load skipped [ 7472.686180] drm/i915: Resetting chip after gpu hang [ 7472.686241] [drm] RC6 on [ 7472.704565] [drm] GuC firmware load skipped [ 7480.686179] drm/i915: Resetting chip after gpu hang [ 7480.686241] [drm] RC6 on [ 7480.704583] [drm] GuC firmware load skipped [ 7493.678130] drm/i915: Resetting chip after gpu hang [ 7493.678206] [drm] RC6 on [ 7493.696505] [drm] GuC firmware load skipped The kernel message tells that the problem might be anywhere and I should report to freedesktop but I haven't changed the userspace recently so it smells more like a kernel bug to me. Does this ring bells? The GPU crash dump is attached in case it is useful. Let me know if you need additional information. Thanks! -- Michal Hocko SUSE Labs gpu_dump.gz Description: application/gzip ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 12/15] drm/i915/perf: Add OA unit support for Gen 8+
Hey Matt,
This commit had your reviewed-by on v4, are you still okay with it?
Thanks!
-
Lionel
On 24/04/17 11:49, Lionel Landwerlin wrote:
From: Robert Bragg
Enables access to OA unit metrics for BDW, CHV, SKL and BXT which all
share (more-or-less) the same OA unit design.
Of particular note in comparison to Haswell: some OA unit HW config
state has become per-context state and as a consequence it is somewhat
more complicated to manage synchronous state changes from the cpu while
there's no guarantee of what context (if any) is currently actively
running on the gpu.
The periodic sampling frequency which can be particularly useful for
system-wide analysis (as opposed to command stream synchronised
MI_REPORT_PERF_COUNT commands) is perhaps the most surprising state to
have become per-context save and restored (while the OABUFFER
destination is still a shared, system-wide resource).
This support for gen8+ takes care to consider a number of timing
challenges involved in synchronously updating per-context state
primarily by programming all config state from the cpu and updating all
current and saved contexts synchronously while the OA unit is still
disabled.
The driver intentionally avoids depending on command streamer
programming to update OA state considering the lack of synchronization
between the automatic loading of OACTXCONTROL state (that includes the
periodic sampling state and enable state) on context restore and the
parsing of any general purpose BB the driver can control. I.e. this
implementation is careful to avoid the possibility of a context restore
temporarily enabling any out-of-date periodic sampling state. In
addition to the risk of transiently-out-of-date state being loaded
automatically; there are also internal HW latencies involved in the
loading of MUX configurations which would be difficult to account for
from the command streamer (and we only want to enable the unit when once
the MUX configuration is complete).
Since the Gen8+ OA unit design no longer supports clock gating the unit
off for a single given context (which effectively stopped any progress
of counters while any other context was running) and instead supports
tagging OA reports with a context ID for filtering on the CPU, it means
we can no longer hide the system-wide progress of counters from a
non-privileged application only interested in metrics for its own
context. Although we could theoretically try and subtract the progress
of other contexts before forwarding reports via read() we aren't in a
position to filter reports captured via MI_REPORT_PERF_COUNT commands.
As a result, for Gen8+, we always require the
dev.i915.perf_stream_paranoid to be unset for any access to OA metrics
if not root.
v5: Drain submitted requests when enabling metric set to ensure no
lite-restore erases the context image we just updated (Lionel)
v6: In addition to drain, switch to kernel context & update all
context in place (Chris)
Signed-off-by: Robert Bragg
Signed-off-by: Lionel Landwerlin
Reviewed-by: Matthew Auld \o/
---
drivers/gpu/drm/i915/i915_drv.h | 45 +-
drivers/gpu/drm/i915/i915_perf.c | 957 ---
drivers/gpu/drm/i915/i915_reg.h | 22 +
drivers/gpu/drm/i915/intel_lrc.c | 2 +
include/uapi/drm/i915_drm.h | 19 +-
5 files changed, 952 insertions(+), 93 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ffa1fc5eddfd..676b1227067c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2064,9 +2064,17 @@ struct i915_oa_ops {
void (*init_oa_buffer)(struct drm_i915_private *dev_priv);
/**
-* @enable_metric_set: Applies any MUX configuration to set up the
-* Boolean and Custom (B/C) counters that are part of the counter
-* reports being sampled. May apply system constraints such as
+* @select_metric_set: The auto generated code that checks whether a
+* requested OA config is applicable to the system and if so sets up
+* the mux, oa and flex eu register config pointers according to the
+* current dev_priv->perf.oa.metrics_set.
+*/
+ int (*select_metric_set)(struct drm_i915_private *dev_priv);
+
+ /**
+* @enable_metric_set: Selects and applies any MUX configuration to set
+* up the Boolean and Custom (B/C) counters that are part of the
+* counter reports being sampled. May apply system constraints such as
* disabling EU clock gating as required.
*/
int (*enable_metric_set)(struct drm_i915_private *dev_priv);
@@ -2097,20 +2105,13 @@ struct i915_oa_ops {
size_t *offset);
/**
-* @oa_buffer_check: Check for OA buffer data + update tail
-*
-* This is either called via fops or the poll check hrtimer (atomic
-* ctx) without any locks taken.
+* @oa_hw_tail_read: read the OA tail pointer
[Intel-gfx] [PATCH] drm/i915: Avoid the branch in computing intel_ring_space()
Exploit the power-of-two ring size to compute the space across the
wraparound using a mask rather than a if. Convert to unsigned integers
so the operation is well defined.
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 20 ++--
drivers/gpu/drm/i915/intel_ringbuffer.h | 24 +---
2 files changed, 23 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6836efb7e3d2..16739352f057 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -39,12 +39,15 @@
*/
#define LEGACY_REQUEST_SIZE 200
-static int __intel_ring_space(int head, int tail, int size)
+static unsigned int __intel_ring_space(unsigned int head,
+ unsigned int tail,
+ unsigned int size)
{
- int space = head - tail;
- if (space <= 0)
- space += size;
- return space - I915_RING_FREE_SPACE;
+ /* "If the Ring Buffer Head Pointer and the Tail Pointer are on the
+* same cacheline, the Head Pointer must not be greater than the Tail
+* Pointer."
+*/
+ return (head - tail - CACHELINE_BYTES) & (size - 1);
}
void intel_ring_update_space(struct intel_ring *ring)
@@ -1619,12 +1622,9 @@ static int wait_for_space(struct drm_i915_gem_request
*req, int bytes)
GEM_BUG_ON(!req->reserved_space);
list_for_each_entry(target, &ring->request_list, ring_link) {
- unsigned space;
-
/* Would completion of this request free enough space? */
- space = __intel_ring_space(target->postfix, ring->emit,
- ring->size);
- if (space >= bytes)
+ if (bytes <= __intel_ring_space(target->postfix,
+ ring->emit, ring->size))
break;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 96710b616efb..df11184868c1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -17,17 +17,6 @@
#define CACHELINE_BYTES 64
#define CACHELINE_DWORDS (CACHELINE_BYTES / sizeof(uint32_t))
-/*
- * Gen2 BSpec "1. Programming Environment" / 1.4.4.6 "Ring Buffer Use"
- * Gen3 BSpec "vol1c Memory Interface Functions" / 2.3.4.5 "Ring Buffer Use"
- * Gen4+ BSpec "vol1c Memory Interface and Command Stream" / 5.3.4.5 "Ring
Buffer Use"
- *
- * "If the Ring Buffer Head Pointer and the Tail Pointer are on the same
- * cacheline, the Head Pointer must not be greater than the Tail
- * Pointer."
- */
-#define I915_RING_FREE_SPACE 64
-
struct intel_hw_status_page {
struct i915_vma *vma;
u32 *page_addr;
@@ -547,6 +536,19 @@ assert_ring_tail_valid(const struct intel_ring *ring,
unsigned int tail)
*/
GEM_BUG_ON(!IS_ALIGNED(tail, 8));
GEM_BUG_ON(tail >= ring->size);
+
+ /* "Ring Buffer Use"
+* Gen2 BSpec "1. Programming Environment" / 1.4.4.6
+* Gen3 BSpec "1c Memory Interface Functions" / 2.3.4.5
+* Gen4+ BSpec "1c Memory Interface and Command Stream" / 5.3.4.5
+* "If the Ring Buffer Head Pointer and the Tail Pointer are on the
+* same cacheline, the Head Pointer must not be greater than the Tail
+* Pointer."
+*/
+#define cacheline(a) round_down(a, CACHELINE_BYTES)
+ GEM_BUG_ON(cacheline(tail) == cacheline(ring->head) &&
+ tail < ring->head);
+#undef cacheline
}
static inline unsigned int
--
2.11.0
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Re: [Intel-gfx] [PATCH v5 02/11] drm/core: Allow attaching custom scaling mode properties
On Tue, Apr 25, 2017 at 01:55:26PM +0200, Maarten Lankhorst wrote:
> Some connectors may not allow all scaling mode properties, this function will
> allow
> creating the scaling mode property with only the supported subset.
>
> This will make it possible to convert i915 connectors to atomic.
>
> Signed-off-by: Maarten Lankhorst
> Cc: dri-de...@lists.freedesktop.org
> ---
> drivers/gpu/drm/drm_atomic.c| 3 ++-
> drivers/gpu/drm/drm_connector.c | 45
> +
> include/drm/drm_connector.h | 5 +
> 3 files changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 25ea6f797a54..21db00d9a933 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1125,7 +1125,8 @@ int drm_atomic_connector_set_property(struct
> drm_connector *connector,
> state->link_status = val;
> } else if (property == config->aspect_ratio_property) {
> state->picture_aspect_ratio = val;
> - } else if (property == config->scaling_mode_property) {
> + } else if (property == config->scaling_mode_property ||
I would suggest ripping out the global property entirely, like I did for
the plane rotation property.
> +property == connector->scaling_mode_property) {
> state->scaling_mode = val;
> } else if (connector->funcs->atomic_set_property) {
> return connector->funcs->atomic_set_property(connector,
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 9f847615ac74..49baa21b4ce7 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -954,6 +954,7 @@ int drm_mode_create_scaling_mode_property(struct
> drm_device *dev)
> drm_scaling_mode_enum_list,
> ARRAY_SIZE(drm_scaling_mode_enum_list));
>
> +
> dev->mode_config.scaling_mode_property = scaling_mode;
>
> return 0;
> @@ -961,6 +962,50 @@ int drm_mode_create_scaling_mode_property(struct
> drm_device *dev)
> EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
>
> /**
> + * drm_mode_connector_attach_custom_scaling_mode_property - TODO
> + */
> +int drm_mode_connector_attach_custom_scaling_mode_property(struct
> drm_connector *connector,
> +u32
> scaling_mode_mask,
> +u32 default_scaler)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_property *scaling_mode_property;
> + int i;
> +
> + if (!scaling_mode_mask)
> + scaling_mode_mask = ~0U;
> +
> + scaling_mode_mask &= (1U << ARRAY_SIZE(drm_scaling_mode_enum_list)) - 1;
> +
> + scaling_mode_property =
> + drm_property_create(dev, 0, "scaling mode",
> + hweight32(scaling_mode_mask));
> +
> + for (i = 0; i < ARRAY_SIZE(drm_scaling_mode_enum_list); i++)
> + if (BIT(i) & scaling_mode_mask) {
> + int ret;
> +
> + ret = drm_property_add_enum(scaling_mode_property, i,
> +
> drm_scaling_mode_enum_list[i].type,
> +
> drm_scaling_mode_enum_list[i].name);
> +
> + if (ret) {
> + drm_property_destroy(dev,
> scaling_mode_property);
> +
> + return ret;
> + }
> + }
> +
> + drm_object_attach_property(&connector->base,
> +scaling_mode_property, default_scaler);
> +
> + connector->scaling_mode_property = scaling_mode_property;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_mode_connector_attach_custom_scaling_mode_property);
> +
> +/**
> * drm_mode_create_aspect_ratio_property - create aspect ratio property
> * @dev: DRM device
> *
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 934143720e5a..f55ae02135c2 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
> @@ -770,6 +770,8 @@ struct drm_connector {
> struct drm_property_blob *edid_blob_ptr;
> struct drm_object_properties properties;
>
> + struct drm_property *scaling_mode_property;
> +
> /**
>* @path_blob_ptr:
>*
> @@ -969,6 +971,9 @@ int drm_mode_create_tv_properties(struct drm_device *dev,
> unsigned int num_modes,
> const char * const modes[]);
> int drm_mode_create_scaling_mode_property(struct drm_device *dev);
> +int drm_mode_connector_attach_custom_scaling_mode_property(struct
> drm_connector *connector,
> +u32
> scaling_mode_mask,
> +
Re: [Intel-gfx] [PATCH v5 02/11] drm/core: Allow attaching custom scaling mode properties
On Tue, Apr 25, 2017 at 01:55:26PM +0200, Maarten Lankhorst wrote:
> Some connectors may not allow all scaling mode properties, this function will
> allow
> creating the scaling mode property with only the supported subset.
>
> This will make it possible to convert i915 connectors to atomic.
>
> Signed-off-by: Maarten Lankhorst
> Cc: dri-de...@lists.freedesktop.org
> ---
> drivers/gpu/drm/drm_atomic.c| 3 ++-
> drivers/gpu/drm/drm_connector.c | 45
> +
> include/drm/drm_connector.h | 5 +
> 3 files changed, 52 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 25ea6f797a54..21db00d9a933 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -1125,7 +1125,8 @@ int drm_atomic_connector_set_property(struct
> drm_connector *connector,
> state->link_status = val;
> } else if (property == config->aspect_ratio_property) {
> state->picture_aspect_ratio = val;
> - } else if (property == config->scaling_mode_property) {
> + } else if (property == config->scaling_mode_property ||
> +property == connector->scaling_mode_property) {
Since scaling_mode_property isn't part of the atomic ABI before this series,
have you considered just supporting scaling mode property on connectors for
atomic? Then you wouldn't need to check both, and you wouldn't have the issue of
stomping properties if they're both set in a commit.
> state->scaling_mode = val;
> } else if (connector->funcs->atomic_set_property) {
> return connector->funcs->atomic_set_property(connector,
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index 9f847615ac74..49baa21b4ce7 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -954,6 +954,7 @@ int drm_mode_create_scaling_mode_property(struct
> drm_device *dev)
> drm_scaling_mode_enum_list,
> ARRAY_SIZE(drm_scaling_mode_enum_list));
>
> +
nit: kruft.
> dev->mode_config.scaling_mode_property = scaling_mode;
>
> return 0;
> @@ -961,6 +962,50 @@ int drm_mode_create_scaling_mode_property(struct
> drm_device *dev)
> EXPORT_SYMBOL(drm_mode_create_scaling_mode_property);
>
> /**
> + * drm_mode_connector_attach_custom_scaling_mode_property - TODO
It would be nice to fill in this TODO
> + */
> +int drm_mode_connector_attach_custom_scaling_mode_property(struct
> drm_connector *connector,
> +u32
> scaling_mode_mask,
> +u32 default_scaler)
> +{
> + struct drm_device *dev = connector->dev;
> + struct drm_property *scaling_mode_property;
> + int i;
> +
> + if (!scaling_mode_mask)
> + scaling_mode_mask = ~0U;
It's hard to interpret this code without the docs above, but it seems like we're
just covering the case where the caller interprets a mask of 0 as "don't care".
I'd rather not try to be smart about interpreting invalid input, instead, I'd
prefer just to return -EINVAL if scaling_mode_mask is 0 after the next line.
> +
> + scaling_mode_mask &= (1U << ARRAY_SIZE(drm_scaling_mode_enum_list)) - 1;
scaling_mode_mask &= BIT(ARRAY_SIZE(drm_scaling_mode_enum_list)) - 1;
> +
> + scaling_mode_property =
> + drm_property_create(dev, 0, "scaling mode",
> + hweight32(scaling_mode_mask));
> +
> + for (i = 0; i < ARRAY_SIZE(drm_scaling_mode_enum_list); i++)
> + if (BIT(i) & scaling_mode_mask) {
nit: You can save a level of indentation if you do:
if (!(BIT(i) & scaling_mode_mask))
continue;
> + int ret;
> +
> + ret = drm_property_add_enum(scaling_mode_property, i,
> +
> drm_scaling_mode_enum_list[i].type,
> +
> drm_scaling_mode_enum_list[i].name);
> +
> + if (ret) {
> + drm_property_destroy(dev,
> scaling_mode_property);
> +
nit: extra line
> + return ret;
> + }
> + }
> +
> + drm_object_attach_property(&connector->base,
> +scaling_mode_property, default_scaler);
> +
> + connector->scaling_mode_property = scaling_mode_property;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_mode_connector_attach_custom_scaling_mode_property);
> +
> +/**
> * drm_mode_create_aspect_ratio_property - create aspect ratio property
> * @dev: DRM device
> *
> diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> index 934143720e5a..f55ae02135c2 100644
> --- a/include/drm/drm_connector.h
> +++ b/include/drm/drm_connector.h
Re: [Intel-gfx] [PATCH v2] drm/i915: Differentiate between sw write location into ring and last hw read
On Tue, Apr 25, 2017 at 04:50:15PM +0300, Mika Kuoppala wrote:
> Chris Wilson writes:
>
> > We need to keep track of the last location we ask the hw to read up to
> > (RING_TAIL) separately from our last write location into the ring, so
> > that in the event of a GPU reset we do not tell the HW to proceed into
> > a partially written request (which can happen if that request is waiting
> > for an external signal before being executed).
> >
> > v2: Refactor intel_ring_reset() (Mika)
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100144
> > Testcase: igt/gem_exec_fence/await-hang
> > Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete
> > requests")
> > Fixes: d55ac5bf97c6 ("drm/i915: Defer transfer onto execution timeline to
> > actual hw submission")
> > Signed-off-by: Chris Wilson
> > Cc: Tvrtko Ursulin
> > Cc: Mika Kuoppala
>
> Reviewed-by: Mika Kuoppala
Pushed the first 2 to get the bug fix. That just leaves the
micro-optimisation of intel_ring_space.
-Chris
--
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Re: [Intel-gfx] [PATCH v2] drm/i915: Differentiate between sw write location into ring and last hw read
Chris Wilson writes:
> We need to keep track of the last location we ask the hw to read up to
> (RING_TAIL) separately from our last write location into the ring, so
> that in the event of a GPU reset we do not tell the HW to proceed into
> a partially written request (which can happen if that request is waiting
> for an external signal before being executed).
>
> v2: Refactor intel_ring_reset() (Mika)
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100144
> Testcase: igt/gem_exec_fence/await-hang
> Fixes: 821ed7df6e2a ("drm/i915: Update reset path to fix incomplete requests")
> Fixes: d55ac5bf97c6 ("drm/i915: Defer transfer onto execution timeline to
> actual hw submission")
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Mika Kuoppala
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/i915_gem_request.c| 16 +---
> drivers/gpu/drm/i915/i915_guc_submission.c | 4 +--
> drivers/gpu/drm/i915/intel_lrc.c | 6 ++---
> drivers/gpu/drm/i915/intel_ringbuffer.c| 41
> --
> drivers/gpu/drm/i915/intel_ringbuffer.h| 19 --
> 5 files changed, 59 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_request.c
> b/drivers/gpu/drm/i915/i915_gem_request.c
> index e2ec42b2bf24..126cd13abf54 100644
> --- a/drivers/gpu/drm/i915/i915_gem_request.c
> +++ b/drivers/gpu/drm/i915/i915_gem_request.c
> @@ -283,10 +283,18 @@ static void advance_ring(struct drm_i915_gem_request
> *request)
>* Note this requires that we are always called in request
>* completion order.
>*/
> - if (list_is_last(&request->ring_link, &request->ring->request_list))
> - tail = request->ring->tail;
> - else
> + if (list_is_last(&request->ring_link, &request->ring->request_list)) {
> + /* We may race here with execlists resubmitting this request
> + * as we retire it. The resubmission will move the ring->tail
> + * forwards (to request->wa_tail). We either read the
> + * current value that was written to hw, or the value that
> + * is just about to be. Either works, if we miss the last two
> + * noops - they are safe to be replayed on a reset.
> + */
> + tail = READ_ONCE(request->ring->tail);
> + } else {
> tail = request->postfix;
> + }
> list_del(&request->ring_link);
>
> request->ring->head = tail;
> @@ -651,7 +659,7 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
>* GPU processing the request, we never over-estimate the
>* position of the head.
>*/
> - req->head = req->ring->tail;
> + req->head = req->ring->emit;
>
> /* Check that we didn't interrupt ourselves with a new request */
> GEM_BUG_ON(req->timeline->seqno != req->fence.seqno);
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c
> b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 1642fff9cf13..ab5140ba108d 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -480,9 +480,7 @@ static void guc_wq_item_append(struct i915_guc_client
> *client,
> GEM_BUG_ON(freespace < wqi_size);
>
> /* The GuC firmware wants the tail index in QWords, not bytes */
> - tail = rq->tail;
> - assert_ring_tail_valid(rq->ring, rq->tail);
> - tail >>= 3;
> + tail = intel_ring_set_tail(rq->ring, rq->tail) >> 3;
> GEM_BUG_ON(tail > WQ_RING_TAIL_MAX);
>
> /* For now workqueue item is 4 DWs; workqueue buffer is 2 pages. So we
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c
> b/drivers/gpu/drm/i915/intel_lrc.c
> index 7df278fe492e..13057a37390b 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -326,8 +326,7 @@ static u64 execlists_update_context(struct
> drm_i915_gem_request *rq)
> rq->ctx->ppgtt ?: rq->i915->mm.aliasing_ppgtt;
> u32 *reg_state = ce->lrc_reg_state;
>
> - assert_ring_tail_valid(rq->ring, rq->tail);
> - reg_state[CTX_RING_TAIL+1] = rq->tail;
> + reg_state[CTX_RING_TAIL+1] = intel_ring_set_tail(rq->ring, rq->tail);
>
> /* True 32b PPGTT with dynamic page allocation: update PDP
>* registers and point the unallocated PDPs to scratch page.
> @@ -2054,8 +2053,7 @@ void intel_lr_context_resume(struct drm_i915_private
> *dev_priv)
> ce->state->obj->mm.dirty = true;
> i915_gem_object_unpin_map(ce->state->obj);
>
> - ce->ring->head = ce->ring->tail = 0;
> - intel_ring_update_space(ce->ring);
> + intel_ring_reset(ce->ring, 0);
> }
> }
> }
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
> b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 32afac6c754f..227dfcf1764e 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffe
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2] drm/i915: Differentiate between sw write location into ring and last hw read (rev2)
== Series Details == Series: series starting with [v2] drm/i915: Differentiate between sw write location into ring and last hw read (rev2) URL : https://patchwork.freedesktop.org/series/23411/ State : success == Summary == Series 23411v2 Series without cover letter https://patchwork.freedesktop.org/api/1.0/series/23411/revisions/2/mbox/ Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: fail -> PASS (fi-snb-2600) fdo#17 fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17 fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:429s fi-bdw-gvtdvmtotal:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:430s fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:574s fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:507s fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:482s fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:478s fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:411s fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:409s fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:418s fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:493s fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:484s fi-kbl-7500u total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:457s fi-kbl-7560u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:571s fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:454s fi-skl-6700hqtotal:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:568s fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:461s fi-skl-6770hqtotal:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:491s fi-skl-gvtdvmtotal:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:429s fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:531s fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time:404s babeb6f2b1a90ac0ec1a47bc43a4671649a8fc20 drm-tip: 2017y-04m-25d-10h-04m-12s UTC integration manifest c7ee119 drm/i915: Compute the ring->space slightly less pessimistically 1e4566e drm/i915: Poison the request before emitting commands b90ebe1 drm/i915: Differentiate between sw write location into ring and last hw read == Logs == For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_4544/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] igt/meta_test: Fix dmesg-warn test
Add bracket to match with piglit dmesg filter.
Signed-off-by: Marta Lofstedt
---
tests/meta_test.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/meta_test.c b/tests/meta_test.c
index e09efba0..c02cf8bc 100644
--- a/tests/meta_test.c
+++ b/tests/meta_test.c
@@ -97,9 +97,9 @@ static void test_result(bool result)
static void test_dmesg(bool pass)
{
if (pass)
- kmsg(KERN_DEBUG "drm: IGT inserted string.");
+ kmsg(KERN_DEBUG "[drm: IGT inserted string.");
else
- kmsg(KERN_WARNING "drm: IGT inserted string.");
+ kmsg(KERN_WARNING "[drm: IGT inserted string.");
}
static void test_user_crash(void)
--
2.11.0
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Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Report request restarts for both execlists/guc
On Tue, Apr 25, 2017 at 11:58:46AM -, Patchwork wrote: > == Series Details == > > Series: drm/i915: Report request restarts for both execlists/guc > URL : https://patchwork.freedesktop.org/series/23502/ > State : success > > == Summary == > > Series 23502v1 drm/i915: Report request restarts for both execlists/guc > https://patchwork.freedesktop.org/api/1.0/series/23502/revisions/1/mbox/ > > Test gem_exec_flush: > Subgroup basic-batch-kernel-default-uc: > fail -> PASS (fi-snb-2600) fdo#17 > Test gem_exec_suspend: > Subgroup basic-s4-devices: > pass -> DMESG-WARN (fi-kbl-7560u) fdo#100125 > > fdo#17 https://bugs.freedesktop.org/show_bug.cgi?id=17 > fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125 Pushed, thanks for the review. -Chris -- Chris Wilson, Intel Open Source Technology Centre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
