date:20171118

[Intel-gfx] [CI 1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
References: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..768946741be5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
-- 
2.15.0

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[Intel-gfx] [CI 3/3] drm/i915: Automatic i915_switch_context for legacy

2017-11-18 Thread Chris Wilson

During request construction, after pinning the context we know whether
or not we have to emit a context switch. So move this common operation
from every caller into i915_gem_request_alloc() itself.

v2: Always submit the request if we emitted some commands during request
construction, as typically it also involves changes in global state.

Signed-off-by: Chris Wilson 
Reviewed-by: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem.c   |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c   |  7 +--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c|  8 
 drivers/gpu/drm/i915/i915_gem_request.c   |  4 
 drivers/gpu/drm/i915/i915_perf.c  |  3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c   |  4 
 drivers/gpu/drm/i915/selftests/huge_pages.c   | 10 +++---
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 --
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  6 --
 10 files changed, 14 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 61ba321e9970..e07eb0beef13 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5045,7 +5045,7 @@ static int __intel_engines_record_defaults(struct 
drm_i915_private *i915)
goto out_ctx;
}
 
-   err = i915_switch_context(rq);
+   err = 0;
if (engine->init_context)
err = engine->init_context(rq);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 2db040695035..c1efbaf02bf2 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -842,8 +842,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
struct intel_engine_cs *engine = req->engine;
 
lockdep_assert_held(&req->i915->drm.struct_mutex);
-   if (i915_modparams.enable_execlists)
-   return 0;
+   GEM_BUG_ON(i915_modparams.enable_execlists);
 
if (!req->ctx->engine[engine->id].state) {
struct i915_gem_context *to = req->ctx;
@@ -899,7 +898,6 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *dev_priv)
 
for_each_engine(engine, dev_priv, id) {
struct drm_i915_gem_request *req;
-   int ret;
 
if (engine_has_idle_kernel_context(engine))
continue;
@@ -922,10 +920,7 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *dev_priv)
 GFP_KERNEL);
}
 
-   ret = i915_switch_context(req);
i915_add_request(req);
-   if (ret)
-   return ret;
}
 
return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index b7895788bc75..14d9e61a1e06 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -,10 +,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
if (err)
goto err_request;
 
-   err = i915_switch_context(rq);
-   if (err)
-   goto err_request;
-
err = eb->engine->emit_bb_start(rq,
batch->node.start, PAGE_SIZE,
cache->gen > 5 ? 0 : 
I915_DISPATCH_SECURE);
@@ -1960,10 +1956,6 @@ static int eb_submit(struct i915_execbuffer *eb)
if (err)
return err;
 
-   err = i915_switch_context(eb->request);
-   if (err)
-   return err;
-
if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
err = i915_reset_gen7_sol_offsets(eb->request);
if (err)
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c 
b/drivers/gpu/drm/i915/i915_gem_request.c
index 91eae1b20c42..86e2346357cf 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -624,6 +624,10 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
if (ret)
goto err_unpin;
 
+   ret = intel_ring_wait_for_space(ring, MIN_SPACE_FOR_ADD_REQUEST);
+   if (ret)
+   goto err_unreserve;
+
/* Move the oldest request to the slab-cache (if not in use!) */
req = list_first_entry_or_null(&engine->timeline->requests,
   typeof(*req), link);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 00be015e01df..d8952ff8e6b7 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1726,10 +1726,9 @@ static int gen8_switch_to_updated_kernel_context(struct 
drm_i915_private *dev_pr

[Intel-gfx] [CI 1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
References: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..768946741be5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
-- 
2.15.0

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[Intel-gfx] [CI] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
References: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..768946741be5 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
-- 
2.15.0

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[Intel-gfx] [CI 2/9] drm/i915: Pull the unconditional GPU cache invalidation into request construction

2017-11-18 Thread Chris Wilson

As the request now may implicitly invoke a context-switch, we should
follow that with a GPU TLB invalidation. Also even before using GGTT, we
should invalidate the TLBs for any updates (as well as the ppgtt
invalidates that are unconditionally applied by execbuf). Since we
almost always require the TLB invalidate, do it unconditionally on
request allocation and so we can remove it from all other paths.

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c|  7 +--
 drivers/gpu/drm/i915/i915_gem_render_state.c  |  4 
 drivers/gpu/drm/i915/i915_gem_request.c   | 24 ++-
 drivers/gpu/drm/i915/selftests/huge_pages.c   |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 --
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  4 
 7 files changed, 20 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 53ccb27bfe91..b7895788bc75 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -,10 +,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
if (err)
goto err_request;
 
-   err = eb->engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_request;
-
err = i915_switch_context(rq);
if (err)
goto err_request;
@@ -1818,8 +1814,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
/* Unconditionally flush any chipset caches (for streaming writes). */
i915_gem_chipset_flush(eb->i915);
 
-   /* Unconditionally invalidate GPU caches and TLBs. */
-   return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE);
+   return 0;
 }
 
 static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c 
b/drivers/gpu/drm/i915/i915_gem_render_state.c
index c2723a06fbb4..f7fc0df251ac 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -208,10 +208,6 @@ int i915_gem_render_state_emit(struct drm_i915_gem_request 
*rq)
if (err)
goto err_unpin;
 
-   err = engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_unpin;
-
err = engine->emit_bb_start(rq,
so.batch_offset, so.batch_size,
I915_DISPATCH_SECURE);
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c 
b/drivers/gpu/drm/i915/i915_gem_request.c
index e0d6221022a8..91eae1b20c42 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -703,17 +703,31 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
req->reserved_space = MIN_SPACE_FOR_ADD_REQUEST;
GEM_BUG_ON(req->reserved_space < engine->emit_breadcrumb_sz);
 
-   ret = engine->request_alloc(req);
-   if (ret)
-   goto err_ctx;
-
-   /* Record the position of the start of the request so that
+   /*
+* Record the position of the start of the request so that
 * should we detect the updated seqno part-way through the
 * GPU processing the request, we never over-estimate the
 * position of the head.
 */
req->head = req->ring->emit;
 
+   /* Unconditionally invalidate GPU caches and TLBs. */
+   ret = engine->emit_flush(req, EMIT_INVALIDATE);
+   if (ret)
+   goto err_ctx;
+
+   ret = engine->request_alloc(req);
+   if (ret) {
+   /*
+* Past the point-of-no-return. Since we may have updated
+* global state after partially completing the request alloc,
+* we need to commit any commands so far emitted in the
+* request to the HW.
+*/
+   __i915_add_request(req, false);
+   return ERR_PTR(ret);
+   }
+
/* Check that we didn't interrupt ourselves with a new request */
GEM_BUG_ON(req->timeline->seqno != req->fence.seqno);
return req;
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 01af540b6ef9..159a2cb68765 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -989,10 +989,6 @@ static int gpu_write(struct i915_vma *vma,
i915_vma_unpin(batch);
i915_vma_close(batch);
 
-   err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_request;
-
err = i915_switch_context(rq);
if (err)
goto err_request;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index c82

[Intel-gfx] [CI 2/3] drm/i915: Pull the unconditional GPU cache invalidation into request construction

2017-11-18 Thread Chris Wilson

As the request now may implicitly invoke a context-switch, we should
follow that with a GPU TLB invalidation. Also even before using GGTT, we
should invalidate the TLBs for any updates (as well as the ppgtt
invalidates that are unconditionally applied by execbuf). Since we
almost always require the TLB invalidate, do it unconditionally on
request allocation and so we can remove it from all other paths.

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem_execbuffer.c|  7 +--
 drivers/gpu/drm/i915/i915_gem_render_state.c  |  4 
 drivers/gpu/drm/i915/i915_gem_request.c   | 24 ++-
 drivers/gpu/drm/i915/selftests/huge_pages.c   |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 --
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  4 
 7 files changed, 20 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 53ccb27bfe91..b7895788bc75 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -,10 +,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
if (err)
goto err_request;
 
-   err = eb->engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_request;
-
err = i915_switch_context(rq);
if (err)
goto err_request;
@@ -1818,8 +1814,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
/* Unconditionally flush any chipset caches (for streaming writes). */
i915_gem_chipset_flush(eb->i915);
 
-   /* Unconditionally invalidate GPU caches and TLBs. */
-   return eb->engine->emit_flush(eb->request, EMIT_INVALIDATE);
+   return 0;
 }
 
 static bool i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c 
b/drivers/gpu/drm/i915/i915_gem_render_state.c
index c2723a06fbb4..f7fc0df251ac 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -208,10 +208,6 @@ int i915_gem_render_state_emit(struct drm_i915_gem_request 
*rq)
if (err)
goto err_unpin;
 
-   err = engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_unpin;
-
err = engine->emit_bb_start(rq,
so.batch_offset, so.batch_size,
I915_DISPATCH_SECURE);
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c 
b/drivers/gpu/drm/i915/i915_gem_request.c
index e0d6221022a8..91eae1b20c42 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -703,17 +703,31 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
req->reserved_space = MIN_SPACE_FOR_ADD_REQUEST;
GEM_BUG_ON(req->reserved_space < engine->emit_breadcrumb_sz);
 
-   ret = engine->request_alloc(req);
-   if (ret)
-   goto err_ctx;
-
-   /* Record the position of the start of the request so that
+   /*
+* Record the position of the start of the request so that
 * should we detect the updated seqno part-way through the
 * GPU processing the request, we never over-estimate the
 * position of the head.
 */
req->head = req->ring->emit;
 
+   /* Unconditionally invalidate GPU caches and TLBs. */
+   ret = engine->emit_flush(req, EMIT_INVALIDATE);
+   if (ret)
+   goto err_ctx;
+
+   ret = engine->request_alloc(req);
+   if (ret) {
+   /*
+* Past the point-of-no-return. Since we may have updated
+* global state after partially completing the request alloc,
+* we need to commit any commands so far emitted in the
+* request to the HW.
+*/
+   __i915_add_request(req, false);
+   return ERR_PTR(ret);
+   }
+
/* Check that we didn't interrupt ourselves with a new request */
GEM_BUG_ON(req->timeline->seqno != req->fence.seqno);
return req;
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c 
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 01af540b6ef9..159a2cb68765 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -989,10 +989,6 @@ static int gpu_write(struct i915_vma *vma,
i915_vma_unpin(batch);
i915_vma_close(batch);
 
-   err = rq->engine->emit_flush(rq, EMIT_INVALIDATE);
-   if (err)
-   goto err_request;
-
err = i915_switch_context(rq);
if (err)
goto err_request;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index c82

[Intel-gfx] [CI 3/9] drm/i915: Automatic i915_switch_context for legacy

2017-11-18 Thread Chris Wilson

During request construction, after pinning the context we know whether
or not we have to emit a context switch. So move this common operation
from every caller into i915_gem_request_alloc() itself.

v2: Always submit the request if we emitted some commands during request
construction, as typically it also involves changes in global state.

Signed-off-by: Chris Wilson 
Reviewed-by: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem.c   |  2 +-
 drivers/gpu/drm/i915/i915_gem_context.c   |  7 +--
 drivers/gpu/drm/i915/i915_gem_execbuffer.c|  8 
 drivers/gpu/drm/i915/i915_gem_request.c   |  4 
 drivers/gpu/drm/i915/i915_perf.c  |  3 +--
 drivers/gpu/drm/i915/intel_ringbuffer.c   |  4 
 drivers/gpu/drm/i915/selftests/huge_pages.c   | 10 +++---
 drivers/gpu/drm/i915/selftests/i915_gem_context.c |  4 
 drivers/gpu/drm/i915/selftests/i915_gem_request.c | 10 --
 drivers/gpu/drm/i915/selftests/intel_hangcheck.c  |  6 --
 10 files changed, 14 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 61ba321e9970..e07eb0beef13 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5045,7 +5045,7 @@ static int __intel_engines_record_defaults(struct 
drm_i915_private *i915)
goto out_ctx;
}
 
-   err = i915_switch_context(rq);
+   err = 0;
if (engine->init_context)
err = engine->init_context(rq);
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 2db040695035..c1efbaf02bf2 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -842,8 +842,7 @@ int i915_switch_context(struct drm_i915_gem_request *req)
struct intel_engine_cs *engine = req->engine;
 
lockdep_assert_held(&req->i915->drm.struct_mutex);
-   if (i915_modparams.enable_execlists)
-   return 0;
+   GEM_BUG_ON(i915_modparams.enable_execlists);
 
if (!req->ctx->engine[engine->id].state) {
struct i915_gem_context *to = req->ctx;
@@ -899,7 +898,6 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *dev_priv)
 
for_each_engine(engine, dev_priv, id) {
struct drm_i915_gem_request *req;
-   int ret;
 
if (engine_has_idle_kernel_context(engine))
continue;
@@ -922,10 +920,7 @@ int i915_gem_switch_to_kernel_context(struct 
drm_i915_private *dev_priv)
 GFP_KERNEL);
}
 
-   ret = i915_switch_context(req);
i915_add_request(req);
-   if (ret)
-   return ret;
}
 
return 0;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index b7895788bc75..14d9e61a1e06 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -,10 +,6 @@ static int __reloc_gpu_alloc(struct i915_execbuffer *eb,
if (err)
goto err_request;
 
-   err = i915_switch_context(rq);
-   if (err)
-   goto err_request;
-
err = eb->engine->emit_bb_start(rq,
batch->node.start, PAGE_SIZE,
cache->gen > 5 ? 0 : 
I915_DISPATCH_SECURE);
@@ -1960,10 +1956,6 @@ static int eb_submit(struct i915_execbuffer *eb)
if (err)
return err;
 
-   err = i915_switch_context(eb->request);
-   if (err)
-   return err;
-
if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
err = i915_reset_gen7_sol_offsets(eb->request);
if (err)
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c 
b/drivers/gpu/drm/i915/i915_gem_request.c
index 91eae1b20c42..86e2346357cf 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -624,6 +624,10 @@ i915_gem_request_alloc(struct intel_engine_cs *engine,
if (ret)
goto err_unpin;
 
+   ret = intel_ring_wait_for_space(ring, MIN_SPACE_FOR_ADD_REQUEST);
+   if (ret)
+   goto err_unreserve;
+
/* Move the oldest request to the slab-cache (if not in use!) */
req = list_first_entry_or_null(&engine->timeline->requests,
   typeof(*req), link);
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 00be015e01df..d8952ff8e6b7 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -1726,10 +1726,9 @@ static int gen8_switch_to_updated_kernel_context(struct 
drm_i915_private *dev_pr

[Intel-gfx] [CI 4/9] drm/i915: Remove i915.enable_execlists module parameter

2017-11-18 Thread Chris Wilson

Execlists and legacy ringbuffer submission are no longer feature
comparable (execlists now offer greater functionality that should
overcome their performance hit) and obsoletes the unsafe module
parameter, i.e. comparing the two modes of execution is no longer
useful, so remove the debug tool.

Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Lionel Landwerlin  #i915_perf.c
---
 drivers/gpu/drm/i915/gvt/render.c   |  3 +-
 drivers/gpu/drm/i915/i915_debugfs.c | 70 -
 drivers/gpu/drm/i915/i915_drv.c |  8 +---
 drivers/gpu/drm/i915/i915_drv.h |  3 ++
 drivers/gpu/drm/i915/i915_gem.c | 10 ++---
 drivers/gpu/drm/i915/i915_gem_context.c | 10 +
 drivers/gpu/drm/i915/i915_gem_gtt.c |  4 +-
 drivers/gpu/drm/i915/i915_params.c  |  4 --
 drivers/gpu/drm/i915/i915_params.h  |  1 -
 drivers/gpu/drm/i915/i915_perf.c|  8 ++--
 drivers/gpu/drm/i915/intel_engine_cs.c  |  8 ++--
 drivers/gpu/drm/i915/intel_gvt.c|  5 ---
 drivers/gpu/drm/i915/intel_lrc.c| 31 ---
 drivers/gpu/drm/i915/intel_lrc.h|  4 --
 14 files changed, 20 insertions(+), 149 deletions(-)

diff --git a/drivers/gpu/drm/i915/gvt/render.c 
b/drivers/gpu/drm/i915/gvt/render.c
index 0672178548ef..dac12c25f349 100644
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -294,8 +294,7 @@ static void switch_mmio_to_vgpu(struct intel_vgpu *vgpu, 
int ring_id)
 * write.
 */
if (mmio->in_context &&
-   ((ctx_ctrl & inhibit_mask) != inhibit_mask) &&
-   i915_modparams.enable_execlists)
+   (ctx_ctrl & inhibit_mask) != inhibit_mask)
continue;
 
if (mmio->mask)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index df3852c02a35..5e2a6e18771f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1989,75 +1989,6 @@ static int i915_context_status(struct seq_file *m, void 
*unused)
return 0;
 }
 
-static void i915_dump_lrc_obj(struct seq_file *m,
- struct i915_gem_context *ctx,
- struct intel_engine_cs *engine)
-{
-   struct i915_vma *vma = ctx->engine[engine->id].state;
-   struct page *page;
-   int j;
-
-   seq_printf(m, "CONTEXT: %s %u\n", engine->name, ctx->hw_id);
-
-   if (!vma) {
-   seq_puts(m, "\tFake context\n");
-   return;
-   }
-
-   if (vma->flags & I915_VMA_GLOBAL_BIND)
-   seq_printf(m, "\tBound in GGTT at 0x%08x\n",
-  i915_ggtt_offset(vma));
-
-   if (i915_gem_object_pin_pages(vma->obj)) {
-   seq_puts(m, "\tFailed to get pages for context object\n\n");
-   return;
-   }
-
-   page = i915_gem_object_get_page(vma->obj, LRC_STATE_PN);
-   if (page) {
-   u32 *reg_state = kmap_atomic(page);
-
-   for (j = 0; j < 0x600 / sizeof(u32) / 4; j += 4) {
-   seq_printf(m,
-  "\t[0x%04x] 0x%08x 0x%08x 0x%08x 0x%08x\n",
-  j * 4,
-  reg_state[j], reg_state[j + 1],
-  reg_state[j + 2], reg_state[j + 3]);
-   }
-   kunmap_atomic(reg_state);
-   }
-
-   i915_gem_object_unpin_pages(vma->obj);
-   seq_putc(m, '\n');
-}
-
-static int i915_dump_lrc(struct seq_file *m, void *unused)
-{
-   struct drm_i915_private *dev_priv = node_to_i915(m->private);
-   struct drm_device *dev = &dev_priv->drm;
-   struct intel_engine_cs *engine;
-   struct i915_gem_context *ctx;
-   enum intel_engine_id id;
-   int ret;
-
-   if (!i915_modparams.enable_execlists) {
-   seq_printf(m, "Logical Ring Contexts are disabled\n");
-   return 0;
-   }
-
-   ret = mutex_lock_interruptible(&dev->struct_mutex);
-   if (ret)
-   return ret;
-
-   list_for_each_entry(ctx, &dev_priv->contexts.list, link)
-   for_each_engine(engine, dev_priv, id)
-   i915_dump_lrc_obj(m, ctx, engine);
-
-   mutex_unlock(&dev->struct_mutex);
-
-   return 0;
-}
-
 static const char *swizzle_string(unsigned swizzle)
 {
switch (swizzle) {
@@ -4833,7 +4764,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_vbt", i915_vbt, 0},
{"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
{"i915_context_status", i915_context_status, 0},
-   {"i915_dump_lrc", i915_dump_lrc, 0},
{"i915_forcewake_domains", i915_forcewake_domains, 0},
{"i915_swizzle_info", i915_swizzle_info, 0},
{"i915_ppgtt_info", i915_ppgtt_info, 0},
diff --

[Intel-gfx] [CI 5/9] drm/i915: Remove obsolete ringbuffer emission for gen8+

2017-11-18 Thread Chris Wilson

Since removing the module parameter to force selection of ringbuffer
emission for gen8, the code is defunct. Remove it.

To put the difference into perspective, a couple of microbenchmarks
(bdw i7-5557u, 20170324):
ring  execlists
exec continuous nops on all rings:   1.491us2.223us
exec sequential nops on each ring:  12.508us   53.682us
single nop + sync:   9.272us   30.291us

vblank_mode=0 glxgears:~11000fps   ~9000fps

Since the earlier submission, gen8 ringbuffer submission has fallen
further and further behind in features. So while ringbuffer may hold the
throughput crown, in terms of interactive latency, execlists is much
better. Alas, we have no convenient metrics for such, other than
demonstrating things we can do with execlists but can not using
legacy ringbuffer submission.

We have made a few improvements to lowlevel execlists throughput,
and ringbuffer currently panics on boot! (bdw i7-5557u, 20171026):

ring  execlists
exec continuous nops on all rings:   n/a1.921us
exec sequential nops on each ring:   n/a   44.621us
single nop + sync:   n/a   21.953us

vblank_mode=0 glxgears:  n/a  ~18500fps

References: https://bugs.freedesktop.org/show_bug.cgi?id=87725
Signed-off-by: Chris Wilson 
Once-upon-a-time-Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_debugfs.c |  44 +---
 drivers/gpu/drm/i915/i915_drv.h |   2 -
 drivers/gpu/drm/i915/i915_gem.c |   2 +-
 drivers/gpu/drm/i915/i915_gem_context.c |  47 +---
 drivers/gpu/drm/i915/i915_gpu_error.c   |  36 ---
 drivers/gpu/drm/i915/intel_engine_cs.c  |  14 --
 drivers/gpu/drm/i915/intel_hangcheck.c  |  44 +---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 431 +---
 drivers/gpu/drm/i915/intel_ringbuffer.h |  25 +-
 9 files changed, 94 insertions(+), 551 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5e2a6e18771f..9cef1463d411 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3254,44 +3254,12 @@ static int i915_semaphore_status(struct seq_file *m, 
void *unused)
return ret;
intel_runtime_pm_get(dev_priv);
 
-   if (IS_BROADWELL(dev_priv)) {
-   struct page *page;
-   uint64_t *seqno;
-
-   page = i915_gem_object_get_page(dev_priv->semaphore->obj, 0);
-
-   seqno = (uint64_t *)kmap_atomic(page);
-   for_each_engine(engine, dev_priv, id) {
-   uint64_t offset;
-
-   seq_printf(m, "%s\n", engine->name);
-
-   seq_puts(m, "  Last signal:");
-   for (j = 0; j < num_rings; j++) {
-   offset = id * I915_NUM_ENGINES + j;
-   seq_printf(m, "0x%08llx (0x%02llx) ",
-  seqno[offset], offset * 8);
-   }
-   seq_putc(m, '\n');
-
-   seq_puts(m, "  Last wait:  ");
-   for (j = 0; j < num_rings; j++) {
-   offset = id + (j * I915_NUM_ENGINES);
-   seq_printf(m, "0x%08llx (0x%02llx) ",
-  seqno[offset], offset * 8);
-   }
-   seq_putc(m, '\n');
-
-   }
-   kunmap_atomic(seqno);
-   } else {
-   seq_puts(m, "  Last signal:");
-   for_each_engine(engine, dev_priv, id)
-   for (j = 0; j < num_rings; j++)
-   seq_printf(m, "0x%08x\n",
-  
I915_READ(engine->semaphore.mbox.signal[j]));
-   seq_putc(m, '\n');
-   }
+   seq_puts(m, "  Last signal:");
+   for_each_engine(engine, dev_priv, id)
+   for (j = 0; j < num_rings; j++)
+   seq_printf(m, "0x%08x\n",
+  I915_READ(engine->semaphore.mbox.signal[j]));
+   seq_putc(m, '\n');
 
intel_runtime_pm_put(dev_priv);
mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a21544b62866..953867d9171e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -942,7 +942,6 @@ struct i915_gpu_state {
u64 fence[I915_MAX_NUM_FENCES];
struct intel_overlay_error_state *overlay;
struct intel_display_error_state *display;
-   struct drm_i915_error_object *semaphore;
 
struct drm_i915_error_engine {
int engine_id;
@@ -2291,7 +2290,6 @@ struct drm_i915_private {
st

[Intel-gfx] [CI 8/9] drm/i915: Remove i915.semaphores modparam

2017-11-18 Thread Chris Wilson

Having disabled the broken semaphores on Sandybridge, there is no need
for a modparam any more, so remove it in favour of a simple
HAS_LEGACY_SEMAPHORES() guard.

Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Maarten Lankhorst 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_drv.c |  7 +--
 drivers/gpu/drm/i915/i915_drv.h |  4 ++--
 drivers/gpu/drm/i915/i915_gem.c | 11 ---
 drivers/gpu/drm/i915/i915_gem_context.c |  2 +-
 drivers/gpu/drm/i915/i915_params.c  |  4 
 drivers/gpu/drm/i915/i915_params.h  |  1 -
 drivers/gpu/drm/i915/intel_engine_cs.c  |  2 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |  4 ++--
 8 files changed, 7 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 779a6f0785c7..36fc99324b9d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -321,7 +321,7 @@ static int i915_getparam(struct drm_device *dev, void *data,
value = USES_PPGTT(dev_priv);
break;
case I915_PARAM_HAS_SEMAPHORES:
-   value = i915_modparams.semaphores;
+   value = HAS_LEGACY_SEMAPHORES(dev_priv);
break;
case I915_PARAM_HAS_SECURE_BATCHES:
value = capable(CAP_SYS_ADMIN);
@@ -1066,11 +1066,6 @@ static void intel_sanitize_options(struct 
drm_i915_private *dev_priv)
i915_modparams.enable_ppgtt);
DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915_modparams.enable_ppgtt);
 
-   i915_modparams.semaphores =
-   intel_sanitize_semaphores(dev_priv, i915_modparams.semaphores);
-   DRM_DEBUG_DRIVER("use GPU semaphores? %s\n",
-yesno(i915_modparams.semaphores));
-
intel_uc_sanitize_options(dev_priv);
 
intel_gvt_sanitize_options(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 953867d9171e..24ce5d89e07e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3140,6 +3140,8 @@ intel_info(const struct drm_i915_private *dev_priv)
 #define HAS_BLT(dev_priv)  HAS_ENGINE(dev_priv, BCS)
 #define HAS_VEBOX(dev_priv)HAS_ENGINE(dev_priv, VECS)
 
+#define HAS_LEGACY_SEMAPHORES(dev_priv) IS_GEN7(dev_priv)
+
 #define HAS_LLC(dev_priv)  ((dev_priv)->info.has_llc)
 #define HAS_SNOOP(dev_priv)((dev_priv)->info.has_snoop)
 #define HAS_EDRAM(dev_priv)(!!((dev_priv)->edram_cap & EDRAM_ENABLED))
@@ -3303,8 +3305,6 @@ intel_ggtt_update_needs_vtd_wa(struct drm_i915_private 
*dev_priv)
 int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
int enable_ppgtt);
 
-bool intel_sanitize_semaphores(struct drm_i915_private *dev_priv, int value);
-
 /* i915_drv.c */
 void __printf(3, 4)
 __i915_printk(struct drm_i915_private *dev_priv, const char *level,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index d53bb8e872ba..792e6dc7e19b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4997,17 +4997,6 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
return ret;
 }
 
-bool intel_sanitize_semaphores(struct drm_i915_private *dev_priv, int value)
-{
-   if (!IS_GEN7(dev_priv))
-   return false;
-
-   if (value >= 0)
-   return value;
-
-   return true;
-}
-
 static int __intel_engines_record_defaults(struct drm_i915_private *i915)
 {
struct i915_gem_context *ctx;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 0704d9af261b..6ca56e482d79 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -574,7 +574,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 flags)
enum intel_engine_id id;
const int num_rings =
/* Use an extended w/a on gen7 if signalling from other rings */
-   (i915_modparams.semaphores && IS_GEN7(dev_priv)) ?
+   (HAS_LEGACY_SEMAPHORES(dev_priv) && IS_GEN7(dev_priv)) ?
INTEL_INFO(dev_priv)->num_rings - 1 :
0;
int len;
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index d61c1787c164..3328147b4863 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -46,10 +46,6 @@ i915_param_named_unsafe(panel_ignore_lid, int, 0600,
"Override lid status (0=autodetect, 1=autodetect disabled [default], "
"-1=force lid closed, -2=force lid open)");
 
-i915_param_named_unsafe(semaphores, int, 0400,
-   "Use semaphores for inter-ring sync "
-   "(default: -1 (use per-chip defaults))");
-
 i915_param_named_unsafe(enable_rc6, int, 0400,
"Enable power-saving render C-state 6. "
"Different stages can be selected via bitmask va

[Intel-gfx] [CI 7/9] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

2017-11-18 Thread Chris Wilson

As the semaphores is just part of the engine, include it with the
general pretty printer universally used for debugging.

Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Reviewed-by: Joonas Lahtinen 
---
 drivers/gpu/drm/i915/i915_debugfs.c| 32 
 drivers/gpu/drm/i915/intel_engine_cs.c |  9 +
 2 files changed, 9 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 9cef1463d411..41d49a4d25d3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3235,37 +3235,6 @@ static int i915_shrinker_info(struct seq_file *m, void 
*unused)
return 0;
 }
 
-static int i915_semaphore_status(struct seq_file *m, void *unused)
-{
-   struct drm_i915_private *dev_priv = node_to_i915(m->private);
-   struct drm_device *dev = &dev_priv->drm;
-   struct intel_engine_cs *engine;
-   int num_rings = INTEL_INFO(dev_priv)->num_rings;
-   enum intel_engine_id id;
-   int j, ret;
-
-   if (!i915_modparams.semaphores) {
-   seq_puts(m, "Semaphores are disabled\n");
-   return 0;
-   }
-
-   ret = mutex_lock_interruptible(&dev->struct_mutex);
-   if (ret)
-   return ret;
-   intel_runtime_pm_get(dev_priv);
-
-   seq_puts(m, "  Last signal:");
-   for_each_engine(engine, dev_priv, id)
-   for (j = 0; j < num_rings; j++)
-   seq_printf(m, "0x%08x\n",
-  I915_READ(engine->semaphore.mbox.signal[j]));
-   seq_putc(m, '\n');
-
-   intel_runtime_pm_put(dev_priv);
-   mutex_unlock(&dev->struct_mutex);
-   return 0;
-}
-
 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4745,7 +4714,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_display_info", i915_display_info, 0},
{"i915_engine_info", i915_engine_info, 0},
{"i915_shrinker_info", i915_shrinker_info, 0},
-   {"i915_semaphore_status", i915_semaphore_status, 0},
{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
{"i915_dp_mst_info", i915_dp_mst_info, 0},
{"i915_wa_registers", i915_wa_registers, 0},
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c 
b/drivers/gpu/drm/i915/intel_engine_cs.c
index 1fca7ac3b059..ef8e101ebd98 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1713,6 +1713,15 @@ void intel_engine_dump(struct intel_engine_cs *engine, 
struct drm_printer *m)
   I915_READ(RING_MI_MODE(engine->mmio_base)),
   I915_READ(RING_MI_MODE(engine->mmio_base)) & 
(MODE_IDLE) ? " [idle]" : "");
}
+   if (i915_modparams.semaphores) {
+   drm_printf(m, "\tSYNC_0: 0x%08x\n",
+  I915_READ(RING_SYNC_0(engine->mmio_base)));
+   drm_printf(m, "\tSYNC_1: 0x%08x\n",
+  I915_READ(RING_SYNC_1(engine->mmio_base)));
+   if (HAS_VEBOX(dev_priv))
+   drm_printf(m, "\tSYNC_2: 0x%08x\n",
+  I915_READ(RING_SYNC_2(engine->mmio_base)));
+   }
 
rcu_read_unlock();
 
-- 
2.15.0

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[Intel-gfx] [CI 6/9] drm/i915: Disable semaphores on Sandybridge

2017-11-18 Thread Chris Wilson

I should have admitted defeat long ago as there has been a rare but
persistent error on Sandybridge where semaphore signaling did not
propagate to the waiter, leading to a GPU hang.

With the work on fence signaling for v4.9, the impact of using CPU driven
signaling was greatly reduced wrt to the latency of GPU semaphores,
though without logical rings support, the benefit of reordering work to
avoid bubbles is not realised (i.e. as it stands fence signaling is just
a slower, more costly version of HW semaphores; but works more
consistently). As a rough indicator of the difference,

with semaphores:
Sequential (3 engines, 1 processes): average 5.470us per cycle [expected 
4.988us]
w/o semaphores:
Sequential (3 engines, 1 processes): average 15.771us per cycle [expected 
4.923us]

In comparison, v3.4:
with semaphores:
Sequential (3 engines, 1 processes): average 16.066us per cycle [expected 
11.842us]
w/o semaphores:
Sequential (3 engines, 1 processes): average 23.460us per cycle [expected 
11.839us]

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54226 #and 100+ dupes
Signed-off-by: Chris Wilson 
Cc: Joonas Lahtinen 
Acked-by: Mika Kuoppala 
Reviewed-by: Joonas Lahtinen = 0)
return value;
 
-   /* Enable semaphores on SNB when IO remapping is off */
-   if (IS_GEN6(dev_priv) && intel_vtd_active())
-   return false;
-
return true;
 }
 
-- 
2.15.0

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[Intel-gfx] [CI 9/9] drm/i915: Unwind incomplete legacy context switches

2017-11-18 Thread Chris Wilson

The legacy context switch for ringbuffer submission is multistaged,
where each of those stages may fail. However, we were updating global
state after some stages, and so we had to force the incomplete request
to be submitted because we could not unwind. Save the global state
before performing the switches, and so enable us to unwind back to the
previous global state should any phase fail. We then must cancel the
request instead of submitting it should the construction fail.

Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
---
 drivers/gpu/drm/i915/i915_gem_context.c | 168 ++--
 drivers/gpu/drm/i915/i915_gem_request.c |  18 ++--
 drivers/gpu/drm/i915/intel_ringbuffer.c |   1 +
 drivers/gpu/drm/i915/intel_ringbuffer.h |   1 +
 4 files changed, 62 insertions(+), 126 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 6ca56e482d79..f63bec08cc85 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -507,6 +507,7 @@ void i915_gem_contexts_lost(struct drm_i915_private 
*dev_priv)
 
for_each_engine(engine, dev_priv, id) {
engine->legacy_active_context = NULL;
+   engine->legacy_active_ppgtt = NULL;
 
if (!engine->last_retired_context)
continue;
@@ -681,68 +682,48 @@ static int remap_l3(struct drm_i915_gem_request *req, int 
slice)
return 0;
 }
 
-static inline bool skip_rcs_switch(struct i915_hw_ppgtt *ppgtt,
-  struct intel_engine_cs *engine,
-  struct i915_gem_context *to)
-{
-   if (to->remap_slice)
-   return false;
-
-   if (ppgtt && (intel_engine_flag(engine) & ppgtt->pd_dirty_rings))
-   return false;
-
-   return to == engine->legacy_active_context;
-}
-
-static bool
-needs_pd_load_pre(struct i915_hw_ppgtt *ppgtt, struct intel_engine_cs *engine)
-{
-   struct i915_gem_context *from = engine->legacy_active_context;
-
-   if (!ppgtt)
-   return false;
-
-   /* Always load the ppgtt on first use */
-   if (!from)
-   return true;
-
-   /* Same context without new entries, skip */
-   if ((!from->ppgtt || from->ppgtt == ppgtt) &&
-   !(intel_engine_flag(engine) & ppgtt->pd_dirty_rings))
-   return false;
-
-   if (engine->id != RCS)
-   return true;
-
-   return true;
-}
-
-static int do_rcs_switch(struct drm_i915_gem_request *req)
+/**
+ * i915_switch_context() - perform a GPU context switch.
+ * @rq: request for which we'll execute the context switch
+ *
+ * The context life cycle is simple. The context refcount is incremented and
+ * decremented by 1 and create and destroy. If the context is in use by the 
GPU,
+ * it will have a refcount > 1. This allows us to destroy the context abstract
+ * object while letting the normal object tracking destroy the backing BO.
+ *
+ * This function should not be used in execlists mode.  Instead the context is
+ * switched by writing to the ELSP and requests keep a reference to their
+ * context.
+ */
+int i915_switch_context(struct drm_i915_gem_request *rq)
 {
-   struct i915_gem_context *to = req->ctx;
-   struct intel_engine_cs *engine = req->engine;
-   struct i915_hw_ppgtt *ppgtt = to->ppgtt ?: req->i915->mm.aliasing_ppgtt;
-   struct i915_gem_context *from = engine->legacy_active_context;
-   u32 hw_flags;
+   struct intel_engine_cs *engine = rq->engine;
+   struct i915_gem_context *to = rq->ctx;
+   struct i915_hw_ppgtt *ppgtt = to->ppgtt ?: rq->i915->mm.aliasing_ppgtt;
+   struct i915_gem_context *saved_ctx = engine->legacy_active_context;
+   struct i915_hw_ppgtt *saved_mm = engine->legacy_active_ppgtt;
+   u32 hw_flags = 0;
int ret, i;
 
-   GEM_BUG_ON(engine->id != RCS);
-
-   if (skip_rcs_switch(ppgtt, engine, to))
-   return 0;
+   lockdep_assert_held(&rq->i915->drm.struct_mutex);
+   GEM_BUG_ON(HAS_EXECLISTS(rq->i915));
 
-   if (needs_pd_load_pre(ppgtt, engine)) {
-   /* Older GENs and non render rings still want the load first,
-* "PP_DCLV followed by PP_DIR_BASE register through Load
-* Register Immediate commands in Ring Buffer before submitting
-* a context."*/
+   if (ppgtt != saved_mm ||
+   (ppgtt && intel_engine_flag(engine) & ppgtt->pd_dirty_rings)) {
trace_switch_mm(engine, to);
-   ret = ppgtt->switch_mm(ppgtt, req);
+   ret = ppgtt->switch_mm(ppgtt, rq);
if (ret)
-   return ret;
+   goto err;
+
+   ppgtt->pd_dirty_rings &= ~intel_engine_flag(engine);
+   engine->legacy_active_ppgtt = ppgtt;
+   hw_flags = MI_FORCE_RESTORE;
}
 
-   if (i915_gem_co

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE (rev3)

2017-11-18 Thread Patchwork

== Series Details ==

Series: drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE 
(rev3)
URL   : https://patchwork.freedesktop.org/series/34044/
State : failure

== Summary ==

Series 34044v3 drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE
https://patchwork.freedesktop.org/api/1.0/series/34044/revisions/3/mbox/

Test gem_exec_reloc:
Subgroup basic-gtt:
pass   -> INCOMPLETE (fi-byt-j1900)
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
incomplete -> PASS   (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:446s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:382s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:539s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:503s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:510s
fi-byt-j1900 total:82   pass:63   dwarn:0   dfail:0   fail:0   skip:18 
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:484s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:266s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:434s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:437s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:476s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:487s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:531s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:481s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:532s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:576s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:459s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:544s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:562s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:499s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:468s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:557s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:419s
Blacklisted hosts:
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:601s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:496s
fi-cnl-y failed to collect. IGT log at Patchwork_7186/fi-cnl-y/igt.log

b4da24717364bc69bb981a1536be64413a582f3a drm-tip: 2017y-11m-17d-22h-46m-53s UTC 
integration manifest
33b997a9e6b0 drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7186/
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34057/
State : success

== Summary ==

Series 34057v1 series starting with [CI,1/3] drm/i915/execlists: Listen to 
COMPLETE context event not ACTIVE_IDLE
https://patchwork.freedesktop.org/api/1.0/series/34057/revisions/1/mbox/

Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
incomplete -> PASS   (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:445s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:456s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:379s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:533s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:509s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:502s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:502s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:492s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:266s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:538s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:438s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:427s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:489s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:459s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:532s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:479s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:538s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:569s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:464s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:551s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:569s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:525s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:495s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:464s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:558s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:417s
Blacklisted hosts:
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:607s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:498s

b4da24717364bc69bb981a1536be64413a582f3a drm-tip: 2017y-11m-17d-22h-46m-53s UTC 
integration manifest
394b5f78993b drm/i915: Automatic i915_switch_context for legacy
ca77ee55afcc drm/i915: Pull the unconditional GPU cache invalidation into 
request construction
556e8b22fbe2 drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7187/
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34058/
State : success

== Summary ==

Series 34058v1 series starting with [CI,1/9] drm/i915/execlists: Listen to 
COMPLETE context event not ACTIVE_IDLE
https://patchwork.freedesktop.org/api/1.0/series/34058/revisions/1/mbox/

Test chamelium:
Subgroup dp-crc-fast:
pass   -> FAIL   (fi-kbl-7500u) fdo#103163
Test kms_pipe_crc_basic:
Subgroup suspend-read-crc-pipe-b:
incomplete -> PASS   (fi-snb-2520m) fdo#103713

fdo#103163 https://bugs.freedesktop.org/show_bug.cgi?id=103163
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:444s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:467s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:389s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:541s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:277s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:504s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:511s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:499s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:488s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:264s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:544s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:429s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:439s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:430s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:476s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:462s
fi-kbl-7500u total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  
time:475s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:535s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:478s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:538s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:572s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:451s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:547s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:565s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:503s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:467s
fi-snb-2520m total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:559s
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:421s
Blacklisted hosts:
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:618s
fi-cnl-y total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:562s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:496s

b4da24717364bc69bb981a1536be64413a582f3a drm-tip: 2017y-11m-17d-22h-46m-53s UTC 
integration manifest
5851f7eaa912 drm/i915: Unwind incomplete legacy context switches
80c3754e2f17 drm/i915: Remove i915.semaphores modparam
560390361a3c drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info
f519995115fa drm/i915: Disable semaphores on Sandybridge
bd677f957c11 drm/i915: Remove obsolete ringbuffer emission for gen8+
214970dc002e drm/i915: Remove i915.enable_execlists module parameter
87ec5ebd112f drm/i915: Automatic i915_switch_context for legacy
b03b4d55d4e7 drm/i915: Pull the unconditional GPU cache invalidation into 
request construction
3f1f271f4312 drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7188/
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Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Quoting Chris Wilson (2017-11-18 01:05:24)
> Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
> Author: Oscar Mateo 
> Date:   Thu Jul 24 17:04:40 2014 +0100
> 
> drm/i915/bdw: Avoid non-lite-restore preemptions
> 
> execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
> when one context completed and it either continued onto the next (in port
> 1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
> context-switch event, but on recent gen it appears that we now get
> separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
> events may not be coupled to a context (since it is a general state rather
> than a specific context completion event).
> 
> v2: Update the history, execlists did originally start out by listening
> to the COMPLETE event not ACTIVE_IDLE.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=103800

> References: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Scrap that, the difference was kasan masking the race.
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34057/
State : success

== Summary ==

Test perf:
Subgroup polling:
pass   -> FAIL   (shard-hsw) fdo#102252
Test kms_flip:
Subgroup wf_vblank-vs-modeset-interruptible:
dmesg-warn -> PASS   (shard-hsw) fdo#102614

fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614

shard-hswtotal:2567 pass:1456 dwarn:1   dfail:0   fail:10  skip:1099 
time:9378s
shard-snbtotal:2567 pass:1242 dwarn:1   dfail:0   fail:12  skip:1311 
time:7899s
Blacklisted hosts:
shard-apltotal:2565 pass:1604 dwarn:1   dfail:0   fail:22  skip:936 
time:13093s
shard-kbltotal:2565 pass:1701 dwarn:6   dfail:0   fail:25  skip:832 
time:10684s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7187/shards.html
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[Intel-gfx] [PATCH v3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.
v3: Update preempt completion test to also use COMPLETE not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..c2cfdfdc0722 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
@@ -876,7 +876,7 @@ static void execlists_submission_tasklet(unsigned long data)
if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
continue;
 
-   if (status & GEN8_CTX_STATUS_ACTIVE_IDLE &&
+   if (status & GEN8_CTX_STATUS_COMPLETE &&
buf[2*head + 1] == PREEMPT_ID) {
execlists_cancel_port_requests(execlists);
execlists_unwind_incomplete_requests(execlists);
-- 
2.15.0

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[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34058/
State : warning

== Summary ==

Test gem_eio:
Subgroup in-flight-internal:
skip   -> PASS   (shard-snb)
Test kms_flip:
Subgroup wf_vblank-vs-modeset-interruptible:
dmesg-warn -> PASS   (shard-hsw) fdo#102614
Test gem_busy:
Subgroup extended-semaphore-render:
pass   -> SKIP   (shard-snb)
Subgroup extended-semaphore-blt:
pass   -> SKIP   (shard-snb)
Subgroup extended-semaphore-bsd:
pass   -> SKIP   (shard-snb)
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test kms_plane:
Subgroup plane-panning-bottom-right-suspend-pipe-b-planes:
pass   -> SKIP   (shard-snb)
pass   -> SKIP   (shard-hsw)
Test kms_cursor_legacy:
Subgroup long-nonblocking-modeset-vs-cursor-atomic:
pass   -> SKIP   (shard-snb)
pass   -> SKIP   (shard-hsw) fdo#103181

fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103181 https://bugs.freedesktop.org/show_bug.cgi?id=103181

shard-hswtotal:2567 pass:1454 dwarn:1   dfail:0   fail:10  skip:1101 
time:9349s
shard-snbtotal:2567 pass:1238 dwarn:1   dfail:0   fail:12  skip:1315 
time:7853s
Blacklisted hosts:
shard-apltotal:2492 pass:1558 dwarn:1   dfail:0   fail:23  skip:909 
time:12656s
shard-kbltotal:2534 pass:1678 dwarn:4   dfail:1   fail:25  skip:824 
time:10147s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7188/shards.html
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[Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

2017-11-18 Thread Chris Wilson

The hardware needs some time to process the information received in the
ExecList Submission Port, and expects us to don't write anything new until
it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or
PREEMPTED CSB event.

If we do not follow this, the driver could write new data into the ELSP
before HW had finishing fetching the previous one, putting us in
'undefined behaviour' space.

This seems to be the problem causing the spurious PREEMPTED & COMPLETE
events after a COMPLETE like the one below:

[] vcs0: sw rd pointer = 2, hw wr pointer = 0, current 'head' = 3.
[] vcs0:  Execlist CSB[0]: 0x0018 _ 0x0007
[] vcs0:  Execlist CSB[1]: 0x0001 _ 0x
[] vcs0:  Execlist CSB[2]: 0x0018 _ 0x0007  <<< COMPLETE
[] vcs0:  Execlist CSB[3]: 0x0012 _ 0x0007  <<< PREEMPTED & COMPLETE
[] vcs0:  Execlist CSB[4]: 0x8002 _ 0x0006
[] vcs0:  Execlist CSB[5]: 0x0014 _ 0x0006

The ELSP writes that lead to this CSB sequence show that the HW hadn't
started executing the previous execlist (the one with only ctx 0x6) by the
time the new one was submitted; this is a bit more clear in the data
show in the EXECLIST_STATUS register at the time of the ELSP write.

[] vcs0: ELSP[0] = 0x0_0[execlist1] - status_reg = 0x0_302
[] vcs0: ELSP[1] = 0x6_fedb2119 [execlist0] - status_reg = 0x0_8302

[] vcs0: ELSP[2] = 0x7_fedaf119 [execlist1] - status_reg = 0x0_8308
[] vcs0: ELSP[3] = 0x6_fedb2119 [execlist0] - status_reg = 0x7_8308

Note that having to wait for this ack does not disable lite-restores,
although it may reduce their numbers.

v2: Rewrote Michel's patch, his digging and his fix, my spelling.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Suggested-by: Michel Thierry 
Signed-off-by: Chris Wilson 
Cc: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c| 25 +++--
 drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c2cfdfdc0722..2694bc40f0fe 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -479,6 +479,7 @@ static void execlists_submit_ports(struct intel_engine_cs 
*engine)
 
elsp_write(desc, elsp);
}
+   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
 }
 
 static bool ctx_single_port_submission(const struct i915_gem_context *ctx)
@@ -531,6 +532,7 @@ static void inject_preempt_context(struct intel_engine_cs 
*engine)
elsp_write(0, elsp);
 
elsp_write(ce->lrc_desc, elsp);
+   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
 }
 
 static void execlists_dequeue(struct intel_engine_cs *engine)
@@ -577,9 +579,20 @@ static void execlists_dequeue(struct intel_engine_cs 
*engine)
 * know the next preemption status we see corresponds
 * to this ELSP update.
 */
+   GEM_BUG_ON(!port_count(&port[0]));
if (port_count(&port[0]) > 1)
goto unlock;
 
+   /*
+* If we write to ELSP a second time before the HW has had
+* a chance to respond to the previous write, we can confuse
+* the HW and hit "undefined behaviour". After writing to ELSP,
+* we must then wait until we see a context-switch event from
+* the HW to indicate that it has had a chance to respond.
+*/
+   if (!execlists_is_active(execlists, EXECLISTS_ACTIVE_HWACK))
+   goto unlock;
+
if (HAS_LOGICAL_RING_PREEMPTION(engine->i915) &&
rb_entry(rb, struct i915_priolist, node)->priority >
max(last->priotree.priority, 0)) {
@@ -876,6 +889,15 @@ static void execlists_submission_tasklet(unsigned long 
data)
if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
continue;
 
+   /*
+* Note that we could acknowledge the first IDLE_ACTIVE
+* event as the HW having processed the first ELSP
+* write, we just choose not to for simplicity. Once
+* a flow is established, lite-restore events provide
+* us with the acks we need.
+*/
+   execlists_set_active(execlists, EXECLISTS_ACTIVE_HWACK);
+
if (status & GEN8_CTX_STATUS_COMPLETE &&
buf[2*head + 1] == PREEMPT_ID) {
execlists_cancel_port_requests(execlists);
@@ -922,8 +944,7 @@ static void execlists_submission_tasklet(unsigned long data)
GEM_BUG_ON(port_count(port) == 0 &&
   !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.
v3: Update preempt completion test to also use COMPLETE not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..c2cfdfdc0722 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
@@ -876,7 +876,7 @@ static void execlists_submission_tasklet(unsigned long data)
if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
continue;
 
-   if (status & GEN8_CTX_STATUS_ACTIVE_IDLE &&
+   if (status & GEN8_CTX_STATUS_COMPLETE &&
buf[2*head + 1] == PREEMPT_ID) {
execlists_cancel_port_requests(execlists);
execlists_unwind_incomplete_requests(execlists);
-- 
2.15.0

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [1/2] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34061/
State : success

== Summary ==

Series 34061v1 series starting with [1/2] drm/i915/execlists: Listen to 
COMPLETE context event not ACTIVE_IDLE
https://patchwork.freedesktop.org/api/1.0/series/34061/revisions/1/mbox/

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:445s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:458s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:386s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:535s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:278s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:510s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:505s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:492s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:263s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:430s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:437s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:427s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:478s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:467s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:485s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:533s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:468s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:529s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:572s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:458s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:548s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:562s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:501s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:460s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:420s
Blacklisted hosts:
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:604s
fi-glk-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:504s

b4da24717364bc69bb981a1536be64413a582f3a drm-tip: 2017y-11m-17d-22h-46m-53s UTC 
integration manifest
f96f97caa77b drm/i915/execlists: Delay writing to ELSP until HW has processed 
the previous write
56e6c3b0eacc drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7189/
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [1/2] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34061/
State : success

== Summary ==

Test kms_flip:
Subgroup dpms-vs-vblank-race:
pass   -> FAIL   (shard-hsw) fdo#103060
Subgroup wf_vblank-vs-modeset-interruptible:
dmesg-warn -> PASS   (shard-hsw) fdo#102614
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-render:
fail   -> PASS   (shard-snb) fdo#101623
Test kms_setmode:
Subgroup basic:
pass   -> FAIL   (shard-hsw) fdo#99912
Test drv_selftest:
Subgroup mock_sanitycheck:
pass   -> DMESG-WARN (shard-snb) fdo#103717

fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717

shard-hswtotal:2585 pass:1473 dwarn:1   dfail:1   fail:11  skip:1099 
time:9503s
shard-snbtotal:2567 pass:1242 dwarn:2   dfail:0   fail:11  skip:1311 
time:7872s
Blacklisted hosts:
shard-apltotal:2479 pass:1536 dwarn:1   dfail:0   fail:37  skip:900 
time:12255s
shard-kbltotal:2340 pass:1530 dwarn:7   dfail:1   fail:45  skip:749 
time:8895s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7189/shards.html
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Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

2017-11-18 Thread Alex Williamson


Kirti?

On Wed, 15 Nov 2017 21:11:42 -0700
Alex Williamson  wrote:

> On Thu, 16 Nov 2017 11:21:56 +0800
> Zhenyu Wang  wrote:
> 
> > On 2017.11.15 11:48:42 -0700, Alex Williamson wrote:  
> > > On Wed, 15 Nov 2017 17:11:54 +0800
> > > Tina Zhang  wrote:
> > > 
> > > > Add VFIO_DEVICE_QUERY_GFX_PLANE ioctl command to let user query and get
> > > > a plane and its information. So far, two types of buffers are supported:
> > > > buffers based on dma-buf and buffers based on region.
> > > > 
> > > > This ioctl can be invoked with:
> > > > 1) Either DMABUF or REGION flag. Vendor driver returns a plane_info
> > > > successfully only when the specific kind of buffer is supported.
> > > > 2) Flag PROBE. And at the same time either DMABUF or REGION must be set,
> > > > so that vendor driver returns success only when the specific kind of
> > > > buffer is supported.
> > > > 
> > > > Add VFIO_DEVICE_GET_GFX_DMABUF ioctl command to let user get a specific
> > > > dma-buf fd of an exposed MDEV buffer provided by dmabuf_id which was
> > > > returned in VFIO_DEVICE_QUERY_GFX_PLANE ioctl command.
> > > > 
> > > > The life cycle of an exposed MDEV buffer is handled by userspace and
> > > > tracked by kernel space. The returned dmabuf_id in struct vfio_device_
> > > > query_gfx_plane can be a new id of a new exposed buffer or an old id of
> > > > a re-exported buffer. Host user can check the value of dmabuf_id to see
> > > > if it needs to create new resources according to the new exposed buffer
> > > > or just re-use the existing resource related to the old buffer.
> > > > 
> > > > v18:
> > > > - update comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
> > > > 
> > > > v17:
> > > > - modify VFIO_DEVICE_GET_GFX_DMABUF interface. (Alex)
> > > > 
> > > > v16:
> > > > - add x_hot and y_hot fields. (Gerd)
> > > > - add comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
> > > > - rebase to 4.14.0-rc6.
> > > > 
> > > > v15:
> > > > - add a ioctl to get a dmabuf for a given dmabuf id. (Gerd)
> > > > 
> > > > v14:
> > > > - add PROBE, DMABUF and REGION flags. (Alex)
> > > > 
> > > > v12:
> > > > - add drm_format_mod back. (Gerd and Zhenyu)
> > > > - add region_index. (Gerd)
> > > > 
> > > > v11:
> > > > - rename plane_type to drm_plane_type. (Gerd)
> > > > - move fields of vfio_device_query_gfx_plane to 
> > > > vfio_device_gfx_plane_info.
> > > >   (Gerd)
> > > > - remove drm_format_mod, start fields. (Daniel)
> > > > - remove plane_id.
> > > > 
> > > > v10:
> > > > - refine the ABI API VFIO_DEVICE_QUERY_GFX_PLANE. (Alex) (Gerd)
> > > > 
> > > > v3:
> > > > - add a field gvt_plane_info in the drm_i915_gem_obj structure to save
> > > >   the decoded plane information to avoid look up while need the plane
> > > >   info. (Gerd)
> > > > 
> > > > Signed-off-by: Tina Zhang 
> > > > Cc: Gerd Hoffmann 
> > > > Cc: Alex Williamson 
> > > > Cc: Daniel Vetter 
> > > > ---
> > > >  include/uapi/linux/vfio.h | 62 
> > > > +++
> > > >  1 file changed, 62 insertions(+)
> > > > 
> > > > diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> > > > index ae46105..5c1cca2 100644
> > > > --- a/include/uapi/linux/vfio.h
> > > > +++ b/include/uapi/linux/vfio.h
> > > > @@ -502,6 +502,68 @@ struct vfio_pci_hot_reset {
> > > >  
> > > >  #define VFIO_DEVICE_PCI_HOT_RESET  _IO(VFIO_TYPE, VFIO_BASE + 13)
> > > >  
> > > > +/**
> > > > + * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14,
> > > > + *struct 
> > > > vfio_device_query_gfx_plane)
> > > > + *
> > > > + * Set the drm_plane_type and flags, then retrieve the gfx plane info.
> > > > + *
> > > > + * flags supported:
> > > > + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set
> > > > + *   to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no
> > > > + *   support for dma-buf.
> > > > + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set
> > > > + *   to ask if the mdev supports region. 0 on support, -EINVAL on no
> > > > + *   support for region.
> > > > + * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set
> > > > + *   with each call to query the plane info.
> > > > + * - Others are invalid and return -EINVAL.
> > > > + *
> > > > + * Note:
> > > > + * 1. Plane could be disabled by guest. In that case, success will be
> > > > + *returned with zero-initialized drm_format, size, width and height
> > > > + *fields.
> > > > + * 2. x_hot/y_hot is set to 0x if no hotspot information 
> > > > available
> > > > + *
> > > > + * Return: 0 on success, -errno on other failure.
> > > > + */
> > > > +struct vfio_device_gfx_plane_info {
> > > > +   __u32 argsz;
> > > > +   __u32 flags;
> > > > +#define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0)
> > > > +#define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1)
> > > > +#define VFIO_GFX_PLANE_TYPE_REGION (1 << 2)
> > > > +   /* in */
> > > > +   __u32 drm_plane_type;   /* type of pla

Re: [Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

2017-11-18 Thread Chris Wilson

Quoting Chris Wilson (2017-11-18 11:25:32)
> The hardware needs some time to process the information received in the
> ExecList Submission Port, and expects us to don't write anything new until
> it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or
> PREEMPTED CSB event.
> 
> If we do not follow this, the driver could write new data into the ELSP
> before HW had finishing fetching the previous one, putting us in
> 'undefined behaviour' space.
> 
> This seems to be the problem causing the spurious PREEMPTED & COMPLETE
> events after a COMPLETE like the one below:
> 
> [] vcs0: sw rd pointer = 2, hw wr pointer = 0, current 'head' = 3.
> [] vcs0:  Execlist CSB[0]: 0x0018 _ 0x0007
> [] vcs0:  Execlist CSB[1]: 0x0001 _ 0x
> [] vcs0:  Execlist CSB[2]: 0x0018 _ 0x0007  <<< COMPLETE
> [] vcs0:  Execlist CSB[3]: 0x0012 _ 0x0007  <<< PREEMPTED & COMPLETE
> [] vcs0:  Execlist CSB[4]: 0x8002 _ 0x0006
> [] vcs0:  Execlist CSB[5]: 0x0014 _ 0x0006
> 
> The ELSP writes that lead to this CSB sequence show that the HW hadn't
> started executing the previous execlist (the one with only ctx 0x6) by the
> time the new one was submitted; this is a bit more clear in the data
> show in the EXECLIST_STATUS register at the time of the ELSP write.
> 
> [] vcs0: ELSP[0] = 0x0_0[execlist1] - status_reg = 0x0_302
> [] vcs0: ELSP[1] = 0x6_fedb2119 [execlist0] - status_reg = 0x0_8302
> 
> [] vcs0: ELSP[2] = 0x7_fedaf119 [execlist1] - status_reg = 0x0_8308
> [] vcs0: ELSP[3] = 0x6_fedb2119 [execlist0] - status_reg = 0x7_8308
> 
> Note that having to wait for this ack does not disable lite-restores,
> although it may reduce their numbers.
> 
> v2: Rewrote Michel's patch, his digging and his fix, my spelling.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102035
> Suggested-by: Michel Thierry 
> Signed-off-by: Chris Wilson 
> Cc: Michel Thierry 
> ---
>  drivers/gpu/drm/i915/intel_lrc.c| 25 +++--
>  drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
>  2 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
> b/drivers/gpu/drm/i915/intel_lrc.c
> index c2cfdfdc0722..2694bc40f0fe 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -479,6 +479,7 @@ static void execlists_submit_ports(struct intel_engine_cs 
> *engine)
>  
> elsp_write(desc, elsp);
> }
> +   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
>  }
>  
>  static bool ctx_single_port_submission(const struct i915_gem_context *ctx)
> @@ -531,6 +532,7 @@ static void inject_preempt_context(struct intel_engine_cs 
> *engine)
> elsp_write(0, elsp);
>  
> elsp_write(ce->lrc_desc, elsp);
> +   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
>  }
>  
>  static void execlists_dequeue(struct intel_engine_cs *engine)
> @@ -577,9 +579,20 @@ static void execlists_dequeue(struct intel_engine_cs 
> *engine)
>  * know the next preemption status we see corresponds
>  * to this ELSP update.
>  */
> +   GEM_BUG_ON(!port_count(&port[0]));
> if (port_count(&port[0]) > 1)
> goto unlock;
>  
> +   /*
> +* If we write to ELSP a second time before the HW has had
> +* a chance to respond to the previous write, we can confuse
> +* the HW and hit "undefined behaviour". After writing to 
> ELSP,
> +* we must then wait until we see a context-switch event from
> +* the HW to indicate that it has had a chance to respond.
> +*/
> +   if (!execlists_is_active(execlists, EXECLISTS_ACTIVE_HWACK))
> +   goto unlock;
> +
> if (HAS_LOGICAL_RING_PREEMPTION(engine->i915) &&
> rb_entry(rb, struct i915_priolist, node)->priority >
> max(last->priotree.priority, 0)) {
> @@ -876,6 +889,15 @@ static void execlists_submission_tasklet(unsigned long 
> data)
> if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
> continue;
>  
> +   /*
> +* Note that we could acknowledge the first 
> IDLE_ACTIVE
> +* event as the HW having processed the first ELSP
> +* write, we just choose not to for simplicity. Once
> +* a flow is established, lite-restore events provide
> +* us with the acks we need.
> +*/
> +   execlists_set_active(execlists, 
> EXECLISTS_ACTIVE_HWACK);

On second thought, and thankfully we already have tests to demonstrate
this, we do need to respond to IDLE_ACTIVE to allow preemption on the
first submit.

As to the

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Chris Wilson

Since commit e1fee72c2ea2e9c0c6e6743d32a6832f21337d6c
Author: Oscar Mateo 
Date:   Thu Jul 24 17:04:40 2014 +0100

drm/i915/bdw: Avoid non-lite-restore preemptions

execlists has listened to (ACTIVE_IDLE | ELEMENT_SWITCH) for detecting
when one context completed and it either continued onto the next (in port
1) or idled. We would always see COMPLETE | ACTIVE_IDLE on the final
context-switch event, but on recent gen it appears that we now get
separate ACTIVE_IDLE and COMPLETE events. In particular, the ACTIVE_IDLE
events may not be coupled to a context (since it is a general state rather
than a specific context completion event).

v2: Update the history, execlists did originally start out by listening
to the COMPLETE event not ACTIVE_IDLE.
v3: Update preempt completion test to also use COMPLETE not ACTIVE_IDLE.

References: https://bugs.freedesktop.org/show_bug.cgi?id=103800
Signed-off-by: Chris Wilson 
Cc: Mika Kuoppala 
Cc: Tvrtko Ursulin 
Cc: Joonas Lahtinen 
Cc: Michal Winiarski 
Cc: Michel Thierry 
Acked-by: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index be6c39adebdf..c2cfdfdc0722 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -154,7 +154,7 @@
 #define GEN8_CTX_STATUS_LITE_RESTORE   (1 << 15)
 
 #define GEN8_CTX_STATUS_COMPLETED_MASK \
-(GEN8_CTX_STATUS_ACTIVE_IDLE | \
+(GEN8_CTX_STATUS_COMPLETE | \
  GEN8_CTX_STATUS_PREEMPTED | \
  GEN8_CTX_STATUS_ELEMENT_SWITCH)
 
@@ -876,7 +876,7 @@ static void execlists_submission_tasklet(unsigned long data)
if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
continue;
 
-   if (status & GEN8_CTX_STATUS_ACTIVE_IDLE &&
+   if (status & GEN8_CTX_STATUS_COMPLETE &&
buf[2*head + 1] == PREEMPT_ID) {
execlists_cancel_port_requests(execlists);
execlists_unwind_incomplete_requests(execlists);
-- 
2.15.0

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[Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

2017-11-18 Thread Chris Wilson

The hardware needs some time to process the information received in the
ExecList Submission Port, and expects us to don't write anything new until
it has 'acknowledged' this new execlist by sending an IDLE_ACTIVE or
PREEMPTED CSB event.

If we do not follow this, the driver could write new data into the ELSP
before HW had finishing fetching the previous one, putting us in
'undefined behaviour' space.

This seems to be the problem causing the spurious PREEMPTED & COMPLETE
events after a COMPLETE like the one below:

[] vcs0: sw rd pointer = 2, hw wr pointer = 0, current 'head' = 3.
[] vcs0:  Execlist CSB[0]: 0x0018 _ 0x0007
[] vcs0:  Execlist CSB[1]: 0x0001 _ 0x
[] vcs0:  Execlist CSB[2]: 0x0018 _ 0x0007  <<< COMPLETE
[] vcs0:  Execlist CSB[3]: 0x0012 _ 0x0007  <<< PREEMPTED & COMPLETE
[] vcs0:  Execlist CSB[4]: 0x8002 _ 0x0006
[] vcs0:  Execlist CSB[5]: 0x0014 _ 0x0006

The ELSP writes that lead to this CSB sequence show that the HW hadn't
started executing the previous execlist (the one with only ctx 0x6) by the
time the new one was submitted; this is a bit more clear in the data
show in the EXECLIST_STATUS register at the time of the ELSP write.

[] vcs0: ELSP[0] = 0x0_0[execlist1] - status_reg = 0x0_302
[] vcs0: ELSP[1] = 0x6_fedb2119 [execlist0] - status_reg = 0x0_8302

[] vcs0: ELSP[2] = 0x7_fedaf119 [execlist1] - status_reg = 0x0_8308
[] vcs0: ELSP[3] = 0x6_fedb2119 [execlist0] - status_reg = 0x7_8308

Note that having to wait for this ack does not disable lite-restores,
although it may reduce their numbers.

v2: Rewrote Michel's patch, his digging and his fix, my spelling.
v3: Reorder to ack early to allow preemption

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102035
Suggested-by: Michel Thierry 
Signed-off-by: Chris Wilson 
Cc: Michel Thierry 
---
 drivers/gpu/drm/i915/intel_lrc.c| 22 ++
 drivers/gpu/drm/i915/intel_ringbuffer.h |  1 +
 2 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c2cfdfdc0722..6191a2e59e8a 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -479,6 +479,7 @@ static void execlists_submit_ports(struct intel_engine_cs 
*engine)
 
elsp_write(desc, elsp);
}
+   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
 }
 
 static bool ctx_single_port_submission(const struct i915_gem_context *ctx)
@@ -531,6 +532,7 @@ static void inject_preempt_context(struct intel_engine_cs 
*engine)
elsp_write(0, elsp);
 
elsp_write(ce->lrc_desc, elsp);
+   execlists_clear_active(&engine->execlists, EXECLISTS_ACTIVE_HWACK);
 }
 
 static void execlists_dequeue(struct intel_engine_cs *engine)
@@ -577,9 +579,20 @@ static void execlists_dequeue(struct intel_engine_cs 
*engine)
 * know the next preemption status we see corresponds
 * to this ELSP update.
 */
+   GEM_BUG_ON(!port_count(&port[0]));
if (port_count(&port[0]) > 1)
goto unlock;
 
+   /*
+* If we write to ELSP a second time before the HW has had
+* a chance to respond to the previous write, we can confuse
+* the HW and hit "undefined behaviour". After writing to ELSP,
+* we must then wait until we see a context-switch event from
+* the HW to indicate that it has had a chance to respond.
+*/
+   if (!execlists_is_active(execlists, EXECLISTS_ACTIVE_HWACK))
+   goto unlock;
+
if (HAS_LOGICAL_RING_PREEMPTION(engine->i915) &&
rb_entry(rb, struct i915_priolist, node)->priority >
max(last->priotree.priority, 0)) {
@@ -873,6 +886,15 @@ static void execlists_submission_tasklet(unsigned long 
data)
GEM_TRACE("%s csb[%dd]: status=0x%08x:0x%08x\n",
  engine->name, head,
  status, buf[2*head + 1]);
+
+   if (status & (GEN8_CTX_STATUS_IDLE_ACTIVE |
+ GEN8_CTX_STATUS_PREEMPTED))
+   execlists_set_active(execlists,
+EXECLISTS_ACTIVE_HWACK);
+   if (status & GEN8_CTX_STATUS_ACTIVE_IDLE)
+   execlists_clear_active(execlists,
+  EXECLISTS_ACTIVE_HWACK);
+
if (!(status & GEN8_CTX_STATUS_COMPLETED_MASK))
continue;
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h 
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index f867aa6c31fc..add7a30c1a61 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringb

Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

2017-11-18 Thread Kirti Wankhede

Extremely sorry for the delay.
This works for VFIO_GFX_PLANE_TYPE_REGION. Tested with local changes.

Reviewed-by: Kirti Wankhede 

Thanks,
Kirti

On 11/18/2017 9:00 PM, Alex Williamson wrote:
> 
> Kirti?
> 
> On Wed, 15 Nov 2017 21:11:42 -0700
> Alex Williamson  wrote:
> 
>> On Thu, 16 Nov 2017 11:21:56 +0800
>> Zhenyu Wang  wrote:
>>
>>> On 2017.11.15 11:48:42 -0700, Alex Williamson wrote:  
 On Wed, 15 Nov 2017 17:11:54 +0800
 Tina Zhang  wrote:
 
> Add VFIO_DEVICE_QUERY_GFX_PLANE ioctl command to let user query and get
> a plane and its information. So far, two types of buffers are supported:
> buffers based on dma-buf and buffers based on region.
>
> This ioctl can be invoked with:
> 1) Either DMABUF or REGION flag. Vendor driver returns a plane_info
> successfully only when the specific kind of buffer is supported.
> 2) Flag PROBE. And at the same time either DMABUF or REGION must be set,
> so that vendor driver returns success only when the specific kind of
> buffer is supported.
>
> Add VFIO_DEVICE_GET_GFX_DMABUF ioctl command to let user get a specific
> dma-buf fd of an exposed MDEV buffer provided by dmabuf_id which was
> returned in VFIO_DEVICE_QUERY_GFX_PLANE ioctl command.
>
> The life cycle of an exposed MDEV buffer is handled by userspace and
> tracked by kernel space. The returned dmabuf_id in struct vfio_device_
> query_gfx_plane can be a new id of a new exposed buffer or an old id of
> a re-exported buffer. Host user can check the value of dmabuf_id to see
> if it needs to create new resources according to the new exposed buffer
> or just re-use the existing resource related to the old buffer.
>
> v18:
> - update comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
>
> v17:
> - modify VFIO_DEVICE_GET_GFX_DMABUF interface. (Alex)
>
> v16:
> - add x_hot and y_hot fields. (Gerd)
> - add comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
> - rebase to 4.14.0-rc6.
>
> v15:
> - add a ioctl to get a dmabuf for a given dmabuf id. (Gerd)
>
> v14:
> - add PROBE, DMABUF and REGION flags. (Alex)
>
> v12:
> - add drm_format_mod back. (Gerd and Zhenyu)
> - add region_index. (Gerd)
>
> v11:
> - rename plane_type to drm_plane_type. (Gerd)
> - move fields of vfio_device_query_gfx_plane to 
> vfio_device_gfx_plane_info.
>   (Gerd)
> - remove drm_format_mod, start fields. (Daniel)
> - remove plane_id.
>
> v10:
> - refine the ABI API VFIO_DEVICE_QUERY_GFX_PLANE. (Alex) (Gerd)
>
> v3:
> - add a field gvt_plane_info in the drm_i915_gem_obj structure to save
>   the decoded plane information to avoid look up while need the plane
>   info. (Gerd)
>
> Signed-off-by: Tina Zhang 
> Cc: Gerd Hoffmann 
> Cc: Alex Williamson 
> Cc: Daniel Vetter 
> ---
>  include/uapi/linux/vfio.h | 62 
> +++
>  1 file changed, 62 insertions(+)
>
> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> index ae46105..5c1cca2 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -502,6 +502,68 @@ struct vfio_pci_hot_reset {
>  
>  #define VFIO_DEVICE_PCI_HOT_RESET_IO(VFIO_TYPE, VFIO_BASE + 13)
>  
> +/**
> + * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14,
> + *struct vfio_device_query_gfx_plane)
> + *
> + * Set the drm_plane_type and flags, then retrieve the gfx plane info.
> + *
> + * flags supported:
> + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set
> + *   to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no
> + *   support for dma-buf.
> + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set
> + *   to ask if the mdev supports region. 0 on support, -EINVAL on no
> + *   support for region.
> + * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set
> + *   with each call to query the plane info.
> + * - Others are invalid and return -EINVAL.
> + *
> + * Note:
> + * 1. Plane could be disabled by guest. In that case, success will be
> + *returned with zero-initialized drm_format, size, width and height
> + *fields.
> + * 2. x_hot/y_hot is set to 0x if no hotspot information 
> available
> + *
> + * Return: 0 on success, -errno on other failure.
> + */
> +struct vfio_device_gfx_plane_info {
> + __u32 argsz;
> + __u32 flags;
> +#define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0)
> +#define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1)
> +#define VFIO_GFX_PLANE_TYPE_REGION (1 << 2)
> + /* in */
> + __u32 drm_plane_type;   /* type of plane: DRM_PLANE_TYPE_* */
> + /* out */
> + __u32 drm_f

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [1/2] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34062/
State : success

== Summary ==

Series 34062v1 series starting with [1/2] drm/i915/execlists: Listen to 
COMPLETE context event not ACTIVE_IDLE
https://patchwork.freedesktop.org/api/1.0/series/34062/revisions/1/mbox/

fi-bdw-5557u total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  
time:447s
fi-bdw-gvtdvmtotal:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:465s
fi-blb-e6850 total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  
time:380s
fi-bsw-n3050 total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  
time:535s
fi-bwr-2160  total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 
time:279s
fi-bxt-dsi   total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  
time:504s
fi-bxt-j4205 total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:512s
fi-byt-j1900 total:289  pass:254  dwarn:0   dfail:0   fail:0   skip:35  
time:498s
fi-byt-n2820 total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  
time:490s
fi-gdg-551   total:289  pass:178  dwarn:1   dfail:0   fail:1   skip:109 
time:263s
fi-glk-1 total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  
time:542s
fi-hsw-4770  total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:431s
fi-hsw-4770r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:441s
fi-ilk-650   total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  
time:431s
fi-ivb-3520m total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:482s
fi-ivb-3770  total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  
time:456s
fi-kbl-7500u total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  
time:483s
fi-kbl-7560u total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  
time:526s
fi-kbl-7567u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:477s
fi-kbl-r total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:533s
fi-pnv-d510  total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  
time:578s
fi-skl-6260u total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:459s
fi-skl-6600u total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  
time:541s
fi-skl-6700hqtotal:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:566s
fi-skl-6700k total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  
time:519s
fi-skl-6770hqtotal:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  
time:495s
fi-skl-gvtdvmtotal:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  
time:465s
fi-snb-2520m total:246  pass:212  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600  total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  
time:418s
Blacklisted hosts:
fi-cfl-s2total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  
time:616s
fi-cnl-y total:225  pass:200  dwarn:0   dfail:0   fail:0   skip:24 
fi-glk-dsi   total:289  pass:157  dwarn:0   dfail:10  fail:2   skip:120 
time:379s

b4da24717364bc69bb981a1536be64413a582f3a drm-tip: 2017y-11m-17d-22h-46m-53s UTC 
integration manifest
36d3b598884a drm/i915/execlists: Delay writing to ELSP until HW has processed 
the previous write
c1e359e93451 drm/i915/execlists: Listen to COMPLETE context event not 
ACTIVE_IDLE

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7190/
___
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Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

2017-11-18 Thread Alex Williamson

On Sat, 18 Nov 2017 23:29:31 +0530
Kirti Wankhede  wrote:

> Extremely sorry for the delay.
> This works for VFIO_GFX_PLANE_TYPE_REGION. Tested with local changes.
> 
> Reviewed-by: Kirti Wankhede 

With that,

Acked-by: Alex Williamson 

> On 11/18/2017 9:00 PM, Alex Williamson wrote:
> > 
> > Kirti?
> > 
> > On Wed, 15 Nov 2017 21:11:42 -0700
> > Alex Williamson  wrote:
> >   
> >> On Thu, 16 Nov 2017 11:21:56 +0800
> >> Zhenyu Wang  wrote:
> >>  
> >>> On 2017.11.15 11:48:42 -0700, Alex Williamson wrote:
>  On Wed, 15 Nov 2017 17:11:54 +0800
>  Tina Zhang  wrote:
>    
> > Add VFIO_DEVICE_QUERY_GFX_PLANE ioctl command to let user query and get
> > a plane and its information. So far, two types of buffers are supported:
> > buffers based on dma-buf and buffers based on region.
> >
> > This ioctl can be invoked with:
> > 1) Either DMABUF or REGION flag. Vendor driver returns a plane_info
> > successfully only when the specific kind of buffer is supported.
> > 2) Flag PROBE. And at the same time either DMABUF or REGION must be set,
> > so that vendor driver returns success only when the specific kind of
> > buffer is supported.
> >
> > Add VFIO_DEVICE_GET_GFX_DMABUF ioctl command to let user get a specific
> > dma-buf fd of an exposed MDEV buffer provided by dmabuf_id which was
> > returned in VFIO_DEVICE_QUERY_GFX_PLANE ioctl command.
> >
> > The life cycle of an exposed MDEV buffer is handled by userspace and
> > tracked by kernel space. The returned dmabuf_id in struct vfio_device_
> > query_gfx_plane can be a new id of a new exposed buffer or an old id of
> > a re-exported buffer. Host user can check the value of dmabuf_id to see
> > if it needs to create new resources according to the new exposed buffer
> > or just re-use the existing resource related to the old buffer.
> >
> > v18:
> > - update comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
> >
> > v17:
> > - modify VFIO_DEVICE_GET_GFX_DMABUF interface. (Alex)
> >
> > v16:
> > - add x_hot and y_hot fields. (Gerd)
> > - add comments for VFIO_DEVICE_GET_GFX_DMABUF. (Alex)
> > - rebase to 4.14.0-rc6.
> >
> > v15:
> > - add a ioctl to get a dmabuf for a given dmabuf id. (Gerd)
> >
> > v14:
> > - add PROBE, DMABUF and REGION flags. (Alex)
> >
> > v12:
> > - add drm_format_mod back. (Gerd and Zhenyu)
> > - add region_index. (Gerd)
> >
> > v11:
> > - rename plane_type to drm_plane_type. (Gerd)
> > - move fields of vfio_device_query_gfx_plane to 
> > vfio_device_gfx_plane_info.
> >   (Gerd)
> > - remove drm_format_mod, start fields. (Daniel)
> > - remove plane_id.
> >
> > v10:
> > - refine the ABI API VFIO_DEVICE_QUERY_GFX_PLANE. (Alex) (Gerd)
> >
> > v3:
> > - add a field gvt_plane_info in the drm_i915_gem_obj structure to save
> >   the decoded plane information to avoid look up while need the plane
> >   info. (Gerd)
> >
> > Signed-off-by: Tina Zhang 
> > Cc: Gerd Hoffmann 
> > Cc: Alex Williamson 
> > Cc: Daniel Vetter 
> > ---
> >  include/uapi/linux/vfio.h | 62 
> > +++
> >  1 file changed, 62 insertions(+)
> >
> > diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
> > index ae46105..5c1cca2 100644
> > --- a/include/uapi/linux/vfio.h
> > +++ b/include/uapi/linux/vfio.h
> > @@ -502,6 +502,68 @@ struct vfio_pci_hot_reset {
> >  
> >  #define VFIO_DEVICE_PCI_HOT_RESET  _IO(VFIO_TYPE, VFIO_BASE + 13)
> >  
> > +/**
> > + * VFIO_DEVICE_QUERY_GFX_PLANE - _IOW(VFIO_TYPE, VFIO_BASE + 14,
> > + *struct 
> > vfio_device_query_gfx_plane)
> > + *
> > + * Set the drm_plane_type and flags, then retrieve the gfx plane info.
> > + *
> > + * flags supported:
> > + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_DMABUF are set
> > + *   to ask if the mdev supports dma-buf. 0 on support, -EINVAL on no
> > + *   support for dma-buf.
> > + * - VFIO_GFX_PLANE_TYPE_PROBE and VFIO_GFX_PLANE_TYPE_REGION are set
> > + *   to ask if the mdev supports region. 0 on support, -EINVAL on no
> > + *   support for region.
> > + * - VFIO_GFX_PLANE_TYPE_DMABUF or VFIO_GFX_PLANE_TYPE_REGION is set
> > + *   with each call to query the plane info.
> > + * - Others are invalid and return -EINVAL.
> > + *
> > + * Note:
> > + * 1. Plane could be disabled by guest. In that case, success will be
> > + *returned with zero-initialized drm_format, size, width and height
> > + *fields.
> > + * 2. x_hot/y_hot is set to 0x if no hotspot information 
> > available
> > + *
> > + * Return: 0 on success, -errno on other failure.
> > + */
> > +struct vfio_d

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

2017-11-18 Thread Patchwork

== Series Details ==

Series: series starting with [1/2] drm/i915/execlists: Listen to COMPLETE 
context event not ACTIVE_IDLE
URL   : https://patchwork.freedesktop.org/series/34062/
State : success

== Summary ==

Test kms_flip:
Subgroup wf_vblank-vs-modeset-interruptible:
dmesg-warn -> PASS   (shard-hsw) fdo#102614
Test kms_frontbuffer_tracking:
Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
pass   -> FAIL   (shard-snb) fdo#101623 +1

fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hswtotal:2585 pass:1475 dwarn:1   dfail:1   fail:9   skip:1099 
time:9476s
shard-snbtotal:2585 pass:1260 dwarn:1   dfail:1   fail:12  skip:1311 
time:8038s
Blacklisted hosts:
shard-apltotal:2565 pass:1604 dwarn:1   dfail:0   fail:23  skip:936 
time:12870s
shard-kbltotal:2534 pass:1641 dwarn:39  dfail:2   fail:25  skip:825 
time:10300s

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7190/shards.html
___
Intel-gfx mailing list
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[Intel-gfx] [CI 1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [CI 3/3] drm/i915: Automatic i915_switch_context for legacy

[Intel-gfx] [CI 1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [CI] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [CI 2/9] drm/i915: Pull the unconditional GPU cache invalidation into request construction

[Intel-gfx] [CI 2/3] drm/i915: Pull the unconditional GPU cache invalidation into request construction

[Intel-gfx] [CI 3/9] drm/i915: Automatic i915_switch_context for legacy

[Intel-gfx] [CI 4/9] drm/i915: Remove i915.enable_execlists module parameter

[Intel-gfx] [CI 5/9] drm/i915: Remove obsolete ringbuffer emission for gen8+

[Intel-gfx] [CI 8/9] drm/i915: Remove i915.semaphores modparam

[Intel-gfx] [CI 7/9] drm/i915: Move debugfs/i915_semaphore_status to i915_engine_info

[Intel-gfx] [CI 6/9] drm/i915: Disable semaphores on Sandybridge

[Intel-gfx] [CI 9/9] drm/i915: Unwind incomplete legacy context switches

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE (rev3)

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Re: [Intel-gfx] [PATCH v2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [PATCH v3] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [CI,1/9] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

Re: [Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

[Intel-gfx] [PATCH 1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

[Intel-gfx] [PATCH 2/2] drm/i915/execlists: Delay writing to ELSP until HW has processed the previous write

Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

Re: [Intel-gfx] [PATCH v18 5/6] vfio: ABI for mdev display dma-buf operation

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/execlists: Listen to COMPLETE context event not ACTIVE_IDLE

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