[Intel-gfx] ✓ Fi.CI.IGT: success for tests/kms_frontbuffer_tracking: Correctly handle debugfs errors
== Series Details == Series: tests/kms_frontbuffer_tracking: Correctly handle debugfs errors URL : https://patchwork.freedesktop.org/series/34555/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2621 pass:1507 dwarn:6 dfail:2 fail:6 skip:1099 time:9215s shard-kbltotal:2474 pass:1656 dwarn:15 dfail:8 fail:14 skip:774 time:8415s shard-snbtotal:2484 pass:1193 dwarn:18 dfail:10 fail:4 skip:1253 time:7010s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_559/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix deadlock in i830_disable_pipe()
== Series Details == Series: drm/i915: Fix deadlock in i830_disable_pipe() URL : https://patchwork.freedesktop.org/series/34553/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2654 pass:1520 dwarn:8 dfail:0 fail:10 skip:1115 time:8970s shard-snbtotal:2554 pass:1238 dwarn:17 dfail:5 fail:7 skip:1282 time:6951s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7327/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too (rev4)
== Series Details == Series: drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too (rev4) URL : https://patchwork.freedesktop.org/series/33772/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2626 pass:1506 dwarn:11 dfail:0 fail:11 skip:1097 time:9023s shard-snbtotal:2520 pass:1218 dwarn:13 dfail:6 fail:7 skip:1270 time:6556s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7324/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL
On 11/29/2017 12:41 PM, Joonas Lahtinen wrote: On Wed, 2017-11-29 at 11:47 +0530, Sagar Arun Kamble wrote: With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now at 01.org downloads, let us update the default firmware versions. I thought the agreement was for them to be at linux-firmware repo? Sorry. I should have mentioned linux-firmware.git. They are merged there. Regards, Joonas ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL
On Wed, 2017-11-29 at 11:47 +0530, Sagar Arun Kamble wrote: > With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now > at 01.org downloads, let us update the default firmware versions. I thought the agreement was for them to be at linux-firmware repo? Regards, Joonas -- Joonas Lahtinen Open Source Technology Center Intel Corporation ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 14/15] drm/zte: Use drm_mode_get_hv_timing() to populate plane clip rectangle
On Thu, Nov 23, 2017 at 09:05:01PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. > > Note that this replaces crtc_state->adjusted_mode usage with > crtc_state->mode. The latter is the correct choice since that's the > mode the user provided and it matches the plane crtc coordinates > the user also provided. > > Once everyone agrees on this we can move the clip handling into > drm_atomic_helper_check_plane_state(). > > Cc: Laurent Pinchart > Cc: Shawn Guo Acked-by: Shawn Guo > Signed-off-by: Ville Syrjälä ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Update default GuC FW for SKL/BXT/KBL
== Series Details == Series: drm/i915/guc: Update default GuC FW for SKL/BXT/KBL URL : https://patchwork.freedesktop.org/series/34590/ State : success == Summary == Series 34590v1 drm/i915/guc: Update default GuC FW for SKL/BXT/KBL https://patchwork.freedesktop.org/api/1.0/series/34590/revisions/1/mbox/ Test debugfs_test: Subgroup read_all_entries: pass -> DMESG-WARN (fi-bdw-gvtdvm) fdo#103938 +1 Test gem_exec_reloc: Subgroup basic-cpu-active: pass -> FAIL (fi-gdg-551) fdo#102582 +5 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103938 https://bugs.freedesktop.org/show_bug.cgi?id=103938 fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:443s fi-bdw-gvtdvmtotal:288 pass:262 dwarn:2 dfail:0 fail:0 skip:24 time:440s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:391s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:519s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:280s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:502s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:483s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:469s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:423s fi-gdg-551 total:288 pass:172 dwarn:1 dfail:0 fail:7 skip:108 time:267s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:541s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:372s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:423s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:486s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:490s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:530s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:476s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:587s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:450s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:539s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:563s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:514s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:497s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:451s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:416s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:604s fi-cnl-y total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:557s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:486s 5144438448829ec2a3d94fd16a9e69a52cfa7b3b drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest db81ed658349 drm/i915/guc: Change default GuC FW for KBL to v9.39 96994e15a550 drm/i915/guc: Change default GuC FW for BXT to v9.29 aeb3a7c67b26 drm/i915/guc: Change default GuC FW for SKL to v9.33 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7332/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/3] drm/i915/guc: Change default GuC FW for BXT to v9.29
This patch makes v9.29 firmware as default firmware for BXT. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v8.7): - Added support to log media reset count for host to read it - BXT WA for fixing MTP hangs. WaDisableDOPRenderClkGatingAtSubmit - Sub-feature level control for power management features. - Minor clean-up for power management interface. - Unified power management interface and scheduler interface into 1 file using same version. - Bug Fix for multi context scheduler flag. - DCC spec changes for BXT + DCT enabling - Springboard based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Enabled IBC for BXT - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - SLPC Dynamic RPe fix to resolve issues where incorrect frequency was set. - ABT Disable bug fix. Disabled Evaluation mode on context change. - GuC clean up to align developer build in line to production build. - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - Clear forcewake in CSB when SQ is empty. - SLPC IBC 1.6 for APL to ensure multiplier does not cap IA below Pe. - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change. No functional change done as part of this check in. - 3 tries of wake request needed from GuC2CSME for ME to wake up. Request has come from ME spec - During reset one parameter was not getting accounted - Enabling Guc Log changes for ultra low logging for OCA - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee Signed-off-by: Sagar Arun Kamble Cc: Spotswood John A Cc: Anusha Srivatsa Cc: Michal Wajdeczko Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index 631e932..df2ff96 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -33,8 +33,8 @@ #define SKL_FW_MAJOR 9 #define SKL_FW_MINOR 33 -#define BXT_FW_MAJOR 8 -#define BXT_FW_MINOR 7 +#define BXT_FW_MAJOR 9 +#define BXT_FW_MINOR 29 #define KBL_FW_MAJOR 9 #define KBL_FW_MINOR 14 -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/3] drm/i915/guc: Change default GuC FW for SKL to v9.33
This patch makes v9.33 firmware as default firmware for SKL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v6.1): - HuC RSA Keys updated. - Adding per engine preemption support in GuC scheduler - Minor bug fixes. - Added support to log media reset count for host to read it - Sub-feature level control for power management features. - Minor clean-up for power management interface. - Unified power management interface and scheduler interface into 1 file using same version. - Bug Fix for multi context scheduler flag. - DCC spec changes for BXT + DCT enabling - SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - ABT Disable bug fix. Disabled Evaluation mode on context change. - Async FW in Engine Schedule feature (not enabled from KMD) - GuC clean up to align developer build in line to production build. - DCC consistency fix for SKL - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - Enabled WA for MSGCH hang issue - Clear forcewake in CSB when SQ is empty. - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change.No functional change done as part of this check in. - Enable decoupled freq for SKL GT4 - 3 tries of wake request needed from GuC2CSME for ME to wake up. Request has come from ME spec - During reset one parameter was not getting accounted - Enabling Guc Log changes for ultra low logging for OCA - Enabling build failure check to catch critical section overflow. - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Synchronize SLPC internal debug interface with other branches. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee Signed-off-by: Sagar Arun Kamble Cc: Spotswood John A Cc: Anusha Srivatsa Cc: Michal Wajdeczko Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc_fw.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index bbab4e1..631e932 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -30,8 +30,8 @@ #include "intel_guc_fw.h" #include "i915_drv.h" -#define SKL_FW_MAJOR 6 -#define SKL_FW_MINOR 1 +#define SKL_FW_MAJOR 9 +#define SKL_FW_MINOR 33 #define BXT_FW_MAJOR 8 #define BXT_FW_MINOR 7 -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 3/3] drm/i915/guc: Change default GuC FW for KBL to v9.39
This patch makes v9.39 firmware as default firmware for KBL. Note: GuC logging control is changed with this firmware. GuC is expecting i915 to set control bit to enable "default logging" while using GuC action UK_LOG_ENABLE_LOGGING. However i915 is currently not doing this because it is version specific change and can be handled entirely in GuC. It will need to be fixed in future firmwares. This update includes (since v9.14): - DCC spec changes for BXT + DCT enabling - Bug Fix for power conservation feature SLPC_DCC - Scheduler 1-element submission during DCC cycles. - SB based Pre-ETM/ETM flow enabling for debug signed GuC/HuC - Moving GuC non_critical r/w data to lower SRAM 64KB - Media engine Reset fix. Correctly marking context for resubmission in Media Reset case. - ABT Disable bug fix. Disabled Evaluation mode on context change. - Async FW in Engine Schedule feature (not enabled from KMD) - GuC clean up to align developer build in line to production build. - Disable ARAT interrupt before programming ARAT delta. - Memory range check in Parse to avoid failure due to overflow. - GuC Msg Channel Hang WA - Stall GUC for mmio access when IDI is low during CPD flow. - Fix for submit queue over flow issue - Enabling IBC on KBL GT3 15W, GT4 45W - Disabling wrong device ID WA in production signed kernel - Enabling WA for MSGCH hang issue upto required KBL stepping - Clear forcewake in CSB when SQ is empty. - 3Tries of GuC2CSME wake request - During reset one parameter was not getting accounted - Disable DCC 1-elem mode submission - Move UkGuckmdInterface.h file from 2016 folders to common 2016 folder. - This is file location change.No functional change done as part of this check in. - Enabling Guc Log changes for ultra low logging for OCA - Enabling Dynamic Render Power Well Hysteresis Programming for Compute Worklaods - Enabling build failure check to catch critical section overflow. - Disable build.bat redundant prints. - Move few least used functions to non-critical section. - Rearrange GuC documentation folder structure. - Synchronize SLPC internal debug interface with other branches. - Fixing Issue with Default Guc Log changes for OCA using special Control Bit - Aggressive DCC implementation for supported platforms. v2: Rebase. Updated commit message. Signed-off-by: Jeff McGee Signed-off-by: Sagar Arun Kamble Cc: Spotswood John A Cc: Anusha Srivatsa Cc: Michal Wajdeczko Cc: Rodrigo Vivi Cc: Joonas Lahtinen --- drivers/gpu/drm/i915/intel_guc_fw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c b/drivers/gpu/drm/i915/intel_guc_fw.c index df2ff96..89862fa 100644 --- a/drivers/gpu/drm/i915/intel_guc_fw.c +++ b/drivers/gpu/drm/i915/intel_guc_fw.c @@ -37,7 +37,7 @@ #define BXT_FW_MINOR 29 #define KBL_FW_MAJOR 9 -#define KBL_FW_MINOR 14 +#define KBL_FW_MINOR 39 #define GLK_FW_MAJOR 10 #define GLK_FW_MINOR 56 -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 0/3] drm/i915/guc: Update default GuC FW for SKL/BXT/KBL
With new GuC firmwares (SKL v9.33, BXT v9.29, KBL v9.39) available now at 01.org downloads, let us update the default firmware versions. Cc: Spotswood John A Cc: Anusha Srivatsa Cc: Michal Wajdeczko Cc: Rodrigo Vivi Cc: Joonas Lahtinen Sagar Arun Kamble (3): drm/i915/guc: Change default GuC FW for SKL to v9.33 drm/i915/guc: Change default GuC FW for BXT to v9.29 drm/i915/guc: Change default GuC FW for KBL to v9.39 drivers/gpu/drm/i915/intel_guc_fw.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions(-) -- 1.9.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Impletments dynamic WOPCM partitioning.
On 11/15/2017 09:58 AM, Chris Wilson wrote: Quoting Jackie Li (2017-11-15 17:17:08) Static WOPCM partitioning will lead to GuC loading failure if the GuC/HuC firmware size exceeded current static 512KB partition boundary. This patch enables the dynamical calculation of the WOPCM aperture used by GuC/HuC firmware. GuC WOPCM offset is set to HuC size + reserved WOPCM size. GuC WOPCM size is set to total WOPCM size - GuC WOPCM offset - RC6CTX size. In this case, GuC WOPCM offset will be updated based on the size of HuC firmware while GuC WOPCM size will be set to use all the remaining WOPCM space. v2: - Removed intel_wopcm_init (Ville/Sagar/Joonas) - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar) - Removed unnecessary function calls (Joonas) - Init GuC WOPCM partition as soon as firmware fetching is completed Fix your indenting. Use tabs, align to brackets etc. Signed-off-by: Jackie Li Cc: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Sujaritha Sundaresan Cc: Daniele Ceraolo Spurio Cc: John Spotswood Cc: Oscar Mateo --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +- drivers/gpu/drm/i915/i915_guc_reg.h | 18 +++-- drivers/gpu/drm/i915/intel_guc.c| 25 --- drivers/gpu/drm/i915/intel_guc.h| 25 +++ drivers/gpu/drm/i915/intel_huc.c| 2 +- drivers/gpu/drm/i915/intel_uc.c | 116 +++- drivers/gpu/drm/i915/intel_uc_fw.c | 11 ++- 7 files changed, 163 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 2db0406..285c310 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -312,12 +312,12 @@ __create_hw_context(struct drm_i915_private *dev_priv, ctx->desc_template = default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt); - /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not + /* GuC requires the ring to be placed above GuC WOPCM top. if GuC is not * present or not in use we still need a small bias as ring wraparound * at offset 0 sometimes hangs. No idea why. */ if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) - ctx->ggtt_offset_bias = GUC_WOPCM_TOP; + ctx->ggtt_offset_bias = dev_priv->guc.wopcm.top; else ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE; diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h index bc1ae7d..567df12 100644 --- a/drivers/gpu/drm/i915/i915_guc_reg.h +++ b/drivers/gpu/drm/i915/i915_guc_reg.h @@ -67,17 +67,27 @@ #define DMA_GUC_WOPCM_OFFSET _MMIO(0xc340) #define HUC_LOADING_AGENT_VCR (0<<1) #define HUC_LOADING_AGENT_GUC (1<<1) -#define GUC_WOPCM_OFFSET_VALUE 0x8 /* 512KB */ #define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4) #define HUC_STATUS2 _MMIO(0xD3B0) #define HUC_FW_VERIFIED (1<<7) /* Defines WOPCM space available to GuC firmware */ +/* Default WOPCM size 1MB */ +#define WOPCM_DEFAULT_SIZE (0x1 << 20) +/* Reserved WOPCM size 16KB */ +#define WOPCM_RESERVED_SIZE(0x4000) +/* GUC WOPCM Offset need to be 16KB aligned */ +#define WOPCM_OFFSET_ALIGNMENT (0x4000) +/* 8KB stack reserved for GuC FW*/ +#define GUC_WOPCM_STACK_RESERVED (0x2000) +/* 24KB WOPCM reserved for RC6 CTX on BXT */ +#define BXT_WOPCM_RC6_RESERVED (0x6000) + +#define GEN9_GUC_WOPCM_DELTA 4 +#define GEN9_GUC_WOPCM_OFFSET (0x24000) + #define GUC_WOPCM_SIZE _MMIO(0xc050) -/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */ -#define GUC_WOPCM_TOP (0x80 << 12) /* 512KB */ -#define BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12) /* 64KB */ /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ #define GUC_GGTT_TOP 0xFEE0 diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 9678630..0c6bd63 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -337,7 +337,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) * This is a wrapper to create an object for use with the GuC. In order to * use it inside the GuC, an object needs to be pinned lifetime, so we allocate * both some backing storage and a range inside the Global GTT. We must pin - * it in the GGTT somewhere other than than [0, GUC_WOPCM_TOP) because that + * it in the GGTT somewhere other than than [0, GuC WOPCM top) because that * range is reserved inside GuC. * * Return: A i915_vma if successful, otherwise an ERR_PTR. @@ -358,7 +358,8 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size) goto err;
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Impletments dynamic WOPCM partitioning.
On 11/16/2017 08:00 PM, Sagar Arun Kamble wrote: On 11/17/2017 3:17 AM, Michal Wajdeczko wrote: On Thu, 16 Nov 2017 08:34:01 +0100, Sagar Arun Kamble wrote: Typo in the subject. GLK showing failure to load GuC with this approach on CI. On 11/15/2017 10:47 PM, Jackie Li wrote: Static WOPCM partitioning will lead to GuC loading failure if the GuC/HuC firmware size exceeded current static 512KB partition boundary. This patch enables the dynamical calculation of the WOPCM aperture used by GuC/HuC firmware. GuC WOPCM offset is set to HuC size + reserved WOPCM size. GuC WOPCM size is set to total WOPCM size - GuC WOPCM offset - RC6CTX size. In this case, GuC WOPCM offset will be updated based on the size of HuC firmware while GuC WOPCM size will be set to use all the remaining WOPCM space. v2: - Removed intel_wopcm_init (Ville/Sagar/Joonas) - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar) - Removed unnecessary function calls (Joonas) - Init GuC WOPCM partition as soon as firmware fetching is completed Signed-off-by: Jackie Li Cc: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Sujaritha Sundaresan Cc: Daniele Ceraolo Spurio Cc: John Spotswood Cc: Oscar Mateo --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +- drivers/gpu/drm/i915/i915_guc_reg.h | 18 +++-- drivers/gpu/drm/i915/intel_guc.c | 25 --- drivers/gpu/drm/i915/intel_guc.h | 25 +++ drivers/gpu/drm/i915/intel_huc.c | 2 +- drivers/gpu/drm/i915/intel_uc.c | 116 +++- drivers/gpu/drm/i915/intel_uc_fw.c | 11 ++- 7 files changed, 163 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 2db0406..285c310 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -312,12 +312,12 @@ __create_hw_context(struct drm_i915_private *dev_priv, ctx->desc_template = default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt); - /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not + /* GuC requires the ring to be placed above GuC WOPCM top. if GuC is not * present or not in use we still need a small bias as ring wraparound * at offset 0 sometimes hangs. No idea why. */ if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) - ctx->ggtt_offset_bias = GUC_WOPCM_TOP; + ctx->ggtt_offset_bias = dev_priv->guc.wopcm.top; else ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE; diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h index bc1ae7d..567df12 100644 --- a/drivers/gpu/drm/i915/i915_guc_reg.h +++ b/drivers/gpu/drm/i915/i915_guc_reg.h @@ -67,17 +67,27 @@ #define DMA_GUC_WOPCM_OFFSET _MMIO(0xc340) #define HUC_LOADING_AGENT_VCR (0<<1) #define HUC_LOADING_AGENT_GUC (1<<1) -#define GUC_WOPCM_OFFSET_VALUE 0x8 /* 512KB */ #define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4) #define HUC_STATUS2 _MMIO(0xD3B0) #define HUC_FW_VERIFIED (1<<7) /* Defines WOPCM space available to GuC firmware */ +/* Default WOPCM size 1MB */ +#define WOPCM_DEFAULT_SIZE (0x1 << 20) possible to get this size from register GEN6_STOLEN_RESERVED (ggtt->stolen_reserved_size) +/* Reserved WOPCM size 16KB */ +#define WOPCM_RESERVED_SIZE (0x4000) +/* GUC WOPCM Offset need to be 16KB aligned */ +#define WOPCM_OFFSET_ALIGNMENT (0x4000) prefix this with GUC_ as it is specific to GuC in WOPCM +/* 8KB stack reserved for GuC FW*/ +#define GUC_WOPCM_STACK_RESERVED (0x2000) +/* 24KB WOPCM reserved for RC6 CTX on BXT */ +#define BXT_WOPCM_RC6_RESERVED (0x6000) + +#define GEN9_GUC_WOPCM_DELTA 4 +#define GEN9_GUC_WOPCM_OFFSET (0x24000) I'm not sure that definitions unrelated to register bits shall be defined here + #define GUC_WOPCM_SIZE _MMIO(0xc050) -/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */ -#define GUC_WOPCM_TOP (0x80 << 12) /* 512KB */ -#define BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12) /* 64KB */ /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ #define GUC_GGTT_TOP 0xFEE0 diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 9678630..0c6bd63 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -337,7 +337,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) * This is a wrapper to create an object for use with the GuC. In order to * use it inside the GuC, an object needs to be pinned lifetime, so we allocate * both some backing storage and a range inside the Global GTT. We must pin - * it in the GGTT somewhere other than than [0, GUC_WOPCM_TOP) because that + * it in the GGTT somewhere other than th
Re: [Intel-gfx] [PATCH v2 1/2] drm/i915: Impletments dynamic WOPCM partitioning.
On 11/16/2017 01:47 PM, Michal Wajdeczko wrote: On Thu, 16 Nov 2017 08:34:01 +0100, Sagar Arun Kamble wrote: Typo in the subject. GLK showing failure to load GuC with this approach on CI. On 11/15/2017 10:47 PM, Jackie Li wrote: Static WOPCM partitioning will lead to GuC loading failure if the GuC/HuC firmware size exceeded current static 512KB partition boundary. This patch enables the dynamical calculation of the WOPCM aperture used by GuC/HuC firmware. GuC WOPCM offset is set to HuC size + reserved WOPCM size. GuC WOPCM size is set to total WOPCM size - GuC WOPCM offset - RC6CTX size. In this case, GuC WOPCM offset will be updated based on the size of HuC firmware while GuC WOPCM size will be set to use all the remaining WOPCM space. v2: - Removed intel_wopcm_init (Ville/Sagar/Joonas) - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar) - Removed unnecessary function calls (Joonas) - Init GuC WOPCM partition as soon as firmware fetching is completed Signed-off-by: Jackie Li Cc: Michal Wajdeczko Cc: Sagar Arun Kamble Cc: Sujaritha Sundaresan Cc: Daniele Ceraolo Spurio Cc: John Spotswood Cc: Oscar Mateo --- drivers/gpu/drm/i915/i915_gem_context.c | 4 +- drivers/gpu/drm/i915/i915_guc_reg.h | 18 +++-- drivers/gpu/drm/i915/intel_guc.c | 25 --- drivers/gpu/drm/i915/intel_guc.h | 25 +++ drivers/gpu/drm/i915/intel_huc.c | 2 +- drivers/gpu/drm/i915/intel_uc.c | 116 +++- drivers/gpu/drm/i915/intel_uc_fw.c | 11 ++- 7 files changed, 163 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 2db0406..285c310 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -312,12 +312,12 @@ __create_hw_context(struct drm_i915_private *dev_priv, ctx->desc_template = default_desc_template(dev_priv, dev_priv->mm.aliasing_ppgtt); - /* GuC requires the ring to be placed above GUC_WOPCM_TOP. If GuC is not + /* GuC requires the ring to be placed above GuC WOPCM top. if GuC is not * present or not in use we still need a small bias as ring wraparound * at offset 0 sometimes hangs. No idea why. */ if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) - ctx->ggtt_offset_bias = GUC_WOPCM_TOP; + ctx->ggtt_offset_bias = dev_priv->guc.wopcm.top; else ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE; diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h index bc1ae7d..567df12 100644 --- a/drivers/gpu/drm/i915/i915_guc_reg.h +++ b/drivers/gpu/drm/i915/i915_guc_reg.h @@ -67,17 +67,27 @@ #define DMA_GUC_WOPCM_OFFSET _MMIO(0xc340) #define HUC_LOADING_AGENT_VCR (0<<1) #define HUC_LOADING_AGENT_GUC (1<<1) -#define GUC_WOPCM_OFFSET_VALUE 0x8 /* 512KB */ #define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4) #define HUC_STATUS2 _MMIO(0xD3B0) #define HUC_FW_VERIFIED (1<<7) /* Defines WOPCM space available to GuC firmware */ +/* Default WOPCM size 1MB */ +#define WOPCM_DEFAULT_SIZE (0x1 << 20) possible to get this size from register GEN6_STOLEN_RESERVED (ggtt->stolen_reserved_size) +/* Reserved WOPCM size 16KB */ +#define WOPCM_RESERVED_SIZE (0x4000) +/* GUC WOPCM Offset need to be 16KB aligned */ +#define WOPCM_OFFSET_ALIGNMENT (0x4000) prefix this with GUC_ as it is specific to GuC in WOPCM +/* 8KB stack reserved for GuC FW*/ +#define GUC_WOPCM_STACK_RESERVED (0x2000) +/* 24KB WOPCM reserved for RC6 CTX on BXT */ +#define BXT_WOPCM_RC6_RESERVED (0x6000) + +#define GEN9_GUC_WOPCM_DELTA 4 +#define GEN9_GUC_WOPCM_OFFSET (0x24000) I'm not sure that definitions unrelated to register bits shall be defined here I was trying to align with the current implementation. since we had put definitions such as GUC_WOPCM _TOP, BXT_GUC_WOPCM_RC6_RESERVED here. It's better to create a header file for wopcm related definitions if we want to keep it absolutely clean. I will think about it. Thanks for comments. + #define GUC_WOPCM_SIZE _MMIO(0xc050) -/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */ -#define GUC_WOPCM_TOP (0x80 << 12) /* 512KB */ -#define BXT_GUC_WOPCM_RC6_RESERVED (0x10 << 12) /* 64KB */ /* GuC addresses above GUC_GGTT_TOP also don't map through the GTT */ #define GUC_GGTT_TOP 0xFEE0 diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c index 9678630..0c6bd63 100644 --- a/drivers/gpu/drm/i915/intel_guc.c +++ b/drivers/gpu/drm/i915/intel_guc.c @@ -337,7 +337,7 @@ int intel_guc_resume(struct drm_i915_private *dev_priv) * This is a wrapper to create an object for use with the GuC. In order to * use it inside the GuC, an object
[Intel-gfx] ✗ Fi.CI.BAT: failure for intel_aubdump: Add ability to simulate execlist submission
== Series Details == Series: intel_aubdump: Add ability to simulate execlist submission URL : https://patchwork.freedesktop.org/series/34572/ State : failure == Summary == IGT patchset build failed on latest successful build 380cc811486ba3fefbe3ebe4761afa7e169dcd3e tests/perf_pmu: Sync invalid-init with i915 changes aubdump.c:368:12: error: ‘AUB_MEM_TRACE_REGISTER_SIZE_DWORD’ undeclared (first use in this function) dword_out(AUB_MEM_TRACE_REGISTER_SIZE_DWORD | ^ aubdump.c:369:5: error: ‘AUB_MEM_TRACE_REGISTER_SPACE_MMIO’ undeclared (first use in this function) AUB_MEM_TRACE_REGISTER_SPACE_MMIO); ^ aubdump.c: In function ‘gen10_write_header’: aubdump.c:388:12: error: ‘CMD_MEM_TRACE_VERSION’ undeclared (first use in this function) dword_out(CMD_MEM_TRACE_VERSION | (dwords - 1)); ^ aubdump.c:389:12: error: ‘AUB_MEM_TRACE_VERSION_FILE_VERSION’ undeclared (first use in this function) dword_out(AUB_MEM_TRACE_VERSION_FILE_VERSION); ^~ aubdump.c:390:12: error: ‘AUB_MEM_TRACE_VERSION_DEVICE_CNL’ undeclared (first use in this function) dword_out(AUB_MEM_TRACE_VERSION_DEVICE_CNL | ^~~~ aubdump.c:391:5: error: ‘AUB_MEM_TRACE_VERSION_METHOD_PHY’ undeclared (first use in this function) AUB_MEM_TRACE_VERSION_METHOD_PHY); ^~~~ aubdump.c:400:9: error: ‘AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY’ undeclared (first use in this function) AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY); ^ aubdump.c:409:8: error: ‘AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL’ undeclared (first use in this function) AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL); ^~~~ aubdump.c: In function ‘aub_write_trace_block’: aubdump.c:536:10: error: ‘AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL’ undeclared (first use in this function) AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL); ^~~~ aubdump.c: In function ‘aub_dump_execlist’: aubdump.c:616:8: error: ‘AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL’ undeclared (first use in this function) AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL); ^~~~ aubdump.c:634:12: error: ‘CMD_MEM_TRACE_REGISTER_POLL’ undeclared (first use in this function) dword_out(CMD_MEM_TRACE_REGISTER_POLL | (5 + 1 - 1)); ^~~ aubdump.c:636:12: error: ‘AUB_MEM_TRACE_REGISTER_SIZE_DWORD’ undeclared (first use in this function) dword_out(AUB_MEM_TRACE_REGISTER_SIZE_DWORD | ^ aubdump.c:637:5: error: ‘AUB_MEM_TRACE_REGISTER_SPACE_MMIO’ undeclared (first use in this function) AUB_MEM_TRACE_REGISTER_SPACE_MMIO); ^ Makefile:1161: recipe for target 'aubdump.lo' failed make[3]: *** [aubdump.lo] Error 1 Makefile:1209: recipe for target 'all-recursive' failed make[2]: *** [all-recursive] Error 1 Makefile:531: recipe for target 'all-recursive' failed make[1]: *** [all-recursive] Error 1 Makefile:463: recipe for target 'all' failed make: *** [all] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] intel_aubdump: Add ability to simulate execlist submission
Newer devices do not have the legacy ring buffer submission model,
so aub files generated using that model cannot be handled by some
internal tools. The execlist submission modeled by this change is
pretty simplistic, using GGTT only and synchronizing after every
batch.
---
tools/aubdump.c | 422
1 file changed, 394 insertions(+), 28 deletions(-)
diff --git a/tools/aubdump.c b/tools/aubdump.c
index 6ba3cb66..232371d5 100644
--- a/tools/aubdump.c
+++ b/tools/aubdump.c
@@ -46,6 +46,175 @@
#define ARRAY_SIZE(x) (sizeof(x)/sizeof((x)[0]))
#endif
+#ifndef ALIGN
+#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
+#endif
+
+#ifndef MIN
+#define MIN(x, y) ((x) < (y) ? (x) : (y))
+#endif
+
+#define HWS_PGA_RCSUNIT0x02080
+#define HWS_PGA_VCSUNIT0 0x12080
+#define HWS_PGA_BCSUNIT0x22080
+
+#define GFX_MODE_RCSUNIT 0x0229c
+#define GFX_MODE_VCSUNIT0 0x1229c
+#define GFX_MODE_BCSUNIT 0x2229c
+
+#define EXECLIST_SUBMITPORT_RCSUNIT0x02230
+#define EXECLIST_SUBMITPORT_VCSUNIT0 0x12230
+#define EXECLIST_SUBMITPORT_BCSUNIT0x22230
+
+#define EXECLIST_STATUS_RCSUNIT0x02234
+#define EXECLIST_STATUS_VCSUNIT0 0x12234
+#define EXECLIST_STATUS_BCSUNIT0x22234
+
+#define MEMORY_MAP_SIZE (64 /* MiB */ * 1024 * 1024)
+
+#define PTE_SIZE 4
+#define GEN8_PTE_SIZE 8
+
+#define NUM_PT_ENTRIES (ALIGN(MEMORY_MAP_SIZE, 4096) / 4096)
+#define PT_SIZE ALIGN(NUM_PT_ENTRIES * GEN8_PTE_SIZE, 4096)
+
+#define RING_SIZE ( 1 * 4096)
+#define PPHWSP_SIZE( 1 * 4096)
+#define GEN10_LR_CONTEXT_RENDER_SIZE (19 * 4096)
+#define GEN8_LR_CONTEXT_OTHER_SIZE ( 2 * 4096)
+
+#define STATIC_GGTT_MAP_START 0
+
+#define RENDER_RING_ADDR STATIC_GGTT_MAP_START
+#define RENDER_CONTEXT_ADDR (RENDER_RING_ADDR + RING_SIZE)
+
+#define BLITTER_RING_ADDR (RENDER_CONTEXT_ADDR + PPHWSP_SIZE +
GEN10_LR_CONTEXT_RENDER_SIZE)
+#define BLITTER_CONTEXT_ADDR (BLITTER_RING_ADDR + RING_SIZE)
+
+#define VIDEO_RING_ADDR (BLITTER_CONTEXT_ADDR + PPHWSP_SIZE +
GEN8_LR_CONTEXT_OTHER_SIZE)
+#define VIDEO_CONTEXT_ADDR (VIDEO_RING_ADDR + RING_SIZE)
+
+#define STATIC_GGTT_MAP_END (VIDEO_CONTEXT_ADDR + PPHWSP_SIZE +
GEN8_LR_CONTEXT_OTHER_SIZE)
+#define STATIC_GGTT_MAP_SIZE (STATIC_GGTT_MAP_END - STATIC_GGTT_MAP_START)
+
+#define CONTEXT_FLAGS (0x229) /* Normal Priority | L3-LLC Coherency |
+ Legacy Context with no 64 bit VA support | Valid */
+
+#define RENDER_CONTEXT_DESCRIPTOR ((uint64_t)1 << 32 | RENDER_CONTEXT_ADDR |
CONTEXT_FLAGS)
+#define BLITTER_CONTEXT_DESCRIPTOR ((uint64_t)2 << 32 | BLITTER_CONTEXT_ADDR |
CONTEXT_FLAGS)
+#define VIDEO_CONTEXT_DESCRIPTOR ((uint64_t)3 << 32 | VIDEO_CONTEXT_ADDR |
CONTEXT_FLAGS)
+
+static const uint32_t render_context_init[GEN10_LR_CONTEXT_RENDER_SIZE /
+ sizeof(uint32_t)] = {
+ 0 /* MI_NOOP */,
+ 0x1100101B /* MI_LOAD_REGISTER_IMM */,
+ 0x2244 /* CONTEXT_CONTROL */, 0x90009 /* Inhibit Synchronous
Context Switch | Engine Context Restore Inhibit */,
+ 0x2034 /* RING_HEAD */, 0,
+ 0x2030 /* RING_TAIL */, 0,
+ 0x2038 /* RING_BUFFER_START */, RENDER_RING_ADDR,
+ 0x203C /* RING_BUFFER_CONTROL */, (RING_SIZE - 4096) | 1 /*
Buffer Length | Ring Buffer Enable */,
+ 0x2168 /* BB_HEAD_U */, 0,
+ 0x2140 /* BB_HEAD_L */, 0,
+ 0x2110 /* BB_STATE */, 0,
+ 0x211C /* SECOND_BB_HEAD_U */, 0,
+ 0x2114 /* SECOND_BB_HEAD_L */, 0,
+ 0x2118 /* SECOND_BB_STATE */, 0,
+ 0x21C0 /* BB_PER_CTX_PTR */,0,
+ 0x21C4 /* RCS_INDIRECT_CTX */, 0,
+ 0x21C8 /* RCS_INDIRECT_CTX_OFFSET */, 0,
+ /* MI_NOOP */
+ 0, 0,
+
+ 0 /* MI_NOOP */,
+ 0x11001011 /* MI_LOAD_REGISTER_IMM */,
+ 0x23A8 /* CTX_TIMESTAMP */, 0,
+ 0x228C /* PDP3_UDW */, 0,
+ 0x2288 /* PDP3_LDW */, 0,
+ 0x2284 /* PDP2_UDW */, 0,
+ 0x2280 /* PDP2_LDW */, 0,
+ 0x227C /* PDP1_UDW */, 0,
+ 0x2278 /* PDP1_LDW */, 0,
+ 0x2274 /* PDP0_UDW */, 0,
+ 0x2270 /* PDP0_LDW */, 0,
+ /* MI_NOOP */
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+
+ 0 /* MI_NOOP */,
+ 0x1101 /* MI_LOAD_REGISTER_IMM */,
+ 0x20C8 /* R_PWR_CLK_STATE */, 0x7FFF,
+ 0x0501 /* MI_BATCH_BUFFER_END */
+};
+
+static const uint32_t blitter_context_init[GEN8_LR_CONTEXT_OTHER_SIZE /
+ sizeof(uint32_t)] = {
+ 0 /* MI_NOOP */,
+ 0x11001015 /* MI_LOAD_REGISTER_IMM */,
+ 0x22244 /* CONTEXT_CONTROL */, 0x90009 /* Inhibit Synchronous
Context Switch | Engine Context Restore Inhibit */,
+ 0x22034 /* RING_HEAD
[Intel-gfx] [PATCH libdrm] intel/aub: Add new MEM_TRACE commands
The memtrace aub commands are similar to the existing ones, but different. Notably memtrace has commands for register write and poll. --- intel/intel_aub.h | 26 ++ 1 file changed, 26 insertions(+) diff --git a/intel/intel_aub.h b/intel/intel_aub.h index 5f0aba8e..9ca548ed 100644 --- a/intel/intel_aub.h +++ b/intel/intel_aub.h @@ -49,6 +49,12 @@ #define CMD_AUB(7 << 29) #define CMD_AUB_HEADER (CMD_AUB | (1 << 23) | (0x05 << 16)) + +#define CMD_MEM_TRACE_REGISTER_POLL(CMD_AUB | (0x2e << 23) | (0x02 << 16)) +#define CMD_MEM_TRACE_REGISTER_WRITE (CMD_AUB | (0x2e << 23) | (0x03 << 16)) +#define CMD_MEM_TRACE_MEMORY_WRITE (CMD_AUB | (0x2e << 23) | (0x06 << 16)) +#define CMD_MEM_TRACE_VERSION (CMD_AUB | (0x2e << 23) | (0x0e << 16)) + /* DW1 */ # define AUB_HEADER_MAJOR_SHIFT24 # define AUB_HEADER_MINOR_SHIFT16 @@ -92,8 +98,28 @@ #define AUB_TRACE_MEMTYPE_PCI (3 << 16) #define AUB_TRACE_MEMTYPE_GTT_ENTRY (4 << 16) +#define AUB_MEM_TRACE_VERSION_FILE_VERSION 1 + /* DW2 */ +#define AUB_MEM_TRACE_VERSION_DEVICE_MASK 0xff00 +#define AUB_MEM_TRACE_VERSION_DEVICE_CNL (15 << 8) + +#define AUB_MEM_TRACE_VERSION_METHOD_MASK 0x000c +#define AUB_MEM_TRACE_VERSION_METHOD_PHY (1 << 18) + +#define AUB_MEM_TRACE_REGISTER_SIZE_MASK 0x000f +#define AUB_MEM_TRACE_REGISTER_SIZE_DWORD (2 << 16) + +#define AUB_MEM_TRACE_REGISTER_SPACE_MASK 0xf000 +#define AUB_MEM_TRACE_REGISTER_SPACE_MMIO (0 << 28) + +/* DW3 */ + +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_MASK0xf000 +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_LOCAL (1 << 28) +#define AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY (4 << 28) + /** * aub_state_struct_type enum values are encoded with the top 16 bits * representing the type to be delivered to the .aub file, and the bottom 16 -- 2.14.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/cnl: apply Display WA #1178 to fix type C dongles
== Series Details == Series: drm/i915/cnl: apply Display WA #1178 to fix type C dongles URL : https://patchwork.freedesktop.org/series/34566/ State : success == Summary == Series 34566v1 drm/i915/cnl: apply Display WA #1178 to fix type C dongles https://patchwork.freedesktop.org/api/1.0/series/34566/revisions/1/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:379s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:511s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:278s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:497s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:499s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:479s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:467s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:419s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:266s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:533s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:369s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:256s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:425s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:481s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:479s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:527s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:473s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:527s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:596s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:447s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:538s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:563s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:513s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:448s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:416s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:607s fi-cnl-y total:272 pass:245 dwarn:0 dfail:0 fail:0 skip:26 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s 5144438448829ec2a3d94fd16a9e69a52cfa7b3b drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest a0ec9ac8817a drm/i915/cnl: apply Display WA #1178 to fix type C dongles == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7331/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 6/7] efifb: Set info->fbcon_rotate_hint based on drm_get_panel_orientation_quirk
Hi Hans,
I love your patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.15-rc1 next-20171128]
[cannot apply to linus/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-fbdev-Panel-orientation-connector-property-support/20171129-001142
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-kexec (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/video/fbdev/efifb.c: In function 'efifb_probe':
>> drivers/video/fbdev/efifb.c:339:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PRESENT_BOTTOM_FIELD'?
case DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP:
^~~~
DRM_MODE_PRESENT_BOTTOM_FIELD
drivers/video/fbdev/efifb.c:339:7: note: each undeclared identifier is
reported only once for each function it appears in
>> drivers/video/fbdev/efifb.c:342:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_LEFT_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP'?
case DRM_MODE_PANEL_ORIENTATION_LEFT_UP:
^~
DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP
>> drivers/video/fbdev/efifb.c:345:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_RIGHT_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PANEL_ORIENTATION_LEFT_UP'?
case DRM_MODE_PANEL_ORIENTATION_RIGHT_UP:
^~~
DRM_MODE_PANEL_ORIENTATION_LEFT_UP
vim +339 drivers/video/fbdev/efifb.c
157
158 static int efifb_probe(struct platform_device *dev)
159 {
160 struct fb_info *info;
161 int err, orientation;
162 unsigned int size_vmode;
163 unsigned int size_remap;
164 unsigned int size_total;
165 char *option = NULL;
166
167 if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI ||
pci_dev_disabled)
168 return -ENODEV;
169
170 if (fb_get_options("efifb", &option))
171 return -ENODEV;
172 efifb_setup(option);
173
174 /* We don't get linelength from UGA Draw Protocol, only from
175 * EFI Graphics Protocol. So if it's not in DMI, and it's not
176 * passed in from the user, we really can't use the framebuffer.
177 */
178 if (!screen_info.lfb_linelength)
179 return -ENODEV;
180
181 if (!screen_info.lfb_depth)
182 screen_info.lfb_depth = 32;
183 if (!screen_info.pages)
184 screen_info.pages = 1;
185 if (!fb_base_is_valid()) {
186 printk(KERN_DEBUG "efifb: invalid framebuffer
address\n");
187 return -ENODEV;
188 }
189 printk(KERN_INFO "efifb: probing for efifb\n");
190
191 /* just assume they're all unset if any are */
192 if (!screen_info.blue_size) {
193 screen_info.blue_size = 8;
194 screen_info.blue_pos = 0;
195 screen_info.green_size = 8;
196 screen_info.green_pos = 8;
197 screen_info.red_size = 8;
198 screen_info.red_pos = 16;
199 screen_info.rsvd_size = 8;
200 screen_info.rsvd_pos = 24;
201 }
202
203 efifb_fix.smem_start = screen_info.lfb_base;
204
205 if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE) {
206 u64 ext_lfb_base;
207
208 ext_lfb_base = (u64)(unsigned
long)screen_info.ext_lfb_base << 32;
209 efifb_fix.smem_start |= ext_lfb_base;
210 }
211
212 if (bar_resource &&
213 bar_resource->start + bar_offset != efifb_fix.smem_start) {
214 dev_info(&efifb_pci_dev->dev,
215 "BAR has moved, updating efifb address\n");
216 efifb_fix.smem_start = bar_resource->start + bar_offset;
217 }
218
219 efifb_defined.bits_per_pixel = screen_info.lfb_depth;
220 efifb_defined.xres = screen_info.lfb_width;
221 efifb_defined.yres = screen_info.lfb_height;
222
[Intel-gfx] [PATCH] drm/i915/cnl: apply Display WA #1178 to fix type C dongles
Display WA #1178 is meant to fix Aux channel voltage swing too low with
some type C dongles. Although it is for type C, HW engineers reported
that it can be applied to all external ports even if they are not going
to type C.
For CNL we apply the workaround every time Aux B, C and D are powering
up since they will lose the configuration when powered down.
v2: Use common tag for WA
Cc: Rodrigo Vivi
Cc: Arthur J Runyan
Cc: Ville Syrjälä
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_reg.h | 11 +++
drivers/gpu/drm/i915/intel_runtime_pm.c | 9 +
2 files changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 09bf043c1c2e..0214327d8af7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8335,6 +8335,17 @@ enum skl_power_gate {
#define SKL_PW_TO_PG(pw) ((pw) - SKL_DISP_PW_1 + SKL_PG1)
#define SKL_FUSE_PG_DIST_STATUS(pg) (1 << (27 - (pg)))
+#define _CNL_AUX_REG_IDX(pw) ((pw - 1) >> 4)
+#define _CNL_AUX_ANAOVRD1_B0x162250
+#define _CNL_AUX_ANAOVRD1_C0x162210
+#define _CNL_AUX_ANAOVRD1_D0x1622D0
+#define CNL_AUX_ANAOVRD1(pw) _MMIO(_PICK(_CNL_AUX_REG_IDX(pw), \
+ _CNL_AUX_ANAOVRD1_B, \
+ _CNL_AUX_ANAOVRD1_C, \
+ _CNL_AUX_ANAOVRD1_D))
+#define CNL_AUX_ANAOVRD1_ENABLE (1<<16)
+#define CNL_AUX_ANAOVRD1_LDO_BYPASS (1<<23)
+
/* Per-pipe DDI Function Control */
#define _TRANS_DDI_FUNC_CTL_A 0x60400
#define _TRANS_DDI_FUNC_CTL_B 0x61400
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8315499452dc..29f14e724f41 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -388,6 +388,15 @@ static void hsw_power_well_enable(struct drm_i915_private
*dev_priv,
I915_WRITE(HSW_PWR_WELL_CTL_DRIVER(id), val | HSW_PWR_WELL_CTL_REQ(id));
hsw_wait_for_power_well_enable(dev_priv, power_well);
+ /* Display WA #1178: cnl */
+ if (IS_CANNONLAKE(dev_priv) &&
+ (id == CNL_DISP_PW_AUX_B || id == CNL_DISP_PW_AUX_C ||
+id == CNL_DISP_PW_AUX_D)) {
+ val = I915_READ(CNL_AUX_ANAOVRD1(id));
+ val |= CNL_AUX_ANAOVRD1_ENABLE | CNL_AUX_ANAOVRD1_LDO_BYPASS;
+ I915_WRITE(CNL_AUX_ANAOVRD1(id), val);
+ }
+
if (wait_fuses)
gen9_wait_for_power_well_fuses(dev_priv, pg);
--
2.14.3
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Re: [Intel-gfx] [PATCH 3/4] drm/i915: expose engine availability through sysfs
Quoting Chris Wilson (2017-11-28 20:56:23)
> Quoting Tvrtko Ursulin (2017-11-28 18:17:54)
> >
> > On 20/11/2017 12:23, Lionel Landwerlin wrote:
> > > This enables userspace to discover the engines available on the GPU.
> > > Here is the layout on a Skylake GT4:
> > >
> > > /sys/devices/pci:00/:00:02.0/drm/card0/gt
> >
> > On this one I think Joonas had a concern that it is difficult for
> > userspace to get to the sysfs root from the drm file descriptor.
> >
> > Lionel pointed out that for master nodes it is quite easy:
> >
> > fstat(fd, &st);
> > sprintf(sysfs_root, "/sys/dev/char/%u:%u", major(st.st_rdev),
> > minor(st.st_rdev));
> >
> > For render nodes it is trickier in a way that they would have to
> > additional resolve an unknown master drm card number. For instance:
> >
> > /sys/dev/char/%u:%u/device/drm/cardX
> >
> > Where the "X" is unknown.
> >
> > But, is it even an use case for render nodes to try and get to the
> > sysfs root of the master card? Are they allowed to do so?
>
> Yes. Mesa uses render nodes, and mesa needs the topology for its
> performance monitoring api.
So /sys/dev/char/226:128/ does not link to /sys/dev/char/226:0/. Maybe
we should just add a card symlink from each minor back to our sysfs
root? That seems doable.
Then we just need open("/sys/dev/char/%u:%u/card");
-Chris
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: follow single notation for workaround number
== Series Details == Series: series starting with [1/2] drm/i915: follow single notation for workaround number URL : https://patchwork.freedesktop.org/series/34563/ State : success == Summary == Series 34563v1 series starting with [1/2] drm/i915: follow single notation for workaround number https://patchwork.freedesktop.org/api/1.0/series/34563/revisions/1/mbox/ Test gem_exec_reloc: Subgroup basic-gtt-cpu-active: pass -> FAIL (fi-gdg-551) fdo#102582 +2 fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:438s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:383s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:503s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:279s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:501s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:502s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:485s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:468s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:428s fi-gdg-551 total:288 pass:175 dwarn:1 dfail:0 fail:4 skip:108 time:278s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:537s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:382s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:260s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:424s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:470s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:487s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:525s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:482s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:581s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:452s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:538s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:563s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:514s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:450s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:547s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:419s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:609s fi-cnl-y total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:557s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:490s 5144438448829ec2a3d94fd16a9e69a52cfa7b3b drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest 0a09ce08ab58 drm/i915: add platform tag to WA b22eefcbab09 drm/i915: follow single notation for workaround number == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7330/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: add platform tag to WA
Cc: Ville Syrjälä Signed-off-by: Lucas De Marchi --- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 691600ce48c4..c42a6c672b73 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1380,7 +1380,7 @@ static bool hdmi_12bpc_possible(const struct intel_crtc_state *crtc_state) } } - /* Display WA #1139 */ + /* Display WA #1139: glk */ if (IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && crtc_state->base.adjusted_mode.htotal > 5460) return false; -- 2.14.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: follow single notation for workaround number
Cc: Ville Syrjälä
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_hdmi.c| 2 +-
drivers/gpu/drm/i915/intel_pm.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 76c75d34e799..9a0ebf205435 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -15126,7 +15126,7 @@ get_encoder_power_domains(struct drm_i915_private
*dev_priv)
static void intel_early_display_was(struct drm_i915_private *dev_priv)
{
- /* Display WA #1185 WaDisableDARBFClkGating:cnl,glk */
+ /* Display WA #1185 WaDisableDARBFClkGating: cnl,glk */
if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv))
I915_WRITE(GEN9_CLKGATE_DIS_0, I915_READ(GEN9_CLKGATE_DIS_0) |
DARBF_GATING_DIS);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 9d5e72728475..691600ce48c4 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1380,7 +1380,7 @@ static bool hdmi_12bpc_possible(const struct
intel_crtc_state *crtc_state)
}
}
- /* Display Wa #1139 */
+ /* Display WA #1139 */
if (IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) &&
crtc_state->base.adjusted_mode.htotal > 5460)
return false;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a80c322c5b43..7905b8313e40 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -61,7 +61,7 @@ static void gen9_init_clock_gating(struct drm_i915_private
*dev_priv)
if (HAS_LLC(dev_priv)) {
/*
* WaCompressedResourceDisplayNewHashMode:skl,kbl
-* Display WA#0390: skl,kbl
+* Display WA #0390: skl,kbl
*
* Must match Sampler, Pixel Back End, and Media. See
* WaCompressedResourceSamplerPbeMediaNewHashMode.
--
2.14.3
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Re: [Intel-gfx] [PATCH v6 6/7] efifb: Set info->fbcon_rotate_hint based on drm_get_panel_orientation_quirk
Hi Hans,
I love your patch! Yet something to improve:
[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.15-rc1 next-20171128]
[cannot apply to linus/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-fbdev-Panel-orientation-connector-property-support/20171129-001142
base: git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-randconfig-s1-11282357 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/video/fbdev/efifb.c: In function 'efifb_probe':
drivers/video/fbdev/efifb.c:339:7: error:
'DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP' undeclared (first use in this function)
case DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP:
^~~~
drivers/video/fbdev/efifb.c:339:7: note: each undeclared identifier is
reported only once for each function it appears in
>> drivers/video/fbdev/efifb.c:342:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_LEFT_UP' undeclared (first use in this function)
case DRM_MODE_PANEL_ORIENTATION_LEFT_UP:
^~
>> drivers/video/fbdev/efifb.c:345:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_RIGHT_UP' undeclared (first use in this function)
case DRM_MODE_PANEL_ORIENTATION_RIGHT_UP:
^~~
vim +/DRM_MODE_PANEL_ORIENTATION_LEFT_UP +342 drivers/video/fbdev/efifb.c
157
158 static int efifb_probe(struct platform_device *dev)
159 {
160 struct fb_info *info;
161 int err, orientation;
162 unsigned int size_vmode;
163 unsigned int size_remap;
164 unsigned int size_total;
165 char *option = NULL;
166
167 if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI ||
pci_dev_disabled)
168 return -ENODEV;
169
170 if (fb_get_options("efifb", &option))
171 return -ENODEV;
172 efifb_setup(option);
173
174 /* We don't get linelength from UGA Draw Protocol, only from
175 * EFI Graphics Protocol. So if it's not in DMI, and it's not
176 * passed in from the user, we really can't use the framebuffer.
177 */
178 if (!screen_info.lfb_linelength)
179 return -ENODEV;
180
181 if (!screen_info.lfb_depth)
182 screen_info.lfb_depth = 32;
183 if (!screen_info.pages)
184 screen_info.pages = 1;
185 if (!fb_base_is_valid()) {
186 printk(KERN_DEBUG "efifb: invalid framebuffer
address\n");
187 return -ENODEV;
188 }
189 printk(KERN_INFO "efifb: probing for efifb\n");
190
191 /* just assume they're all unset if any are */
192 if (!screen_info.blue_size) {
193 screen_info.blue_size = 8;
194 screen_info.blue_pos = 0;
195 screen_info.green_size = 8;
196 screen_info.green_pos = 8;
197 screen_info.red_size = 8;
198 screen_info.red_pos = 16;
199 screen_info.rsvd_size = 8;
200 screen_info.rsvd_pos = 24;
201 }
202
203 efifb_fix.smem_start = screen_info.lfb_base;
204
205 if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE) {
206 u64 ext_lfb_base;
207
208 ext_lfb_base = (u64)(unsigned
long)screen_info.ext_lfb_base << 32;
209 efifb_fix.smem_start |= ext_lfb_base;
210 }
211
212 if (bar_resource &&
213 bar_resource->start + bar_offset != efifb_fix.smem_start) {
214 dev_info(&efifb_pci_dev->dev,
215 "BAR has moved, updating efifb address\n");
216 efifb_fix.smem_start = bar_resource->start + bar_offset;
217 }
218
219 efifb_defined.bits_per_pixel = screen_info.lfb_depth;
220 efifb_defined.xres = screen_info.lfb_width;
221 efifb_defined.yres = screen_info.lfb_height;
222 efifb_fix.line_length = screen_info.lfb_linelength;
223
224 /* size_vmode -- that is the amount of memory needed for the
225 * used video mode, i.e. the minimum amount of
226 * memory we need. */
227 size_vmode = efifb_
Re: [Intel-gfx] [PATCH] drm/i915: Fix deadlock in i830_disable_pipe()
Quoting Ville Syrjala (2017-11-28 15:48:53)
> From: Ville Syrjälä
>
> i830_disable_pipe() gets called from the power well code, and thus
> we're already holding the power domain mutex. That means we can't
> call plane->get_hw_state() as it will also try to grab the
> same mutex and will thus deadlock.
>
> Replace the assert_plane() calls (which calls ->get_hw_state()) with
> just raw register reads in i830_disable_pipe(). As a bonus we can
> now get a warning if plane C is enabled even though we don't even
> expose it as a drm plane.
>
> Fixes: 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes")
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/intel_display.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index d67c7c498b34..48d9332b196f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14731,8 +14731,11 @@ void i830_disable_pipe(struct drm_i915_private
> *dev_priv, enum pipe pipe)
> DRM_DEBUG_KMS("disabling pipe %c due to force quirk\n",
> pipe_name(pipe));
>
> - assert_planes_disabled(intel_get_crtc_for_pipe(dev_priv, PIPE_A));
> - assert_planes_disabled(intel_get_crtc_for_pipe(dev_priv, PIPE_B));
> + WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE ||
> + I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE ||
> + I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE ||
> + I915_READ(CURCNTR(PIPE_A)) & CURSOR_MODE ||
> + I915_READ(CURCNTR(PIPE_B)) & CURSOR_MODE);
Ok. Avoiding mutex recursion sounds sensible, but a recursion sounds
like a layering violation. i830_disable_pipe is only used by the
powerwell, and I guess you could make the i830_enable_pipe in
i9xx_crtc_disable into a call to the powerdomain instead.
That sounds like more work than desired to fix the immediate problem!
However, I think you will miss the loss in precision by putting all the
checks into one WARN_ON. If it either fires, we've no idea what went
wrong?
Would it be worth just making each of those a separate WARN_ON()? I
think so.
Either way, I've checked that your explanation matches the code...
Reviewed-by: Chris Wilson
-Chris
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Re: [Intel-gfx] [PATCH 3/4] drm/i915: expose engine availability through sysfs
Quoting Tvrtko Ursulin (2017-11-28 18:17:54) > > On 20/11/2017 12:23, Lionel Landwerlin wrote: > > This enables userspace to discover the engines available on the GPU. > > Here is the layout on a Skylake GT4: > > > > /sys/devices/pci:00/:00:02.0/drm/card0/gt > > On this one I think Joonas had a concern that it is difficult for > userspace to get to the sysfs root from the drm file descriptor. > > Lionel pointed out that for master nodes it is quite easy: > > fstat(fd, &st); > sprintf(sysfs_root, "/sys/dev/char/%u:%u", major(st.st_rdev), > minor(st.st_rdev)); > > For render nodes it is trickier in a way that they would have to > additional resolve an unknown master drm card number. For instance: > > /sys/dev/char/%u:%u/device/drm/cardX > > Where the "X" is unknown. > > But, is it even an use case for render nodes to try and get to the > sysfs root of the master card? Are they allowed to do so? Yes. Mesa uses render nodes, and mesa needs the topology for its performance monitoring api. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t 2/3] lib/igt_sysfs: igt_sysfs_path only works for master nodes
Quoting Tvrtko Ursulin (2017-11-28 18:09:56) > From: Tvrtko Ursulin > > DRM code defines the minor range for master nodes as 0-63, so express that > explicitly near the top of the function. We do use rendernodes, so we had better support them correctly. I thought the premise of /sys/dev/char/$maj:$min/ was that it would work with render as well as master nodes. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t 1/3] lib/igt_sysfs: Remove support for finding sysfs path with no device opened
Quoting Tvrtko Ursulin (2017-11-28 18:09:55) > From: Tvrtko Ursulin > > It looks like no callers actually use this so remove it to simplify. We just added more users to the equivalent for debugfs, and accepting -1 here was simply to have consistency with our debugfs api. If that makes any difference, principle of least surprise or something. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 5/7] drm/i915: Add "panel orientation" property to the panel connector, v6.
Hi Hans,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.15-rc1 next-20171128]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-fbdev-Panel-orientation-connector-property-support/20171128-225025
config: x86_64-randconfig-x012-201748 (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_dsi.c: In function
'intel_dsi_get_panel_orientation':
drivers/gpu/drm/i915/intel_dsi.c:1672:21: error: storage size of 'plane'
isn't known
enum i9xx_plane_id plane;
^
>> drivers/gpu/drm/i915/intel_dsi.c:1672:21: error: unused variable 'plane'
>> [-Werror=unused-variable]
cc1: all warnings being treated as errors
vim +/plane +1672 drivers/gpu/drm/i915/intel_dsi.c
1667
1668 static int intel_dsi_get_panel_orientation(struct intel_connector
*connector)
1669 {
1670 struct drm_i915_private *dev_priv =
to_i915(connector->base.dev);
1671 int orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> 1672 enum i9xx_plane_id plane;
1673 u32 val;
1674
1675 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1676 if (connector->encoder->crtc_mask == BIT(PIPE_B))
1677 plane = PLANE_B;
1678 else
1679 plane = PLANE_A;
1680
1681 val = I915_READ(DSPCNTR(plane));
1682 if (val & DISPPLANE_ROTATE_180)
1683 orientation =
DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1684 }
1685
1686 return orientation;
1687 }
1688
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
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[Intel-gfx] ✓ Fi.CI.BAT: success for Simplify hunting for drm card sysfs root
== Series Details == Series: Simplify hunting for drm card sysfs root URL : https://patchwork.freedesktop.org/series/34559/ State : success == Summary == IGT patchset tested on top of latest successful build 380cc811486ba3fefbe3ebe4761afa7e169dcd3e tests/perf_pmu: Sync invalid-init with i915 changes with latest DRM-Tip kernel build CI_DRM_3402 514443844882 drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest No testlist changes. Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:446s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:449s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:382s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:521s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:278s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:500s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:483s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:475s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:426s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:269s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:539s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:374s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:262s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:480s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:484s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:525s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:478s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:531s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:452s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:538s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:568s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:518s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:451s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:421s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:602s fi-cnl-y total:217 pass:196 dwarn:0 dfail:0 fail:0 skip:20 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:490s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_560/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Fix doc reference to intel_guc_fw.c
== Series Details == Series: drm/i915/guc: Fix doc reference to intel_guc_fw.c URL : https://patchwork.freedesktop.org/series/34557/ State : success == Summary == Series 34557v1 drm/i915/guc: Fix doc reference to intel_guc_fw.c https://patchwork.freedesktop.org/api/1.0/series/34557/revisions/1/mbox/ Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-legacy: pass -> FAIL (fi-gdg-551) fdo#102618 fdo#102618 https://bugs.freedesktop.org/show_bug.cgi?id=102618 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:442s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:445s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:389s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:514s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:279s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:500s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:484s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:465s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:424s fi-gdg-551 total:288 pass:177 dwarn:1 dfail:0 fail:2 skip:108 time:278s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:537s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:370s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:258s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:428s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:480s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:481s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:530s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:474s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:523s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:583s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:446s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:538s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:558s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:515s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:507s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:447s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:550s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:414s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:603s fi-cnl-y total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:557s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:478s 5144438448829ec2a3d94fd16a9e69a52cfa7b3b drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest 199eb77ebe81 drm/i915/guc: Fix doc reference to intel_guc_fw.c == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7329/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] lockdep: finer-grained completion key for kthread
== Series Details == Series: series starting with [1/2] lockdep: finer-grained completion key for kthread URL : https://patchwork.freedesktop.org/series/34556/ State : success == Summary == Series 34556v1 series starting with [1/2] lockdep: finer-grained completion key for kthread https://patchwork.freedesktop.org/api/1.0/series/34556/revisions/1/mbox/ fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:421s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:427s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:454s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:253s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:471s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:470s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:443s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:427s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:409s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:240s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:514s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:374s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:246s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:409s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:464s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:476s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:460s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:513s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:482s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:433s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:525s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:547s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:505s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:479s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:432s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:544s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:400s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:600s fi-cnl-y total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:583s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:461s fi-blb-e6850 failed to collect. IGT log at Patchwork_7328/fi-blb-e6850/igt.log fi-kbl-7560u failed to collect. IGT log at Patchwork_7328/fi-kbl-7560u/igt.log 5144438448829ec2a3d94fd16a9e69a52cfa7b3b drm-tip: 2017y-11m-28d-17h-04m-56s UTC integration manifest 77504fcd19ba lockdep: Up MAX_LOCKDEP_CHAINS 0dc70bf6d898 lockdep: finer-grained completion key for kthread == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7328/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915: expose engine availability through sysfs
On 20/11/2017 12:23, Lionel Landwerlin wrote:
> This enables userspace to discover the engines available on the GPU.
> Here is the layout on a Skylake GT4:
>
> /sys/devices/pci:00/:00:02.0/drm/card0/gt
On this one I think Joonas had a concern that it is difficult for
userspace to get to the sysfs root from the drm file descriptor.
Lionel pointed out that for master nodes it is quite easy:
fstat(fd, &st);
sprintf(sysfs_root, "/sys/dev/char/%u:%u", major(st.st_rdev),
minor(st.st_rdev));
For render nodes it is trickier in a way that they would have to
additional resolve an unknown master drm card number. For instance:
/sys/dev/char/%u:%u/device/drm/cardX
Where the "X" is unknown.
But, is it even an use case for render nodes to try and get to the
sysfs root of the master card? Are they allowed to do so?
Regards,
Tvrtko
> ├── bcs
> │ └── 0
> │ ├── capabilities
> │ ├── class
> │ └── id
> ├── rcs
> │ └── 0
> │ ├── capabilities
> │ ├── class
> │ └── id
> ├── vcs
> │ ├── 0
> │ │ ├── capabilities
> │ │ │ └── hevc
> │ │ ├── class
> │ │ └── id
> │ └── 1
> │ ├── capabilities
> │ ├── class
> │ └── id
> └── vecs
> └── 0
> ├── capabilities
> ├── class
> └── id
>
> Further capabilities can be added later as attributes of each engine.
>
> v2: Add capabilities sub directory (Tvrtko)
> Move engines directory to drm/card/gt (Chris)
>
> Signed-off-by: Lionel Landwerlin
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/i915_sysfs.c | 160
>
> drivers/gpu/drm/i915/intel_engine_cs.c | 12 +++
> drivers/gpu/drm/i915/intel_ringbuffer.h | 4 +
> 5 files changed, 182 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 78c49db4280a..db550322207c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2729,6 +2729,11 @@ struct drm_i915_private {
> } oa;
> } perf;
>
> + struct {
> + struct kobject kobj;
> + struct kobject classes_kobjs[MAX_ENGINE_CLASS];
> + } gt_topology;
> +
> /* Abstract the submission mechanism (legacy ringbuffer or execlists)
> away */
> struct {
> void (*resume)(struct drm_i915_private *);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 96c80fa0fcac..17aecd4fc6aa 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -186,6 +186,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define VIDEO_ENHANCEMENT_CLASS 2
> #define COPY_ENGINE_CLASS 3
> #define OTHER_CLASS 4
> +#define MAX_ENGINE_CLASS 5
>
> /* PCI config space */
>
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
> b/drivers/gpu/drm/i915/i915_sysfs.c
> index 791759f632e1..fd04d0b93eaf 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -559,6 +559,160 @@ static void i915_setup_error_capture(struct device
> *kdev) {}
> static void i915_teardown_error_capture(struct device *kdev) {}
> #endif
>
> +static struct attribute engine_id_attr = {
> + .name = "id",
> + .mode = 0444,
> +};
> +
> +static struct attribute engine_class_attr = {
> + .name = "class",
> + .mode = 0444,
> +};
> +
> +static ssize_t
> +show_engine_attr(struct kobject *kobj, struct attribute *attr, char *buf)
> +{
> + struct intel_engine_cs *engine =
> + container_of(kobj, struct intel_engine_cs, instance_kobj);
> +
> + if (attr == &engine_id_attr)
> + return sprintf(buf, "%hhu\n", engine->uabi_id);
> + if (attr == &engine_class_attr)
> + return sprintf(buf, "%hhu\n", engine->uabi_class);
> + return sprintf(buf, "\n");
> +}
> +
> +static const struct sysfs_ops engine_ops = {
> + .show = show_engine_attr,
> +};
> +
> +static struct kobj_type engine_type = {
> + .sysfs_ops = &engine_ops,
> +};
> +
> +static struct attribute engine_capability_hevc_attr = {
> + .name = "hevc",
> + .mode = 0444,
> +};
> +
> +static ssize_t
> +show_engine_capabilities_attr(struct kobject *kobj, struct attribute *attr,
> char *buf)
> +{
> + struct intel_engine_cs *engine =
> + container_of(kobj, struct intel_engine_cs, capabilities_kobj);
> +
> + if (attr == &engine_capability_hevc_attr)
> + return sprintf(buf, "%i\n", INTEL_GEN(engine->i915) >= 8);
> + return sprintf(buf, "\n");
> +}
> +
> +static const struct sysfs_ops engine_capabilities_ops = {
> + .show = show_engine_capabilities_attr,
> +};
> +
> +static struct kobj_type engine_capabilities_type = {
> + .sysfs_ops = &engine_capabilities_ops,
> +};
> +
> +static int i915_setup_engines_sysfs(struct drm_i915_private *dev_priv,
>
[Intel-gfx] [PATCH i-g-t 2/3] lib/igt_sysfs: igt_sysfs_path only works for master nodes
From: Tvrtko Ursulin
DRM code defines the minor range for master nodes as 0-63, so express that
explicitly near the top of the function.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_sysfs.c | 4
1 file changed, 4 insertions(+)
diff --git a/lib/igt_sysfs.c b/lib/igt_sysfs.c
index dd057dc04947..f0fef8d434ef 100644
--- a/lib/igt_sysfs.c
+++ b/lib/igt_sysfs.c
@@ -105,6 +105,10 @@ char *igt_sysfs_path(int device, char *path, int pathlen,
int *idx)
if (device < 0 || fstat(device, &st) || !S_ISCHR(st.st_mode))
return NULL;
+ /* Only support master nodes. */
+ if (minor(st.st_rdev) >= 64)
+ return NULL;
+
for (int n = 0; n < 16; n++) {
int len = snprintf(path, pathlen, "/sys/class/drm/card%d", n);
int ret, maj, min;
--
2.14.1
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[Intel-gfx] [PATCH i-g-t 1/3] lib/igt_sysfs: Remove support for finding sysfs path with no device opened
From: Tvrtko Ursulin
It looks like no callers actually use this so remove it to simplify.
Signed-off-by: Tvrtko Ursulin
---
lib/igt_sysfs.c | 39 ---
1 file changed, 16 insertions(+), 23 deletions(-)
diff --git a/lib/igt_sysfs.c b/lib/igt_sysfs.c
index e7c67dae3a13..dd057dc04947 100644
--- a/lib/igt_sysfs.c
+++ b/lib/igt_sysfs.c
@@ -102,33 +102,26 @@ char *igt_sysfs_path(int device, char *path, int pathlen,
int *idx)
{
struct stat st;
- if (device != -1 && (fstat(device, &st) || !S_ISCHR(st.st_mode)))
+ if (device < 0 || fstat(device, &st) || !S_ISCHR(st.st_mode))
return NULL;
for (int n = 0; n < 16; n++) {
int len = snprintf(path, pathlen, "/sys/class/drm/card%d", n);
- if (device != -1) {
- FILE *file;
- int ret, maj, min;
-
- sprintf(path + len, "/dev");
- file = fopen(path, "r");
- if (!file)
- continue;
-
- ret = fscanf(file, "%d:%d", &maj, &min);
- fclose(file);
-
- if (ret != 2 ||
- major(st.st_rdev) != maj ||
- minor(st.st_rdev) != min)
- continue;
- } else {
- /* Bleh. Search for intel */
- sprintf(path + len, "/error");
- if (stat(path, &st))
- continue;
- }
+ int ret, maj, min;
+ FILE *file;
+
+ sprintf(path + len, "/dev");
+ file = fopen(path, "r");
+ if (!file)
+ continue;
+
+ ret = fscanf(file, "%d:%d", &maj, &min);
+ fclose(file);
+
+ if (ret != 2 ||
+ major(st.st_rdev) != maj ||
+ minor(st.st_rdev) != min)
+ continue;
path[len] = '\0';
if (idx)
--
2.14.1
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[Intel-gfx] [PATCH i-g-t 0/3] Simplify hunting for drm card sysfs root
From: Tvrtko Ursulin Short series to clean up the code and bit. Thanks to Lionel for pointing out the convenient /sys/dev/char/: symlink. Tvrtko Ursulin (3): lib/igt_sysfs: Remove support for finding sysfs path with no device opened lib/igt_sysfs: igt_sysfs_path only works for master nodes lib/igt_sysfs: Simplify igt_sysfs_path lib/igt_sysfs.c | 47 --- 1 file changed, 16 insertions(+), 31 deletions(-) -- 2.14.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 3/3] lib/igt_sysfs: Simplify igt_sysfs_path
From: Tvrtko Ursulin
There is no need to iterate over /sys/class/drm/card* directories looking
for the one which matches our major and minor, when we can directly find
the right one via the /sys/dev/char/: symlink.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Lionel Landwerlin
---
lib/igt_sysfs.c | 36
1 file changed, 12 insertions(+), 24 deletions(-)
diff --git a/lib/igt_sysfs.c b/lib/igt_sysfs.c
index f0fef8d434ef..a4a87711ed0c 100644
--- a/lib/igt_sysfs.c
+++ b/lib/igt_sysfs.c
@@ -100,40 +100,28 @@ static int writeN(int fd, const char *buf, int len)
*/
char *igt_sysfs_path(int device, char *path, int pathlen, int *idx)
{
+ unsigned int maj, min;
struct stat st;
+ int len;
if (device < 0 || fstat(device, &st) || !S_ISCHR(st.st_mode))
return NULL;
+ maj = major(st.st_rdev);
+ min = minor(st.st_rdev);
+
/* Only support master nodes. */
- if (minor(st.st_rdev) >= 64)
+ if (min >= 64)
return NULL;
- for (int n = 0; n < 16; n++) {
- int len = snprintf(path, pathlen, "/sys/class/drm/card%d", n);
- int ret, maj, min;
- FILE *file;
-
- sprintf(path + len, "/dev");
- file = fopen(path, "r");
- if (!file)
- continue;
-
- ret = fscanf(file, "%d:%d", &maj, &min);
- fclose(file);
-
- if (ret != 2 ||
- major(st.st_rdev) != maj ||
- minor(st.st_rdev) != min)
- continue;
+ len = snprintf(path, pathlen, "/sys/dev/char/%u:%u", maj, min);
+ if (len == pathlen)
+ return NULL;
- path[len] = '\0';
- if (idx)
- *idx = n;
- return path;
- }
+ if (idx)
+ *idx = min;
- return NULL;
+ return path;
}
/**
--
2.14.1
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Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
Quoting Tvrtko Ursulin (2017-11-28 17:29:25)
>
> On 28/11/2017 16:04, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2017-11-28 13:07:54)
> >>
> >> On 28/11/2017 12:48, Chris Wilson wrote:
> >>> Quoting Tvrtko Ursulin (2017-11-28 12:41:27)
> From: Tvrtko Ursulin
>
> Move the execlists specific setup out of intel_engine_setup_common. This
> was supposed to be only for backend agnostic bits. At the same time
> rename
> it to intel_engine_setup_execlist to follow the setup vs init naming
> convetion we have.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> +static void
> +intel_engine_setup_execlist(struct intel_engine_cs *engine)
> +{
> + struct intel_engine_execlists * const execlists =
> &engine->execlists;
> +
> + execlists->csb_use_mmio = csb_force_mmio(engine->i915);
> +
> + execlists->port_mask = 1;
> + BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
> + GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
> +
> + execlists->queue = RB_ROOT;
> + execlists->first = NULL;
> +}
> >>>
> >>> The only problem here was that we wanted to be sure that some fields
> >>> were initialised for the common paths, i.e. so we could iterate over the
> >>> queue without worrying first if it was execlists (if it wasn't execlists
> >>> the queue would be empty).
> >>>
> >>> Now, I think we could just rely on zero initialisation, but that was the
> >>> rationale for it ending up early. Now we could split it between
> >>> setup_execlists and init_execlists if we want the pedantry.
> >>
> >> Common paths as in ringbuffer submission? I grepped around and don't see
> >> it used there.
> >
> > See the reset code, the debug code, etc; in the common layer, above the
> > backends, we want to be neutral.
> >
> >> Then about setup vs init, we said init is for hw access so I don't
> >> follow how you would split the above?
> >
> > init_hw is for initialising hw. Better names for the phases is still
> > open :)
>
> Okay I found execlists->first usage in intel_engine_dump, so one so far.
Keep looking.
> That could be made conditional,
No. It already is conditional on the derived state.
or if there are other places abstracted
> out to the backend implementation. It could be that I just did not find
> more due too much context switching?
>
> This way or the other, I did not want to put a code like "if
> (HAS_EXECLISTS(i915)) ..." in the function called
> intel_engine_init_execlists. That's just wrong.
>
> And I'd say it's equally wrong to call intel_engine_init_execlists
It's wrong to initialised the shared structure?
> from
> _intel_engine_setup_common_, because the spiritual starting point for
> this common setup refactoring was to only put there bits _common_ to
> both backends.
>
> If you want to keep this approach of letting the higher layers just
> assume they can access backend specific parts then simplest would be I
> just drop this patch and put that ugly "if HAS_EXECLISTS" where I don't
> want to put it. Can view it as interim and fixup later?
Don't break it in this patch, and you won't have to do either?
-Chris
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[Intel-gfx] [PATCH] drm/i915/guc: Fix doc reference to intel_guc_fw.c
Sphinx complains that it can't find intel_guc_loader.c, and rightly so:
The file has been renamed.
Fixes: e8668bbcb0f9 ("drm/i915/guc: Rename intel_guc_loader.c to
intel_guc_fw.c")
Cc: Michal Wajdeczko
Signed-off-by: Jonathan Neuschäfer
---
Documentation/gpu/i915.rst | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 2e7ee0313c1c..e21698e16534 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -341,10 +341,10 @@ GuC
GuC-specific firmware loader
-.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
+.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
:doc: GuC-specific firmware loader
-.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
+.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
:internal:
GuC-based command submission
--
2.15.0
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Re: [Intel-gfx] [PATCH V3 24/29] backlight: deprecate pci_get_bus_and_slot()
On Monday, November 27, 2017 11:58 AM, Sinan Kaya wrote:
>
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
I think that this will be useful. I introduced multi domains into
ARM-based PCIe driver. (e.g. domain 0, and domain 1) So, APIs to choose
domain will be used later.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
> pci_get_domain_bus_and_slot().
>
> Hard-coding the domain as 0.
>
> Acked-by: Daniel Thompson
> Signed-off-by: Sinan Kaya
Acked-by: Jingoo Han
Best regards,
Jingoo Han
> ---
> drivers/video/backlight/apple_bl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/video/backlight/apple_bl.c
> b/drivers/video/backlight/apple_bl.c
> index d843296..6a34ab9 100644
> --- a/drivers/video/backlight/apple_bl.c
> +++ b/drivers/video/backlight/apple_bl.c
> @@ -143,7 +143,7 @@ static int apple_bl_add(struct acpi_device *dev)
> struct pci_dev *host;
> int intensity;
>
> - host = pci_get_bus_and_slot(0, 0);
> + host = pci_get_domain_bus_and_slot(0, 0, 0);
>
> if (!host) {
> pr_err("unable to find PCI host\n");
> --
> 1.9.1
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Re: [Intel-gfx] [PATCH] drm/fb_helper: Disable all crtc's when initial setup fails.
On Tue, 28 Nov 2017, Daniel Vetter wrote:
On Tue, Nov 28, 2017 at 12:16:03PM +0100, Maarten Lankhorst wrote:
Some drivers like i915 start with crtc's enabled, but with deferred
fbcon setup they were no longer disabled as part of fbdev setup.
Headless units could no longer enter pc3 state because the crtc was
still enabled.
Fix this by calling restore_fbdev_mode when we would have called
it otherwise once during initial fbdev setup.
Signed-off-by: Maarten Lankhorst
Fixes: ca91a2758fce ("drm/fb-helper: Support deferred setup")
Please use dim fixes to get a more complete Cc: list for regression fixes.
Cc: # v4.14+
Reported-by: Thomas Voegtle
Reviewed-by: Daniel Vetter
But please confirm with the reporter that it indeed fixes the issue before
pushing.
-Daniel
I re-checked the latest version of the patch and it indeed fixes the
problem.
Thanks,
Thomas
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Re: [Intel-gfx] [PATCH] drm/i915/guc: Fix doc reference to intel_guc_fw.c
On Tue, Nov 28, 2017 at 09:51:13AM +0100, Michal Wajdeczko wrote:
> On Tue, 28 Nov 2017 07:50:52 +0100, Jonathan Neuschäfer
> wrote:
>
> > Sphinx complains that it can't find intel_guc_loader.c, and rightly so:
> > The file has been renamed.
> >
> > Fixes: e8668bbcb0f9 ("drm/i915/guc: Rename intel_guc_loader.c to
> > intel_guc_fw.c")
> > Cc: Michal Wajdeczko
> > Signed-off-by: Jonathan Neuschäfer
> > ---
> > Documentation/gpu/i915.rst | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
> > index 2e7ee0313c1c..e21698e16534 100644
> > --- a/Documentation/gpu/i915.rst
> > +++ b/Documentation/gpu/i915.rst
> > @@ -341,10 +341,10 @@ GuC
> > GuC-specific firmware loader
> >
> > -.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
> > +.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
> > :doc: GuC-specific firmware loader
> > -.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
> > +.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
> > :internal:
> > GuC-based command submission
>
> + Ville
>
> Well, this will fix sphinx error, but in my opinion it will not make
> i915 documentation any better. See my earlier patch/comments in [1].
Thanks for the pointer.
Hmm, right, given that there's no "DOC:" line in intel_guc_fw.c anymore,
the ":doc:" directive above is not useful.
As a tiny step towards more complete documentation (and to keep people
from patching this spot again ;), IMHO it makes sense to do this (it's
of course up to the maintainers whether they agree):
---
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 2e7ee0313c1c..e94d3ac2bdd0 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -341,10 +341,7 @@ GuC
GuC-specific firmware loader
-.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
- :doc: GuC-specific firmware loader
-
-.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_loader.c
+.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
:internal:
GuC-based command submission
---
> So maybe better to wait for other comments which way to go.
Makes sense.
Thanks,
Jonathan Neuschäfer
>
> Thanks for the patch,
> Michal
>
> [1] https://patchwork.freedesktop.org/patch/188424/
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Re: [Intel-gfx] [PATCH i-g-t] tests/kms_frontbuffer_tracking: Correctly handle debugfs errors
Quoting Michal Wajdeczko (2017-11-28 17:01:15)
> In commit 3f6ae7b19 ("igt/kms_frontbuffer_tracking: Keep the debugfs
> dir around") we introduced custom variant of __igt_debugfs_read function
> that fires assert when debugfs returns an error. Replace that assert
> with proper error handling to allow use of errors like -ENODEV.
Like ENODEV or just ENODEV?
Oh, it appears I goofed in c5da0662d1c0 and didn't change the open error
from a bool to an int error code. You could also take the opportunity to
then return -errno.
And here we can debate whether you want to use
if (len < 0) {
igt_assert_eq(len, -ENODEV);
len = 0;
}
Other than the topic of whether we want to flag any other error here
(e.g. one could imagine a surprising EPERM, EACCES or ENFILE), looks ok.
> Signed-off-by: Michal Wajdeczko
> Cc: Chris Wilson
Reviewed-by: Chris Wilson
-Chris
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Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
On 28/11/2017 16:04, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2017-11-28 13:07:54)
On 28/11/2017 12:48, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2017-11-28 12:41:27)
From: Tvrtko Ursulin
Move the execlists specific setup out of intel_engine_setup_common. This
was supposed to be only for backend agnostic bits. At the same time rename
it to intel_engine_setup_execlist to follow the setup vs init naming
convetion we have.
Signed-off-by: Tvrtko Ursulin
---
+static void
+intel_engine_setup_execlist(struct intel_engine_cs *engine)
+{
+ struct intel_engine_execlists * const execlists = &engine->execlists;
+
+ execlists->csb_use_mmio = csb_force_mmio(engine->i915);
+
+ execlists->port_mask = 1;
+ BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
+ GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
+
+ execlists->queue = RB_ROOT;
+ execlists->first = NULL;
+}
The only problem here was that we wanted to be sure that some fields
were initialised for the common paths, i.e. so we could iterate over the
queue without worrying first if it was execlists (if it wasn't execlists
the queue would be empty).
Now, I think we could just rely on zero initialisation, but that was the
rationale for it ending up early. Now we could split it between
setup_execlists and init_execlists if we want the pedantry.
Common paths as in ringbuffer submission? I grepped around and don't see
it used there.
See the reset code, the debug code, etc; in the common layer, above the
backends, we want to be neutral.
Then about setup vs init, we said init is for hw access so I don't
follow how you would split the above?
init_hw is for initialising hw. Better names for the phases is still
open :)
Okay I found execlists->first usage in intel_engine_dump, so one so far.
That could be made conditional, or if there are other places abstracted
out to the backend implementation. It could be that I just did not find
more due too much context switching?
This way or the other, I did not want to put a code like "if
(HAS_EXECLISTS(i915)) ..." in the function called
intel_engine_init_execlists. That's just wrong.
And I'd say it's equally wrong to call intel_engine_init_execlists from
_intel_engine_setup_common_, because the spiritual starting point for
this common setup refactoring was to only put there bits _common_ to
both backends.
If you want to keep this approach of letting the higher layers just
assume they can access backend specific parts then simplest would be I
just drop this patch and put that ugly "if HAS_EXECLISTS" where I don't
want to put it. Can view it as interim and fixup later?
Regards,
Tvrtko
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[Intel-gfx] ✓ Fi.CI.BAT: success for tests/kms_frontbuffer_tracking: Correctly handle debugfs errors
== Series Details == Series: tests/kms_frontbuffer_tracking: Correctly handle debugfs errors URL : https://patchwork.freedesktop.org/series/34555/ State : success == Summary == IGT patchset tested on top of latest successful build 5b3619f3751ecef55fa993984ddb59a458fcebed igt: Remove gem_ctx_basic with latest DRM-Tip kernel build CI_DRM_3401 73f135dccc60 drm-tip: 2017y-11m-28d-14h-52m-10s UTC integration manifest No testlist changes. Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:450s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:384s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:516s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:279s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:512s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:505s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:485s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:471s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:429s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:271s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:540s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:425s fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:430s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:477s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:454s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:485s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:524s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:477s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:531s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:588s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:458s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:541s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:564s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:519s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:499s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:444s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:418s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:615s fi-cnl-y total:235 pass:210 dwarn:0 dfail:0 fail:0 skip:24 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:493s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_559/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 2/2] lockdep: Up MAX_LOCKDEP_CHAINS
Quoting Daniel Vetter (2017-11-28 17:07:07) > cross-release ftl Fwiw, this isn't cross-release but us reloading the module many times, creating a whole host of new lockclasses. Even more fun is when the module gets a slightly different address and the new lock address hashes into an old lock... I did think about a module-hook to revoke the stale lockclasses, but that still leaves all the hashed chains. This particular nuisance was temporarily pushed back by teaching igt not to reload i915.ko on a whim. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v4] drm/i915: Expose the busyspin durations for i915_wait_request
On 27/11/2017 10:10, Chris Wilson wrote: An interesting discussion regarding "hybrid interrupt polling" for NVMe came to the conclusion that the ideal busyspin before sleeping was half of the expected request latency (and better if it was already halfway through that request). This suggested that we too should look again at our tradeoff between spinning and waiting. Currently, our spin simply tries to hide the cost of enabling the interrupt, which is good to avoid penalising nop requests (i.e. test throughput) and not much else. Studying real world workloads suggests that a spin of upto 500us can dramatically boost performance, but the suggestion is that this is not from avoiding interrupt latency per-se, but from secondary effects of sleeping such as allowing the CPU reduce cstate and context switch away. In a truly hybrid interrupt polling scheme, we would aim to sleep until just before the request completed and then wake up in advance of the interrupt and do a quick poll to handle completion. This is tricky for ourselves at the moment as we are not recording request times, and since we allow preemption, our requests are not on as a nicely ordered timeline as IO. However, the idea is interesting, for it will certainly help us decide when busyspinning is worthwhile. v2: Expose the spin setting via Kconfig options for easier adjustment and testing. v3: Don't get caught sneaking in a change to the busyspin parameters. v4: Explain more about the "hybrid interrupt polling" scheme that we want to migrate towards. Suggested-by: Sagar Kamble References: http://events.linuxfoundation.org/sites/events/files/slides/lemoal-nvme-polling-vault-2017-final_0.pdf Signed-off-by: Chris Wilson Cc: Sagar Kamble Cc: Eero Tamminen Cc: Tvrtko Ursulin Cc: Ben Widawsky Cc: Joonas Lahtinen Cc: Michał Winiarski Reviewed-by: Sagar Kamble --- drivers/gpu/drm/i915/Kconfig| 6 + drivers/gpu/drm/i915/Kconfig.profile| 26 ++ drivers/gpu/drm/i915/i915_gem_request.c | 39 + 3 files changed, 67 insertions(+), 4 deletions(-) create mode 100644 drivers/gpu/drm/i915/Kconfig.profile diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index dfd95889f4b7..eae90783f8f9 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -131,3 +131,9 @@ depends on DRM_I915 depends on EXPERT source drivers/gpu/drm/i915/Kconfig.debug endmenu + +menu "drm/i915 Profile Guided Optimisation" + visible if EXPERT + depends on DRM_I915 + source drivers/gpu/drm/i915/Kconfig.profile +endmenu diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile new file mode 100644 index ..8a230eeb98df --- /dev/null +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -0,0 +1,26 @@ +config DRM_I915_SPIN_REQUEST_IRQ + int + default 5 # microseconds + help + Before sleeping waiting for a request (GPU operation) to complete, + we may spend some time polling for its completion. As the IRQ may + take a non-negligible time to setup, we do a short spin first to + check if the request will complete in the time it would have taken + us to enable the interrupt. + + May be 0 to disable the initial spin. In practice, we estimate + the cost of enabling the interrupt (if currently disabled) to be + a few microseconds. + +config DRM_I915_SPIN_REQUEST_CS + int + default 2 # microseconds + help + After sleeping for a request (GPU operation) to complete, we will + be woken up on the completion of every request prior to the one + being waited on. For very short requests, going back to sleep and + be woken up again may add considerably to the wakeup latency. To + avoid incurring extra latency from the scheduler, we may choose to + spin prior to sleeping again. + + May be 0 to disable spinning after being woken. diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c index a90bdd26571f..be84ea6a56d7 100644 --- a/drivers/gpu/drm/i915/i915_gem_request.c +++ b/drivers/gpu/drm/i915/i915_gem_request.c @@ -1198,8 +1198,32 @@ long i915_wait_request(struct drm_i915_gem_request *req, GEM_BUG_ON(!intel_wait_has_seqno(&wait)); GEM_BUG_ON(!i915_sw_fence_signaled(&req->submit)); - /* Optimistic short spin before touching IRQs */ - if (__i915_spin_request(req, wait.seqno, state, 5)) + /* +* Optimistic spin before touching IRQs. +* +* We may use a rather large value here to offset the penalty of +* switching away from the active task. Frequently, the client will +* wait upon an old swapbuffer to throttle itself to remain within a +* frame of the gpu. If the client is running in lockstep with the gpu, +* then it should not be waiting long at
Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: Increase busyspin limit before a context-switch
On 26/11/2017 12:20, Chris Wilson wrote: Looking at the distribution of i915_wait_request for a set of GL benchmarks, we see: broadwell# python bcc/tools/funclatency.py -u i915_wait_request usecs : count distribution 0 -> 1 : 29184|| 2 -> 3 : 5767 |*** | 4 -> 7 : 3000 || 8 -> 15 : 491 || 16 -> 31 : 140 || 32 -> 63 : 203 || 64 -> 127: 543 || 128 -> 255: 881 |* | 256 -> 511: 1209 |* | 512 -> 1023 : 1739 |** | 1024 -> 2047 : 22855|*** | 2048 -> 4095 : 1725 |** | 4096 -> 8191 : 5813 |*** | 8192 -> 16383 : 5348 |*** | 16384 -> 32767 : 1000 |* | 32768 -> 65535 : 4400 |** | 65536 -> 131071 : 296 || 131072 -> 262143 : 225 || 262144 -> 524287 : 4|| 524288 -> 1048575: 1|| 1048576 -> 2097151: 1|| 2097152 -> 4194303: 1|| broxton# python bcc/tools/funclatency.py -u i915_wait_request usecs : count distribution 0 -> 1 : 5523 |* | 2 -> 3 : 1340 |* | 4 -> 7 : 2100 |** | 8 -> 15 : 755 |* | 16 -> 31 : 211 |* | 32 -> 63 : 53 || 64 -> 127: 71 || 128 -> 255: 113 || 256 -> 511: 262 |* | 512 -> 1023 : 358 |** | 1024 -> 2047 : 1105 |*** | 2048 -> 4095 : 848 |* | 4096 -> 8191 : 1295 || 8192 -> 16383 : 5894 || 16384 -> 32767 : 4270 || 32768 -> 65535 : 5622 |** | 65536 -> 131071 : 306 |** | 131072 -> 262143 : 50 || 262144 -> 524287 : 76 || 524288 -> 1048575: 34 || 1048576 -> 2097151: 0|| 2097152 -> 4194303: 1|| Picking 20us for the context-switch busyspin has the dual advantage of catching most frequent short waits while avoiding the cost of a context switch. 20us is a typical latency of 2 context-switches, i.e. the cost of taking the sleep, without the secondary effects of cache flushing. Next thing I wanted to ask is cumulative time spent spinning vs test duration, or in other words, CPU usage before and after. And of course was the benefit on benchmarks results measurable, by how much, and what does the perf per Watt say? Regards, Tvrtko Signed-off-by: Chris Wilson Cc: Sagar Kamble Cc: Eero Tamminen Cc: Tvrtko Ursulin Cc: Ben Widawsky Cc: Joonas Lahtinen Cc: Michał Winiarski --- drivers/gpu/drm/i915/Kconfig.profile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/Kconfig.profile b/drivers/gpu/drm/i915/Kconfig.profile index a1aed0e2aad5..c8fe5754466c 100644 --- a/drivers/gpu/drm/i915/Kconfig.profile +++ b/drivers/gpu/drm/i915/Kconfig.profile @@ -11,7 +11,7 @@ config DRM_I915_SPIN_REQUEST_IRQ config DRM_I915_SPIN_REQUEST_CS int - default 2 # microseconds + default 20 # microseconds help After s
Re: [Intel-gfx] [PATCH] drm/i915: Unifying debugfs return codes for unsupported features
On 11/28/2017 07:42 AM, Michal Wajdeczko wrote:
Instead of trying different seq_puts messages, lets use common
-ENODEV error code to indicate missing/unsupported feature.
I agree that this is the simplest way to unify the message.
Regards,
Sujaritha
Suggested-by: Chris Wilson
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/i915_debugfs.c | 47 ++---
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 2829447..5023acd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1635,10 +1635,8 @@ static int i915_fbc_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_FBC(dev_priv)) {
- seq_puts(m, "FBC unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_FBC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
mutex_lock(&dev_priv->fbc.lock);
@@ -1714,10 +1712,8 @@ static int i915_ips_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_IPS(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_IPS(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -1803,10 +1799,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
int gpu_freq, ia_freq;
unsigned int max_gpu_freq, min_gpu_freq;
- if (!HAS_LLC(dev_priv)) {
- seq_puts(m, "unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_LLC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2287,7 +2281,7 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data)
struct drm_printer p;
if (!HAS_HUC_UCODE(dev_priv))
- return 0;
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->huc.fw, &p);
@@ -2305,8 +2299,8 @@ static int i915_guc_load_status_info(struct seq_file *m,
void *data)
struct drm_printer p;
u32 tmp, i;
- if (!HAS_GUC_UCODE(dev_priv))
- return 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->guc.fw, &p);
@@ -2400,6 +2394,9 @@ static int i915_guc_info(struct seq_file *m, void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2428,6 +2425,9 @@ static int i915_guc_stage_pool(struct seq_file *m, void *data)
unsigned int tmp;
int index;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2482,6 +2482,9 @@ static int i915_guc_log_dump(struct seq_file *m, void *data)
u32 *log;
int i = 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (dump_load_err)
obj = dev_priv->guc.load_err_log;
else if (dev_priv->guc.log.vma)
@@ -2576,10 +2579,8 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
enum pipe pipe;
bool enabled = false;
- if (!HAS_PSR(dev_priv)) {
- seq_puts(m, "PSR not supported\n");
- return 0;
- }
+ if (!HAS_PSR(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2818,10 +2819,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct intel_csr *csr;
- if (!HAS_CSR(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_CSR(dev_priv))
+ return -ENODEV;
csr = &dev_priv->csr;
@@ -3357,7 +3356,7 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
int plane;
if (INTEL_GEN(dev_priv) < 9)
- return 0;
+ return -ENODEV;
drm_modeset_lock_all(dev);
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[Intel-gfx] [PATCH 1/2] lockdep: finer-grained completion key for kthread
Ideally we'd create the key through a macro at the real callers and
pass it all the way down. This would give us better coverage for cases
where a bunch of kthreads are created for the same thing.
But this gets the job done meanwhile and unblocks our CI. Refining
later on is always possible.
v2:
- make it compile
- use the right map (Tvrtko)
Cc: Tvrtko Ursulin
Cc: Marta Lofstedt
References: https://bugs.freedesktop.org/show_bug.cgi?id=103950
Signed-off-by: Daniel Vetter
---
kernel/kthread.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/kernel/kthread.c b/kernel/kthread.c
index cd50e99202b0..8df5fedb9529 100644
--- a/kernel/kthread.c
+++ b/kernel/kthread.c
@@ -44,6 +44,10 @@ struct kthread {
unsigned long flags;
unsigned int cpu;
void *data;
+#ifdef CONFIG_LOCKDEP_COMPLETIONS
+ struct lock_class_key parked_key;
+ struct lock_class_key exited_key;
+#endif
struct completion parked;
struct completion exited;
#ifdef CONFIG_BLK_CGROUP
@@ -221,8 +225,17 @@ static int kthread(void *_create)
}
self->data = data;
- init_completion(&self->exited);
- init_completion(&self->parked);
+ /* these two completions are shared with all kthread, which is bonghist
+* imo */
+ lockdep_init_map_crosslock(&self->exited.map.map,
+ "(kthread completion)->exited",
+ &self->exited_key, 0);
+ init_completion_map(&self->exited, &self->exited.map.map);
+ lockdep_init_map_crosslock(&self->parked.map.map,
+ "(kthread completion)->parked",
+ &self->parked_key, 0);
+ init_completion_map(&self->parked, &self->exited.map.map);
+
current->vfork_done = &self->exited;
/* OK, tell user we're spawned, wait for stop or wakeup */
--
2.15.0
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[Intel-gfx] [PATCH 2/2] lockdep: Up MAX_LOCKDEP_CHAINS
cross-release ftl
Cc: Tvrtko Ursulin
Cc: Marta Lofstedt
References: https://bugs.freedesktop.org/show_bug.cgi?id=103707
Signed-off-by: Daniel Vetter
---
kernel/locking/lockdep_internals.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/locking/lockdep_internals.h
b/kernel/locking/lockdep_internals.h
index d459d624ba2a..41630a5385c6 100644
--- a/kernel/locking/lockdep_internals.h
+++ b/kernel/locking/lockdep_internals.h
@@ -69,7 +69,7 @@ enum {
#else
#define MAX_LOCKDEP_ENTRIES32768UL
-#define MAX_LOCKDEP_CHAINS_BITS16
+#define MAX_LOCKDEP_CHAINS_BITS17
/*
* Stack-trace: tightly packed array of stack backtrace
--
2.15.0
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Re: [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pmu: Return -EINVAL when selecting the inactive CPU
On 28/11/2017 11:14, Patchwork wrote: == Series Details == Series: drm/i915/pmu: Return -EINVAL when selecting the inactive CPU URL : https://patchwork.freedesktop.org/series/34529/ State : success == Summary == Series 34529v1 drm/i915/pmu: Return -EINVAL when selecting the inactive CPU https://patchwork.freedesktop.org/api/1.0/series/34529/revisions/1/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:385s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:531s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:279s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:507s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:505s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:491s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:482s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:425s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:266s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:541s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:423s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:436s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:491s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:459s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:487s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:531s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:478s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:520s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:593s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:453s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:545s fi-skl-6700hqtotal:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:563s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:518s fi-skl-6770hqtotal:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:499s fi-skl-gvtdvmtotal:289 pass:265 dwarn:1 dfail:0 fail:0 skip:23 time:494s fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:558s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:412s Blacklisted hosts: fi-cfl-s2total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:608s fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:495s fi-bdw-gvtdvm failed to collect. IGT log at Patchwork_7320/fi-bdw-gvtdvm/igt.log 9cf8a68eee7db5e7ded75187aac4222c07a808dd drm-tip: 2017y-11m-28d-09h-02m-29s UTC integration manifest 92acf3014afa drm/i915/pmu: Return -EINVAL when selecting the inactive CPU Pushed, thanks for the review! Regards, Tvrtko ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] tests/kms_frontbuffer_tracking: Correctly handle debugfs errors
In commit 3f6ae7b19 ("igt/kms_frontbuffer_tracking: Keep the debugfs
dir around") we introduced custom variant of __igt_debugfs_read function
that fires assert when debugfs returns an error. Replace that assert
with proper error handling to allow use of errors like -ENODEV.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
---
tests/kms_frontbuffer_tracking.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index a068c8a..50019d1 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -783,7 +783,8 @@ static bool set_mode_for_params(struct modeset_params
*params)
static void __debugfs_read(const char *param, char *buf, int len)
{
len = igt_sysfs_read(drm.debugfs, param, buf, len - 1);
- igt_assert(len > 0);
+ if (len < 0)
+ len = 0;
buf[len] = '\0';
}
--
2.7.4
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Re: [Intel-gfx] [PATCH v6 5/7] drm/i915: Add "panel orientation" property to the panel connector, v6.
Hi Hans,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.15-rc1 next-20171128]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-fbdev-Panel-orientation-connector-property-support/20171128-225025
config: i386-randconfig-x074-201748 (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/gpu/drm/i915/intel_dsi.c: In function
'intel_dsi_get_panel_orientation':
>> drivers/gpu/drm/i915/intel_dsi.c:1672:21: error: storage size of 'plane'
>> isn't known
enum i9xx_plane_id plane;
^
drivers/gpu/drm/i915/intel_dsi.c:1672:21: warning: unused variable 'plane'
[-Wunused-variable]
vim +1672 drivers/gpu/drm/i915/intel_dsi.c
1667
1668 static int intel_dsi_get_panel_orientation(struct intel_connector
*connector)
1669 {
1670 struct drm_i915_private *dev_priv =
to_i915(connector->base.dev);
1671 int orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> 1672 enum i9xx_plane_id plane;
1673 u32 val;
1674
1675 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1676 if (connector->encoder->crtc_mask == BIT(PIPE_B))
1677 plane = PLANE_B;
1678 else
1679 plane = PLANE_A;
1680
1681 val = I915_READ(DSPCNTR(plane));
1682 if (val & DISPPLANE_ROTATE_180)
1683 orientation =
DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1684 }
1685
1686 return orientation;
1687 }
1688
---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
.config.gz
Description: application/gzip
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Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Unifying debugfs return codes for unsupported features
On Tue, 28 Nov 2017 17:07:27 +0100, Patchwork
wrote:
== Series Details ==
Series: drm/i915: Unifying debugfs return codes for unsupported features
URL : https://patchwork.freedesktop.org/series/34552/
State : failure
== Summary ==
Series 34552v1 drm/i915: Unifying debugfs return codes for unsupported
features
https://patchwork.freedesktop.org/api/1.0/series/34552/revisions/1/mbox/
Test kms_frontbuffer_tracking:
Subgroup basic:
skip -> FAIL (fi-elk-e7500)
pass -> FAIL (fi-byt-j1900)
pass -> FAIL (fi-byt-n2820)
pass -> FAIL (fi-bsw-n3050)
It looks that "igt/kms_frontbuffer_tracking: Keep the debugfs dir around"
introduced igt_assert that fires when we try to return -ENODEV.
I think we can replace it with proper handling (see __igt_debugfs_read)
diff --git a/tests/kms_frontbuffer_tracking.c
b/tests/kms_frontbuffer_tracking.c
index a068c8a..50019d1 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -783,7 +783,8 @@ static bool set_mode_for_params(struct modeset_params
*params)
static void __debugfs_read(const char *param, char *buf, int len)
{
len = igt_sysfs_read(drm.debugfs, param, buf, len - 1);
- igt_assert(len > 0);
+ if (len < 0)
+ len = 0;
buf[len] = '\0';
}
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Re: [Intel-gfx] [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()
On 11/28/2017 10:30 AM, Ville Syrjälä wrote: >> +dev_priv->bridge_dev = >> +pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0)); > Maybe just pci_get_slot(pdev->bus, PCI_DEVFN(0, 0)) ? > > I guess if we want to be pedantic we could go for: > > bus = pci_find_host_bridge(pdev->bus)->bus; > pci_get_slot(bus, PCI_DEVFN(0, 0)) > > but I think the GPU should always be on the root bus, so the simpler > form should be fine. > All three of these should be correct. I'll use pci_get_slot(pdev->bus, PCI_DEVFN(0, 0)) as you suggested. -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix deadlock in i830_disable_pipe()
== Series Details == Series: drm/i915: Fix deadlock in i830_disable_pipe() URL : https://patchwork.freedesktop.org/series/34553/ State : success == Summary == Series 34553v1 drm/i915: Fix deadlock in i830_disable_pipe() https://patchwork.freedesktop.org/api/1.0/series/34553/revisions/1/mbox/ fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:441s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:387s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:514s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:278s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:497s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:481s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:464s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:429s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:265s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:530s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:423s fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:431s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:484s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:451s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:485s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:525s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:472s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:525s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:584s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:537s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:561s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:514s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:504s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:449s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:550s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:414s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:602s fi-cnl-y total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:545s fi-glk-dsi total:288 pass:164 dwarn:0 dfail:10 fail:2 skip:112 time:410s 73f135dccc60c8fa6e2a200286b00877209a9c29 drm-tip: 2017y-11m-28d-14h-52m-10s UTC integration manifest 0fc6657b6208 drm/i915: Fix deadlock in i830_disable_pipe() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7327/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Unifying debugfs return codes for unsupported features
On 11/28/2017 07:42 AM, Michal Wajdeczko wrote:
Instead of trying different seq_puts messages, lets use common
-ENODEV error code to indicate missing/unsupported feature.
I agree that this is the simplest way to unify
Suggested-by: Chris Wilson
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/i915_debugfs.c | 47 ++---
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 2829447..5023acd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1635,10 +1635,8 @@ static int i915_fbc_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_FBC(dev_priv)) {
- seq_puts(m, "FBC unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_FBC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
mutex_lock(&dev_priv->fbc.lock);
@@ -1714,10 +1712,8 @@ static int i915_ips_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_IPS(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_IPS(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -1803,10 +1799,8 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
int gpu_freq, ia_freq;
unsigned int max_gpu_freq, min_gpu_freq;
- if (!HAS_LLC(dev_priv)) {
- seq_puts(m, "unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_LLC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2287,7 +2281,7 @@ static int i915_huc_load_status_info(struct seq_file *m, void *data)
struct drm_printer p;
if (!HAS_HUC_UCODE(dev_priv))
- return 0;
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->huc.fw, &p);
@@ -2305,8 +2299,8 @@ static int i915_guc_load_status_info(struct seq_file *m,
void *data)
struct drm_printer p;
u32 tmp, i;
- if (!HAS_GUC_UCODE(dev_priv))
- return 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->guc.fw, &p);
@@ -2400,6 +2394,9 @@ static int i915_guc_info(struct seq_file *m, void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2428,6 +2425,9 @@ static int i915_guc_stage_pool(struct seq_file *m, void *data)
unsigned int tmp;
int index;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2482,6 +2482,9 @@ static int i915_guc_log_dump(struct seq_file *m, void *data)
u32 *log;
int i = 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (dump_load_err)
obj = dev_priv->guc.load_err_log;
else if (dev_priv->guc.log.vma)
@@ -2576,10 +2579,8 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
enum pipe pipe;
bool enabled = false;
- if (!HAS_PSR(dev_priv)) {
- seq_puts(m, "PSR not supported\n");
- return 0;
- }
+ if (!HAS_PSR(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2818,10 +2819,8 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct intel_csr *csr;
- if (!HAS_CSR(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_CSR(dev_priv))
+ return -ENODEV;
csr = &dev_priv->csr;
@@ -3357,7 +3356,7 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
int plane;
if (INTEL_GEN(dev_priv) < 9)
- return 0;
+ return -ENODEV;
drm_modeset_lock_all(dev);
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Unifying debugfs return codes for unsupported features
== Series Details == Series: drm/i915: Unifying debugfs return codes for unsupported features URL : https://patchwork.freedesktop.org/series/34552/ State : failure == Summary == Series 34552v1 drm/i915: Unifying debugfs return codes for unsupported features https://patchwork.freedesktop.org/api/1.0/series/34552/revisions/1/mbox/ Test kms_frontbuffer_tracking: Subgroup basic: skip -> FAIL (fi-elk-e7500) pass -> FAIL (fi-byt-j1900) pass -> FAIL (fi-byt-n2820) pass -> FAIL (fi-bsw-n3050) fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:445s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:444s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:381s fi-bsw-n3050 total:288 pass:241 dwarn:0 dfail:0 fail:1 skip:46 time:509s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:503s fi-byt-j1900 total:288 pass:252 dwarn:0 dfail:0 fail:1 skip:35 time:475s fi-byt-n2820 total:288 pass:248 dwarn:0 dfail:0 fail:1 skip:39 time:466s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:1 skip:58 time:425s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:268s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:533s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:429s fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:430s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:480s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:454s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:492s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:523s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:474s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:525s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:588s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:446s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:535s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:570s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:513s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:499s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:445s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:552s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:410s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:594s fi-cnl-y total:231 pass:206 dwarn:0 dfail:0 fail:0 skip:24 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:480s 73f135dccc60c8fa6e2a200286b00877209a9c29 drm-tip: 2017y-11m-28d-14h-52m-10s UTC integration manifest bbf2f8d039b5 drm/i915: Unifying debugfs return codes for unsupported features == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7326/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
Quoting Tvrtko Ursulin (2017-11-28 13:07:54)
>
> On 28/11/2017 12:48, Chris Wilson wrote:
> > Quoting Tvrtko Ursulin (2017-11-28 12:41:27)
> >> From: Tvrtko Ursulin
> >>
> >> Move the execlists specific setup out of intel_engine_setup_common. This
> >> was supposed to be only for backend agnostic bits. At the same time rename
> >> it to intel_engine_setup_execlist to follow the setup vs init naming
> >> convetion we have.
> >>
> >> Signed-off-by: Tvrtko Ursulin
> >> ---
> >> +static void
> >> +intel_engine_setup_execlist(struct intel_engine_cs *engine)
> >> +{
> >> + struct intel_engine_execlists * const execlists =
> >> &engine->execlists;
> >> +
> >> + execlists->csb_use_mmio = csb_force_mmio(engine->i915);
> >> +
> >> + execlists->port_mask = 1;
> >> + BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
> >> + GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
> >> +
> >> + execlists->queue = RB_ROOT;
> >> + execlists->first = NULL;
> >> +}
> >
> > The only problem here was that we wanted to be sure that some fields
> > were initialised for the common paths, i.e. so we could iterate over the
> > queue without worrying first if it was execlists (if it wasn't execlists
> > the queue would be empty).
> >
> > Now, I think we could just rely on zero initialisation, but that was the
> > rationale for it ending up early. Now we could split it between
> > setup_execlists and init_execlists if we want the pedantry.
>
> Common paths as in ringbuffer submission? I grepped around and don't see
> it used there.
See the reset code, the debug code, etc; in the common layer, above the
backends, we want to be neutral.
> Then about setup vs init, we said init is for hw access so I don't
> follow how you would split the above?
init_hw is for initialising hw. Better names for the phases is still
open :)
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for lockdep: finer-grained completion key for kthread
== Series Details == Series: lockdep: finer-grained completion key for kthread URL : https://patchwork.freedesktop.org/series/34547/ State : failure == Summary == CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/bounds.h CHK include/generated/timeconst.h CHK include/generated/asm-offsets.h CALLscripts/checksyscalls.sh DESCEND objtool CHK scripts/mod/devicetable-offsets.h CHK include/generated/compile.h CC kernel/kthread.o kernel/kthread.c: In function ‘kthread’: kernel/kthread.c:230:42: error: invalid type argument of ‘->’ (have ‘struct completion’) lockdep_init_map_crosslock(&self->exited->map, ^~ kernel/kthread.c:234:42: error: invalid type argument of ‘->’ (have ‘struct completion’) lockdep_init_map_crosslock(&self->parked->map, ^~ scripts/Makefile.build:310: recipe for target 'kernel/kthread.o' failed make[1]: *** [kernel/kthread.o] Error 1 Makefile:1012: recipe for target 'kernel' failed make: *** [kernel] Error 2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Fix deadlock in i830_disable_pipe()
From: Ville Syrjälä
i830_disable_pipe() gets called from the power well code, and thus
we're already holding the power domain mutex. That means we can't
call plane->get_hw_state() as it will also try to grab the
same mutex and will thus deadlock.
Replace the assert_plane() calls (which calls ->get_hw_state()) with
just raw register reads in i830_disable_pipe(). As a bonus we can
now get a warning if plane C is enabled even though we don't even
expose it as a drm plane.
Fixes: 51f5a0963984 ("drm/i915: Add .get_hw_state() method for planes")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d67c7c498b34..48d9332b196f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14731,8 +14731,11 @@ void i830_disable_pipe(struct drm_i915_private
*dev_priv, enum pipe pipe)
DRM_DEBUG_KMS("disabling pipe %c due to force quirk\n",
pipe_name(pipe));
- assert_planes_disabled(intel_get_crtc_for_pipe(dev_priv, PIPE_A));
- assert_planes_disabled(intel_get_crtc_for_pipe(dev_priv, PIPE_B));
+ WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE ||
+ I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE ||
+ I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE ||
+ I915_READ(CURCNTR(PIPE_A)) & CURSOR_MODE ||
+ I915_READ(CURCNTR(PIPE_B)) & CURSOR_MODE);
I915_WRITE(PIPECONF(pipe), 0);
POSTING_READ(PIPECONF(pipe));
--
2.13.6
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Move execlists setup out of common (rev3)
== Series Details == Series: series starting with [1/4] drm/i915: Move execlists setup out of common (rev3) URL : https://patchwork.freedesktop.org/series/34541/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2643 pass:1514 dwarn:6 dfail:2 fail:17 skip:1103 time:8953s shard-kbltotal:2350 pass:1568 dwarn:21 dfail:12 fail:12 skip:729 time:8553s shard-snbtotal:2530 pass:1229 dwarn:14 dfail:4 fail:18 skip:1262 time:7625s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7323/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too (rev4)
== Series Details == Series: drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too (rev4) URL : https://patchwork.freedesktop.org/series/33772/ State : success == Summary == Series 33772v4 drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too https://patchwork.freedesktop.org/api/1.0/series/33772/revisions/4/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:436s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:444s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:523s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:279s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:500s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:505s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:480s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:467s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:424s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:268s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:541s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:421s fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:430s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:379s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:481s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:454s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:481s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:533s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:477s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:526s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:584s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:452s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:541s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:563s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:507s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:449s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:410s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:602s fi-cnl-y total:288 pass:260 dwarn:0 dfail:0 fail:1 skip:27 time:556s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:484s 73f135dccc60c8fa6e2a200286b00877209a9c29 drm-tip: 2017y-11m-28d-14h-52m-10s UTC integration manifest 94e6178bb669 drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7324/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Unifying debugfs return codes for unsupported features
Instead of trying different seq_puts messages, lets use common
-ENODEV error code to indicate missing/unsupported feature.
Suggested-by: Chris Wilson
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/i915_debugfs.c | 47 ++---
1 file changed, 23 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 2829447..5023acd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1635,10 +1635,8 @@ static int i915_fbc_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_FBC(dev_priv)) {
- seq_puts(m, "FBC unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_FBC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
mutex_lock(&dev_priv->fbc.lock);
@@ -1714,10 +1712,8 @@ static int i915_ips_status(struct seq_file *m, void
*unused)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
- if (!HAS_IPS(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_IPS(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -1803,10 +1799,8 @@ static int i915_ring_freq_table(struct seq_file *m, void
*unused)
int gpu_freq, ia_freq;
unsigned int max_gpu_freq, min_gpu_freq;
- if (!HAS_LLC(dev_priv)) {
- seq_puts(m, "unsupported on this chipset\n");
- return 0;
- }
+ if (!HAS_LLC(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2287,7 +2281,7 @@ static int i915_huc_load_status_info(struct seq_file *m,
void *data)
struct drm_printer p;
if (!HAS_HUC_UCODE(dev_priv))
- return 0;
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->huc.fw, &p);
@@ -2305,8 +2299,8 @@ static int i915_guc_load_status_info(struct seq_file *m,
void *data)
struct drm_printer p;
u32 tmp, i;
- if (!HAS_GUC_UCODE(dev_priv))
- return 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
p = drm_seq_file_printer(m);
intel_uc_fw_dump(&dev_priv->guc.fw, &p);
@@ -2400,6 +2394,9 @@ static int i915_guc_info(struct seq_file *m, void *data)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
const struct intel_guc *guc = &dev_priv->guc;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2428,6 +2425,9 @@ static int i915_guc_stage_pool(struct seq_file *m, void
*data)
unsigned int tmp;
int index;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (!check_guc_submission(m))
return 0;
@@ -2482,6 +2482,9 @@ static int i915_guc_log_dump(struct seq_file *m, void
*data)
u32 *log;
int i = 0;
+ if (!HAS_GUC(dev_priv))
+ return -ENODEV;
+
if (dump_load_err)
obj = dev_priv->guc.load_err_log;
else if (dev_priv->guc.log.vma)
@@ -2576,10 +2579,8 @@ static int i915_edp_psr_status(struct seq_file *m, void
*data)
enum pipe pipe;
bool enabled = false;
- if (!HAS_PSR(dev_priv)) {
- seq_puts(m, "PSR not supported\n");
- return 0;
- }
+ if (!HAS_PSR(dev_priv))
+ return -ENODEV;
intel_runtime_pm_get(dev_priv);
@@ -2818,10 +2819,8 @@ static int i915_dmc_info(struct seq_file *m, void
*unused)
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct intel_csr *csr;
- if (!HAS_CSR(dev_priv)) {
- seq_puts(m, "not supported\n");
- return 0;
- }
+ if (!HAS_CSR(dev_priv))
+ return -ENODEV;
csr = &dev_priv->csr;
@@ -3357,7 +3356,7 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
int plane;
if (INTEL_GEN(dev_priv) < 9)
- return 0;
+ return -ENODEV;
drm_modeset_lock_all(dev);
--
2.7.4
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Re: [Intel-gfx] [PATCH 1/1] drm/i915: Fix for nested_enable_signaling BUG_ON
On 11/28/2017 1:40 AM, Chris Wilson wrote:
Quoting john.c.harri...@intel.com (2017-11-28 09:10:59)
From: John Harrison
The call to enable signaling was occuring after the request had been
sent to the GuC for execution on the hardware. That means that it is
possible for the request to actually complete before the code to
enable signaling has executed.
No, it wasn't, unless you had modified the code. Note also we switched
to a different scheme in upstream
-Chris
It was as of:
commit d99c1a7aff71536e909f54709023dcc5d6b559c0
Author: Chris Wilson
Date: Thu Mar 16 12:56:18 2017 +
drm/i915/scheduler: emulate a scheduler for guc
The code introduced was:
+ ...
+ if (last && rq->ctx != last->ctx) {
+ ...
*+ nested_enable_signaling(last);**
* + port++;
+ }
+ ...
*+ i915_guc_submit(rq);**
*+ last = rq;
+ submit = true;
+ }
+ if (submit) {
+ i915_gem_request_assign(&port->request, last);
*+ nested_enable_signaling(last);**
*+ engine->execlist_first = rb;
+ }
+ ...
That quite definitely calls nested_enable_signaling() after calling
i915_guc_submit(). It is either called on the last request submitted for
a given context or on the last request submitted overall. But in either
case it is only called after the actual submission occurs.
Maybe that was not exactly 4.11, there might have been a few more recent
patches pulled in to this tree. It is definitely not latest upstream
though. And as I noted in the cover letter, moving to latest upstream is
not an option for them at this point.
John.
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Re: [Intel-gfx] [PATCH v6 6/7] efifb: Set info->fbcon_rotate_hint based on drm_get_panel_orientation_quirk
Hi Hans,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.15-rc1 next-20171128]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-fbdev-Panel-orientation-connector-property-support/20171128-225025
config: i386-randconfig-x003-201748 (attached as .config)
compiler: gcc-7 (Debian 7.2.0-12) 7.2.1 20171025
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
All errors (new ones prefixed by >>):
drivers/video/fbdev/efifb.c: In function 'efifb_probe':
>> drivers/video/fbdev/efifb.c:340:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PRESENT_BOTTOM_FIELD'?
case DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP:
^~~~
DRM_MODE_PRESENT_BOTTOM_FIELD
drivers/video/fbdev/efifb.c:340:7: note: each undeclared identifier is
reported only once for each function it appears in
>> drivers/video/fbdev/efifb.c:343:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_LEFT_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP'?
case DRM_MODE_PANEL_ORIENTATION_LEFT_UP:
^~
DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP
>> drivers/video/fbdev/efifb.c:346:7: error:
>> 'DRM_MODE_PANEL_ORIENTATION_RIGHT_UP' undeclared (first use in this
>> function); did you mean 'DRM_MODE_PANEL_ORIENTATION_LEFT_UP'?
case DRM_MODE_PANEL_ORIENTATION_RIGHT_UP:
^~~
DRM_MODE_PANEL_ORIENTATION_LEFT_UP
vim +340 drivers/video/fbdev/efifb.c
158
159 static int efifb_probe(struct platform_device *dev)
160 {
161 struct fb_info *info;
162 int err, orientation;
163 unsigned int size_vmode;
164 unsigned int size_remap;
165 unsigned int size_total;
166 char *option = NULL;
167
168 if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI ||
pci_dev_disabled)
169 return -ENODEV;
170
171 if (fb_get_options("efifb", &option))
172 return -ENODEV;
173 efifb_setup(option);
174
175 /* We don't get linelength from UGA Draw Protocol, only from
176 * EFI Graphics Protocol. So if it's not in DMI, and it's not
177 * passed in from the user, we really can't use the framebuffer.
178 */
179 if (!screen_info.lfb_linelength)
180 return -ENODEV;
181
182 if (!screen_info.lfb_depth)
183 screen_info.lfb_depth = 32;
184 if (!screen_info.pages)
185 screen_info.pages = 1;
186 if (!fb_base_is_valid()) {
187 printk(KERN_DEBUG "efifb: invalid framebuffer
address\n");
188 return -ENODEV;
189 }
190 printk(KERN_INFO "efifb: probing for efifb\n");
191
192 /* just assume they're all unset if any are */
193 if (!screen_info.blue_size) {
194 screen_info.blue_size = 8;
195 screen_info.blue_pos = 0;
196 screen_info.green_size = 8;
197 screen_info.green_pos = 8;
198 screen_info.red_size = 8;
199 screen_info.red_pos = 16;
200 screen_info.rsvd_size = 8;
201 screen_info.rsvd_pos = 24;
202 }
203
204 efifb_fix.smem_start = screen_info.lfb_base;
205
206 if (screen_info.capabilities & VIDEO_CAPABILITY_64BIT_BASE) {
207 u64 ext_lfb_base;
208
209 ext_lfb_base = (u64)(unsigned
long)screen_info.ext_lfb_base << 32;
210 efifb_fix.smem_start |= ext_lfb_base;
211 }
212
213 if (bar_resource &&
214 bar_resource->start + bar_offset != efifb_fix.smem_start) {
215 dev_info(&efifb_pci_dev->dev,
216 "BAR has moved, updating efifb address\n");
217 efifb_fix.smem_start = bar_resource->start + bar_offset;
218 }
219
220 efifb_defined.bits_per_pixel = screen_info.lfb_depth;
221 efifb_defined.xres = screen_info.lfb_width;
222 efifb_defined.yres = screen_info.lfb_height;
223 efifb_fix.line_length = screen_info.lfb_linelength;
224
225
Re: [Intel-gfx] [PATCH V3 09/29] drm/i915: deprecate pci_get_bus_and_slot()
On Mon, Nov 27, 2017 at 11:57:46AM -0500, Sinan Kaya wrote:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
> pci_get_domain_bus_and_slot().
>
> Extract the domain number from drm_device and pass it into
> pci_get_domain_bus_and_slot() function.
>
> Signed-off-by: Sinan Kaya
> ---
> drivers/gpu/drm/i915/i915_drv.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 9f45cfe..5a8cb79 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -419,7 +419,10 @@ static int i915_getparam(struct drm_device *dev, void
> *data,
>
> static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
> {
> - dev_priv->bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
> + int domain = pci_domain_nr(dev_priv->drm.pdev->bus);
> +
> + dev_priv->bridge_dev =
> + pci_get_domain_bus_and_slot(domain, 0, PCI_DEVFN(0, 0));
Maybe just pci_get_slot(pdev->bus, PCI_DEVFN(0, 0)) ?
I guess if we want to be pedantic we could go for:
bus = pci_find_host_bridge(pdev->bus)->bus;
pci_get_slot(bus, PCI_DEVFN(0, 0))
but I think the GPU should always be on the root bus, so the simpler
form should be fine.
> if (!dev_priv->bridge_dev) {
> DRM_ERROR("bridge device not found\n");
> return -1;
> --
> 1.9.1
>
> ___
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--
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable hotplug polling after registering the outputs (rev2)
Quoting Patchwork (2017-11-28 13:08:29) > == Series Details == > > Series: drm/i915: Enable hotplug polling after registering the outputs (rev2) > URL : https://patchwork.freedesktop.org/series/34445/ > State : success Maarten acked v2, so applied. At the worst it's an improvement which we'll have to improve upon again. For now, it makes CI quieter. Thanks, -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/cnl: WA Display #1178 to fix some type C dongles
On Mon, Nov 27, 2017 at 03:14:21PM -0800, Lucas De Marchi wrote:
> On Thu, Nov 23, 2017 at 7:21 AM, Ville Syrjälä
> wrote:
> > On Wed, Nov 22, 2017 at 10:55:14AM -0800, Lucas De Marchi wrote:
> >> WA Display #1178 is meant to fix Aux channel voltage swing too low with
> >> some type C dongles. Although it is for type C, HW engineers reported
> >> that it can be applied to all external ports even if they are not going
> >> to type C.
> >>
> >> For CNL we apply the workaround every time Aux B, C and D are powering
> >> up since they will lose the configuration when powered down.
> >>
> >> Cc: Rodrigo Vivi
> >> Cc: Arthur J Runyan
> >> Signed-off-by: Lucas De Marchi
> >> ---
> >>
> >> Since this is a workaround I think it would be desirable not to be
> >> so intrusive. The simplest thing to do is to add the
> >> IS_CANNONLAKE() and workaround as done here.
> >>
> >> An alternative that may be more elegant (but also more intrusive) is to
> >> declare a new ops for CNL for AUX B/C/D. Let me know what you think.
> >>
> >> For the type-C dongles that I have here it worked both with and without
> >> this patch, so bear in mind I couldn't actually reproduce the problem.
> >>
> >> drivers/gpu/drm/i915/i915_reg.h | 11 +++
> >> drivers/gpu/drm/i915/intel_runtime_pm.c | 9 +
> >> 2 files changed, 20 insertions(+)
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> >> b/drivers/gpu/drm/i915/i915_reg.h
> >> index 96c80fa0fcac..32064605f82d 100644
> >> --- a/drivers/gpu/drm/i915/i915_reg.h
> >> +++ b/drivers/gpu/drm/i915/i915_reg.h
> >> @@ -8332,6 +8332,17 @@ enum skl_power_gate {
> >> #define SKL_PW_TO_PG(pw)((pw) - SKL_DISP_PW_1 +
> >> SKL_PG1)
> >> #define SKL_FUSE_PG_DIST_STATUS(pg) (1 << (27 - (pg)))
> >>
> >> +#define _CNL_AUX_REG_IDX(pw) ((pw - 1) >> 4)
> >> +#define _CNL_AUX_ANAOVRD1_B 0x162250
> >> +#define _CNL_AUX_ANAOVRD1_C 0x162210
> >> +#define _CNL_AUX_ANAOVRD1_D 0x1622D0
> >> +#define CNL_AUX_ANAOVRD1(pw) _MMIO(_PICK(_CNL_AUX_REG_IDX(pw), \
> >> + _CNL_AUX_ANAOVRD1_B, \
> >> + _CNL_AUX_ANAOVRD1_C, \
> >> + _CNL_AUX_ANAOVRD1_D))
> >> +#define CNL_AUX_ANAOVRD1_ENABLE(1<<16)
> >> +#define CNL_AUX_ANAOVRD1_LDO_BYPASS(1<<23)
> >
> > I can't actually find these registers in bspec. How do you come up with
> > the names and stuff?
> >
> > Based on the offset they look like PHY registers to me, so probably
> > should be placed somewhere around the existing PHY registers.
> >
> >> +
> >> /* Per-pipe DDI Function Control */
> >> #define _TRANS_DDI_FUNC_CTL_A0x60400
> >> #define _TRANS_DDI_FUNC_CTL_B0x61400
> >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> index 8315499452dc..9bf200e4885d 100644
> >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> >> @@ -388,6 +388,15 @@ static void hsw_power_well_enable(struct
> >> drm_i915_private *dev_priv,
> >> I915_WRITE(HSW_PWR_WELL_CTL_DRIVER(id), val |
> >> HSW_PWR_WELL_CTL_REQ(id));
> >> hsw_wait_for_power_well_enable(dev_priv, power_well);
> >>
> >> + /* WA Display #1178 */
> >
> > Pls stick to a consistent w/a comment style.
>
> Are you suggesting to change to "/* Display Wa #1178 */"? It seems the
> most common style in the
> codebase, although others are used.
>
> - "Wa Display #number" is used in my other pending patch that was
> based on first version by Rodrigo and
> has 1 occurence
> - "Display WA #number" has 13 occurrences
I guess we should go for this one then. Also we should add the
:platform tags to these as well.
> - "Display Wa #number" has 1 occurrence
> - "WaName" has several occurrences and is by far the most common,
> although I don't think all Wa have names
> like these
These are generally the ones which have an entry in the w/a db. I think
we should keep using them as well, when they exist.
>
> Should I send a fix to these as well?
Please do.
--
Ville Syrjälä
Intel OTC
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[Intel-gfx] [PATCH] lockdep: finer-grained completion key for kthread
Ideally we'd create the key through a macro at the real callers and
pass it all the way down. This would give us better coverage for cases
where a bunch of kthreads are created for the same thing.
But this gets the job done meanwhile and unblocks our CI. Refining
later on is always possible.
Signed-off-by: Daniel Vetter
---
kernel/kthread.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/kernel/kthread.c b/kernel/kthread.c
index cd50e99202b0..ef2956516803 100644
--- a/kernel/kthread.c
+++ b/kernel/kthread.c
@@ -44,6 +44,10 @@ struct kthread {
unsigned long flags;
unsigned int cpu;
void *data;
+#ifdef CONFIG_LOCKDEP_COMPLETIONS
+ struct lock_class_key parked_key;
+ struct lock_class_key exited_key;
+#endif
struct completion parked;
struct completion exited;
#ifdef CONFIG_BLK_CGROUP
@@ -221,8 +225,17 @@ static int kthread(void *_create)
}
self->data = data;
+ /* these two completions are shared with all kthread, which is bonghist
+* imo */
+ lockdep_init_map_crosslock(&self->exited->map,
+ "(kthread completion)->exited",
+ &self->exited_key, 0);
init_completion(&self->exited);
+ lockdep_init_map_crosslock(&self->parked->map,
+ "(kthread completion)->parked",
+ &self->parked_key, 0);
init_completion(&self->parked);
+
current->vfork_done = &self->exited;
/* OK, tell user we're spawned, wait for stop or wakeup */
--
2.15.0
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Re: [Intel-gfx] [GIT PULL] gvt fixes for 4.15-rc2
Hi,
Pulled these in. There was a pretty big conflict to drm-tip which I
solved. Please give it some additional testing as I only compile
tested.
Regards, Joonas
On Tue, 2017-11-28 at 17:31 +0800, Zhenyu Wang wrote:
> Hi,
>
> Pls pull gvt fixes for 4.15-rc2, which contains one backport
> from f2880e04f3a5 ("drm/i915/gvt: Move request alloc to dispatch_workload
> path only"),
> and more new fixes.
>
> thanks
> --
> The following changes since commit ac29fc66855b79c2960c63a4a66952d5b721d698:
>
> drm/i915: fix intel_backlight_device_register declaration (2017-11-28
> 10:31:59 +0200)
>
> are available in the Git repository at:
>
> https://github.com/intel/gvt-linux.git tags/gvt-fixes-2017-11-28
>
> for you to fetch changes up to b721b65af4eb46df6a1d9e34b14003225e403565:
>
> drm/i915/gvt: Correct ADDR_4K/2M/1G_MASK definition (2017-11-28 17:24:30
> +0800)
>
>
> gvt-fixes-2017-11-28
>
> - regression fix for sane request alloc (Fred)
> - locking fix (Changbin)
> - fix invalid addr mask (Xiong)
> - compression regression fix (Weinan)
> - fix default pipe enable for virtual display (Xiaolin)
>
>
> Changbin Du (1):
> drm/i915/gvt: Fix unsafe locking caused by spin_unlock_bh
>
> Weinan Li (1):
> drm/i915/gvt: remove skl_misc_ctl_write handler
>
> Xiaolin Zhang (1):
> drm/i915/gvt: enabled pipe A default on creating vgpu
>
> Xiong Zhang (1):
> drm/i915/gvt: Correct ADDR_4K/2M/1G_MASK definition
>
> fred gao (1):
> drm/i915/gvt: Move request alloc to dispatch_workload path only
>
> drivers/gpu/drm/i915/gvt/display.c | 2 ++
> drivers/gpu/drm/i915/gvt/execlist.c | 6 +
> drivers/gpu/drm/i915/gvt/gtt.c | 6 ++---
> drivers/gpu/drm/i915/gvt/handlers.c | 45
>
> drivers/gpu/drm/i915/gvt/scheduler.c | 33 +++---
> drivers/gpu/drm/i915/gvt/scheduler.h | 3 +++
> 6 files changed, 44 insertions(+), 51 deletions(-)
>
>
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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[Intel-gfx] [PATCH v4] drm/i915/glk: Apply WaProgramL3SqcReg1DefaultForPerf for GLK too
Testing the texture read performance shows that the same tuning for
the SQ credits is needed on GLK as on BXT/APL. This has been also
confirmed by Altug from the HW team.
V4: Rebase + fix
Signed-off-by: Valtteri Rantala
---
drivers/gpu/drm/i915/intel_engine_cs.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index fede62d..0b04ca7 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1067,6 +1067,15 @@ static int gen9_init_workarounds(struct intel_engine_cs
*engine)
/* WaDisableSTUnitPowerOptimization:skl,bxt,kbl,glk,cfl */
WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE);
+ /* WaProgramL3SqcReg1DefaultForPerf:bxt,glk */
+ if (IS_GEN9_LP(dev_priv)) {
+ u32 val = I915_READ(GEN8_L3SQCREG1);
+
+ val &= ~L3_PRIO_CREDITS_MASK;
+ val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2);
+ I915_WRITE(GEN8_L3SQCREG1, val);
+ }
+
/* WaOCLCoherentLineFlush:skl,bxt,kbl,cfl */
I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
GEN8_LQSC_FLUSH_COHERENT_LINES));
@@ -1184,7 +1193,6 @@ static int skl_init_workarounds(struct intel_engine_cs
*engine)
static int bxt_init_workarounds(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
- u32 val;
int ret;
ret = gen9_init_workarounds(engine);
@@ -1199,12 +1207,6 @@ static int bxt_init_workarounds(struct intel_engine_cs
*engine)
I915_WRITE(FF_SLICE_CS_CHICKEN2,
_MASKED_BIT_ENABLE(GEN9_POOLED_EU_LOAD_BALANCING_FIX_DISABLE));
- /* WaProgramL3SqcReg1DefaultForPerf:bxt */
- val = I915_READ(GEN8_L3SQCREG1);
- val &= ~L3_PRIO_CREDITS_MASK;
- val |= L3_GENERAL_PRIO_CREDITS(62) | L3_HIGH_PRIO_CREDITS(2);
- I915_WRITE(GEN8_L3SQCREG1, val);
-
/* WaToEnableHwFixForPushConstHWBug:bxt */
WA_SET_BIT_MASKED(COMMON_SLICE_CHICKEN2,
GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
--
2.7.4
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Re: [Intel-gfx] [PATCH] drm: Fix modifiers_property kernel-doc comment
Hi,
On 28-11-17 11:28, Daniel Vetter wrote:
On Sat, Nov 25, 2017 at 08:27:31PM +0100, Hans de Goede wrote:
This fixes the following make kerneldocs messages:
./include/drm/drm_mode_config.h:772: warning: No description found for
parameter 'modifiers_property'
./include/drm/drm_mode_config.h:772: warning: Excess struct member 'modifiers'
description in 'drm_mode_config'
Signed-off-by: Hans de Goede
Reviewed-by: Daniel Vetter
Pls push to drm-misc-next, thanks.
Ville Syrjälä has already fixed this, but I missed that because the
fix was not yet in dinq when I prepared my panel-orientation patch
series.
Regards,
Hans
-Daniel
---
include/drm/drm_mode_config.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 3716e6b8fed5..cb9ffbda36cc 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -759,7 +759,7 @@ struct drm_mode_config {
bool allow_fb_modifiers;
/**
-* @modifiers: Plane property to list support modifier/format
+* @modifiers_property: Plane property to list support modifier/format
* combination.
*/
struct drm_property *modifiers_property;
--
2.14.3
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[Intel-gfx] ✓ Fi.CI.IGT: success for tests/perf_pmu: Sync invalid-init with i915 changes
== Series Details == Series: tests/perf_pmu: Sync invalid-init with i915 changes URL : https://patchwork.freedesktop.org/series/34530/ State : success == Summary == Blacklisted hosts: shard-apltotal:2348 pass:1453 dwarn:20 dfail:18 fail:10 skip:838 time:10677s shard-hswtotal:2662 pass:1526 dwarn:9 dfail:0 fail:11 skip:1116 time:9280s shard-snbtotal:2462 pass:1185 dwarn:15 dfail:6 fail:6 skip:1246 time:7709s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_557/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH V3 03/29] x86/PCI: deprecate pci_get_bus_and_slot()
On Mon, 27 Nov 2017, Sinan Kaya wrote:
> pci_get_bus_and_slot() is restrictive such that it assumes domain=0 as
> where a PCI device is present. This restricts the device drivers to be
> reused for other domain numbers.
>
> Getting ready to remove pci_get_bus_and_slot() function in favor of
> pci_get_domain_bus_and_slot().
>
> Use domain number of 0 as the domain number is not available in struct
> irq_routing_table.
>
> Signed-off-by: Sinan Kaya
Acked-by: Thomas Gleixner
> ---
> arch/x86/pci/irq.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
> index 04526291..52e5510 100644
> --- a/arch/x86/pci/irq.c
> +++ b/arch/x86/pci/irq.c
> @@ -839,7 +839,8 @@ static void __init pirq_find_router(struct irq_router *r)
> DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for [%04x:%04x]\n",
> rt->rtr_vendor, rt->rtr_device);
>
> - pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
> + pirq_router_dev = pci_get_domain_bus_and_slot(0, rt->rtr_bus,
> + rt->rtr_devfn);
> if (!pirq_router_dev) {
> DBG(KERN_DEBUG "PCI: Interrupt router not found at "
> "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
> --
> 1.9.1
>
>
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Re: [Intel-gfx] [PATCH v6 0/7] drm/fbdev: Panel orientation connector property support
Hi, On 28-11-17 11:27, Daniel Vetter wrote: On Sat, Nov 25, 2017 at 06:33:34PM +0100, Hans de Goede wrote: Hi All, Here is v6 of my series to add a "panel orientation" property to the drm-connector for the LCD panel to let userspace know about LCD panels which are not mounted upright, as well as detecting upside-down panels without needing quirks (like we do for 90 degree rotated screens). Bartlomiej, can we please have your Acked-by for merging patches 1, 6 and 7 through the drm tree? New in v6: -Fix / reference kernel-doc comments -Don't export the DRM_MODE_PANEL_ORIENTATION_* defines in the UAPI -Move i915 dsi hardware rotation state read-out to intel_dsi_init() New in v5: -Add kernel-doc comment documenting drm_get_panel_orientation_quirk() -drm_fb_helper: Only use hardware (crtc primary plane) rotation for 180 degrees for now as 9-/270 degrees rotation requires special handling New in v4: -Fix drm_fb_helper code setting an invalid rotation value on the primary plane of disabled/unused crtcs (caught by Fi.CI) New in v3: -As requested by Daniel v3 moves the quirks over from the fbdev subsys to the drm subsys. I've done this by simpy starting with a copy of the quirk table and eventually removing the fbdev version. The 1st patch in this series is a small fbdev/fbcon patch, patches 2-5 are all drm patches and patches 6-7 are fbdev/fbcon patches again. As discussed previously the plan is to merge all 7 patches through the drm tree. I think from the drm and i915 side of things this all looks ready (well pls double-check that CI also approves before merging). The CI says state is warning, see: https://patchwork.freedesktop.org/series/32447/ and specifically: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7290/shards.html Which I find hard to read as I see no tests going to orange, only 3 tests moving to red, which AFAICT is failed. Clicking on the tests link to get history all 3 tests seem to fail in the same way quite often (2 out of 3) or somewhat often (the last one). Also the failures seem unrelated to my changes So how do I deal with this, resend v7 to get CI to run again and hope I get a success result for all tests this time ? Just needs an ack/review from Bart, and then it's probably simplest if you merge it all through drm-misc - the i915 side is tiny. Ok, I will wait for an Ack from Bart and then merge this through drm-misc, thank you for the review. Regards, Hans ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Enable hotplug polling after registering the outputs
Quoting Chris Wilson (2017-11-28 13:02:09) > Quoting Chris Wilson (2017-11-28 11:01:47) > > @@ -1266,6 +1271,13 @@ static void i915_driver_unregister(struct > > drm_i915_private *dev_priv) > > intel_fbdev_unregister(dev_priv); > > intel_audio_deinit(dev_priv); > > > > + /* > > +* After flushing the fbdev (incl. a late async config which will > > +* have delayed queuing of a hotplug event), then flush the hotplug > > +* events. > > +*/ > > + drm_kms_helper_poll_fini(&dev_priv->drm); > > As discussed on irc, I'm unsure as to whether it should be fbdev > followed by kms_helper, or the other way around. In general, I think we > lack some serialisation to control the async hotplug event generation > here... But I think this is sufficiently to make CI happy for the > time being, we will see. Fwiw, this did clear all the WARN_ON(!intel_irq_enabled()) for one CI run. It may not be perfect, it may be "good enough". -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Move execlists setup out of common (rev3)
== Series Details == Series: series starting with [1/4] drm/i915: Move execlists setup out of common (rev3) URL : https://patchwork.freedesktop.org/series/34541/ State : success == Summary == Series 34541v3 series starting with [1/4] drm/i915: Move execlists setup out of common https://patchwork.freedesktop.org/api/1.0/series/34541/revisions/3/mbox/ Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:448s fi-bdw-gvtdvmtotal:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:500s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:387s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:546s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:281s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:513s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:497s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:486s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:427s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:269s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:543s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:425s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:435s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:478s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:458s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:490s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:534s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:482s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:534s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:458s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:543s fi-skl-6700hqtotal:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:572s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:515s fi-skl-gvtdvmtotal:289 pass:265 dwarn:1 dfail:0 fail:0 skip:23 time:498s fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:562s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:423s Blacklisted hosts: fi-cfl-s2total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:602s fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:496s 9cf8a68eee7db5e7ded75187aac4222c07a808dd drm-tip: 2017y-11m-28d-09h-02m-29s UTC integration manifest cdb78f3945a3 drm/i915: Add GuC support for engine busy stats 6038dd010082 drm/i915: Consolidate checks for engine stats availability 430b227e71f8 drm/i915: Move engine->needs_cmd_parser to engine->flags d6e3dc5eec5c drm/i915: Move execlists setup out of common == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7323/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/fb_helper: Disable all crtc's when initial setup fails.
== Series Details == Series: drm/fb_helper: Disable all crtc's when initial setup fails. URL : https://patchwork.freedesktop.org/series/34532/ State : success == Summary == Blacklisted hosts: shard-hswtotal:2662 pass:1528 dwarn:8 dfail:2 fail:8 skip:1116 time:9259s shard-kbltotal:2350 pass:1569 dwarn:21 dfail:12 fail:13 skip:727 time:8561s shard-snbtotal:2452 pass:1190 dwarn:11 dfail:5 fail:7 skip:1234 time:6458s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7322/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Enable hotplug polling after registering the outputs (rev2)
== Series Details == Series: drm/i915: Enable hotplug polling after registering the outputs (rev2) URL : https://patchwork.freedesktop.org/series/34445/ State : success == Summary == Blacklisted hosts: shard-apltotal:2509 pass:1582 dwarn:15 dfail:11 fail:13 skip:883 time:11204s shard-hswtotal:2643 pass:1521 dwarn:8 dfail:2 fail:8 skip:1103 time:8969s shard-snbtotal:2488 pass:1213 dwarn:14 dfail:5 fail:8 skip:1244 time:7395s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7321/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
On 28/11/2017 12:48, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2017-11-28 12:41:27)
From: Tvrtko Ursulin
Move the execlists specific setup out of intel_engine_setup_common. This
was supposed to be only for backend agnostic bits. At the same time rename
it to intel_engine_setup_execlist to follow the setup vs init naming
convetion we have.
Signed-off-by: Tvrtko Ursulin
---
+static void
+intel_engine_setup_execlist(struct intel_engine_cs *engine)
+{
+ struct intel_engine_execlists * const execlists = &engine->execlists;
+
+ execlists->csb_use_mmio = csb_force_mmio(engine->i915);
+
+ execlists->port_mask = 1;
+ BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
+ GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
+
+ execlists->queue = RB_ROOT;
+ execlists->first = NULL;
+}
The only problem here was that we wanted to be sure that some fields
were initialised for the common paths, i.e. so we could iterate over the
queue without worrying first if it was execlists (if it wasn't execlists
the queue would be empty).
Now, I think we could just rely on zero initialisation, but that was the
rationale for it ending up early. Now we could split it between
setup_execlists and init_execlists if we want the pedantry.
Common paths as in ringbuffer submission? I grepped around and don't see
it used there.
Then about setup vs init, we said init is for hw access so I don't
follow how you would split the above?
Regards,
Tvrtko
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[Intel-gfx] [PATCH v2 4/4] drm/i915: Add GuC support for engine busy stats
From: Tvrtko Ursulin
Wire up the engine busy stats accounting to the GuC submission backend.
Since there is not context out interrupt we need to place the accounting
callbacks per-request.
v2: Rebase.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index 912ff143d531..d80d2a3214da 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -781,6 +781,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
INIT_LIST_HEAD(&rq->priotree.link);
__i915_gem_request_submit(rq);
+ intel_engine_context_in(rq->engine);
trace_i915_gem_request_in(rq,
port_index(port, execlists));
last = rq;
@@ -813,6 +814,7 @@ static void guc_submission_tasklet(unsigned long data)
rq = port_request(&port[0]);
while (rq && i915_gem_request_completed(rq)) {
+ intel_engine_context_out(rq->engine);
trace_i915_gem_request_out(rq);
i915_gem_request_put(rq);
@@ -1453,8 +1455,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
-
- engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
--
2.14.1
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[Intel-gfx] [PATCH v4 3/4] drm/i915: Consolidate checks for engine stats availability
From: Tvrtko Ursulin
Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.
My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.
v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)
v4: Move flag setting to intel_engines_reset_default_submission.
(Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Sagar Arun Kamble
Cc: Sagar Arun Kamble
Reviewed-by: Chris Wilson (v2)
---
drivers/gpu/drm/i915/i915_pmu.c | 11 ---
drivers/gpu/drm/i915/intel_engine_cs.c | 8 +---
drivers/gpu/drm/i915/intel_guc_submission.c | 2 ++
drivers/gpu/drm/i915/intel_lrc.c| 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++
5 files changed, 19 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 3357b690ce90..c3c641ec962b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event
*event)
return config_enabled_bit(event->attr.config);
}
-static bool supports_busy_stats(struct drm_i915_private *i915)
-{
- return INTEL_GEN(i915) >= 8;
-}
-
static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
{
u64 enable;
@@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915,
bool gpu_active)
/*
* Also there is software busyness tracking available we do not
* need the timer for I915_SAMPLE_BUSY counter.
+*
+* Use RCS as proxy for all engines.
*/
- else if (supports_busy_stats(i915))
+ else if (intel_engine_supports_stats(i915->engine[RCS]))
enable &= ~BIT(I915_SAMPLE_BUSY);
/*
@@ -447,7 +444,7 @@ static void i915_pmu_event_read(struct perf_event *event)
static bool engine_needs_busy_stats(struct intel_engine_cs *engine)
{
- return supports_busy_stats(engine->i915) &&
+ return intel_engine_supports_stats(engine) &&
(engine->pmu.enable & BIT(I915_SAMPLE_BUSY));
}
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index d27e124d826a..a35f8d3a55fd 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1527,8 +1527,10 @@ void intel_engines_reset_default_submission(struct
drm_i915_private *i915)
struct intel_engine_cs *engine;
enum intel_engine_id id;
- for_each_engine(engine, i915, id)
+ for_each_engine(engine, i915, id) {
engine->set_default_submission(engine);
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+ }
}
/**
@@ -1829,7 +1831,7 @@ int intel_enable_engine_stats(struct intel_engine_cs
*engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return -ENODEV;
spin_lock_irqsave(&engine->stats.lock, flags);
@@ -1890,7 +1892,7 @@ void intel_disable_engine_stats(struct intel_engine_cs
*engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return;
spin_lock_irqsave(&engine->stats.lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index cf1cc2cb6722..912ff143d531 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
+
+ engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 479f880c0f2f..b811f7cddd7e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1983,6 +1983,8 @@ intel_engine_setup_execlist(struct intel_engine_cs
*engine)
execlists->queue = RB_ROOT;
execlists->first = NULL;
+
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
}
static void
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a91ce63b88b6..c68ab3ead83c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -540,6 +540,7 @@ struct intel_engine_cs {
struct intel_engine_hangcheck hangcheck;
#define I915_ENGINE_NEEDS_CMD_PARSER BIT(0)
+#define I915_E
Re: [Intel-gfx] [PATCH v2] drm/i915: Enable hotplug polling after registering the outputs
Quoting Chris Wilson (2017-11-28 11:01:47) > @@ -1266,6 +1271,13 @@ static void i915_driver_unregister(struct > drm_i915_private *dev_priv) > intel_fbdev_unregister(dev_priv); > intel_audio_deinit(dev_priv); > > + /* > +* After flushing the fbdev (incl. a late async config which will > +* have delayed queuing of a hotplug event), then flush the hotplug > +* events. > +*/ > + drm_kms_helper_poll_fini(&dev_priv->drm); As discussed on irc, I'm unsure as to whether it should be fbdev followed by kms_helper, or the other way around. In general, I think we lack some serialisation to control the async hotplug event generation here... But I think this is sufficiently to make CI happy for the time being, we will see. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915: Consolidate checks for engine stats availability
Quoting Tvrtko Ursulin (2017-11-28 12:41:29)
> diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
> b/drivers/gpu/drm/i915/intel_guc_submission.c
> index cf1cc2cb6722..a8e63779de79 100644
> --- a/drivers/gpu/drm/i915/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
> @@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
> execlists->tasklet.func = guc_submission_tasklet;
> engine->park = guc_submission_park;
> engine->unpark = guc_submission_unpark;
> +
> + engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
> }
>
> return 0;
> @@ -1465,6 +1467,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
> void intel_guc_submission_disable(struct intel_guc *guc)
> {
> struct drm_i915_private *dev_priv = guc_to_i915(guc);
> + struct intel_engine_cs *engine;
> + enum intel_engine_id id;
>
> GEM_BUG_ON(dev_priv->gt.awake); /* GT should be parked first */
>
> @@ -1473,6 +1477,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
> /* Revert back to manual ELSP submission */
> intel_engines_reset_default_submission(dev_priv);
>
> + for_each_engine(engine, dev_priv, id)
> + engine->flags |= I915_ENGINE_SUPPORTS_STATS;
Push this into engine->reset_default_submission, then the guc isn't
making an assumption about the other end. We unconditionally clear when
the guc takes over because the guc doesn't provide the stats.
-Chris
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Re: [Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
Quoting Tvrtko Ursulin (2017-11-28 12:41:27)
> From: Tvrtko Ursulin
>
> Move the execlists specific setup out of intel_engine_setup_common. This
> was supposed to be only for backend agnostic bits. At the same time rename
> it to intel_engine_setup_execlist to follow the setup vs init naming
> convetion we have.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> +static void
> +intel_engine_setup_execlist(struct intel_engine_cs *engine)
> +{
> + struct intel_engine_execlists * const execlists = &engine->execlists;
> +
> + execlists->csb_use_mmio = csb_force_mmio(engine->i915);
> +
> + execlists->port_mask = 1;
> + BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
> + GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
> +
> + execlists->queue = RB_ROOT;
> + execlists->first = NULL;
> +}
The only problem here was that we wanted to be sure that some fields
were initialised for the common paths, i.e. so we could iterate over the
queue without worrying first if it was execlists (if it wasn't execlists
the queue would be empty).
Now, I think we could just rely on zero initialisation, but that was the
rationale for it ending up early. Now we could split it between
setup_execlists and init_execlists if we want the pedantry.
-Chris
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/pmu: Return -EINVAL when selecting the inactive CPU
== Series Details == Series: drm/i915/pmu: Return -EINVAL when selecting the inactive CPU URL : https://patchwork.freedesktop.org/series/34529/ State : failure == Summary == Test gem_exec_capture: Subgroup capture-blt: pass -> DMESG-WARN (shard-snb) fdo#103950 +9 Test gem_exec_suspend: Subgroup basic-s4: dmesg-fail -> FAIL (shard-snb) fdo#103375 +3 Test kms_plane_multiple: Subgroup atomic-pipe-a-tiling-none: incomplete -> PASS (shard-snb) fdo#103951 +1 Test drv_selftest: Subgroup mock_sanitycheck: pass -> DMESG-WARN (shard-snb) fdo#103717 Test kms_busy: Subgroup extended-pageflip-hang-newfb-render-b: pass -> DMESG-WARN (shard-hsw) Test kms_flip: Subgroup vblank-vs-suspend-interruptible: pass -> DMESG-WARN (shard-snb) fdo#100368 Subgroup flip-vs-panning-vs-hang-interruptible: pass -> DMESG-WARN (shard-snb) fdo#103821 Test gem_cs_tlb: Subgroup render: pass -> DMESG-WARN (shard-snb) Test gem_fence_thrash: Subgroup bo-write-verify-threaded-none: pass -> DMESG-WARN (shard-snb) Test gem_flink_basic: Subgroup bad-open: pass -> DMESG-WARN (shard-snb) Test prime_vgem: Subgroup busy-bsd1: skip -> INCOMPLETE (shard-snb) Test kms_draw_crc: Subgroup draw-method-xrgb-pwrite-untiled: skip -> PASS (shard-snb) Test perf_pmu: Subgroup invalid-init: pass -> FAIL (shard-snb) pass -> FAIL (shard-hsw) Subgroup most-busy-check-all-bcs0: pass -> DMESG-WARN (shard-snb) Test prime_busy: Subgroup hang-bsd: pass -> DMESG-WARN (shard-hsw) Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL (shard-snb) fdo#101623 Test kms_atomic_interruptible: Subgroup legacy-setmode: incomplete -> PASS (shard-snb) fdo#103712 Test gem_tiled_swapping: Subgroup non-threaded: pass -> INCOMPLETE (shard-hsw) fdo#103525 fdo#103950 https://bugs.freedesktop.org/show_bug.cgi?id=103950 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103951 https://bugs.freedesktop.org/show_bug.cgi?id=103951 fdo#103717 https://bugs.freedesktop.org/show_bug.cgi?id=103717 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103712 https://bugs.freedesktop.org/show_bug.cgi?id=103712 fdo#103525 https://bugs.freedesktop.org/show_bug.cgi?id=103525 shard-hswtotal:2643 pass:1520 dwarn:8 dfail:1 fail:10 skip:1103 time:8947s shard-snbtotal:2564 pass:1253 dwarn:13 dfail:3 fail:10 skip:1282 time:7636s Blacklisted hosts: shard-apltotal:2463 pass:1551 dwarn:15 dfail:11 fail:13 skip:867 time:10553s shard-kbltotal:2350 pass:1569 dwarn:21 dfail:12 fail:14 skip:726 time:8568s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7320/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/4] drm/i915: Move engine->needs_cmd_parser to engine->flags
From: Tvrtko Ursulin
Will be adding a new per-engine flags shortly so it makes sense
to consolidate.
v2: Keep the original code flow in intel_engine_cleanup_cmd_parser.
(Joonas Lahtinen)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Chris Wilson
Reviewed-by: Chris Wilson
Reviewed-by: Sagar Arun Kamble
Reviewed-by: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 7 ---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.h| 8 +++-
3 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c
b/drivers/gpu/drm/i915/i915_cmd_parser.c
index b11629beeb63..ccb5ba043b63 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -26,6 +26,7 @@
*/
#include "i915_drv.h"
+#include "intel_ringbuffer.h"
/**
* DOC: batch buffer command parser
@@ -940,7 +941,7 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs
*engine)
return;
}
- engine->needs_cmd_parser = true;
+ engine->flags |= I915_ENGINE_NEEDS_CMD_PARSER;
}
/**
@@ -952,7 +953,7 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs
*engine)
*/
void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine)
{
- if (!engine->needs_cmd_parser)
+ if (!intel_engine_needs_cmd_parser(engine))
return;
fini_hash_table(engine);
@@ -1350,7 +1351,7 @@ int i915_cmd_parser_get_version(struct drm_i915_private
*dev_priv)
/* If the command parser is not enabled, report 0 - unsupported */
for_each_engine(engine, dev_priv, id) {
- if (engine->needs_cmd_parser) {
+ if (intel_engine_needs_cmd_parser(engine)) {
active = true;
break;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 14d9e61a1e06..70ccd63cbf8e 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -271,7 +271,7 @@ static inline u64 gen8_noncanonical_addr(u64 address)
static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
{
- return eb->engine->needs_cmd_parser && eb->batch_len;
+ return intel_engine_needs_cmd_parser(eb->engine) && eb->batch_len;
}
static int eb_create(struct i915_execbuffer *eb)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 0f38d7b43f31..a91ce63b88b6 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -539,7 +539,8 @@ struct intel_engine_cs {
struct intel_engine_hangcheck hangcheck;
- bool needs_cmd_parser;
+#define I915_ENGINE_NEEDS_CMD_PARSER BIT(0)
+ unsigned int flags;
/*
* Table of commands the command parser needs to know about
@@ -598,6 +599,11 @@ struct intel_engine_cs {
} stats;
};
+static inline bool intel_engine_needs_cmd_parser(struct intel_engine_cs
*engine)
+{
+ return engine->flags & I915_ENGINE_NEEDS_CMD_PARSER;
+}
+
static inline void
execlists_set_active(struct intel_engine_execlists *execlists,
unsigned int bit)
--
2.14.1
___
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[Intel-gfx] [PATCH 3/4] drm/i915: Consolidate checks for engine stats availability
From: Tvrtko Ursulin
Sagar noticed the check can be consolidated between the engine stats
implementation and the PMU.
My first choice was a static inline helper but that got into include
ordering mess quickly fast so I went with a macro instead. At some point
we should perhaps looking into taking out the non-ringubffer bits from
intel_ringbuffer.h into a new intel_engine.h or something.
v2: Use engine->flags. (Chris Wilson)
v3: Rebase and mark GuC as not yet supported. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin
Suggested-by: Sagar Arun Kamble
Cc: Sagar Arun Kamble
Reviewed-by: Chris Wilson (v2)
---
drivers/gpu/drm/i915/i915_pmu.c | 11 ---
drivers/gpu/drm/i915/intel_engine_cs.c | 4 ++--
drivers/gpu/drm/i915/intel_guc_submission.c | 7 +++
drivers/gpu/drm/i915/intel_lrc.c| 2 ++
drivers/gpu/drm/i915/intel_ringbuffer.h | 6 ++
5 files changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 3357b690ce90..c3c641ec962b 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -90,11 +90,6 @@ static unsigned int event_enabled_bit(struct perf_event
*event)
return config_enabled_bit(event->attr.config);
}
-static bool supports_busy_stats(struct drm_i915_private *i915)
-{
- return INTEL_GEN(i915) >= 8;
-}
-
static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
{
u64 enable;
@@ -123,8 +118,10 @@ static bool pmu_needs_timer(struct drm_i915_private *i915,
bool gpu_active)
/*
* Also there is software busyness tracking available we do not
* need the timer for I915_SAMPLE_BUSY counter.
+*
+* Use RCS as proxy for all engines.
*/
- else if (supports_busy_stats(i915))
+ else if (intel_engine_supports_stats(i915->engine[RCS]))
enable &= ~BIT(I915_SAMPLE_BUSY);
/*
@@ -447,7 +444,7 @@ static void i915_pmu_event_read(struct perf_event *event)
static bool engine_needs_busy_stats(struct intel_engine_cs *engine)
{
- return supports_busy_stats(engine->i915) &&
+ return intel_engine_supports_stats(engine) &&
(engine->pmu.enable & BIT(I915_SAMPLE_BUSY));
}
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index d27e124d826a..b58915ea7557 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -1829,7 +1829,7 @@ int intel_enable_engine_stats(struct intel_engine_cs
*engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return -ENODEV;
spin_lock_irqsave(&engine->stats.lock, flags);
@@ -1890,7 +1890,7 @@ void intel_disable_engine_stats(struct intel_engine_cs
*engine)
{
unsigned long flags;
- if (INTEL_GEN(engine->i915) < 8)
+ if (!intel_engine_supports_stats(engine))
return;
spin_lock_irqsave(&engine->stats.lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index cf1cc2cb6722..a8e63779de79 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -1453,6 +1453,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
+
+ engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
@@ -1465,6 +1467,8 @@ int intel_guc_submission_enable(struct intel_guc *guc)
void intel_guc_submission_disable(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
GEM_BUG_ON(dev_priv->gt.awake); /* GT should be parked first */
@@ -1473,6 +1477,9 @@ void intel_guc_submission_disable(struct intel_guc *guc)
/* Revert back to manual ELSP submission */
intel_engines_reset_default_submission(dev_priv);
+ for_each_engine(engine, dev_priv, id)
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
+
guc_clients_destroy(guc);
}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 479f880c0f2f..b811f7cddd7e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1983,6 +1983,8 @@ intel_engine_setup_execlist(struct intel_engine_cs
*engine)
execlists->queue = RB_ROOT;
execlists->first = NULL;
+
+ engine->flags |= I915_ENGINE_SUPPORTS_STATS;
}
static void
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index a91ce63b88b6..c68ab3ead83c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuff
[Intel-gfx] [PATCH 4/4] drm/i915: Add GuC support for engine busy stats
From: Tvrtko Ursulin
Wire up the engine busy stats accounting to the GuC submission backend.
Since there is not context out interrupt we need to place the accounting
callbacks per-request.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_guc_submission.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index a8e63779de79..d80d2a3214da 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -781,6 +781,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
INIT_LIST_HEAD(&rq->priotree.link);
__i915_gem_request_submit(rq);
+ intel_engine_context_in(rq->engine);
trace_i915_gem_request_in(rq,
port_index(port, execlists));
last = rq;
@@ -813,6 +814,7 @@ static void guc_submission_tasklet(unsigned long data)
rq = port_request(&port[0]);
while (rq && i915_gem_request_completed(rq)) {
+ intel_engine_context_out(rq->engine);
trace_i915_gem_request_out(rq);
i915_gem_request_put(rq);
@@ -1453,8 +1455,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
execlists->tasklet.func = guc_submission_tasklet;
engine->park = guc_submission_park;
engine->unpark = guc_submission_unpark;
-
- engine->flags &= ~I915_ENGINE_SUPPORTS_STATS;
}
return 0;
@@ -1467,8 +1467,6 @@ int intel_guc_submission_enable(struct intel_guc *guc)
void intel_guc_submission_disable(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- struct intel_engine_cs *engine;
- enum intel_engine_id id;
GEM_BUG_ON(dev_priv->gt.awake); /* GT should be parked first */
@@ -1477,9 +1475,6 @@ void intel_guc_submission_disable(struct intel_guc *guc)
/* Revert back to manual ELSP submission */
intel_engines_reset_default_submission(dev_priv);
- for_each_engine(engine, dev_priv, id)
- engine->flags |= I915_ENGINE_SUPPORTS_STATS;
-
guc_clients_destroy(guc);
}
--
2.14.1
___
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[Intel-gfx] [PATCH 1/4] drm/i915: Move execlists setup out of common
From: Tvrtko Ursulin
Move the execlists specific setup out of intel_engine_setup_common. This
was supposed to be only for backend agnostic bits. At the same time rename
it to intel_engine_setup_execlist to follow the setup vs init naming
convetion we have.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/i915/intel_engine_cs.c | 34 --
drivers/gpu/drm/i915/intel_lrc.c | 34 ++
2 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
b/drivers/gpu/drm/i915/intel_engine_cs.c
index fede62daf3e1..d27e124d826a 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -25,7 +25,6 @@
#include
#include "i915_drv.h"
-#include "i915_vgpu.h"
#include "intel_ringbuffer.h"
#include "intel_lrc.h"
@@ -391,37 +390,6 @@ static void intel_engine_init_timeline(struct
intel_engine_cs *engine)
engine->timeline = &engine->i915->gt.global_timeline.engine[engine->id];
}
-static bool csb_force_mmio(struct drm_i915_private *i915)
-{
- /*
-* IOMMU adds unpredictable latency causing the CSB write (from the
-* GPU into the HWSP) to only be visible some time after the interrupt
-* (missed breadcrumb syndrome).
-*/
- if (intel_vtd_active())
- return true;
-
- /* Older GVT emulation depends upon intercepting CSB mmio */
- if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
- return true;
-
- return false;
-}
-
-static void intel_engine_init_execlist(struct intel_engine_cs *engine)
-{
- struct intel_engine_execlists * const execlists = &engine->execlists;
-
- execlists->csb_use_mmio = csb_force_mmio(engine->i915);
-
- execlists->port_mask = 1;
- BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
- GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
-
- execlists->queue = RB_ROOT;
- execlists->first = NULL;
-}
-
/**
* intel_engines_setup_common - setup engine state not requiring hw access
* @engine: Engine to setup.
@@ -433,8 +401,6 @@ static void intel_engine_init_execlist(struct
intel_engine_cs *engine)
*/
void intel_engine_setup_common(struct intel_engine_cs *engine)
{
- intel_engine_init_execlist(engine);
-
intel_engine_init_timeline(engine);
intel_engine_init_hangcheck(engine);
i915_gem_batch_pool_init(engine, &engine->batch_pool);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 570864583e28..479f880c0f2f 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -137,6 +137,7 @@
#include
#include "i915_drv.h"
#include "i915_gem_render_state.h"
+#include "i915_vgpu.h"
#include "intel_mocs.h"
#define RING_EXECLIST_QFULL(1 << 0x2)
@@ -1952,6 +1953,38 @@ logical_ring_default_irqs(struct intel_engine_cs *engine)
engine->irq_keep_mask = GT_CONTEXT_SWITCH_INTERRUPT << shift;
}
+static bool csb_force_mmio(struct drm_i915_private *i915)
+{
+ /*
+* IOMMU adds unpredictable latency causing the CSB write (from the
+* GPU into the HWSP) to only be visible some time after the interrupt
+* (missed breadcrumb syndrome).
+*/
+ if (intel_vtd_active())
+ return true;
+
+ /* Older GVT emulation depends upon intercepting CSB mmio */
+ if (intel_vgpu_active(i915) && !intel_vgpu_has_hwsp_emulation(i915))
+ return true;
+
+ return false;
+}
+
+static void
+intel_engine_setup_execlist(struct intel_engine_cs *engine)
+{
+ struct intel_engine_execlists * const execlists = &engine->execlists;
+
+ execlists->csb_use_mmio = csb_force_mmio(engine->i915);
+
+ execlists->port_mask = 1;
+ BUILD_BUG_ON_NOT_POWER_OF_2(execlists_num_ports(execlists));
+ GEM_BUG_ON(execlists_num_ports(execlists) > EXECLIST_MAX_PORTS);
+
+ execlists->queue = RB_ROOT;
+ execlists->first = NULL;
+}
+
static void
logical_ring_setup(struct intel_engine_cs *engine)
{
@@ -1959,6 +1992,7 @@ logical_ring_setup(struct intel_engine_cs *engine)
enum forcewake_domains fw_domains;
intel_engine_setup_common(engine);
+ intel_engine_setup_execlist(engine);
/* Intentionally left blank. */
engine->buffer = NULL;
--
2.14.1
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[Intel-gfx] ✗ Fi.CI.BAT: warning for igt: Remove gem_ctx_basic (rev2)
== Series Details == Series: igt: Remove gem_ctx_basic (rev2) URL : https://patchwork.freedesktop.org/series/34500/ State : warning == Summary == IGT patchset tested on top of latest successful build 53f2b4b4ce2372da0b3b741d934dd5a9110ac1e2 igt/perf_pmu: Keep batch_duration_ns as the minimum measurement duration with latest DRM-Tip kernel build CI_DRM_3398 9cf8a68eee7d drm-tip: 2017y-11m-28d-09h-02m-29s UTC integration manifest Testlist changes: -igt@gem_ctx_basic Test kms_force_connector_basic: Subgroup force-connector-state: pass -> SKIP (fi-snb-2520m) Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (fi-bwr-2160) fdo#103923 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#103923 https://bugs.freedesktop.org/show_bug.cgi?id=103923 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:444s fi-bdw-gvtdvmtotal:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:486s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:386s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:514s fi-bwr-2160 total:288 pass:182 dwarn:1 dfail:0 fail:0 skip:105 time:322s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:502s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:506s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:490s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:476s fi-elk-e7500 total:288 pass:229 dwarn:0 dfail:0 fail:0 skip:59 time:428s fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:272s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:528s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:425s fi-hsw-4770r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:434s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:483s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:462s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:486s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:525s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:488s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:531s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:586s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:540s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:567s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:518s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-skl-gvtdvmtotal:288 pass:264 dwarn:1 dfail:0 fail:0 skip:23 time:489s fi-snb-2520m total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:557s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:417s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:607s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:490s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_558/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "x86/irq: Simplify hotplug vector accounting"
Quoting Patchwork (2017-11-28 12:22:22) > == Series Details == > > Series: Revert "x86/irq: Simplify hotplug vector accounting" > URL : https://patchwork.freedesktop.org/series/34527/ > State : failure And still the do_IRQ failures and what appears to be lost interrupts. This was not the patch we were looking for. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for Revert "x86/irq: Simplify hotplug vector accounting"
== Series Details == Series: Revert "x86/irq: Simplify hotplug vector accounting" URL : https://patchwork.freedesktop.org/series/34527/ State : failure == Summary == Test prime_busy: Subgroup wait-hang-bsd: pass -> DMESG-WARN (shard-hsw) Subgroup hang-bsd: pass -> DMESG-WARN (shard-hsw) Test perf: Subgroup blocking: pass -> FAIL (shard-hsw) fdo#102252 Test drv_suspend: Subgroup debugfs-reader-hibernate: fail -> DMESG-FAIL (shard-hsw) fdo#103375 +3 Test gem_exec_capture: Subgroup capture-blt: pass -> DMESG-WARN (shard-snb) fdo#103950 +5 Test kms_frontbuffer_tracking: Subgroup fbc-suspend: dmesg-warn -> PASS (shard-snb) fdo#101623 +2 Subgroup basic: incomplete -> PASS (shard-snb) fdo#103951 Test gem_cs_tlb: Subgroup render: pass -> DMESG-WARN (shard-snb) Test gem_fence_thrash: Subgroup bo-write-verify-threaded-none: pass -> DMESG-WARN (shard-snb) Test gem_flink_basic: Subgroup bad-open: pass -> DMESG-WARN (shard-snb) Test prime_vgem: Subgroup busy-bsd1: skip -> INCOMPLETE (shard-snb) Test perf_pmu: Subgroup rc6: dmesg-warn -> PASS (shard-snb) Test kms_atomic_interruptible: Subgroup legacy-setmode: incomplete -> PASS (shard-snb) fdo#103712 Test drv_hangman: Subgroup error-state-capture-render: dmesg-warn -> PASS (shard-hsw) Test kms_draw_crc: Subgroup draw-method-xrgb-pwrite-untiled: skip -> PASS (shard-snb) Test kms_flip: Subgroup flip-vs-panning-vs-hang-interruptible: pass -> DMESG-WARN (shard-snb) fdo#103821 Test gem_tiled_swapping: Subgroup non-threaded: incomplete -> PASS (shard-snb) Test gem_exec_create: Subgroup forked: incomplete -> PASS (shard-hsw) fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103950 https://bugs.freedesktop.org/show_bug.cgi?id=103950 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103951 https://bugs.freedesktop.org/show_bug.cgi?id=103951 fdo#103712 https://bugs.freedesktop.org/show_bug.cgi?id=103712 fdo#103821 https://bugs.freedesktop.org/show_bug.cgi?id=103821 shard-hswtotal:2662 pass:1528 dwarn:7 dfail:2 fail:9 skip:1116 time:9300s shard-snbtotal:2541 pass:1236 dwarn:13 dfail:4 fail:9 skip:1276 time:7714s Blacklisted hosts: shard-apltotal:2459 pass:1547 dwarn:15 dfail:11 fail:14 skip:866 time:10575s shard-kbltotal:2391 pass:1590 dwarn:18 dfail:11 fail:15 skip:749 time:8344s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7319/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for tests/perf_pmu: Sync invalid-init with i915 changes
== Series Details == Series: tests/perf_pmu: Sync invalid-init with i915 changes URL : https://patchwork.freedesktop.org/series/34530/ State : success == Summary == IGT patchset tested on top of latest successful build 53f2b4b4ce2372da0b3b741d934dd5a9110ac1e2 igt/perf_pmu: Keep batch_duration_ns as the minimum measurement duration with latest DRM-Tip kernel build CI_DRM_3398 9cf8a68eee7d drm-tip: 2017y-11m-28d-09h-02m-29s UTC integration manifest No testlist changes. Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: incomplete -> PASS (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:442s fi-bdw-gvtdvmtotal:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:491s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:387s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:543s fi-bwr-2160 total:289 pass:183 dwarn:0 dfail:0 fail:0 skip:106 time:280s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:516s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:507s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:496s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:489s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:432s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:271s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:543s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:430s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:439s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:489s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:457s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:490s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:533s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:479s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:533s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:588s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:448s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:545s fi-skl-6700hqtotal:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:570s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:521s fi-skl-6770hqtotal:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:517s fi-skl-gvtdvmtotal:289 pass:265 dwarn:1 dfail:0 fail:0 skip:23 time:494s fi-snb-2520m total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:571s fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:424s Blacklisted hosts: fi-cfl-s2total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:608s fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:496s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_557/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fb_helper: Disable all crtc's when initial setup fails.
== Series Details == Series: drm/fb_helper: Disable all crtc's when initial setup fails. URL : https://patchwork.freedesktop.org/series/34532/ State : success == Summary == Series 34532v1 drm/fb_helper: Disable all crtc's when initial setup fails. https://patchwork.freedesktop.org/api/1.0/series/34532/revisions/1/mbox/ Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (fi-bwr-2160) fdo#103923 fdo#103923 https://bugs.freedesktop.org/show_bug.cgi?id=103923 fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:442s fi-bdw-gvtdvmtotal:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:495s fi-blb-e6850 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:385s fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:539s fi-bwr-2160 total:289 pass:182 dwarn:1 dfail:0 fail:0 skip:106 time:319s fi-bxt-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:505s fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:509s fi-byt-j1900 total:289 pass:254 dwarn:0 dfail:0 fail:0 skip:35 time:487s fi-byt-n2820 total:289 pass:250 dwarn:0 dfail:0 fail:0 skip:39 time:490s fi-elk-e7500 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:424s fi-gdg-551 total:289 pass:178 dwarn:1 dfail:0 fail:1 skip:109 time:263s fi-glk-1 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:423s fi-hsw-4770r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:434s fi-ivb-3520m total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:485s fi-ivb-3770 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:456s fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:487s fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:528s fi-kbl-7567u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:477s fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:535s fi-pnv-d510 total:289 pass:222 dwarn:1 dfail:0 fail:0 skip:66 time:595s fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:444s fi-skl-6600u total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:544s fi-skl-6700hqtotal:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:566s fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:515s fi-skl-6770hqtotal:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-skl-gvtdvmtotal:289 pass:265 dwarn:1 dfail:0 fail:0 skip:23 time:495s fi-snb-2520m total:246 pass:212 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:0 skip:40 time:415s Blacklisted hosts: fi-cfl-s2total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:611s fi-glk-dsi total:289 pass:259 dwarn:0 dfail:0 fail:0 skip:30 time:497s 9cf8a68eee7db5e7ded75187aac4222c07a808dd drm-tip: 2017y-11m-28d-09h-02m-29s UTC integration manifest d9ebb7213b04 drm/fb_helper: Disable all crtc's when initial setup fails. == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7322/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t] igt/kms_rotation_crc: Add RGB565 90 degree test for gen>9
Hey, Op 21-11-17 om 15:02 schreef Juha-Pekka Heikkila: > Gen10 onwards 90 and 270 degree rotations are supported for RGB565 format. > > v2 (Ville Syrjälä): > As a side effect to keep bad-pixel-format test valid on all supported > platforms it need to use DRM_FORMAT_C8 now. > > While at it clean up kms_rotation_crc test a bit, take out > test_plane_rotation_ytiled_obj() function as > test_plane_rotation() can basically do the same. > > v3 (Ville Syrjälä): > repurpose test_plane_rotation_ytiled_obj() function for > bad pixel testing with DRM_FORMAT_C8 as igt doesn't > support this format. > > Signed-off-by: Juha-Pekka Heikkila At this point there is no correct order to apply the tests then. What I would like to see is the bad-pixel-format changes in a separate commit, so we can commit that first, and then commit kernel change, watch CI results for regressions and then add the new IGT test.. With that fixed the patches can be applied. :) ~Maarten ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/fb_helper: Disable all crtc's when initial setup fails.
On Tue, Nov 28, 2017 at 12:16:03PM +0100, Maarten Lankhorst wrote:
> Some drivers like i915 start with crtc's enabled, but with deferred
> fbcon setup they were no longer disabled as part of fbdev setup.
> Headless units could no longer enter pc3 state because the crtc was
> still enabled.
>
> Fix this by calling restore_fbdev_mode when we would have called
> it otherwise once during initial fbdev setup.
>
> Signed-off-by: Maarten Lankhorst
> Fixes: ca91a2758fce ("drm/fb-helper: Support deferred setup")
Please use dim fixes to get a more complete Cc: list for regression fixes.
> Cc: # v4.14+
> Reported-by: Thomas Voegtle
Reviewed-by: Daniel Vetter
But please confirm with the reporter that it indeed fixes the issue before
pushing.
-Daniel
> ---
> drivers/gpu/drm/drm_fb_helper.c | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 07374008f146..e56166334455 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -1809,6 +1809,10 @@ static int drm_fb_helper_single_fb_probe(struct
> drm_fb_helper *fb_helper,
>
> if (crtc_count == 0 || sizes.fb_width == -1 || sizes.fb_height == -1) {
> DRM_INFO("Cannot find any crtc or sizes\n");
> +
> + /* First time: disable all crtc's.. */
> + if (!fb_helper->deferred_setup &&
> !READ_ONCE(fb_helper->dev->master))
> + restore_fbdev_mode(fb_helper);
> return -EAGAIN;
> }
>
> --
> 2.15.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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