[Intel-gfx] [GIT PULL] gvt-fixes for 4.15-rc3
Hi, Here's gvt-fixes for 4.15-rc3 with several fixes backported. thanks -- The following changes since commit b721b65af4eb46df6a1d9e34b14003225e403565: drm/i915/gvt: Correct ADDR_4K/2M/1G_MASK definition (2017-11-28 17:24:30 +0800) are available in the Git repository at: https://github.com/intel/gvt-linux.git tags/gvt-fixes-2017-12-06 for you to fetch changes up to 11474e9091cf2002e948647fd9f63a7f027e488a: drm/i915/gvt: set max priority for gvt context (2017-12-06 11:38:21 +0800) gvt-fixes-2017-12-06 - Fix invalid hw reg read value for vGPU (Xiong) - Fix qemu warning on PCI ROM bar missing (Changbin) - Workaround preemption regression (Zhenyu) Changbin Du (1): drm/i915/gvt: Emulate PCI expansion ROM base address register Xiong Zhang (1): drm/i915/gvt: Limit read hw reg to active vgpu Zhenyu Wang (2): drm/i915/gvt: Don't mark vgpu context as inactive when preempted drm/i915/gvt: set max priority for gvt context Zhi Wang (1): drm/i915/gvt: Export intel_gvt_render_mmio_to_ring_id() drivers/gpu/drm/i915/gvt/cfg_space.c | 21 drivers/gpu/drm/i915/gvt/handlers.c | 47 drivers/gpu/drm/i915/gvt/mmio.h | 2 ++ drivers/gpu/drm/i915/gvt/scheduler.c | 22 - 4 files changed, 81 insertions(+), 11 deletions(-) -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] Fixes that failed to cleanly apply to v4.15-rc1
On 2017.12.05 17:02:34 +0200, Joonas Lahtinen wrote: > Dropping GVT folks that are not affected. > > Keeping Zhenyu and Zhi as a heads-up, there's no need for GVT pull for this > rc? > I need to backport one from -next once it's pulled and it's done now. I will send a fixes pull today. thanks -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] drm-intel/for-linux-next disabled on linux-next?
On Dec 5, 2017, at 6:11 PM, Stephen Rothwell mailto:s...@canb.auug.org.au>> wrote: Hi Rodrigo, On Tue, 5 Dec 2017 17:19:21 -0800 Rodrigo Vivi mailto:rodrigo.v...@intel.com>> wrote: We noticed that drm-intel/for-linux-next is currently disabled on linux-next. What gave you that idea? Daniel noticed this morning and warned me that he had seen linux-next didn’t have our stuff merged yet... I put a note on my todo list and by the end of the day I checked myself and it was still the case... but probably right before you did the fix-up. I wonder if it has to do with the compilation error we had yesterday night (enum plane related). Was it the case? Our solution on drm-tip was to fix at drm-rerere side when building the branches so we don't break nor are forced to mix drm-misc-next with drm-intel-next-queued. Solution is: +- enum plane plane; ++ enum i9xx_plane_id plane; https://cgit.freedesktop.org/drm/drm-tip/commit/?h=rerere-cache&id=481aa1c945447716ea793699e520b3ef31ef7c83~ So the ideal is to apply this when merging drm-intel/for-linux-next now. See my email earlier today which addresses exactly this. Yeap.. I saw your email right after sending this... Thanks, Rodrigo -- Cheers, Stephen Rothwell ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree
Hi Rodrigo, On Tue, 5 Dec 2017 17:21:54 -0800 Rodrigo Vivi wrote: > > I had just written the email for you about this. > Feel free to ignore that one since you already found the solution > and sorry for the delay on warning you. And I should read all my email before responding to earlier ones :-) -- Cheers, Stephen Rothwell ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] drm-intel/for-linux-next disabled on linux-next?
Hi Rodrigo, On Tue, 5 Dec 2017 17:19:21 -0800 Rodrigo Vivi wrote: > > We noticed that drm-intel/for-linux-next is currently disabled > on linux-next. What gave you that idea? > I wonder if it has to do with the compilation error we had yesterday > night (enum plane related). Was it the case? > > Our solution on drm-tip was to fix at drm-rerere side when building > the branches so we don't break nor are forced to mix drm-misc-next > with drm-intel-next-queued. > > Solution is: > +- enum plane plane; > ++ enum i9xx_plane_id plane; > > https://cgit.freedesktop.org/drm/drm-tip/commit/?h=rerere-cache&id=481aa1c945447716ea793699e520b3ef31ef7c83~ > > So the ideal is to apply this when merging drm-intel/for-linux-next now. See my email earlier today which addresses exactly this. -- Cheers, Stephen Rothwell ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/i915: Track GGTT writes on the vma
== Series Details == Series: drm/i915: Track GGTT writes on the vma URL : https://patchwork.freedesktop.org/series/34944/ State : warning == Summary == Test drv_suspend: Subgroup fence-restore-tiled2untiled-hibernate: skip -> FAIL (shard-hsw) fdo#103375 Test kms_flip: Subgroup modeset-vs-vblank-race: fail -> PASS (shard-hsw) fdo#103060 Subgroup vblank-vs-modeset-suspend-interruptible: pass -> SKIP (shard-snb) Subgroup vblank-vs-modeset-suspend: skip -> PASS (shard-snb) fdo#102365 Subgroup flip-vs-expired-vblank-interruptible: fail -> PASS (shard-hsw) fdo#102887 Test kms_frontbuffer_tracking: Subgroup fbc-stridechange: pass -> SKIP (shard-snb) fdo#101623 +2 Test drv_module_reload: Subgroup basic-no-display: pass -> DMESG-WARN (shard-snb) fdo#102707 +1 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 shard-hswtotal:2679 pass:1536 dwarn:1 dfail:0 fail:10 skip:1132 time:9499s shard-snbtotal:2679 pass:1303 dwarn:2 dfail:0 fail:13 skip:1361 time:8024s Blacklisted hosts: shard-apltotal:2679 pass:1677 dwarn:2 dfail:0 fail:23 skip:977 time:13733s shard-kbltotal:2620 pass:1732 dwarn:20 dfail:1 fail:24 skip:842 time:10733s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7421/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] linux-next: build failure after merge of the drm-misc tree
On Wed, Dec 06, 2017 at 01:00:15AM +, Stephen Rothwell wrote:
> Hi all,
Hi Stephen,
I had just written the email for you about this.
Feel free to ignore that one since you already found the solution
and sorry for the delay on warning you.
>
> After merging the drm-misc tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/gpu/drm/i915/intel_dsi.c: In function
> 'intel_dsi_get_panel_orientation':
> drivers/gpu/drm/i915/intel_dsi.c:1673:13: error: storage size of 'plane'
> isn't known
> enum plane plane;
> ^
>
> Caused by commit
>
> 82daca297506 ("drm/i915: Add "panel orientation" property to the panel
> connector, v6.")
>
> interacting with commit
>
> ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/")
>
> from the drm-intel tree.
>
> I have applied the following merge fix patch for today.
Yes, that's the right one.
Thanks,
Rodrigo.
>
> From: Stephen Rothwell
> Date: Wed, 6 Dec 2017 11:56:32 +1100
> Subject: [PATCH] drm/i915: fix up for "drm/i915: s/enum plane/enum
> i9xx_plane_id/"
>
> Signed-off-by: Stephen Rothwell
> ---
> drivers/gpu/drm/i915/intel_dsi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> b/drivers/gpu/drm/i915/intel_dsi.c
> index 1b60df3c14a0..f67d321376e4 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -1670,7 +1670,7 @@ static int intel_dsi_get_panel_orientation(struct
> intel_connector *connector)
> {
> struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> int orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
> - enum plane plane;
> + enum i9xx_plane_id plane;
> u32 val;
>
> if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> --
> 2.15.0
>
> --
> Cheers,
> Stephen Rothwell
> ___
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[Intel-gfx] drm-intel/for-linux-next disabled on linux-next?
Hi Stephen, We noticed that drm-intel/for-linux-next is currently disabled on linux-next. I wonder if it has to do with the compilation error we had yesterday night (enum plane related). Was it the case? Our solution on drm-tip was to fix at drm-rerere side when building the branches so we don't break nor are forced to mix drm-misc-next with drm-intel-next-queued. Solution is: +- enum plane plane; ++ enum i9xx_plane_id plane; https://cgit.freedesktop.org/drm/drm-tip/commit/?h=rerere-cache&id=481aa1c945447716ea793699e520b3ef31ef7c83~ So the ideal is to apply this when merging drm-intel/for-linux-next now. Please let us know if there is anything else we might be missing. Thanks, Rodrigo. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] linux-next: build failure after merge of the drm-misc tree
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
drivers/gpu/drm/i915/intel_dsi.c: In function 'intel_dsi_get_panel_orientation':
drivers/gpu/drm/i915/intel_dsi.c:1673:13: error: storage size of 'plane' isn't
known
enum plane plane;
^
Caused by commit
82daca297506 ("drm/i915: Add "panel orientation" property to the panel
connector, v6.")
interacting with commit
ed15030d7ab0 ("drm/i915: s/enum plane/enum i9xx_plane_id/")
from the drm-intel tree.
I have applied the following merge fix patch for today.
From: Stephen Rothwell
Date: Wed, 6 Dec 2017 11:56:32 +1100
Subject: [PATCH] drm/i915: fix up for "drm/i915: s/enum plane/enum
i9xx_plane_id/"
Signed-off-by: Stephen Rothwell
---
drivers/gpu/drm/i915/intel_dsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 1b60df3c14a0..f67d321376e4 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1670,7 +1670,7 @@ static int intel_dsi_get_panel_orientation(struct
intel_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
int orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
- enum plane plane;
+ enum i9xx_plane_id plane;
u32 val;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
--
2.15.0
--
Cheers,
Stephen Rothwell
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Re: [Intel-gfx] [GIT PULL] more gvt-next for 4.16
Applied. Thanks, I noticed the KBL patch and got curious... what about CFL and CNL? Thanks, Rodrigo. On Tue, Dec 05, 2017 at 03:26:29AM +, Zhenyu Wang wrote: > > Hi, > > Here's more gvt-next updates for 4.16. Mostly for final VFIO mdev > display dmabuf interface and gvt implementation which have been > reviewed by VFIO maintainer and acked to push through gvt merge path. > User space qemu support was sent as > https://lists.nongnu.org/archive/html/qemu-devel/2017-10/msg02213.html, > and tracked at > https://www.kraxel.org/cgit/qemu/log/?h=work/intel-vgpu > > Others include VFIO opregion support, scheduler optimization and > preemption fix, etc. > > thanks > -- > The following changes since commit f2880e04f3a5419366926182fc97a3c2e4fd8f2a: > > drm/i915/gvt: Move request alloc to dispatch_workload path only (2017-11-16 > 11:51:55 +0800) > > are available in the Git repository at: > > https://github.com/intel/gvt-linux.git tags/gvt-next-2017-12-05 > > for you to fetch changes up to 1603660b3342269c95fcafee1945790342a8c28e: > > drm/i915/gvt: set max priority for gvt context (2017-12-04 11:24:35 +0800) > > > gvt-next-2017-12-05 > > - VFIO mdev display dmabuf interface and gvt support (Tina) > - VFIO mdev opregion support/fixes (Tina/Xiong/Chris) > - workload scheduling optimization (Changbin) > - preemption fix and temporal workaround (Zhenyu) > - and misc fixes after refactor (Chris) > > > Changbin Du (2): > drm/i915/gvt: Convert macro queue_workload to a function > drm/i915/gvt: Kick scheduler when new workload queued > > Chris Wilson (2): > drm/i915/gvt: Cleanup unwanted public symbols > drm/i915/gvt: Fix out-of-bounds buffer write into opregion->signature[] > > Tina Zhang (7): > drm/i915/gvt: Add opregion support > drm/i915/gvt: Add framebuffer decoder support > vfio: ABI for mdev display dma-buf operation > drm/i915/gvt: Dmabuf support for GVT-g > drm/i915/gvt: Handle orphan dmabuf_objs > drm/i915/gvt: Introduce KBL to dma-buf on Gvt-g > drm/i915/gvt: Free dmabuf_obj list in intel_vgpu_dmabuf_cleanup > > Xiong Zhang (1): > drm/i915/gvt: Alloc and Init guest opregion at vgpu creation > > Zhenyu Wang (2): > drm/i915/gvt: Don't mark vgpu context as inactive when preempted > drm/i915/gvt: set max priority for gvt context > > drivers/gpu/drm/i915/gvt/Makefile | 3 +- > drivers/gpu/drm/i915/gvt/cfg_space.c| 3 +- > drivers/gpu/drm/i915/gvt/display.c | 2 +- > drivers/gpu/drm/i915/gvt/display.h | 2 + > drivers/gpu/drm/i915/gvt/dmabuf.c | 538 > > drivers/gpu/drm/i915/gvt/dmabuf.h | 67 > drivers/gpu/drm/i915/gvt/execlist.c | 8 +- > drivers/gpu/drm/i915/gvt/fb_decoder.c | 508 ++ > drivers/gpu/drm/i915/gvt/fb_decoder.h | 169 ++ > drivers/gpu/drm/i915/gvt/gvt.c | 2 + > drivers/gpu/drm/i915/gvt/gvt.h | 17 +- > drivers/gpu/drm/i915/gvt/hypercall.h| 3 + > drivers/gpu/drm/i915/gvt/kvmgt.c| 161 +- > drivers/gpu/drm/i915/gvt/mpt.h | 45 +++ > drivers/gpu/drm/i915/gvt/opregion.c | 137 +--- > drivers/gpu/drm/i915/gvt/sched_policy.c | 5 + > drivers/gpu/drm/i915/gvt/sched_policy.h | 2 + > drivers/gpu/drm/i915/gvt/scheduler.c| 21 +- > drivers/gpu/drm/i915/gvt/scheduler.h| 7 +- > drivers/gpu/drm/i915/gvt/vgpu.c | 17 +- > drivers/gpu/drm/i915/i915_gem_object.h | 2 + > include/uapi/linux/vfio.h | 62 > 22 files changed, 1709 insertions(+), 72 deletions(-) > create mode 100644 drivers/gpu/drm/i915/gvt/dmabuf.c > create mode 100644 drivers/gpu/drm/i915/gvt/dmabuf.h > create mode 100644 drivers/gpu/drm/i915/gvt/fb_decoder.c > create mode 100644 drivers/gpu/drm/i915/gvt/fb_decoder.h > > > -- > Open Source Technology Center, Intel ltd. > > $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Track GGTT writes on the vma
== Series Details == Series: drm/i915: Track GGTT writes on the vma URL : https://patchwork.freedesktop.org/series/34944/ State : success == Summary == Series 34944v1 drm/i915: Track GGTT writes on the vma https://patchwork.freedesktop.org/api/1.0/series/34944/revisions/1/mbox/ Test kms_busy: Subgroup basic-flip-b: pass -> FAIL (fi-gdg-551) fdo#102654 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#102654 https://bugs.freedesktop.org/show_bug.cgi?id=102654 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:386s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:521s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:280s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:506s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:511s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:496s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:479s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:176 dwarn:1 dfail:0 fail:3 skip:108 time:279s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:541s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:359s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:478s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:447s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:529s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:478s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:534s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:588s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:453s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:546s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:572s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:522s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:501s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:422s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:607s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:646s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:498s 6f5395665e73c3003775b0c50cff519547aa7b93 drm-tip: 2017y-12m-05d-22h-05m-13s UTC integration manifest 25d0515d94cd drm/i915: Track GGTT writes on the vma == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7421/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Track GGTT writes on the vma
As writes through the GTT and GGTT PTE updates do not share the same
path, they are not strictly ordered and so we must explicitly flush the
indirect writes prior to modifying the PTE. We do track outstanding GGTT
writes on the object itself, but since the object may have multiple GGTT
vma, that is overly coarse as we can track and flush individual vma as
required.
Whilst here, update the GGTT flushing behaviour for Cannonlake.
v2: Hard-code ring offset to allow use during unload (after RCS may have
been freed, or never existed!)
References: https://bugs.freedesktop.org/show_bug.cgi?id=104002
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
---
drivers/gpu/drm/i915/i915_drv.h | 2 ++
drivers/gpu/drm/i915/i915_gem.c | 58 -
drivers/gpu/drm/i915/i915_vma.c | 22
drivers/gpu/drm/i915/i915_vma.h | 19 ++
4 files changed, 83 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 594fd14e66c5..5cf58e049dbd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3879,6 +3879,8 @@ int __must_check i915_gem_evict_for_node(struct
i915_address_space *vm,
unsigned int flags);
int i915_gem_evict_vm(struct i915_address_space *vm);
+void i915_gem_flush_ggtt_writes(struct drm_i915_private *dev_priv);
+
/* belongs in i915_gem_gtt.h */
static inline void i915_gem_chipset_flush(struct drm_i915_private *dev_priv)
{
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 80b78fb5daac..afe96cc5a904 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -666,17 +666,13 @@ fb_write_origin(struct drm_i915_gem_object *obj, unsigned
int domain)
obj->frontbuffer_ggtt_origin : ORIGIN_CPU);
}
-static void
-flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
+void i915_gem_flush_ggtt_writes(struct drm_i915_private *dev_priv)
{
- struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
-
- if (!(obj->base.write_domain & flush_domains))
- return;
-
- /* No actual flushing is required for the GTT write domain. Writes
-* to it "immediately" go to main memory as far as we know, so there's
-* no chipset flush. It also doesn't land in render cache.
+ /*
+* No actual flushing is required for the GTT write domain for reads
+* from the GTT domain. Writes to it "immediately" go to main memory
+* as far as we know, so there's no chipset flush. It also doesn't
+* land in the GPU render cache.
*
* However, we do have to enforce the order so that all writes through
* the GTT land before any writes to the device, such as updates to
@@ -687,22 +683,46 @@ flush_write_domain(struct drm_i915_gem_object *obj,
unsigned int flush_domains)
* timing. This issue has only been observed when switching quickly
* between GTT writes and CPU reads from inside the kernel on recent hw,
* and it appears to only affect discrete GTT blocks (i.e. on LLC
-* system agents we cannot reproduce this behaviour).
+* system agents we cannot reproduce this behaviour, until Cannonlake
+* that was!).
*/
+
wmb();
+ intel_runtime_pm_get(dev_priv);
+ spin_lock_irq(&dev_priv->uncore.lock);
+
+ POSTING_READ_FW(RING_HEAD(RENDER_RING_BASE));
+
+ spin_unlock_irq(&dev_priv->uncore.lock);
+ intel_runtime_pm_put(dev_priv);
+}
+
+static void
+flush_write_domain(struct drm_i915_gem_object *obj, unsigned int flush_domains)
+{
+ struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
+ struct i915_vma *vma;
+
+ if (!(obj->base.write_domain & flush_domains))
+ return;
+
switch (obj->base.write_domain) {
case I915_GEM_DOMAIN_GTT:
- if (!HAS_LLC(dev_priv)) {
- intel_runtime_pm_get(dev_priv);
- spin_lock_irq(&dev_priv->uncore.lock);
-
POSTING_READ_FW(RING_HEAD(dev_priv->engine[RCS]->mmio_base));
- spin_unlock_irq(&dev_priv->uncore.lock);
- intel_runtime_pm_put(dev_priv);
- }
+ i915_gem_flush_ggtt_writes(dev_priv);
intel_fb_obj_flush(obj,
fb_write_origin(obj, I915_GEM_DOMAIN_GTT));
+
+ list_for_each_entry(vma, &obj->vma_list, obj_link) {
+ if (!i915_vma_is_ggtt(vma))
+ break;
+
+ if (vma->iomap)
+ continue;
+
+ i915_vma_unset_ggtt_write(vma);
+ }
break;
case I915_GEM_DOMAIN_CPU:
@@ -1965,6 +1985,8 @@ int i915_gem_fault(struct vm_fault *vmf)
Re: [Intel-gfx] [PATCH 5/9] drm/i915: make dsm struct resource centric
Quoting Matthew Auld (2017-12-05 21:02:45)
> Now that we are using struct resource to track the stolen region, it is
> more convenient if we track dsm in a resource as well.
>
> v2: check range_overflow when writing to 32b registers (Chris)
> pepper in some comments (Chris)
> v3: refit i915_stolen_to_dma()
>
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> Cc: Paulo Zanoni
> ---
> void i915_gem_cleanup_stolen(struct drm_device *dev)
> @@ -187,7 +181,7 @@ static void g4x_get_stolen_reserved(struct
> drm_i915_private *dev_priv,
> uint32_t reg_val = I915_READ(IS_GM45(dev_priv) ?
> CTG_STOLEN_RESERVED :
> ELK_STOLEN_RESERVED);
> - dma_addr_t stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
> + dma_addr_t stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
>
> if ((reg_val & G4X_STOLEN_RESERVED_ENABLE) == 0) {
> *base = 0;
> @@ -318,7 +312,7 @@ static void bdw_get_stolen_reserved(struct
> drm_i915_private *dev_priv,
> return;
> }
>
> - stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
> + stolen_top = dev_priv->dsm.start + ggtt->stolen_size;
>
> *base = reg_val & GEN6_STOLEN_RESERVED_ADDR_MASK;
>
> @@ -354,11 +348,15 @@ int i915_gem_init_stolen(struct drm_i915_private
> *dev_priv)
> if (ggtt->stolen_size == 0)
> return 0;
>
> - dev_priv->mm.stolen_base = i915_stolen_to_dma(dev_priv);
> - if (dev_priv->mm.stolen_base == 0)
> + dev_priv->dsm = intel_graphics_stolen_res;
> +
> + if (i915_adjust_stolen(dev_priv, &dev_priv->dsm))
> return 0;
>
> - stolen_top = dev_priv->mm.stolen_base + ggtt->stolen_size;
> + GEM_BUG_ON(dev_priv->dsm.start == 0);
> + GEM_BUG_ON(ggtt->stolen_size > resource_size(&dev_priv->dsm));
> +
> + stolen_top = dev_priv->dsm.end + 1;
I'm in favour of making better use of having the resource.end, as above,
killing off manual recalculation of that from
dsm.start + resource_size(dsm).
-Chris
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Re: [Intel-gfx] [PATCH 6/9] drm/i915: make reserved struct resource centric
Quoting Matthew Auld (2017-12-05 21:02:46) > Now that we are using struct resource to track the stolen region, it is > more convenient if we track the reserved portion of that region in a > resource as well. > > v2: s/<= end + 1/< end/ (Chris) > v3: prefer DEFINE_RES_MEM > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Chris Wilson > Cc: Paulo Zanoni Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/9] drm/i915: make mappable struct resource centric
Quoting Matthew Auld (2017-12-05 21:02:47) > Now that we are using struct resource to track the stolen region, it is > more convenient if we track the mappable region in a resource as well. > > v2: prefer iomap and gmadr naming scheme > prefer DEFINE_RES_MEM > > Signed-off-by: Matthew Auld > Cc: Joonas Lahtinen > Cc: Chris Wilson > Cc: Paulo Zanoni That reads quite nicely, Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 8/9] drm/i915: prefer resource_size_t for everything stolen
Quoting Matthew Auld (2017-12-05 21:02:48)
> @@ -381,8 +381,8 @@ struct i915_ggtt {
> * avoid the first page! The upper end of stolen memory is reserved
> for
> * hardware functions and similarly removed from the accessible range.
> */
> - u32 stolen_size;/* Total size of stolen memory */
> - u32 stolen_usable_size; /* Total size minus reserved ranges */
> + resource_size_t stolen_size;/* Total size of stolen
> memory */
> + resource_size_t stolen_usable_size; /* Total size minus reserved
> ranges */
Why does stolen_size still exist now that we have stuct resource dsm?
Worst case it is resource_size(&dsm), but in most cases you actually
want to know dsm.end afaict.
-Chris
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Re: [Intel-gfx] [PATCH v3 4/9] drm: Add some HDCP related #defines
Quoting Sean Paul (2017-12-05 05:15:03) > In preparation for implementing HDCP in i915, add some HDCP related > register offsets and defines. The dpcd register offsets will go in > drm_dp_helper.h whereas the ddc offsets along with generic HDCP stuff > will get stuffed in drm_hdcp.h, which is new. > > Changes in v2: > - drm_hdcp.h gets MIT license (Daniel) Speaking of licences, what's the right spdx for drm files? SPDX-License-Identifier: (GPL-2.0+ OR MIT) ? It looks like we've already grown quite a few BSD-unfriendly files... -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 2/9] drm/i915: Add more control to wait_for routines
Quoting Sean Paul (2017-12-05 05:15:01)
> This patch adds a little more control to a couple wait_for routines such
> that we can avoid open-coding read/wait/timeout patterns which:
> - need the value of the register after the wait_for
> - run arbitrary operation for the read portion
>
> This patch also chooses the correct sleep function (based on
> timers-howto.txt) for the polling interval the caller specifies.
>
> Changes in v2:
> - Added to the series
> Changes in v3:
> - Rebased on drm-intel-next-queued and the new Wmin/max _wait_for
> - Removed msleep option
>
> Suggested-by: Chris Wilson
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/intel_drv.h| 17 ++---
> drivers/gpu/drm/i915/intel_uncore.c | 23 ---
> drivers/gpu/drm/i915/intel_uncore.h | 14 +-
> 3 files changed, 39 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 64426d3e078e..852b3d161754 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -41,20 +41,21 @@
> #include
>
> /**
> - * _wait_for - magic (register) wait macro
> + * __wait_for - magic wait macro
> *
> - * Does the right thing for modeset paths when run under kdgb or similar
> atomic
> - * contexts. Note that it's important that we check the condition again after
> - * having timed out, since the timeout could be due to preemption or similar
> and
> - * we've never had a chance to check the condition before the timeout.
> + * Macro to help avoid open coding check/wait/timeout patterns. Note that
> it's
> + * important that we check the condition again after having timed out, since
> the
> + * timeout could be due to preemption or similar and we've never had a
> chance to
> + * check the condition before the timeout.
> */
> -#define _wait_for(COND, US, Wmin, Wmax) ({ \
> +#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
> unsigned long timeout__ = jiffies + usecs_to_jiffies(US) + 1; \
> long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \
> int ret__; \
> might_sleep(); \
> for (;;) { \
> bool expired__ = time_after(jiffies, timeout__);\
> + OP; \
> if (COND) { \
> ret__ = 0; \
> break; \
> @@ -70,7 +71,9 @@
> ret__; \
> })
>
> -#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
> +#define _wait_for(COND, US, Wmin, Wmax)__wait_for(;, (COND), (US),
> (Wmin), \
> + (Wmax))
Hmm, doesn't an empty OP (__wait_for(, ...)) work?
> +int __intel_wait_for_register(struct drm_i915_private *dev_priv,
> i915_reg_t reg,
> u32 mask,
> u32 value,
> - unsigned int timeout_ms)
> + unsigned int fast_timeout_us,
> + unsigned int slow_timeout_ms,
> + u32 *out_value)
> {
> unsigned fw =
> intel_uncore_forcewake_for_reg(dev_priv, reg, FW_REG_READ);
> int ret;
> + u32 reg_value;
Before int ret; Try to avoid building a Christmas tree if possible.
Reviewed-by: Chris Wilson
-Chris
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[Intel-gfx] ✗ Fi.CI.IGT: failure for make stolen resource centric (rev4)
== Series Details == Series: make stolen resource centric (rev4) URL : https://patchwork.freedesktop.org/series/34256/ State : failure == Summary == Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Test kms_frontbuffer_tracking: Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Subgroup fbc-1p-offscren-pri-shrfb-draw-render: pass -> FAIL (shard-snb) fdo#101623 Test gem_eio: Subgroup hibernate: pass -> FAIL (shard-hsw) Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-hsw) fdo#102707 Test drv_suspend: Subgroup fence-restore-tiled2untiled-hibernate: fail -> SKIP (shard-snb) fdo#103375 +1 Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test kms_cursor_crc: Subgroup cursor-64x21-sliding: pass -> SKIP (shard-hsw) fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 shard-hswtotal:2679 pass:1534 dwarn:1 dfail:0 fail:10 skip:1134 time:9454s shard-snbtotal:2679 pass:1306 dwarn:2 dfail:0 fail:12 skip:1359 time:8063s Blacklisted hosts: shard-apltotal:2679 pass:1677 dwarn:1 dfail:0 fail:24 skip:977 time:13596s shard-kbltotal:2620 pass:1719 dwarn:35 dfail:0 fail:24 skip:841 time:10715s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7420/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 6/8] drm/i915/guc: Combine enable_guc_loading|submission modparams
Quoting Michal Wajdeczko (2017-12-05 16:38:42)
> -void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
> +static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)
> {
> - if (!HAS_GUC(dev_priv)) {
> - if (i915_modparams.enable_guc_loading > 0 ||
> - i915_modparams.enable_guc_submission > 0)
> - DRM_INFO("Ignoring GuC options, no hardware\n");
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
> + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
> + int enable_guc = 0;
>
> - i915_modparams.enable_guc_loading = 0;
> - i915_modparams.enable_guc_submission = 0;
> - return;
> - }
> + /* Default is to enable GuC/HuC if we know their firmwares */
> + if (intel_uc_fw_is_selected(guc_fw))
> + enable_guc |= ENABLE_GUC_SUBMISSION;
> + if (intel_uc_fw_is_selected(huc_fw))
> + enable_guc |= ENABLE_GUC_LOAD_HUC;
>
> - /* A negative value means "use platform default" */
> - if (i915_modparams.enable_guc_loading < 0)
> - i915_modparams.enable_guc_loading = HAS_GUC_UCODE(dev_priv);
> + /* Any platform specific fine-tuning can be done here */
>
> - /* Verify firmware version */
> - if (i915_modparams.enable_guc_loading) {
> - if (!intel_uc_fw_is_selected(&dev_priv->guc.fw))
> - i915_modparams.enable_guc_loading = 0;
> - }
> + return enable_guc;
> +}
>
> - /* Can't enable guc submission without guc loaded */
> - if (!i915_modparams.enable_guc_loading)
> - i915_modparams.enable_guc_submission = 0;
> +/**
> + * intel_uc_sanitize_options - sanitize uC related modparam options
> + * @dev_priv: device private
> + *
> + * In case of "enable_guc" option this function will attempt to modify
> + * it only if it was initially set to "auto(-1)". Default value for this
> + * modparam varies between platforms and it is hardcoded in driver code.
> + * Any other modparam value is only monitored against availability of the
> + * related hardware or firmware definitions.
> + */
> +void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
> +{
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
> + struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
>
> /* A negative value means "use platform default" */
> - if (i915_modparams.enable_guc_submission < 0)
> - i915_modparams.enable_guc_submission =
> HAS_GUC_SCHED(dev_priv);
> + if (i915_modparams.enable_guc < 0)
> + i915_modparams.enable_guc =
> __get_platform_enable_guc(dev_priv);
> +
> + DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",
> +i915_modparams.enable_guc,
> +yesno(intel_uc_is_using_guc_submission()),
> +yesno(intel_uc_is_using_huc()));
> +
> + /* Verify GuC firmware availability */
> + if (intel_uc_is_using_guc() && !intel_uc_fw_is_selected(guc_fw)) {
> + DRM_WARN("Incompatible option detected: enable_guc=%d, %s!\n",
> +i915_modparams.enable_guc,
> +!HAS_GUC(dev_priv) ? "no GuC hardware" :
> + "no GuC firmware");
> + }
> +
> + /* Verify HuC firmware availability */
> + if (intel_uc_is_using_huc() && !intel_uc_fw_is_selected(huc_fw)) {
> + DRM_WARN("Incompatible option detected: enable_guc=%d, %s!\n",
> +i915_modparams.enable_guc,
> +!HAS_HUC(dev_priv) ? "no HuC hardware" :
> + "no HuC firmware");
> + }
With the intent that after the warning, the uc load will fail and the
module load will then abort? Just to be clear.
> +
> + /* Make sure that sanitization was done */
> + GEM_BUG_ON(i915_modparams.enable_guc < 0);
> }
> +static inline bool intel_uc_is_using_guc_submission(void)
> +{
> + GEM_BUG_ON(i915_modparams.enable_guc < 0);
> + return !!(i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION);
Equivalent to a plain return i915_modparms.enable_guc &
ENABLE_GUC_SUBMISSION thanks to the implicit (bool).
-Chris
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Re: [Intel-gfx] [PATCH v3 3/8] drm/i915/guc: Introduce USES_GUC_xxx helper macros
Quoting Michal Wajdeczko (2017-12-05 16:38:39) > In the upcoming patch we will change the way how to recognize > when GuC is in use. Using helper macros will minimize scope > of that changes. While here, update dev_info message. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson > Cc: Joonas Lahtinen > Cc: Sagar Arun Kamble > Reviewed-by: Chris Wilson ... but can we please stop it with dev_priv :) We don't use it now or later, we are just making it more complicated for no imminent benefit, right? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 4/8] drm/i915/uc: Don't fetch GuC firmware if no plan to use GuC
Quoting Michal Wajdeczko (2017-12-05 16:38:40) > If we don't plan to use GuC then we should not try to fetch GuC and > HuC firmwares. We can save memory and avoid possible dmesg noise. > > Signed-off-by: Michal Wajdeczko > Cc: Chris Wilson > Cc: Joonas Lahtinen > Cc: Sagar Arun Kamble Reviewed-by: Chris Wilson -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 8/8] HAX enable GuC/HuC load
Is this a real attempt or enabling GuC by default or is it only
for CI validating the series?
If it is the second option I'd like to see CI testing
this series without this patch here as well to make sure
these changes are not breaking any of the current default flow.
One case or the other I believe we should have more info here
on the commit message.
Thanks,
Rodrigo.
On Tue, Dec 05, 2017 at 04:38:44PM +, Michal Wajdeczko wrote:
> Also revert ("drm/i915/guc: Assert that we switch between
> known ggtt->invalidate functions")
>
> v2: don't enable GuC on GLK
>
> Signed-off-by: Michal Wajdeczko
> ---
> drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
> drivers/gpu/drm/i915/i915_params.h | 2 +-
> drivers/gpu/drm/i915/intel_uc.c | 2 ++
> 3 files changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 209bb11..a5e75a3 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -3590,17 +3590,13 @@ int i915_ggtt_enable_hw(struct drm_i915_private
> *dev_priv)
>
> void i915_ggtt_enable_guc(struct drm_i915_private *i915)
> {
> - GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
> -
> i915->ggtt.invalidate = guc_ggtt_invalidate;
> }
>
> void i915_ggtt_disable_guc(struct drm_i915_private *i915)
> {
> - /* We should only be called after i915_ggtt_enable_guc() */
> - GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
> -
> - i915->ggtt.invalidate = gen6_ggtt_invalidate;
> + if (i915->ggtt.invalidate == guc_ggtt_invalidate)
> + i915->ggtt.invalidate = gen6_ggtt_invalidate;
> }
>
> void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 792ce26..9725c5a 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -45,7 +45,7 @@
> param(int, disable_power_well, -1) \
> param(int, enable_ips, 1) \
> param(int, invert_brightness, 0) \
> - param(int, enable_guc, 0) \
> + param(int, enable_guc, -1) \
> param(int, guc_log_level, -1) \
> param(char *, guc_firmware_path, NULL) \
> param(char *, huc_firmware_path, NULL) \
> diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
> index 49bccc9..22b0afe 100644
> --- a/drivers/gpu/drm/i915/intel_uc.c
> +++ b/drivers/gpu/drm/i915/intel_uc.c
> @@ -60,6 +60,8 @@ static int __get_platform_enable_guc(struct
> drm_i915_private *dev_priv)
> enable_guc |= ENABLE_GUC_LOAD_HUC;
>
> /* Any platform specific fine-tuning can be done here */
> + if (IS_GEMINILAKE(dev_priv))
> + enable_guc = 0; /* no firmware on CI machines */
>
> return enable_guc;
> }
> --
> 2.7.4
>
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Re: [Intel-gfx] [PATCH v3 2/2] drm/i915: add platform tag to WA
On Tue, Dec 05, 2017 at 07:01:18PM +, Lucas De Marchi wrote: > v2: add more missing platform tags > v3: change tag to cnp rather than using gen9,gen10 thanks! both patches merged to dinq > > Cc: Ville Syrjälä > Signed-off-by: Lucas De Marchi > Reviewed-by: Rodrigo Vivi > --- > drivers/gpu/drm/i915/intel_hdmi.c | 2 +- > drivers/gpu/drm/i915/intel_pm.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c > b/drivers/gpu/drm/i915/intel_hdmi.c > index 691600ce48c4..c42a6c672b73 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -1380,7 +1380,7 @@ static bool hdmi_12bpc_possible(const struct > intel_crtc_state *crtc_state) > } > } > > - /* Display WA #1139 */ > + /* Display WA #1139: glk */ > if (IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && > crtc_state->base.adjusted_mode.htotal > 5460) > return false; > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 07ee5ad5a13f..5836181d6f8a 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -8417,7 +8417,7 @@ static void cnp_init_clock_gating(struct > drm_i915_private *dev_priv) > if (!HAS_PCH_CNP(dev_priv)) > return; > > - /* Display WA #1181 */ > + /* Display WA #1181: cnp */ > I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) | > CNP_PWM_CGE_GATING_DISABLE); > } > -- > 2.14.3 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: warning for lib: Check and report if a subtest triggers a new kernel taint (rev2)
== Series Details == Series: lib: Check and report if a subtest triggers a new kernel taint (rev2) URL : https://patchwork.freedesktop.org/series/34616/ State : warning == Summary == Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) Test gem_tiled_swapping: Subgroup non-threaded: pass -> INCOMPLETE (shard-hsw) fdo#104009 Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-a-planes: pass -> INCOMPLETE (shard-hsw) fdo#103540 Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> PASS (shard-snb) fdo#101623 Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Test kms_cursor_crc: Subgroup cursor-256x85-random: pass -> SKIP (shard-hsw) Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-snb) fdo#102707 fdo#104009 https://bugs.freedesktop.org/show_bug.cgi?id=104009 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 shard-hswtotal:2569 pass:1469 dwarn:1 dfail:0 fail:10 skip:1087 time:9005s shard-snbtotal:2679 pass:1309 dwarn:1 dfail:0 fail:11 skip:1358 time:8139s Blacklisted hosts: shard-kbltotal:2679 pass:1796 dwarn:1 dfail:0 fail:22 skip:860 time:10881s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_600/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for make stolen resource centric (rev4)
== Series Details == Series: make stolen resource centric (rev4) URL : https://patchwork.freedesktop.org/series/34256/ State : success == Summary == Series 34256v4 make stolen resource centric https://patchwork.freedesktop.org/api/1.0/series/34256/revisions/4/mbox/ Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: fail -> PASS (fi-gdg-551) fdo#102575 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:436s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:383s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:521s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:502s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:506s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:490s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:474s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:179 dwarn:1 dfail:0 fail:0 skip:108 time:268s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:536s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:356s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:257s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:477s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:440s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:528s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:476s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:534s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:588s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:454s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:544s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:570s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:513s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:497s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:553s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:411s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:609s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:616s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:487s 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest a9fba99319e9 drm/i915: use stolen_usable_size for the range sanity check 8f826a04a489 drm/i915: prefer resource_size_t for everything stolen 42ceaf431573 drm/i915: make mappable struct resource centric 653f96c78929 drm/i915: make reserved struct resource centric 906ad9ccad52 drm/i915: make dsm struct resource centric e4fef045cc70 drm/i915: nuke the duplicated stolen discovery 209ebd8df53a x86/early-quirks: reverse the if ladders c6793eb95980 x86/early-quirks: replace the magical increment start values a1e3704b09b0 x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7420/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [v3,1/2] drm/i915: follow single notation for workaround number
== Series Details == Series: series starting with [v3,1/2] drm/i915: follow single notation for workaround number URL : https://patchwork.freedesktop.org/series/34937/ State : warning == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-a-planes: pass -> INCOMPLETE (shard-hsw) fdo#103540 Test kms_frontbuffer_tracking: Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Subgroup fbc-rgb565-draw-mmap-cpu: pass -> SKIP (shard-hsw) Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> PASS (shard-snb) fdo#101623 +1 Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-snb) fdo#102707 +1 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 shard-hswtotal:2637 pass:1512 dwarn:1 dfail:0 fail:10 skip:1113 time:9311s shard-snbtotal:2679 pass:1308 dwarn:1 dfail:0 fail:12 skip:1358 time:8085s Blacklisted hosts: shard-apltotal:2679 pass:1677 dwarn:1 dfail:0 fail:24 skip:977 time:13591s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7419/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: warning for drm/fb-helper: Add .last_close and .output_poll_changed helpers (rev3)
== Series Details == Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers (rev3) URL : https://patchwork.freedesktop.org/series/32332/ State : warning == Summary == Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-hsw) fdo#102707 Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) Test kms_frontbuffer_tracking: Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Subgroup vblank-vs-dpms-suspend-interruptible: pass -> INCOMPLETE (shard-hsw) fdo#103706 Test kms_atomic_transition: Subgroup plane-all-transition-fencing: pass -> SKIP (shard-hsw) Test drv_selftest: Subgroup live_hangcheck: pass -> INCOMPLETE (shard-snb) fdo#103880 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#103706 https://bugs.freedesktop.org/show_bug.cgi?id=103706 fdo#103880 https://bugs.freedesktop.org/show_bug.cgi?id=103880 shard-hswtotal:2620 pass:1505 dwarn:1 dfail:0 fail:10 skip:1103 time:8774s shard-snbtotal:2661 pass:1288 dwarn:2 dfail:0 fail:12 skip:1358 time:7965s Blacklisted hosts: shard-apltotal:2657 pass:1654 dwarn:2 dfail:0 fail:23 skip:977 time:13414s shard-kbltotal:2620 pass:1755 dwarn:1 dfail:0 fail:24 skip:839 time:10705s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7418/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for e1000e: Taint a HW lockup
== Series Details == Series: e1000e: Taint a HW lockup URL : https://patchwork.freedesktop.org/series/34931/ State : success == Summary == Test kms_flip: Subgroup vblank-vs-modeset-suspend: pass -> SKIP (shard-snb) fdo#102365 Subgroup modeset-vs-vblank-race-interruptible: pass -> FAIL (shard-hsw) fdo#103060 Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> PASS (shard-snb) fdo#101623 Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 +1 Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-hsw) fdo#102707 Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) fdo#102365 https://bugs.freedesktop.org/show_bug.cgi?id=102365 fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 shard-hswtotal:2679 pass:1535 dwarn:1 dfail:0 fail:11 skip:1132 time:9438s shard-snbtotal:2679 pass:1306 dwarn:2 dfail:0 fail:11 skip:1360 time:8041s Blacklisted hosts: shard-apltotal:2636 pass:1636 dwarn:0 dfail:0 fail:23 skip:977 time:13356s shard-kbltotal:2545 pass:1694 dwarn:5 dfail:1 fail:22 skip:822 time:10261s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7417/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 00/11] drm/fb-helper: Add .last_close and .output_poll_changed helpers
On Tue, Dec 5, 2017 at 1:24 PM, Noralf Trønnes wrote: > The helpers are applied and have reached airlied/drm-next. > > amd has gained another .poll_changed user since last. Patches 1, 2, 9 applied to my -next tree. Thanks! Alex > > i915 doesn't really need the .poll_changed helper since it now does a > sync and has to open code it after: > drm/i915/fbdev: Serialise early hotplug events with async fbdev config > > vboxvideo will be re-sent when the helper functions have landed in > Greg's staging tree. > > Noralf. > > Changes since version 2: > - Helper functions have been applied > - Add drm/amd/display: Use drm_fb_helper_poll_changed() > - Rebase drm/amdgpu patch > - Rebase drm/msm patch > - Drop i915 patch, not applicable after: > drm/i915/fbdev: Serialise early hotplug events with async fbdev config > - Drop vboxvideo patch, it will be re-sent when the helper functions > have reached Greg's staging tree. > > Changes since version 1: > - drm_device.drm_fb_helper_private -> drm_device.fb_helper (Ville) > > Noralf Trønnes (11): > drm/amd/display: Use drm_fb_helper_poll_changed() > drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed() > drm/armada: Use drm_fb_helper_lastclose() and _poll_changed() > drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed() > drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed() > drm/msm: Use drm_fb_helper_lastclose() and _poll_changed() > drm/nouveau: Use drm_fb_helper_output_poll_changed() > drm/omap: Use drm_fb_helper_lastclose() and _poll_changed() > drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed() > drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed() > drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed() > > drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 ++ > drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 2 -- > drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 27 -- > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-- > drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- > drivers/gpu/drm/armada/armada_drm.h | 1 - > drivers/gpu/drm/armada/armada_drv.c | 8 ++ > drivers/gpu/drm/armada/armada_fb.c| 11 +--- > drivers/gpu/drm/armada/armada_fbdev.c | 8 -- > drivers/gpu/drm/exynos/exynos_drm_drv.c | 8 ++ > drivers/gpu/drm/exynos/exynos_drm_fb.c| 2 +- > drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 18 > drivers/gpu/drm/exynos/exynos_drm_fbdev.h | 2 -- > drivers/gpu/drm/gma500/framebuffer.c | 9 +- > drivers/gpu/drm/gma500/psb_drv.c | 15 +- > drivers/gpu/drm/msm/msm_drv.c | 18 ++-- > drivers/gpu/drm/nouveau/nouveau_display.c | 3 +- > drivers/gpu/drm/nouveau/nouveau_fbcon.c | 8 -- > drivers/gpu/drm/nouveau/nouveau_fbcon.h | 2 -- > drivers/gpu/drm/nouveau/nouveau_vga.c | 3 +- > drivers/gpu/drm/nouveau/nv50_display.c| 2 +- > drivers/gpu/drm/omapdrm/omap_drv.c| 34 > ++- > drivers/gpu/drm/radeon/radeon_display.c | 9 ++ > drivers/gpu/drm/radeon/radeon_fb.c| 22 --- > drivers/gpu/drm/radeon/radeon_kms.c | 5 ++-- > drivers/gpu/drm/radeon/radeon_mode.h | 3 -- > drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 9 +- > drivers/gpu/drm/rockchip/rockchip_drm_fb.c| 9 +- > drivers/gpu/drm/tegra/drm.c | 13 ++--- > drivers/gpu/drm/tegra/drm.h | 4 --- > drivers/gpu/drm/tegra/fb.c| 14 -- > 32 files changed, 29 insertions(+), 259 deletions(-) > > -- > 2.14.2 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails (rev4)
== Series Details == Series: drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails (rev4) URL : https://patchwork.freedesktop.org/series/34623/ State : success == Summary == Test drv_suspend: Subgroup fence-restore-untiled-hibernate: fail -> SKIP (shard-snb) fdo#103375 +1 Test kms_frontbuffer_tracking: Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> PASS (shard-snb) fdo#101623 +1 Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-snb) fdo#102707 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (shard-hsw) fdo#103706 Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#103706 https://bugs.freedesktop.org/show_bug.cgi?id=103706 shard-hswtotal:2672 pass:1529 dwarn:2 dfail:0 fail:9 skip:1131 time:9254s shard-snbtotal:2679 pass:1308 dwarn:1 dfail:0 fail:10 skip:1360 time:8030s Blacklisted hosts: shard-apltotal:2657 pass:1650 dwarn:1 dfail:1 fail:27 skip:977 time:13244s shard-kbltotal:2679 pass:1792 dwarn:2 dfail:0 fail:26 skip:859 time:10862s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7416/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/9] x86/early-quirks: reverse the if ladders
On Tue, Dec 05, 2017 at 09:02:43PM +, Matthew Auld wrote:
> Makes things a little easier to follow.
>
> Suggested-by: Ville Syrjälä
> Signed-off-by: Matthew Auld
> Cc: Joonas Lahtinen
> Cc: Ville Syrjälä
> Cc: Chris Wilson
> Cc: Paulo Zanoni
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: H. Peter Anvin
> Cc: x...@kernel.org
> Cc: linux-ker...@vger.kernel.org
Reviewed-by: Ville Syrjälä
> ---
> arch/x86/kernel/early-quirks.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
> index b5b912f3dce8..ba6e96381bfc 100644
> --- a/arch/x86/kernel/early-quirks.c
> +++ b/arch/x86/kernel/early-quirks.c
> @@ -425,12 +425,12 @@ static resource_size_t __init chv_stolen_size(int num,
> int slot, int func)
>* 0x11 to 0x16: 4MB increments starting at 8MB
>* 0x17 to 0x1d: 4MB increments start at 36MB
>*/
> - if (gms < 0x11)
> - return gms * MB(32);
> - else if (gms < 0x17)
> + if (gms >= 0x17)
> + return (gms - 0x17) * MB(4) + MB(36);
> + else if (gms >= 0x11)
> return (gms - 0x11) * MB(4) + MB(8);
> else
> - return (gms - 0x17) * MB(4) + MB(36);
> + return gms * MB(32);
> }
>
> static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
> @@ -443,10 +443,10 @@ static resource_size_t __init gen9_stolen_size(int num,
> int slot, int func)
>
> /* 0x0 to 0xef: 32MB increments starting at 0MB */
> /* 0xf0 to 0xfe: 4MB increments starting at 4MB */
> - if (gms < 0xf0)
> - return gms * MB(32);
> - else
> + if (gms >= 0xf0)
> return (gms - 0xf0) * MB(4) + MB(4);
> + else
> + return gms * MB(32);
> }
>
> struct intel_early_ops {
> --
> 2.14.3
--
Ville Syrjälä
Intel OTC
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[Intel-gfx] ✓ Fi.CI.IGT: success for lockdep: Mark up lock disabling with TAINT_CRAP
== Series Details == Series: lockdep: Mark up lock disabling with TAINT_CRAP URL : https://patchwork.freedesktop.org/series/34915/ State : success == Summary == Test kms_frontbuffer_tracking: Subgroup fbc-1p-offscren-pri-shrfb-draw-blt: fail -> PASS (shard-snb) fdo#101623 Subgroup fbc-rgb101010-draw-render: skip -> PASS (shard-snb) fdo#103167 Test drv_module_reload: Subgroup basic-no-display: dmesg-warn -> PASS (shard-hsw) fdo#102707 Test prime_mmap_kms: Subgroup buffer-sharing: skip -> PASS (shard-snb) Test drv_suspend: Subgroup fence-restore-tiled2untiled-hibernate: fail -> SKIP (shard-snb) fdo#103375 Test kms_chv_cursor_fail: Subgroup pipe-b-128x128-top-edge: incomplete -> PASS (shard-hsw) Test kms_flip: Subgroup vblank-vs-modeset-suspend-interruptible: skip -> PASS (shard-snb) fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623 fdo#103167 https://bugs.freedesktop.org/show_bug.cgi?id=103167 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 shard-hswtotal:2679 pass:1536 dwarn:1 dfail:0 fail:10 skip:1132 time:9440s shard-snbtotal:2679 pass:1308 dwarn:2 dfail:0 fail:10 skip:1359 time:8079s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7412/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 6/9] drm/i915: make reserved struct resource centric
Now that we are using struct resource to track the stolen region, it is
more convenient if we track the reserved portion of that region in a
resource as well.
v2: s/<= end + 1/< end/ (Chris)
v3: prefer DEFINE_RES_MEM
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h| 4
drivers/gpu/drm/i915/i915_gem_gtt.h| 2 --
drivers/gpu/drm/i915/i915_gem_stolen.c | 15 ++-
drivers/gpu/drm/i915/intel_pm.c| 6 ++
4 files changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 39c8e99f3d3a..18905badd494 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2259,6 +2259,10 @@ struct drm_i915_private {
* while ggtt->stolen_size gives us the total size of the stolen region.
*/
struct resource dsm;
+ /**
+* Reseved portion of Data Stolen Memory
+*/
+ struct resource dsm_reserved;
void __iomem *regs;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 93211a96fdad..84bb3ee17dd7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -383,8 +383,6 @@ struct i915_ggtt {
*/
u32 stolen_size;/* Total size of stolen memory */
u32 stolen_usable_size; /* Total size minus reserved ranges */
- u32 stolen_reserved_base;
- u32 stolen_reserved_size;
/** "Graphics Stolen Memory" holds the global PTEs */
void __iomem *gsm;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index eb84db633a23..6e2550ff750f 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -397,18 +397,15 @@ int i915_gem_init_stolen(struct drm_i915_private
*dev_priv)
reserved_base = stolen_top;
}
- if (reserved_base < dev_priv->dsm.start ||
- reserved_base + reserved_size > stolen_top) {
- dma_addr_t reserved_top = reserved_base + reserved_size;
- DRM_ERROR("Stolen reserved area [%pad - %pad] outside stolen
memory [%pad - %pad]\n",
- &reserved_base, &reserved_top,
- &dev_priv->dsm.start, &stolen_top);
+ dev_priv->dsm_reserved =
+ (struct resource) DEFINE_RES_MEM(reserved_base, reserved_size);
+
+ if (!resource_contains(&dev_priv->dsm, &dev_priv->dsm_reserved)) {
+ DRM_ERROR("Stolen reserved area %pR outside stolen memory
%pR\n",
+ &dev_priv->dsm_reserved, &dev_priv->dsm);
return 0;
}
- ggtt->stolen_reserved_base = reserved_base;
- ggtt->stolen_reserved_size = reserved_size;
-
/* It is possible for the reserved area to end before the end of stolen
* memory, so just consider the start. */
reserved_total = stolen_top - reserved_base;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2fa2d82f61f2..016feecafe8d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6416,7 +6416,6 @@ static void valleyview_disable_rps(struct
drm_i915_private *dev_priv)
static bool bxt_check_bios_rc6_setup(struct drm_i915_private *dev_priv)
{
- struct i915_ggtt *ggtt = &dev_priv->ggtt;
bool enable_rc6 = true;
unsigned long rc6_ctx_base;
u32 rc_ctl;
@@ -6441,9 +6440,8 @@ static bool bxt_check_bios_rc6_setup(struct
drm_i915_private *dev_priv)
* for this check.
*/
rc6_ctx_base = I915_READ(RC6_CTX_BASE) & RC6_CTX_BASE_MASK;
- if (!((rc6_ctx_base >= ggtt->stolen_reserved_base) &&
- (rc6_ctx_base + PAGE_SIZE <= ggtt->stolen_reserved_base +
- ggtt->stolen_reserved_size))) {
+ if (!((rc6_ctx_base >= dev_priv->dsm_reserved.start) &&
+ (rc6_ctx_base + PAGE_SIZE < dev_priv->dsm_reserved.end))) {
DRM_DEBUG_DRIVER("RC6 Base address not as expected.\n");
enable_rc6 = false;
}
--
2.14.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 8/9] drm/i915: prefer resource_size_t for everything stolen
Keeps things consistent now that we make use of struct resource. This
should keep us covered in case we ever get huge amounts of stolen
memory.
v2: bunch of missing conversions (Chris)
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Paulo Zanoni
---
drivers/char/agp/intel-gtt.c | 14 +-
drivers/gpu/drm/i915/i915_debugfs.c| 4 +--
drivers/gpu/drm/i915/i915_drv.h| 9 ---
drivers/gpu/drm/i915/i915_gem_gtt.c| 10
drivers/gpu/drm/i915/i915_gem_gtt.h| 6 ++---
drivers/gpu/drm/i915/i915_gem_stolen.c | 47 +-
drivers/gpu/drm/i915/intel_pm.c| 10
include/drm/intel-gtt.h| 4 +--
8 files changed, 52 insertions(+), 52 deletions(-)
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 9b6b6023193b..6a2a7b062eac 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -80,7 +80,7 @@ static struct _intel_private {
unsigned int needs_dmar : 1;
phys_addr_t gma_bus_addr;
/* Size of memory reserved for graphics by the BIOS */
- unsigned int stolen_size;
+ resource_size_t stolen_size;
/* Total number of gtt entries. */
unsigned int gtt_total_entries;
/* Part of the gtt that is mappable by the cpu, for those chips where
@@ -333,13 +333,13 @@ static void i810_write_entry(dma_addr_t addr, unsigned
int entry,
writel_relaxed(addr | pte_flags, intel_private.gtt + entry);
}
-static unsigned int intel_gtt_stolen_size(void)
+static resource_size_t intel_gtt_stolen_size(void)
{
u16 gmch_ctrl;
u8 rdct;
int local = 0;
static const int ddt[4] = { 0, 16, 32, 64 };
- unsigned int stolen_size = 0;
+ resource_size_t stolen_size = 0;
if (INTEL_GTT_GEN == 1)
return 0; /* no stolen mem on i81x */
@@ -417,8 +417,8 @@ static unsigned int intel_gtt_stolen_size(void)
}
if (stolen_size > 0) {
- dev_info(&intel_private.bridge_dev->dev, "detected %dK %s
memory\n",
- stolen_size / KB(1), local ? "local" : "stolen");
+ dev_info(&intel_private.bridge_dev->dev, "detected %lluK %s
memory\n",
+ (u64)stolen_size / KB(1), local ? "local" : "stolen");
} else {
dev_info(&intel_private.bridge_dev->dev,
"no pre-allocated video memory detected\n");
@@ -1422,9 +1422,9 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct
pci_dev *gpu_pdev,
EXPORT_SYMBOL(intel_gmch_probe);
void intel_gtt_get(u64 *gtt_total,
- u32 *stolen_size,
+ resource_size_t *stolen_size,
phys_addr_t *mappable_base,
- u64 *mappable_end)
+ resource_size_t *mappable_end)
{
*gtt_total = intel_private.gtt_total_entries << PAGE_SHIFT;
*stolen_size = intel_private.stolen_size;
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 28294470ae31..fad4116f61c5 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -522,8 +522,8 @@ static int i915_gem_object_info(struct seq_file *m, void
*data)
seq_printf(m, "%u display objects (globally pinned), %llu bytes\n",
dpy_count, dpy_size);
- seq_printf(m, "%llu [%llu] gtt total\n",
- ggtt->base.total, ggtt->mappable_end);
+ seq_printf(m, "%llu [%pa] gtt total\n",
+ ggtt->base.total, &ggtt->mappable_end);
seq_printf(m, "Supported page sizes: %s\n",
stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
buf, sizeof(buf)));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 18905badd494..4e749df0cae8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3911,12 +3911,13 @@ void i915_gem_stolen_remove_node(struct
drm_i915_private *dev_priv,
int i915_gem_init_stolen(struct drm_i915_private *dev_priv);
void i915_gem_cleanup_stolen(struct drm_device *dev);
struct drm_i915_gem_object *
-i915_gem_object_create_stolen(struct drm_i915_private *dev_priv, u32 size);
+i915_gem_object_create_stolen(struct drm_i915_private *dev_priv,
+ resource_size_t size);
struct drm_i915_gem_object *
i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private
*dev_priv,
- u32 stolen_offset,
- u32 gtt_offset,
- u32 size);
+ resource_size_t stolen_offset,
+ resource_size_t gtt_offset,
+ resource_size_t size);
/* i915_g
[Intel-gfx] [PATCH 5/9] drm/i915: make dsm struct resource centric
Now that we are using struct resource to track the stolen region, it is
more convenient if we track dsm in a resource as well.
v2: check range_overflow when writing to 32b registers (Chris)
pepper in some comments (Chris)
v3: refit i915_stolen_to_dma()
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/i915_drv.h| 13 --
drivers/gpu/drm/i915/i915_gem_stolen.c | 84 +-
drivers/gpu/drm/i915/intel_fbc.c | 10 +++-
drivers/gpu/drm/i915/intel_pm.c| 17 +--
4 files changed, 72 insertions(+), 52 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 594fd14e66c5..39c8e99f3d3a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1537,9 +1537,6 @@ struct i915_gem_mm {
*/
struct pagevec wc_stash;
- /** Usable portion of the GTT for GEM */
- dma_addr_t stolen_base; /* limited to low memory (32-bit) */
-
/**
* tmpfs instance used for shmem backed objects
*/
@@ -2253,6 +2250,16 @@ struct drm_i915_private {
const struct intel_device_info info;
+ /**
+* Data Stolen Memory - aka "i915 stolen memory" gives us the start and
+* end of stolen which we can optionally use to create GEM objects
+* backed by stolen memory. Note that ggtt->stolen_usable_size tells us
+* exactly how much of this we are actually allowed to use, given that
+* some portion of it is in fact reserved for use by hardware functions,
+* while ggtt->stolen_size gives us the total size of the stolen region.
+*/
+ struct resource dsm;
+
void __iomem *regs;
struct intel_uncore uncore;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index f8ac1438c35d..eb84db633a23 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -76,27 +76,27 @@ void i915_gem_stolen_remove_node(struct drm_i915_private
*dev_priv,
mutex_unlock(&dev_priv->mm.stolen_lock);
}
-static dma_addr_t i915_stolen_to_dma(struct drm_i915_private *dev_priv)
+static int i915_adjust_stolen(struct drm_i915_private *dev_priv,
+ struct resource *dsm)
{
struct i915_ggtt *ggtt = &dev_priv->ggtt;
- dma_addr_t base = intel_graphics_stolen_res.start;
+ dma_addr_t base = dsm->start;
struct resource *r;
GEM_BUG_ON(overflows_type(intel_graphics_stolen_res.start, base));
if (base == 0 || add_overflows(base, ggtt->stolen_size))
- return 0;
+ return -EINVAL;
/* make sure we don't clobber the GTT if it's within stolen memory */
if (INTEL_GEN(dev_priv) <= 4 &&
!IS_G33(dev_priv) && !IS_PINEVIEW(dev_priv) && !IS_G4X(dev_priv)) {
- struct {
- dma_addr_t start, end;
- } stolen[2] = {
- { .start = base, .end = base + ggtt->stolen_size, },
- { .start = base, .end = base + ggtt->stolen_size, },
+ struct resource stolen[2] = {
+ DEFINE_RES_MEM(base, ggtt->stolen_size),
+ DEFINE_RES_MEM(base, ggtt->stolen_size),
};
- u64 ggtt_start, ggtt_end;
+ struct resource ggtt_res;
+ u64 ggtt_start;
ggtt_start = I915_READ(PGTBL_CTL);
if (IS_GEN4(dev_priv))
@@ -104,36 +104,31 @@ static dma_addr_t i915_stolen_to_dma(struct
drm_i915_private *dev_priv)
(ggtt_start & PGTBL_ADDRESS_HI_MASK) << 28;
else
ggtt_start &= PGTBL_ADDRESS_LO_MASK;
- ggtt_end = ggtt_start + ggtt_total_entries(ggtt) * 4;
- if (ggtt_start >= stolen[0].start && ggtt_start < stolen[0].end)
- stolen[0].end = ggtt_start;
- if (ggtt_end > stolen[1].start && ggtt_end <= stolen[1].end)
- stolen[1].start = ggtt_end;
+ ggtt_res =
+ (struct resource) DEFINE_RES_MEM(ggtt_start,
+
ggtt_total_entries(ggtt) * 4);
+
+ if (ggtt_res.start >= stolen[0].start && ggtt_res.start <
stolen[0].end)
+ stolen[0].end = ggtt_res.start;
+ if (ggtt_res.end > stolen[1].start && ggtt_res.end <=
stolen[1].end)
+ stolen[1].start = ggtt_res.end;
/* pick the larger of the two chunks */
- if (stolen[0].end - stolen[0].start >
- stolen[1].end - stolen[1].start) {
- base = stolen[0].start;
- ggtt->stolen_size = stolen[0].end - stolen[0].start;
- } else {
[Intel-gfx] [PATCH 1/9] x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit
From: Joonas Lahtinen
To give upcoming SKU BIOSes more flexibility in placing the Intel
graphics stolen memory, make all variables storing the placement or size
compatible with full 64 bit range. Also by exporting the stolen region
as a resource, we can then nuke the duplicated stolen discovery in i915.
v2: export the stolen region as a resource
fix u16 << 16 (Chris)
v3: actually fix u16 << 16
Signed-off-by: Joonas Lahtinen
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Ville Syrjälä
Cc: Chris Wilson
Cc: Paulo Zanoni
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: x...@kernel.org
Cc: linux-ker...@vger.kernel.org
Reviewed-by: Chris Wilson #v1
---
arch/x86/kernel/early-quirks.c | 86 +++---
include/drm/i915_drm.h | 3 ++
2 files changed, 50 insertions(+), 39 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 1e82f787c160..d7236e2f5eed 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -243,7 +243,7 @@ static void __init intel_remapping_check(int num, int slot,
int func)
#define KB(x) ((x) * 1024UL)
#define MB(x) (KB (KB (x)))
-static size_t __init i830_tseg_size(void)
+static resource_size_t __init i830_tseg_size(void)
{
u8 esmramc = read_pci_config_byte(0, 0, 0, I830_ESMRAMC);
@@ -256,7 +256,7 @@ static size_t __init i830_tseg_size(void)
return KB(512);
}
-static size_t __init i845_tseg_size(void)
+static resource_size_t __init i845_tseg_size(void)
{
u8 esmramc = read_pci_config_byte(0, 0, 0, I845_ESMRAMC);
u8 tseg_size = esmramc & I845_TSEG_SIZE_MASK;
@@ -273,7 +273,7 @@ static size_t __init i845_tseg_size(void)
return 0;
}
-static size_t __init i85x_tseg_size(void)
+static resource_size_t __init i85x_tseg_size(void)
{
u8 esmramc = read_pci_config_byte(0, 0, 0, I85X_ESMRAMC);
@@ -283,12 +283,12 @@ static size_t __init i85x_tseg_size(void)
return MB(1);
}
-static size_t __init i830_mem_size(void)
+static resource_size_t __init i830_mem_size(void)
{
return read_pci_config_byte(0, 0, 0, I830_DRB3) * MB(32);
}
-static size_t __init i85x_mem_size(void)
+static resource_size_t __init i85x_mem_size(void)
{
return read_pci_config_byte(0, 0, 1, I85X_DRB3) * MB(32);
}
@@ -297,36 +297,36 @@ static size_t __init i85x_mem_size(void)
* On 830/845/85x the stolen memory base isn't available in any
* register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
*/
-static phys_addr_t __init i830_stolen_base(int num, int slot, int func,
- size_t stolen_size)
+static resource_size_t __init i830_stolen_base(int num, int slot, int func,
+ resource_size_t stolen_size)
{
- return (phys_addr_t)i830_mem_size() - i830_tseg_size() - stolen_size;
+ return i830_mem_size() - i830_tseg_size() - stolen_size;
}
-static phys_addr_t __init i845_stolen_base(int num, int slot, int func,
- size_t stolen_size)
+static resource_size_t __init i845_stolen_base(int num, int slot, int func,
+ resource_size_t stolen_size)
{
- return (phys_addr_t)i830_mem_size() - i845_tseg_size() - stolen_size;
+ return i830_mem_size() - i845_tseg_size() - stolen_size;
}
-static phys_addr_t __init i85x_stolen_base(int num, int slot, int func,
- size_t stolen_size)
+static resource_size_t __init i85x_stolen_base(int num, int slot, int func,
+ resource_size_t stolen_size)
{
- return (phys_addr_t)i85x_mem_size() - i85x_tseg_size() - stolen_size;
+ return i85x_mem_size() - i85x_tseg_size() - stolen_size;
}
-static phys_addr_t __init i865_stolen_base(int num, int slot, int func,
- size_t stolen_size)
+static resource_size_t __init i865_stolen_base(int num, int slot, int func,
+ resource_size_t stolen_size)
{
u16 toud = 0;
toud = read_pci_config_16(0, 0, 0, I865_TOUD);
- return (phys_addr_t)(toud << 16) + i845_tseg_size();
+ return (toud * KB(64)) + i845_tseg_size();
}
-static phys_addr_t __init gen3_stolen_base(int num, int slot, int func,
- size_t stolen_size)
+static resource_size_t __init gen3_stolen_base(int num, int slot, int func,
+ resource_size_t stolen_size)
{
u32 bsm;
@@ -337,10 +337,10 @@ static phys_addr_t __init gen3_stolen_base(int num, int
slot, int func,
*/
bsm = read_pci_config(num, slot, func, INTEL_BSM);
- return (phys_addr_t)bsm & INTEL_BSM_MASK;
+ return bsm & INTEL_BSM_MASK;
}
-static size_t __init i830_stolen_size(int num, int sl
[Intel-gfx] [PATCH 9/9] drm/i915: use stolen_usable_size for the range sanity check
In i915_pages_create_for_stolen it probably makes more sense to check if the range overflows the stolen_usable_size, since stolen_size will also include the reserved portion which we can't touch. Signed-off-by: Matthew Auld Cc: Joonas Lahtinen Cc: Chris Wilson Cc: Paulo Zanoni --- drivers/gpu/drm/i915/i915_gem_stolen.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c index 91c1127af872..4ec4084de0ad 100644 --- a/drivers/gpu/drm/i915/i915_gem_stolen.c +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c @@ -435,7 +435,8 @@ i915_pages_create_for_stolen(struct drm_device *dev, struct sg_table *st; struct scatterlist *sg; - GEM_BUG_ON(range_overflows(offset, size, dev_priv->ggtt.stolen_size)); + GEM_BUG_ON(range_overflows(offset, size, + dev_priv->ggtt.stolen_usable_size)); /* We hide that we have no struct page backing our stolen object * by wrapping the contiguous physical allocation with a fake -- 2.14.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/9] x86/early-quirks: reverse the if ladders
Makes things a little easier to follow.
Suggested-by: Ville Syrjälä
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Ville Syrjälä
Cc: Chris Wilson
Cc: Paulo Zanoni
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: x...@kernel.org
Cc: linux-ker...@vger.kernel.org
---
arch/x86/kernel/early-quirks.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index b5b912f3dce8..ba6e96381bfc 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -425,12 +425,12 @@ static resource_size_t __init chv_stolen_size(int num,
int slot, int func)
* 0x11 to 0x16: 4MB increments starting at 8MB
* 0x17 to 0x1d: 4MB increments start at 36MB
*/
- if (gms < 0x11)
- return gms * MB(32);
- else if (gms < 0x17)
+ if (gms >= 0x17)
+ return (gms - 0x17) * MB(4) + MB(36);
+ else if (gms >= 0x11)
return (gms - 0x11) * MB(4) + MB(8);
else
- return (gms - 0x17) * MB(4) + MB(36);
+ return gms * MB(32);
}
static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
@@ -443,10 +443,10 @@ static resource_size_t __init gen9_stolen_size(int num,
int slot, int func)
/* 0x0 to 0xef: 32MB increments starting at 0MB */
/* 0xf0 to 0xfe: 4MB increments starting at 4MB */
- if (gms < 0xf0)
- return gms * MB(32);
- else
+ if (gms >= 0xf0)
return (gms - 0xf0) * MB(4) + MB(4);
+ else
+ return gms * MB(32);
}
struct intel_early_ops {
--
2.14.3
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/9] x86/early-quirks: replace the magical increment start values
Replace the magical +2, +9 etc. with +MB, which is far easier to read.
Suggested-by: Ville Syrjälä
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Ville Syrjälä
Cc: Chris Wilson
Cc: Paulo Zanoni
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: x...@kernel.org
Cc: linux-ker...@vger.kernel.org
Reviewed-by: Ville Syrjälä
---
arch/x86/kernel/early-quirks.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index d7236e2f5eed..b5b912f3dce8 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -428,9 +428,9 @@ static resource_size_t __init chv_stolen_size(int num, int
slot, int func)
if (gms < 0x11)
return gms * MB(32);
else if (gms < 0x17)
- return (gms - 0x11 + 2) * MB(4);
+ return (gms - 0x11) * MB(4) + MB(8);
else
- return (gms - 0x17 + 9) * MB(4);
+ return (gms - 0x17) * MB(4) + MB(36);
}
static resource_size_t __init gen9_stolen_size(int num, int slot, int func)
@@ -446,7 +446,7 @@ static resource_size_t __init gen9_stolen_size(int num, int
slot, int func)
if (gms < 0xf0)
return gms * MB(32);
else
- return (gms - 0xf0 + 1) * MB(4);
+ return (gms - 0xf0) * MB(4) + MB(4);
}
struct intel_early_ops {
--
2.14.3
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 0/9] make stolen resource centric
Continuation of Paulo' stolen series[1], addressing the feedback from Joonas and Chris. [1] https://patchwork.freedesktop.org/series/30923/ Joonas Lahtinen (1): x86/early-quirks: Extend Intel graphics stolen memory placement to 64bit Matthew Auld (8): x86/early-quirks: replace the magical increment start values x86/early-quirks: reverse the if ladders drm/i915: nuke the duplicated stolen discovery drm/i915: make dsm struct resource centric drm/i915: make reserved struct resource centric drm/i915: make mappable struct resource centric drm/i915: prefer resource_size_t for everything stolen drm/i915: use stolen_usable_size for the range sanity check arch/x86/kernel/early-quirks.c| 92 +- drivers/char/agp/intel-gtt.c | 14 +- drivers/gpu/drm/i915/gvt/gvt.h| 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 4 +- drivers/gpu/drm/i915/i915_drv.c | 2 +- drivers/gpu/drm/i915/i915_drv.h | 26 ++- drivers/gpu/drm/i915/i915_gem.c | 8 +- drivers/gpu/drm/i915/i915_gem_execbuffer.c| 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 92 +++--- drivers/gpu/drm/i915/i915_gem_gtt.h | 12 +- drivers/gpu/drm/i915/i915_gem_stolen.c| 244 +++--- drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 2 +- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_fbc.c | 10 +- drivers/gpu/drm/i915/intel_overlay.c | 4 +- drivers/gpu/drm/i915/intel_pm.c | 33 ++-- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 +- drivers/gpu/drm/i915/selftests/mock_gtt.c | 4 +- include/drm/i915_drm.h| 3 + include/drm/intel-gtt.h | 4 +- 21 files changed, 227 insertions(+), 339 deletions(-) -- 2.14.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 7/9] drm/i915: make mappable struct resource centric
Now that we are using struct resource to track the stolen region, it is
more convenient if we track the mappable region in a resource as well.
v2: prefer iomap and gmadr naming scheme
prefer DEFINE_RES_MEM
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Paulo Zanoni
---
drivers/gpu/drm/i915/gvt/gvt.h| 2 +-
drivers/gpu/drm/i915/i915_drv.c | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 8 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c| 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 31 +--
drivers/gpu/drm/i915/i915_gem_gtt.h | 4 ++--
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
drivers/gpu/drm/i915/i915_vma.c | 2 +-
drivers/gpu/drm/i915/intel_display.c | 2 +-
drivers/gpu/drm/i915/intel_overlay.c | 4 ++--
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 ++--
drivers/gpu/drm/i915/selftests/mock_gtt.c | 4 ++--
12 files changed, 38 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 393066726993..0e160bd00e2e 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -336,7 +336,7 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
/* Aperture/GM space definitions for GVT device */
#define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end)
-#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.mappable_base)
+#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.gmadr.start)
#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.base.total)
#define gvt_ggtt_sz(gvt) \
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7faf20aff25a..d89e7b07eb5d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -726,7 +726,7 @@ static int i915_kick_out_firmware_fb(struct
drm_i915_private *dev_priv)
if (!ap)
return -ENOMEM;
- ap->ranges[0].base = ggtt->mappable_base;
+ ap->ranges[0].base = ggtt->gmadr.start;
ap->ranges[0].size = ggtt->mappable_end;
primary =
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e083f242b8dc..87388e2d58f1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1106,7 +1106,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
page_base += offset & PAGE_MASK;
}
- if (gtt_user_read(&ggtt->mappable, page_base, page_offset,
+ if (gtt_user_read(&ggtt->iomap, page_base, page_offset,
user_data, page_length)) {
ret = -EFAULT;
break;
@@ -1314,7 +1314,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
* If the object is non-shmem backed, we retry again with the
* path that handles page fault.
*/
- if (ggtt_write(&ggtt->mappable, page_base, page_offset,
+ if (ggtt_write(&ggtt->iomap, page_base, page_offset,
user_data, page_length)) {
ret = -EFAULT;
break;
@@ -1960,9 +1960,9 @@ int i915_gem_fault(struct vm_fault *vmf)
/* Finally, remap it using the new GTT offset */
ret = remap_io_mapping(area,
area->vm_start + (vma->ggtt_view.partial.offset
<< PAGE_SHIFT),
- (ggtt->mappable_base + vma->node.start) >>
PAGE_SHIFT,
+ (ggtt->gmadr.start + vma->node.start) >>
PAGE_SHIFT,
min_t(u64, vma->size, area->vm_end -
area->vm_start),
- &ggtt->mappable);
+ &ggtt->iomap);
if (ret)
goto err_fence;
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 70ccd63cbf8e..4401068ff468 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1012,7 +1012,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
offset += page << PAGE_SHIFT;
}
- vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->mappable,
+ vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap,
offset);
cache->page = page;
cache->vaddr = (unsigned long)vaddr;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 32e06d9ccc52..8d19480b65c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2912,7 +2912,7 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private
*dev_priv)
mutex_unlock(&dev_priv->drm.struct_mutex);
arch_phys_wc_del(ggt
[Intel-gfx] [PATCH 4/9] drm/i915: nuke the duplicated stolen discovery
We duplicate the stolen discovery code in early-quirks and in i915,
however now that the stolen region is exported as a resource from
early-quirks we can nuke the duplication.
v2: check overflows_type
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Paulo Zanoni
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gem_gtt.c| 51 +--
drivers/gpu/drm/i915/i915_gem_stolen.c | 109 +
2 files changed, 5 insertions(+), 155 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f3c35e826321..32e06d9ccc52 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2949,50 +2949,6 @@ static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)
return 0;
}
-static size_t gen6_get_stolen_size(u16 snb_gmch_ctl)
-{
- snb_gmch_ctl >>= SNB_GMCH_GMS_SHIFT;
- snb_gmch_ctl &= SNB_GMCH_GMS_MASK;
- return (size_t)snb_gmch_ctl << 25; /* 32 MB units */
-}
-
-static size_t gen8_get_stolen_size(u16 bdw_gmch_ctl)
-{
- bdw_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
- bdw_gmch_ctl &= BDW_GMCH_GMS_MASK;
- return (size_t)bdw_gmch_ctl << 25; /* 32 MB units */
-}
-
-static size_t chv_get_stolen_size(u16 gmch_ctrl)
-{
- gmch_ctrl >>= SNB_GMCH_GMS_SHIFT;
- gmch_ctrl &= SNB_GMCH_GMS_MASK;
-
- /*
-* 0x0 to 0x10: 32MB increments starting at 0MB
-* 0x11 to 0x16: 4MB increments starting at 8MB
-* 0x17 to 0x1d: 4MB increments start at 36MB
-*/
- if (gmch_ctrl < 0x11)
- return (size_t)gmch_ctrl << 25;
- else if (gmch_ctrl < 0x17)
- return (size_t)(gmch_ctrl - 0x11 + 2) << 22;
- else
- return (size_t)(gmch_ctrl - 0x17 + 9) << 22;
-}
-
-static size_t gen9_get_stolen_size(u16 gen9_gmch_ctl)
-{
- gen9_gmch_ctl >>= BDW_GMCH_GMS_SHIFT;
- gen9_gmch_ctl &= BDW_GMCH_GMS_MASK;
-
- if (gen9_gmch_ctl < 0xf0)
- return (size_t)gen9_gmch_ctl << 25; /* 32 MB units */
- else
- /* 4MB increments starting at 0xf0 for 4MB */
- return (size_t)(gen9_gmch_ctl - 0xf0 + 1) << 22;
-}
-
static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
{
struct drm_i915_private *dev_priv = ggtt->base.i915;
@@ -3343,14 +3299,13 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
+ ggtt->stolen_size = resource_size(&intel_graphics_stolen_res);
+
if (INTEL_GEN(dev_priv) >= 9) {
- ggtt->stolen_size = gen9_get_stolen_size(snb_gmch_ctl);
size = gen8_get_total_gtt_size(snb_gmch_ctl);
} else if (IS_CHERRYVIEW(dev_priv)) {
- ggtt->stolen_size = chv_get_stolen_size(snb_gmch_ctl);
size = chv_get_total_gtt_size(snb_gmch_ctl);
} else {
- ggtt->stolen_size = gen8_get_stolen_size(snb_gmch_ctl);
size = gen8_get_total_gtt_size(snb_gmch_ctl);
}
@@ -3408,7 +3363,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
DRM_ERROR("Can't set DMA mask/consistent mask (%d)\n", err);
pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
- ggtt->stolen_size = gen6_get_stolen_size(snb_gmch_ctl);
+ ggtt->stolen_size = resource_size(&intel_graphics_stolen_res);
size = gen6_get_total_gtt_size(snb_gmch_ctl);
ggtt->base.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c
b/drivers/gpu/drm/i915/i915_gem_stolen.c
index 1877ae9a1d9b..f8ac1438c35d 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -30,9 +30,6 @@
#include
#include "i915_drv.h"
-#define KB(x) ((x) * 1024)
-#define MB(x) (KB(x) * 1024)
-
/*
* The BIOS typically reserves some of the system's memory for the exclusive
* use of the integrated graphics. This memory is no longer available for
@@ -81,113 +78,11 @@ void i915_gem_stolen_remove_node(struct drm_i915_private
*dev_priv,
static dma_addr_t i915_stolen_to_dma(struct drm_i915_private *dev_priv)
{
- struct pci_dev *pdev = dev_priv->drm.pdev;
struct i915_ggtt *ggtt = &dev_priv->ggtt;
+ dma_addr_t base = intel_graphics_stolen_res.start;
struct resource *r;
- dma_addr_t base;
-
- /* Almost universally we can find the Graphics Base of Stolen Memory
-* at register BSM (0x5c) in the igfx configuration space. On a few
-* (desktop) machines this is also mirrored in the bridge device at
-* different locations, or in the MCHBAR.
-*
-* On 865 we just check the TOUD register.
-*
-* On 830/845/85x the stolen memory base isn't available in any
-* register. We need to calculate it as TOM-TSEG_SIZE-stolen_size.
-*
-*/
- base = 0;
- i
Re: [Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property
Hi Pavel, On 5 December 2017 at 17:34, Pavel Machek wrote: > Yes, so... This patch makes it more likely to see machines with locked > down kernels, preventing developers from working with systems their > own, running hardware. That is evil, and direct threat to Free > software movement. > > Users compiling their own kernels get no benefit from it. Actually it > looks like this only benefits Intel and Disney. We don't want that. With all due respect, you can't claim to speak for the entire kernel and FLOSS community of users and developers. The feature is optional: it does not enforce additional constraints on users, but exposes additional functionality already present in hardware, for those who wish to opt in to it. Those who wish to avoid it can do so, by simply not making active use of it. Cheers, Daniel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for lib: Check and report if a subtest triggers a new kernel taint (rev2)
== Series Details == Series: lib: Check and report if a subtest triggers a new kernel taint (rev2) URL : https://patchwork.freedesktop.org/series/34616/ State : success == Summary == IGT patchset tested on top of latest successful build 1db12466cb5ad8483cd469753d2e312a62d717b7 meson: build a full dependency for lib_igt_perf with latest DRM-Tip kernel build CI_DRM_3461 0d0fe916f52a drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest No testlist changes. Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> PASS (fi-elk-e7500) fdo#103989 +1 Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: fail -> PASS (fi-gdg-551) fdo#102575 Test drv_module_reload: Subgroup basic-reload: dmesg-warn -> DMESG-FAIL (fi-gdg-551) fdo#102707 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:445s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:527s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:284s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:506s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:498s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:482s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:179 dwarn:0 dfail:1 fail:0 skip:108 time:270s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:545s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:365s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:259s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:478s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:457s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:532s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:483s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:534s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:597s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:448s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:544s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:574s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:516s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:500s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:552s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:425s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:615s fi-cnl-y total:240 pass:215 dwarn:0 dfail:0 fail:0 skip:24 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:495s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_600/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915: follow single notation for workaround number
== Series Details == Series: series starting with [v3,1/2] drm/i915: follow single notation for workaround number URL : https://patchwork.freedesktop.org/series/34937/ State : success == Summary == Series 34937v1 series starting with [v3,1/2] drm/i915: follow single notation for workaround number https://patchwork.freedesktop.org/api/1.0/series/34937/revisions/1/mbox/ Test gem_exec_reloc: Subgroup basic-gtt-active: pass -> FAIL (fi-gdg-551) fdo#102582 +4 Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: fail -> PASS (fi-gdg-551) fdo#102575 fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:520s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:280s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:505s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:485s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:475s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:174 dwarn:1 dfail:0 fail:5 skip:108 time:268s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:381s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:258s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:481s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:445s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:529s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:476s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:529s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:594s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:453s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:546s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:578s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:516s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:506s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:548s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:425s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:613s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:637s fi-glk-dsi total:48 pass:40 dwarn:0 dfail:0 fail:1 skip:6 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest 1865ffb38093 drm/i915: add platform tag to WA 2b69b57062b0 drm/i915: follow single notation for workaround number == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7419/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/fb-helper: Add .last_close and .output_poll_changed helpers (rev3)
== Series Details == Series: drm/fb-helper: Add .last_close and .output_poll_changed helpers (rev3) URL : https://patchwork.freedesktop.org/series/32332/ State : success == Summary == Series 32332v3 drm/fb-helper: Add .last_close and .output_poll_changed helpers https://patchwork.freedesktop.org/api/1.0/series/32332/revisions/3/mbox/ Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> DMESG-FAIL (fi-elk-e7500) fdo#103989 Test gem_exec_reloc: Subgroup basic-cpu-active: pass -> FAIL (fi-gdg-551) fdo#102582 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#102582 https://bugs.freedesktop.org/show_bug.cgi?id=102582 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:386s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:512s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:500s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:507s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:485s fi-elk-e7500 total:224 pass:163 dwarn:14 dfail:1 fail:0 skip:45 fi-gdg-551 total:288 pass:177 dwarn:1 dfail:0 fail:2 skip:108 time:271s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:542s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:358s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:482s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:448s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:526s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:475s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:537s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:588s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:464s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:541s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:559s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:515s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:503s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:547s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:414s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:617s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:626s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:492s fi-byt-n2820 failed to collect. IGT log at Patchwork_7418/fi-byt-n2820/igt.log 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest 55265d6c7050 drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed() 9fafdf63c834 drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed() df3bbded40da drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed() 333f1890023d drm/omap: Use drm_fb_helper_lastclose() and _poll_changed() 0c6eec2e08a3 drm/nouveau: Use drm_fb_helper_output_poll_changed() cdf2e7cf9bbb drm/msm: Use drm_fb_helper_lastclose() and _poll_changed() 6e8639cd8208 drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed() 0e6a351972ee drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed() f5ebbfb307a2 drm/armada: Use drm_fb_helper_lastclose() and _poll_changed() 1232ff1b16b0 drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed() 97f12a3e8c50 drm/amd/display: Use drm_fb_helper_poll_changed() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7418/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property
On Tue, Dec 5, 2017 at 12:34 PM, Pavel Machek wrote: > On Tue 2017-12-05 11:45:38, Daniel Vetter wrote: >> On Tue, Dec 05, 2017 at 11:28:40AM +0100, Pavel Machek wrote: >> > On Wed 2017-11-29 22:08:56, Sean Paul wrote: >> > > This patch adds a new optional connector property to allow userspace to >> > > enable >> > > protection over the content it is displaying. This will typically be >> > > implemented >> > > by the driver using HDCP. >> > > >> > > The property is a tri-state with the following values: >> > > - OFF: Self explanatory, no content protection >> > > - DESIRED: Userspace requests that the driver enable protection >> > > - ENABLED: Once the driver has authenticated the link, it sets this value >> > > >> > > The driver is responsible for downgrading ENABLED to DESIRED if the link >> > > becomes >> > > unprotected. The driver should also maintain the desiredness of >> > > protection >> > > across hotplug/dpms/suspend. >> > >> > Why would user of the machine want this to be something else than >> > 'OFF'? >> > >> > If kernel implements this, will it mean hardware vendors will have to >> > prevent user from updating kernel on machines they own? >> > >> > If this is merged, does it open kernel developers to DMCA threats if >> > they try to change it? >> >> Because this just implements one part of the content protection scheme. >> This only gives you an option to enable HDCP (aka encryption, it's really >> nothing else) on the cable. Just because it has Content Protection in the >> name does _not_ mean it is (stand-alone) an effective nor complete content >> protection scheme. It's simply encrypting data, that's all. > > Yep. So my first question was: why would user of the machine ever want > encryption "ENABLED" or "DESIRED"? Could you answer it? > Sure. We have a lot of Chrome OS users who would really like to enjoy premium hd content on their tvs. >> If you want to actually lock down a machine to implement content >> protection, then you need secure boot without unlockable boot-loader and a >> pile more bits in userspace. If you do all that, only then do you have >> full content protection. And yes, then you don't really own the machine >> fully, and I think users who are concerned with being able to update >> their > > Yes, so... This patch makes it more likely to see machines with locked > down kernels, preventing developers from working with systems their > own, running hardware. That is evil, and direct threat to Free > software movement. > > Users compiling their own kernels get no benefit from it. Actually it > looks like this only benefits Intel and Disney. We don't want that. > Major citation needed here. Did you actually read the code? If you did, you would realize that the feature is already latent in your computer. This patchset merely exposes how that hardware can be enabled to encrypt your video link. Would you have the same problems with a new whizzbang video encoding format, or is it just the "Content Protection" name? Perhaps you'd prefer this feature was implemented in Intel's firmware, or a userspace blob? It wouldn't change the fact that those registers exist and _can_ be used for HDCP, it's just that now you know about it. Having all of the code in the open allows users to see what is happening with their hardware, how is this a bad thing? Sean >> kernels and be able to exercise their software freedoms already know to >> avoid such locked down systems. >> >> So yeah it would be better to call this the "HDMI/DP cable encryption >> support", but well, it's not what it's called really. > > Well, it does not belong in kernel, no matter what is the name. > > Pavel > -- > (english) http://www.livejournal.com/~pavelmachek > (cesky, pictures) > http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 1/2] drm/i915: follow single notation for workaround number
v2: Allow to have or omit space before platform
Cc: Ville Syrjälä
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/intel_hdmi.c | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
b/drivers/gpu/drm/i915/intel_hdmi.c
index 9d5e72728475..691600ce48c4 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1380,7 +1380,7 @@ static bool hdmi_12bpc_possible(const struct
intel_crtc_state *crtc_state)
}
}
- /* Display Wa #1139 */
+ /* Display WA #1139 */
if (IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) &&
crtc_state->base.adjusted_mode.htotal > 5460)
return false;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 67f326230a7e..07ee5ad5a13f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -58,7 +58,7 @@ static void gen9_init_clock_gating(struct drm_i915_private
*dev_priv)
if (HAS_LLC(dev_priv)) {
/*
* WaCompressedResourceDisplayNewHashMode:skl,kbl
-* Display WA#0390: skl,kbl
+* Display WA #0390: skl,kbl
*
* Must match Sampler, Pixel Back End, and Media. See
* WaCompressedResourceSamplerPbeMediaNewHashMode.
@@ -8417,7 +8417,7 @@ static void cnp_init_clock_gating(struct drm_i915_private
*dev_priv)
if (!HAS_PCH_CNP(dev_priv))
return;
- /* Wa #1181 */
+ /* Display WA #1181 */
I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) |
CNP_PWM_CGE_GATING_DISABLE);
}
--
2.14.3
___
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[Intel-gfx] [PATCH v3 2/2] drm/i915: add platform tag to WA
v2: add more missing platform tags v3: change tag to cnp rather than using gen9,gen10 Cc: Ville Syrjälä Signed-off-by: Lucas De Marchi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/intel_hdmi.c | 2 +- drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 691600ce48c4..c42a6c672b73 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -1380,7 +1380,7 @@ static bool hdmi_12bpc_possible(const struct intel_crtc_state *crtc_state) } } - /* Display WA #1139 */ + /* Display WA #1139: glk */ if (IS_GLK_REVID(dev_priv, 0, GLK_REVID_A1) && crtc_state->base.adjusted_mode.htotal > 5460) return false; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 07ee5ad5a13f..5836181d6f8a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8417,7 +8417,7 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) if (!HAS_PCH_CNP(dev_priv)) return; - /* Display WA #1181 */ + /* Display WA #1181: cnp */ I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) | CNP_PWM_CGE_GATING_DISABLE); } -- 2.14.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v5] drm/i915: Restore GT performance in headless mode with DMC loaded
On Tue, 2017-12-05 at 15:09 +0200, Imre Deak wrote: > On Sat, Dec 02, 2017 at 02:05:42AM +0200, Rogozhkin, Dmitry V wrote: > > On Thu, 2017-11-30 at 13:19 +0200, Imre Deak wrote: > > > > > +#define NEEDS_CSR_GT_PERF_WA(dev_priv) \ > > > > > + (HAS_CSR(dev_priv) && IS_GEN9(dev_priv) && ! > > > IS_SKYLAKE(dev_priv)) > > > > > > Nitpick: could be just !IS_SKYLAKE(), but works in the above way too. > > > For all other platforms the GT_IRQ domain won't be mapped making > > > display_power_get/put on those just a domain ref inc/dec, otherwise a > > > nop. > > > > Why not +&& !IS_BROXTON(dev_priv) by the way? > > We have the same slow-down problem on APL/BXT (and we don't have the DC6 > corruption problem there). Ok, this makes sense now. Thank you for clarification. > > --Imre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for e1000e: Taint a HW lockup
== Series Details == Series: e1000e: Taint a HW lockup URL : https://patchwork.freedesktop.org/series/34931/ State : success == Summary == Series 34931v1 e1000e: Taint a HW lockup https://patchwork.freedesktop.org/api/1.0/series/34931/revisions/1/mbox/ fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:442s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:515s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:504s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:484s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:472s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:267s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:539s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:358s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:485s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:445s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:530s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:475s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:537s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:586s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:456s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:541s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:572s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:515s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:548s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:411s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:600s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:616s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest f0ee3df4e66c e1000e: Taint a HW lockup == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7417/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails (rev4)
== Series Details == Series: drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails (rev4) URL : https://patchwork.freedesktop.org/series/34623/ State : success == Summary == Series 34623v4 drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails https://patchwork.freedesktop.org/api/1.0/series/34623/revisions/4/mbox/ Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> FAIL (fi-elk-e7500) fdo#103989 +1 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:435s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:382s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:520s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:282s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:503s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:505s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:490s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:472s fi-elk-e7500 total:224 pass:162 dwarn:15 dfail:0 fail:1 skip:45 fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:369s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:475s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:444s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:520s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:473s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:592s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:451s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:544s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:568s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:508s fi-snb-2520m total:245 pass:211 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:414s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:609s fi-cnl-y total:197 pass:185 dwarn:0 dfail:0 fail:0 skip:11 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest 50f3430f4200 drm/i915: Taint (TAINT_WARN) the kernel if the GPU reset fails == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7416/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 11/11] drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Thierry Reding
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/tegra/drm.c | 13 ++---
drivers/gpu/drm/tegra/drm.h | 4
drivers/gpu/drm/tegra/fb.c | 14 --
3 files changed, 2 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
index 52552b9b89ef..f157bc675269 100644
--- a/drivers/gpu/drm/tegra/drm.c
+++ b/drivers/gpu/drm/tegra/drm.c
@@ -120,7 +120,7 @@ static int tegra_atomic_commit(struct drm_device *drm,
static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
.fb_create = tegra_fb_create,
#ifdef CONFIG_DRM_FBDEV_EMULATION
- .output_poll_changed = tegra_fb_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
#endif
.atomic_check = drm_atomic_helper_check,
.atomic_commit = tegra_atomic_commit,
@@ -286,15 +286,6 @@ static void tegra_drm_context_free(struct
tegra_drm_context *context)
kfree(context);
}
-static void tegra_drm_lastclose(struct drm_device *drm)
-{
-#ifdef CONFIG_DRM_FBDEV_EMULATION
- struct tegra_drm *tegra = drm->dev_private;
-
- tegra_fbdev_restore_mode(tegra->fbdev);
-#endif
-}
-
static struct host1x_bo *
host1x_bo_lookup(struct drm_file *file, u32 handle)
{
@@ -1100,7 +1091,7 @@ static struct drm_driver tegra_drm_driver = {
.unload = tegra_drm_unload,
.open = tegra_drm_open,
.postclose = tegra_drm_postclose,
- .lastclose = tegra_drm_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
#if defined(CONFIG_DEBUG_FS)
.debugfs_init = tegra_debugfs_init,
diff --git a/drivers/gpu/drm/tegra/drm.h b/drivers/gpu/drm/tegra/drm.h
index ddae331ad8b6..0009f6ea21b6 100644
--- a/drivers/gpu/drm/tegra/drm.h
+++ b/drivers/gpu/drm/tegra/drm.h
@@ -188,10 +188,6 @@ int tegra_drm_fb_init(struct drm_device *drm);
void tegra_drm_fb_exit(struct drm_device *drm);
void tegra_drm_fb_suspend(struct drm_device *drm);
void tegra_drm_fb_resume(struct drm_device *drm);
-#ifdef CONFIG_DRM_FBDEV_EMULATION
-void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
-void tegra_fb_output_poll_changed(struct drm_device *drm);
-#endif
extern struct platform_driver tegra_dc_driver;
extern struct platform_driver tegra_hdmi_driver;
diff --git a/drivers/gpu/drm/tegra/fb.c b/drivers/gpu/drm/tegra/fb.c
index 80540c1c66dc..8dfe3c6c217e 100644
--- a/drivers/gpu/drm/tegra/fb.c
+++ b/drivers/gpu/drm/tegra/fb.c
@@ -361,20 +361,6 @@ static void tegra_fbdev_exit(struct tegra_fbdev *fbdev)
drm_fb_helper_fini(&fbdev->base);
tegra_fbdev_free(fbdev);
}
-
-void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev)
-{
- if (fbdev)
- drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->base);
-}
-
-void tegra_fb_output_poll_changed(struct drm_device *drm)
-{
- struct tegra_drm *tegra = drm->dev_private;
-
- if (tegra->fbdev)
- drm_fb_helper_hotplug_event(&tegra->fbdev->base);
-}
#endif
int tegra_drm_fb_prepare(struct drm_device *drm)
--
2.14.2
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[Intel-gfx] [PATCH v3 10/11] drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Mark Yao
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 9 +
drivers/gpu/drm/rockchip/rockchip_drm_fb.c | 9 +
2 files changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
index 76d63de5921d..d85431400a0d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
@@ -207,13 +207,6 @@ static void rockchip_drm_unbind(struct device *dev)
drm_dev_unref(drm_dev);
}
-static void rockchip_drm_lastclose(struct drm_device *dev)
-{
- struct rockchip_drm_private *priv = dev->dev_private;
-
- drm_fb_helper_restore_fbdev_mode_unlocked(&priv->fbdev_helper);
-}
-
static const struct file_operations rockchip_drm_driver_fops = {
.owner = THIS_MODULE,
.open = drm_open,
@@ -228,7 +221,7 @@ static const struct file_operations
rockchip_drm_driver_fops = {
static struct drm_driver rockchip_drm_driver = {
.driver_features= DRIVER_MODESET | DRIVER_GEM |
DRIVER_PRIME | DRIVER_ATOMIC,
- .lastclose = rockchip_drm_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
.gem_vm_ops = &drm_gem_cma_vm_ops,
.gem_free_object_unlocked = rockchip_gem_free_object,
.dumb_create= rockchip_gem_dumb_create,
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
index cd2ace0c3caa..e266539e04e5 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_fb.c
@@ -167,20 +167,13 @@ rockchip_user_fb_create(struct drm_device *dev, struct
drm_file *file_priv,
return ERR_PTR(ret);
}
-static void rockchip_drm_output_poll_changed(struct drm_device *dev)
-{
- struct rockchip_drm_private *private = dev->dev_private;
-
- drm_fb_helper_hotplug_event(&private->fbdev_helper);
-}
-
static const struct drm_mode_config_helper_funcs rockchip_mode_config_helpers
= {
.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
};
static const struct drm_mode_config_funcs rockchip_drm_mode_config_funcs = {
.fb_create = rockchip_user_fb_create,
- .output_poll_changed = rockchip_drm_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
};
--
2.14.2
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[Intel-gfx] [PATCH v3 03/11] drm/armada: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Russell King
Signed-off-by: Noralf Trønnes
Acked-by: Russell King
Acked-by: Daniel Vetter
---
drivers/gpu/drm/armada/armada_drm.h | 1 -
drivers/gpu/drm/armada/armada_drv.c | 8 ++--
drivers/gpu/drm/armada/armada_fb.c| 11 +--
drivers/gpu/drm/armada/armada_fbdev.c | 8
4 files changed, 3 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/armada/armada_drm.h
b/drivers/gpu/drm/armada/armada_drm.h
index b064879ecdbd..cc4c557c9f66 100644
--- a/drivers/gpu/drm/armada/armada_drm.h
+++ b/drivers/gpu/drm/armada/armada_drm.h
@@ -84,7 +84,6 @@ void armada_drm_queue_unref_work(struct drm_device *,
extern const struct drm_mode_config_funcs armada_drm_mode_config_funcs;
int armada_fbdev_init(struct drm_device *);
-void armada_fbdev_lastclose(struct drm_device *);
void armada_fbdev_fini(struct drm_device *);
int armada_overlay_plane_create(struct drm_device *, unsigned long);
diff --git a/drivers/gpu/drm/armada/armada_drv.c
b/drivers/gpu/drm/armada/armada_drv.c
index e857b88a9799..4b11b6b52f1d 100644
--- a/drivers/gpu/drm/armada/armada_drv.c
+++ b/drivers/gpu/drm/armada/armada_drv.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include "armada_crtc.h"
#include "armada_drm.h"
@@ -54,15 +55,10 @@ static struct drm_ioctl_desc armada_ioctls[] = {
DRM_IOCTL_DEF_DRV(ARMADA_GEM_PWRITE, armada_gem_pwrite_ioctl, 0),
};
-static void armada_drm_lastclose(struct drm_device *dev)
-{
- armada_fbdev_lastclose(dev);
-}
-
DEFINE_DRM_GEM_FOPS(armada_drm_fops);
static struct drm_driver armada_drm_driver = {
- .lastclose = armada_drm_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
.gem_free_object_unlocked = armada_gem_free_object,
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
diff --git a/drivers/gpu/drm/armada/armada_fb.c
b/drivers/gpu/drm/armada/armada_fb.c
index a38d5a0892a9..ac92bce07ecd 100644
--- a/drivers/gpu/drm/armada/armada_fb.c
+++ b/drivers/gpu/drm/armada/armada_fb.c
@@ -154,16 +154,7 @@ static struct drm_framebuffer *armada_fb_create(struct
drm_device *dev,
return ERR_PTR(ret);
}
-static void armada_output_poll_changed(struct drm_device *dev)
-{
- struct armada_private *priv = dev->dev_private;
- struct drm_fb_helper *fbh = priv->fbdev;
-
- if (fbh)
- drm_fb_helper_hotplug_event(fbh);
-}
-
const struct drm_mode_config_funcs armada_drm_mode_config_funcs = {
.fb_create = armada_fb_create,
- .output_poll_changed= armada_output_poll_changed,
+ .output_poll_changed= drm_fb_helper_output_poll_changed,
};
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c
b/drivers/gpu/drm/armada/armada_fbdev.c
index a2ce83f84800..2a59db0994b2 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -159,14 +159,6 @@ int armada_fbdev_init(struct drm_device *dev)
return ret;
}
-void armada_fbdev_lastclose(struct drm_device *dev)
-{
- struct armada_private *priv = dev->dev_private;
-
- if (priv->fbdev)
- drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
-}
-
void armada_fbdev_fini(struct drm_device *dev)
{
struct armada_private *priv = dev->dev_private;
--
2.14.2
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[Intel-gfx] [PATCH v3 08/11] drm/omap: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Tomi Valkeinen
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/omapdrm/omap_drv.c | 34 ++
1 file changed, 2 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c
b/drivers/gpu/drm/omapdrm/omap_drv.c
index cdf5b0601eba..96857c508ee0 100644
--- a/drivers/gpu/drm/omapdrm/omap_drv.c
+++ b/drivers/gpu/drm/omapdrm/omap_drv.c
@@ -46,14 +46,6 @@
* devices
*/
-static void omap_fb_output_poll_changed(struct drm_device *dev)
-{
- struct omap_drm_private *priv = dev->dev_private;
- DBG("dev=%p", dev);
- if (priv->fbdev)
- drm_fb_helper_hotplug_event(priv->fbdev);
-}
-
static void omap_atomic_wait_for_completion(struct drm_device *dev,
struct drm_atomic_state *old_state)
{
@@ -132,7 +124,7 @@ static const struct drm_mode_config_helper_funcs
omap_mode_config_helper_funcs =
static const struct drm_mode_config_funcs omap_mode_config_funcs = {
.fb_create = omap_framebuffer_create,
- .output_poll_changed = omap_fb_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = drm_atomic_helper_commit,
};
@@ -467,28 +459,6 @@ static int dev_open(struct drm_device *dev, struct
drm_file *file)
return 0;
}
-/**
- * lastclose - clean up after all DRM clients have exited
- * @dev: DRM device
- *
- * Take care of cleaning up after all DRM clients have exited. In the
- * mode setting case, we want to restore the kernel's initial mode (just
- * in case the last client left us in a bad state).
- */
-static void dev_lastclose(struct drm_device *dev)
-{
- struct omap_drm_private *priv = dev->dev_private;
- int ret;
-
- DBG("lastclose: dev=%p", dev);
-
- if (priv->fbdev) {
- ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
- if (ret)
- DBG("failed to restore crtc mode");
- }
-}
-
static const struct vm_operations_struct omap_gem_vm_ops = {
.fault = omap_gem_fault,
.open = drm_gem_vm_open,
@@ -511,7 +481,7 @@ static struct drm_driver omap_drm_driver = {
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
DRIVER_ATOMIC | DRIVER_RENDER,
.open = dev_open,
- .lastclose = dev_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
#ifdef CONFIG_DEBUG_FS
.debugfs_init = omap_debugfs_init,
#endif
--
2.14.2
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[Intel-gfx] [PATCH v3 05/11] drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Patrik Jakobsson
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/gma500/framebuffer.c | 9 +
drivers/gpu/drm/gma500/psb_drv.c | 15 +--
2 files changed, 2 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/gma500/framebuffer.c
b/drivers/gpu/drm/gma500/framebuffer.c
index 2570c7f647a6..cb0a2ae916e0 100644
--- a/drivers/gpu/drm/gma500/framebuffer.c
+++ b/drivers/gpu/drm/gma500/framebuffer.c
@@ -576,13 +576,6 @@ static void psb_fbdev_fini(struct drm_device *dev)
dev_priv->fbdev = NULL;
}
-static void psbfb_output_poll_changed(struct drm_device *dev)
-{
- struct drm_psb_private *dev_priv = dev->dev_private;
- struct psb_fbdev *fbdev = (struct psb_fbdev *)dev_priv->fbdev;
- drm_fb_helper_hotplug_event(&fbdev->psb_fb_helper);
-}
-
/**
* psb_user_framebuffer_create_handle - add hamdle to a framebuffer
* @fb: framebuffer
@@ -623,7 +616,7 @@ static void psb_user_framebuffer_destroy(struct
drm_framebuffer *fb)
static const struct drm_mode_config_funcs psb_mode_funcs = {
.fb_create = psb_user_framebuffer_create,
- .output_poll_changed = psbfb_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
};
static void psb_setup_outputs(struct drm_device *dev)
diff --git a/drivers/gpu/drm/gma500/psb_drv.c b/drivers/gpu/drm/gma500/psb_drv.c
index 8f5cc1f471cd..38d09d4b3ed5 100644
--- a/drivers/gpu/drm/gma500/psb_drv.c
+++ b/drivers/gpu/drm/gma500/psb_drv.c
@@ -107,19 +107,6 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
static const struct drm_ioctl_desc psb_ioctls[] = {
};
-static void psb_driver_lastclose(struct drm_device *dev)
-{
- int ret;
- struct drm_psb_private *dev_priv = dev->dev_private;
- struct psb_fbdev *fbdev = dev_priv->fbdev;
-
- ret = drm_fb_helper_restore_fbdev_mode_unlocked(&fbdev->psb_fb_helper);
- if (ret)
- DRM_DEBUG("failed to restore crtc mode\n");
-
- return;
-}
-
static int psb_do_init(struct drm_device *dev)
{
struct drm_psb_private *dev_priv = dev->dev_private;
@@ -479,7 +466,7 @@ static struct drm_driver driver = {
DRIVER_MODESET | DRIVER_GEM,
.load = psb_driver_load,
.unload = psb_driver_unload,
- .lastclose = psb_driver_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
.num_ioctls = ARRAY_SIZE(psb_ioctls),
.irq_preinstall = psb_irq_preinstall,
--
2.14.2
___
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[Intel-gfx] [PATCH v3 09/11] drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/radeon/radeon_display.c | 9 ++---
drivers/gpu/drm/radeon/radeon_fb.c | 22 --
drivers/gpu/drm/radeon/radeon_kms.c | 5 ++---
drivers/gpu/drm/radeon/radeon_mode.h| 3 ---
4 files changed, 4 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c
b/drivers/gpu/drm/radeon/radeon_display.c
index ddfe91efa61e..dfda5e0ed166 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -32,6 +32,7 @@
#include
#include
+#include
#include
#include
@@ -1362,15 +1363,9 @@ radeon_user_framebuffer_create(struct drm_device *dev,
return &radeon_fb->base;
}
-static void radeon_output_poll_changed(struct drm_device *dev)
-{
- struct radeon_device *rdev = dev->dev_private;
- radeon_fb_output_poll_changed(rdev);
-}
-
static const struct drm_mode_config_funcs radeon_mode_funcs = {
.fb_create = radeon_user_framebuffer_create,
- .output_poll_changed = radeon_output_poll_changed
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
};
static const struct drm_prop_enum_list radeon_tmds_pll_enum_list[] =
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c
b/drivers/gpu/drm/radeon/radeon_fb.c
index 33b821d6d018..57c5404a1654 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -306,12 +306,6 @@ static int radeonfb_create(struct drm_fb_helper *helper,
return ret;
}
-void radeon_fb_output_poll_changed(struct radeon_device *rdev)
-{
- if (rdev->mode_info.rfbdev)
- drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
-}
-
static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev
*rfbdev)
{
struct radeon_framebuffer *rfb = &rfbdev->rfb;
@@ -422,19 +416,3 @@ void radeon_fb_remove_connector(struct radeon_device
*rdev, struct drm_connector
if (rdev->mode_info.rfbdev)
drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
}
-
-void radeon_fbdev_restore_mode(struct radeon_device *rdev)
-{
- struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev;
- struct drm_fb_helper *fb_helper;
- int ret;
-
- if (!rfbdev)
- return;
-
- fb_helper = &rfbdev->helper;
-
- ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
- if (ret)
- DRM_DEBUG("failed to restore crtc mode\n");
-}
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c
b/drivers/gpu/drm/radeon/radeon_kms.c
index cde037f213d7..dec1e081f529 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -26,6 +26,7 @@
* Jerome Glisse
*/
#include
+#include
#include "radeon.h"
#include
#include "radeon_asic.h"
@@ -629,9 +630,7 @@ static int radeon_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
*/
void radeon_driver_lastclose_kms(struct drm_device *dev)
{
- struct radeon_device *rdev = dev->dev_private;
-
- radeon_fbdev_restore_mode(rdev);
+ drm_fb_helper_lastclose(dev);
vga_switcheroo_process_delayed_switch();
}
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h
b/drivers/gpu/drm/radeon/radeon_mode.h
index ca0a7ed28c9b..3243e5e01432 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -984,9 +984,6 @@ int radeon_fbdev_init(struct radeon_device *rdev);
void radeon_fbdev_fini(struct radeon_device *rdev);
void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state);
bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo
*robj);
-void radeon_fbdev_restore_mode(struct radeon_device *rdev);
-
-void radeon_fb_output_poll_changed(struct radeon_device *rdev);
void radeon_crtc_handle_vblank(struct radeon_device *rdev, int crtc_id);
--
2.14.2
___
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[Intel-gfx] [PATCH v3 00/11] drm/fb-helper: Add .last_close and .output_poll_changed helpers
The helpers are applied and have reached airlied/drm-next. amd has gained another .poll_changed user since last. i915 doesn't really need the .poll_changed helper since it now does a sync and has to open code it after: drm/i915/fbdev: Serialise early hotplug events with async fbdev config vboxvideo will be re-sent when the helper functions have landed in Greg's staging tree. Noralf. Changes since version 2: - Helper functions have been applied - Add drm/amd/display: Use drm_fb_helper_poll_changed() - Rebase drm/amdgpu patch - Rebase drm/msm patch - Drop i915 patch, not applicable after: drm/i915/fbdev: Serialise early hotplug events with async fbdev config - Drop vboxvideo patch, it will be re-sent when the helper functions have reached Greg's staging tree. Changes since version 1: - drm_device.drm_fb_helper_private -> drm_device.fb_helper (Ville) Noralf Trønnes (11): drm/amd/display: Use drm_fb_helper_poll_changed() drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed() drm/armada: Use drm_fb_helper_lastclose() and _poll_changed() drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed() drm/gma500: Use drm_fb_helper_lastclose() and _poll_changed() drm/msm: Use drm_fb_helper_lastclose() and _poll_changed() drm/nouveau: Use drm_fb_helper_output_poll_changed() drm/omap: Use drm_fb_helper_lastclose() and _poll_changed() drm/radeon: Use drm_fb_helper_lastclose() and _poll_changed() drm/rockchip: Use drm_fb_helper_lastclose() and _poll_changed() drm/tegra: Use drm_fb_helper_lastclose() and _poll_changed() drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 ++ drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 2 -- drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 27 -- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- drivers/gpu/drm/armada/armada_drm.h | 1 - drivers/gpu/drm/armada/armada_drv.c | 8 ++ drivers/gpu/drm/armada/armada_fb.c| 11 +--- drivers/gpu/drm/armada/armada_fbdev.c | 8 -- drivers/gpu/drm/exynos/exynos_drm_drv.c | 8 ++ drivers/gpu/drm/exynos/exynos_drm_fb.c| 2 +- drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 18 drivers/gpu/drm/exynos/exynos_drm_fbdev.h | 2 -- drivers/gpu/drm/gma500/framebuffer.c | 9 +- drivers/gpu/drm/gma500/psb_drv.c | 15 +- drivers/gpu/drm/msm/msm_drv.c | 18 ++-- drivers/gpu/drm/nouveau/nouveau_display.c | 3 +- drivers/gpu/drm/nouveau/nouveau_fbcon.c | 8 -- drivers/gpu/drm/nouveau/nouveau_fbcon.h | 2 -- drivers/gpu/drm/nouveau/nouveau_vga.c | 3 +- drivers/gpu/drm/nouveau/nv50_display.c| 2 +- drivers/gpu/drm/omapdrm/omap_drv.c| 34 ++- drivers/gpu/drm/radeon/radeon_display.c | 9 ++ drivers/gpu/drm/radeon/radeon_fb.c| 22 --- drivers/gpu/drm/radeon/radeon_kms.c | 5 ++-- drivers/gpu/drm/radeon/radeon_mode.h | 3 -- drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 9 +- drivers/gpu/drm/rockchip/rockchip_drm_fb.c| 9 +- drivers/gpu/drm/tegra/drm.c | 13 ++--- drivers/gpu/drm/tegra/drm.h | 4 --- drivers/gpu/drm/tegra/fb.c| 14 -- 32 files changed, 29 insertions(+), 259 deletions(-) -- 2.14.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 07/11] drm/nouveau: Use drm_fb_helper_output_poll_changed()
This driver can use drm_fb_helper_output_poll_changed() instead of
its own nouveau_fbcon_output_poll_changed().
Cc: Ben Skeggs
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/nouveau/nouveau_display.c | 3 ++-
drivers/gpu/drm/nouveau/nouveau_fbcon.c | 8
drivers/gpu/drm/nouveau/nouveau_fbcon.h | 2 --
drivers/gpu/drm/nouveau/nouveau_vga.c | 3 ++-
drivers/gpu/drm/nouveau/nv50_display.c| 2 +-
5 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 2e7785f49e6d..009713404cc4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
@@ -292,7 +293,7 @@ nouveau_user_framebuffer_create(struct drm_device *dev,
static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
.fb_create = nouveau_user_framebuffer_create,
- .output_poll_changed = nouveau_fbcon_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
};
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index c533d8e04afc..45a4572cd2fb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -413,14 +413,6 @@ nouveau_fbcon_create(struct drm_fb_helper *helper,
return ret;
}
-void
-nouveau_fbcon_output_poll_changed(struct drm_device *dev)
-{
- struct nouveau_drm *drm = nouveau_drm(dev);
- if (drm->fbcon)
- drm_fb_helper_hotplug_event(&drm->fbcon->helper);
-}
-
static int
nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *fbcon)
{
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index e2bca729721e..a6f192ea3fa6 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -68,8 +68,6 @@ void nouveau_fbcon_set_suspend(struct drm_device *dev, int
state);
void nouveau_fbcon_accel_save_disable(struct drm_device *dev);
void nouveau_fbcon_accel_restore(struct drm_device *dev);
-void nouveau_fbcon_output_poll_changed(struct drm_device *dev);
-
extern int nouveau_nofbaccel;
#endif /* __NV50_FBCON_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_vga.c
b/drivers/gpu/drm/nouveau/nouveau_vga.c
index 52e52a360fb1..3da5a4305aa4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_vga.c
+++ b/drivers/gpu/drm/nouveau/nouveau_vga.c
@@ -4,6 +4,7 @@
#include
#include
+#include
#include "nouveau_drv.h"
#include "nouveau_acpi.h"
@@ -61,7 +62,7 @@ static void
nouveau_switcheroo_reprobe(struct pci_dev *pdev)
{
struct drm_device *dev = pci_get_drvdata(pdev);
- nouveau_fbcon_output_poll_changed(dev);
+ drm_fb_helper_output_poll_changed(dev);
}
static bool
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c
b/drivers/gpu/drm/nouveau/nv50_display.c
index 65336948e807..b22c37bde13f 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -4311,7 +4311,7 @@ nv50_disp_atomic_state_alloc(struct drm_device *dev)
static const struct drm_mode_config_funcs
nv50_disp_func = {
.fb_create = nouveau_user_framebuffer_create,
- .output_poll_changed = nouveau_fbcon_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = nv50_disp_atomic_check,
.atomic_commit = nv50_disp_atomic_commit,
.atomic_state_alloc = nv50_disp_atomic_state_alloc,
--
2.14.2
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[Intel-gfx] [PATCH v3 02/11] drm/amdgpu: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() in its .lastclose function.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Remove the unused driver implementations.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 9 ++---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 2 --
drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 27 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h| 4
5 files changed, 3 insertions(+), 43 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 138beb550a58..38d47559f098 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -34,6 +34,7 @@
#include
#include
#include
+#include
static void amdgpu_flip_callback(struct dma_fence *f, struct dma_fence_cb *cb)
{
@@ -556,15 +557,9 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
return &amdgpu_fb->base;
}
-void amdgpu_output_poll_changed(struct drm_device *dev)
-{
- struct amdgpu_device *adev = dev->dev_private;
- amdgpu_fb_output_poll_changed(adev);
-}
-
const struct drm_mode_config_funcs amdgpu_mode_funcs = {
.fb_create = amdgpu_user_framebuffer_create,
- .output_poll_changed = amdgpu_output_poll_changed
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
};
static const struct drm_prop_enum_list amdgpu_underscan_enum_list[] =
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 3cc0ef0c055e..7e03002395ff 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -28,6 +28,4 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
struct drm_file
*file_priv,
const struct
drm_mode_fb_cmd2 *mode_cmd);
-void amdgpu_output_poll_changed(struct drm_device *dev);
-
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8bc6fb..ff3e9beb7d19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -283,12 +283,6 @@ static int amdgpufb_create(struct drm_fb_helper *helper,
return ret;
}
-void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev)
-{
- if (adev->mode_info.rfbdev)
- drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper);
-}
-
static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev
*rfbdev)
{
struct amdgpu_framebuffer *rfb = &rfbdev->rfb;
@@ -393,24 +387,3 @@ bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev,
struct amdgpu_bo *robj)
return true;
return false;
}
-
-void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev)
-{
- struct amdgpu_fbdev *afbdev;
- struct drm_fb_helper *fb_helper;
- int ret;
-
- if (!adev)
- return;
-
- afbdev = adev->mode_info.rfbdev;
-
- if (!afbdev)
- return;
-
- fb_helper = &afbdev->helper;
-
- ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
- if (ret)
- DRM_DEBUG("failed to restore crtc mode\n");
-}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 720139e182a3..c947c2cc813a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -786,9 +786,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
*/
void amdgpu_driver_lastclose_kms(struct drm_device *dev)
{
- struct amdgpu_device *adev = dev->dev_private;
-
- amdgpu_fbdev_restore_mode(adev);
+ drm_fb_helper_lastclose(dev);
vga_switcheroo_process_delayed_switch();
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index ffde1e9666e8..a5ef204e17cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -661,10 +661,6 @@ void amdgpu_fbdev_fini(struct amdgpu_device *adev);
void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state);
int amdgpu_fbdev_total_size(struct amdgpu_device *adev);
bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo
*robj);
-void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev);
-
-void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev);
-
int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int bpp, bool
tiled);
--
2.14.2
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[Intel-gfx] [PATCH v3 04/11] drm/exynos: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Inki Dae
Cc: Joonyoung Shim
Cc: Seung-Woo Kim
Cc: Kyungmin Park
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/exynos/exynos_drm_drv.c | 8 ++--
drivers/gpu/drm/exynos/exynos_drm_fb.c| 2 +-
drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 18 --
drivers/gpu/drm/exynos/exynos_drm_fbdev.h | 2 --
4 files changed, 3 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c
b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 82b72425a42f..2f2bd6e37e62 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
#include
@@ -89,11 +90,6 @@ static void exynos_drm_postclose(struct drm_device *dev,
struct drm_file *file)
file->driver_priv = NULL;
}
-static void exynos_drm_lastclose(struct drm_device *dev)
-{
- exynos_drm_fbdev_restore_mode(dev);
-}
-
static const struct vm_operations_struct exynos_drm_gem_vm_ops = {
.fault = exynos_drm_gem_fault,
.open = drm_gem_vm_open,
@@ -140,7 +136,7 @@ static struct drm_driver exynos_drm_driver = {
.driver_features= DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME
| DRIVER_ATOMIC | DRIVER_RENDER,
.open = exynos_drm_open,
- .lastclose = exynos_drm_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
.postclose = exynos_drm_postclose,
.gem_free_object_unlocked = exynos_drm_gem_free_object,
.gem_vm_ops = &exynos_drm_gem_vm_ops,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fb.c
b/drivers/gpu/drm/exynos/exynos_drm_fb.c
index 8208df56a88f..0faaf829f5bf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fb.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fb.c
@@ -205,7 +205,7 @@ static struct drm_mode_config_helper_funcs
exynos_drm_mode_config_helpers = {
static const struct drm_mode_config_funcs exynos_drm_mode_config_funcs = {
.fb_create = exynos_user_fb_create,
- .output_poll_changed = exynos_drm_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = exynos_atomic_check,
.atomic_commit = drm_atomic_helper_commit,
};
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index dfb66ecf417b..132dd52d0ac7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -270,24 +270,6 @@ void exynos_drm_fbdev_fini(struct drm_device *dev)
private->fb_helper = NULL;
}
-void exynos_drm_fbdev_restore_mode(struct drm_device *dev)
-{
- struct exynos_drm_private *private = dev->dev_private;
-
- if (!private || !private->fb_helper)
- return;
-
- drm_fb_helper_restore_fbdev_mode_unlocked(private->fb_helper);
-}
-
-void exynos_drm_output_poll_changed(struct drm_device *dev)
-{
- struct exynos_drm_private *private = dev->dev_private;
- struct drm_fb_helper *fb_helper = private->fb_helper;
-
- drm_fb_helper_hotplug_event(fb_helper);
-}
-
void exynos_drm_fbdev_suspend(struct drm_device *dev)
{
struct exynos_drm_private *private = dev->dev_private;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
index 645d1bb7f665..b33847223a85 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.h
@@ -19,8 +19,6 @@
int exynos_drm_fbdev_init(struct drm_device *dev);
void exynos_drm_fbdev_fini(struct drm_device *dev);
-void exynos_drm_fbdev_restore_mode(struct drm_device *dev);
-void exynos_drm_output_poll_changed(struct drm_device *dev);
void exynos_drm_fbdev_suspend(struct drm_device *drm);
void exynos_drm_fbdev_resume(struct drm_device *drm);
--
2.14.2
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[Intel-gfx] [PATCH v3 06/11] drm/msm: Use drm_fb_helper_lastclose() and _poll_changed()
This driver can use drm_fb_helper_lastclose() as its .lastclose callback.
It can also use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Rob Clark
Signed-off-by: Noralf Trønnes
Acked-by: Daniel Vetter
---
drivers/gpu/drm/msm/msm_drv.c | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 0a3ea3034e39..d90ef1d78a1b 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -37,16 +37,9 @@
#define MSM_VERSION_MINOR 3
#define MSM_VERSION_PATCHLEVEL 0
-static void msm_fb_output_poll_changed(struct drm_device *dev)
-{
- struct msm_drm_private *priv = dev->dev_private;
- if (priv->fbdev)
- drm_fb_helper_hotplug_event(priv->fbdev);
-}
-
static const struct drm_mode_config_funcs mode_config_funcs = {
.fb_create = msm_framebuffer_create,
- .output_poll_changed = msm_fb_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = msm_atomic_commit,
.atomic_state_alloc = msm_atomic_state_alloc,
@@ -551,13 +544,6 @@ static void msm_postclose(struct drm_device *dev, struct
drm_file *file)
context_close(ctx);
}
-static void msm_lastclose(struct drm_device *dev)
-{
- struct msm_drm_private *priv = dev->dev_private;
- if (priv->fbdev)
- drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
-}
-
static irqreturn_t msm_irq(int irq, void *arg)
{
struct drm_device *dev = arg;
@@ -866,7 +852,7 @@ static struct drm_driver msm_driver = {
DRIVER_MODESET,
.open = msm_open,
.postclose = msm_postclose,
- .lastclose = msm_lastclose,
+ .lastclose = drm_fb_helper_lastclose,
.irq_handler= msm_irq,
.irq_preinstall = msm_irq_preinstall,
.irq_postinstall= msm_irq_postinstall,
--
2.14.2
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[Intel-gfx] [PATCH v3 01/11] drm/amd/display: Use drm_fb_helper_poll_changed()
This driver can use drm_fb_helper_output_poll_changed() as its
.output_poll_changed callback.
Cc: Alex Deucher
Cc: "Christian König"
Signed-off-by: Noralf Trønnes
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c324c3b76fac..124229d0af42 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -792,7 +792,7 @@ dm_atomic_state_alloc_free(struct drm_atomic_state *state)
static const struct drm_mode_config_funcs amdgpu_dm_mode_funcs = {
.fb_create = amdgpu_user_framebuffer_create,
- .output_poll_changed = amdgpu_output_poll_changed,
+ .output_poll_changed = drm_fb_helper_output_poll_changed,
.atomic_check = amdgpu_dm_atomic_check,
.atomic_commit = amdgpu_dm_atomic_commit,
.atomic_state_alloc = dm_atomic_state_alloc,
--
2.14.2
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[Intel-gfx] ✗ Fi.CI.BAT: failure for intel/atomic: Stop updating legacy fb parameters
== Series Details == Series: intel/atomic: Stop updating legacy fb parameters URL : https://patchwork.freedesktop.org/series/34924/ State : failure == Summary == Series 34924v1 intel/atomic: Stop updating legacy fb parameters https://patchwork.freedesktop.org/api/1.0/series/34924/revisions/1/mbox/ Test core_auth: Subgroup basic-auth: pass -> INCOMPLETE (fi-gdg-551) pass -> INCOMPLETE (fi-ivb-3770) pass -> DMESG-WARN (fi-bsw-n3050) pass -> INCOMPLETE (fi-skl-6700hq) Test core_prop_blob: Subgroup basic: pass -> DMESG-WARN (fi-bsw-n3050) Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> INCOMPLETE (fi-elk-e7500) fdo#103989 pass -> INCOMPLETE (fi-snb-2600) pass -> FAIL (fi-ivb-3520m) pass -> INCOMPLETE (fi-bdw-5557u) pass -> INCOMPLETE (fi-bsw-n3050) pass -> INCOMPLETE (fi-skl-6260u) pass -> INCOMPLETE (fi-skl-6600u) pass -> INCOMPLETE (fi-bxt-j4205) pass -> INCOMPLETE (fi-kbl-7560u) pass -> INCOMPLETE (fi-kbl-7567u) pass -> INCOMPLETE (fi-kbl-r) pass -> INCOMPLETE (fi-glk-1) Test drv_hangman: Subgroup error-state-basic: pass -> INCOMPLETE (fi-blb-e6850) pass -> DMESG-WARN (fi-pnv-d510) pass -> INCOMPLETE (fi-bwr-2160) Test gem_busy: Subgroup basic-hang-default: pass -> DMESG-WARN (fi-pnv-d510) Test gem_exec_fence: Subgroup await-hang-default: pass -> DMESG-WARN (fi-pnv-d510) Test gem_exec_flush: Subgroup basic-batch-kernel-default-uc: pass -> DMESG-WARN (fi-pnv-d510) Test gem_exec_suspend: Subgroup basic-s3: pass -> DMESG-WARN (fi-pnv-d510) pass -> INCOMPLETE (fi-ivb-3520m) pass -> INCOMPLETE (fi-hsw-4770) pass -> DMESG-WARN (fi-hsw-4770r) pass -> INCOMPLETE (fi-bxt-dsi) Subgroup basic-s4-devices: pass -> DMESG-WARN (fi-pnv-d510) Test gem_sync: Subgroup basic-all: pass -> DMESG-WARN (fi-pnv-d510) Test kms_busy: Subgroup basic-flip-a: pass -> DMESG-WARN (fi-pnv-d510) Subgroup basic-flip-b: pass -> DMESG-FAIL (fi-pnv-d510) Test kms_cursor_legacy: Subgroup basic-busy-flip-before-cursor-legacy: pass -> DMESG-WARN (fi-pnv-d510) Subgroup basic-flip-after-cursor-legacy: pass -> DMESG-WARN (fi-pnv-d510) Subgroup basic-flip-after-cursor-varying-size: pass -> DMESG-WARN (fi-pnv-d510) Subgroup basic-flip-before-cursor-legacy: pass -> DMESG-WARN (fi-pnv-d510) Subgroup basic-flip-before-cursor-varying-size: pass -> DMESG-WARN (fi-pnv-d510) Test kms_flip: Subgroup basic-flip-vs-dpms: pass -> INCOMPLETE (fi-pnv-d510) fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fi-bdw-5557u total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-blb-e6850 total:6pass:5dwarn:0 dfail:0 fail:0 skip:0 fi-bsw-n3050 total:3pass:0dwarn:2 dfail:0 fail:0 skip:0 fi-bwr-2160 total:6pass:5dwarn:0 dfail:0 fail:0 skip:0 fi-bxt-dsi total:108 pass:95 dwarn:0 dfail:0 fail:0 skip:12 fi-bxt-j4205 total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-elk-e7500 total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-gdg-551 total:1pass:0dwarn:0 dfail:0 fail:0 skip:0 fi-glk-1 total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-hsw-4770 total:108 pass:99 dwarn:0 dfail:0 fail:0 skip:8 fi-hsw-4770r total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:261s fi-ivb-3520m total:108 pass:94 dwarn:0 dfail:0 fail:1 skip:12 fi-ivb-3770 total:1pass:0dwarn:0 dfail:0 fail:0 skip:0 fi-kbl-7560u total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-kbl-7567u total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-kbl-r total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-pnv-d510 total:216 pass:153 dwarn:14 dfail:1 fail:0 skip:47 fi-skl-6260u total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-skl-6600u total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-skl-6700hqtotal:1pass:0dwarn:0 dfail:0 fail:0 skip:0 fi-snb-2600 total:3pass:2dwarn:0 dfail:0 fail:0
Re: [Intel-gfx] [IGT] IGT/tests/firmware: Test firmware loading by reading debugfs
>-Original Message-
>From: Vivi, Rodrigo
>Sent: Friday, December 1, 2017 2:33 PM
>To: Srivatsa, Anusha
>Cc: intel-gfx@lists.freedesktop.org
>Subject: Re: [IGT] IGT/tests/firmware: Test firmware loading by reading debugfs
>
>On Fri, Dec 01, 2017 at 09:40:35PM +, Anusha Srivatsa wrote:
>> Read debugfs and sysfs entries to check for GuC loading conditions.
>>
>> The patch is still WIP. Once all check conditions are covered, it can
>> be extended to huc debugfs file too.
>>
>> Cc: Rodrigo Vivi
>> Signed-off-by: Anusha Srivatsa
>> ---
>> tests/Makefile.sources | 1 +
>> tests/test_firmware.c | 96
>> ++
>> 2 files changed, 97 insertions(+)
>> create mode 100644 tests/test_firmware.c
>>
>> diff --git a/tests/Makefile.sources b/tests/Makefile.sources index
>> 0f4e39a..841fc54 100644
>> --- a/tests/Makefile.sources
>> +++ b/tests/Makefile.sources
>> @@ -234,6 +234,7 @@ TESTS_progs = \
>> template \
>> tools_test \
>> vgem_basic \
>> +test_firmware \
>
>note that igt tests names are meaningful... _
>
>so probably better to use fw_basic
OK... fw_basic or fw_debugfs?
>> vgem_slow \
>
>and also they are more or less sorted out here...
>but you added on the middle of a vgem group...
Oops will change the order.
>> $(NULL)
>>
>> diff --git a/tests/test_firmware.c b/tests/test_firmware.c new file
>> mode 100644 index 000..a5d621a
>> --- /dev/null
>> +++ b/tests/test_firmware.c
>> @@ -0,0 +1,96 @@
>> +/*
>> + * Copyright (c) 2013 Intel Corporation
>> + *
>> + * Permission is hereby granted, free of charge, to any person
>> +obtaining a
>> + * copy of this software and associated documentation files (the
>> +"Software"),
>> + * to deal in the Software without restriction, including without
>> +limitation
>> + * the rights to use, copy, modify, merge, publish, distribute,
>> +sublicense,
>> + * and/or sell copies of the Software, and to permit persons to whom
>> +the
>> + * Software is furnished to do so, subject to the following conditions:
>> + *
>> + * The above copyright notice and this permission notice (including
>> +the next
>> + * paragraph) shall be included in all copies or substantial portions
>> +of the
>> + * Software.
>> + *
>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> +EXPRESS OR
>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>> +MERCHANTABILITY,
>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
>EVENT
>> +SHALL
>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
>DAMAGES
>> +OR OTHER
>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
>> +ARISING
>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
>> +OTHER DEALINGS
>> + * IN THE SOFTWARE.
>> + *
>> + * Authors: Anusha Srivatsa
>> + *
>> + */
>> +
>> +#include "igt.h"
>> +#include "stdio.h"
>> +#include "stdlib.h"
>> +#include "igt_sysfs.h"
>> +#include "igt_debugfs.h"
>> +#include "i915_drm.h"
>> +#include "fcntl.h"
>> +
>> +IGT_TEST_DESCRIPTION("Read contents of debugfs to check for firmware
>> +status.");
>> +
>> +static void guc_load(int drm_fd, int debugfs, int gen) {
>> +char firmware_buf[250];
>> +float fw_version_wanted;
>> +float fw_version_found;
>> +int ret;
>> +int enable_guc_loading;
>> +FILE *fp;
>> +
>> +igt_skip_on_f(gen < 6,
>> + "GuC not available on platforms prior to Skylake\n");
>> +
>> +igt_sysfs_scanf(debugfs, "i915_enable_guc_loading", "%d",
>&enable_guc_loading);
>> +igt_skip_on_f(!(enable_guc_loading < 1), "GuC loading not
>> +enabled\n");
>> +
>> +ret = igt_debugfs_open(drm_fd, "i915_guc_load_status", O_RDONLY);
>> +fp = fdopen(ret, "r");
>> +igt_fail_on_f(ret < 0, "Not able to open the debugfs file\n");
>> +
>> +igt_debugfs_read(drm_fd, "i915_guc_load_status", firmware_buf);
>> +
>> +fseek(fp, 99, SEEK_CUR);
>
>This is risky/fragile imo... any small change on debugfs this will break...
I agree totally. I am not very happy about it either. Any suggestions on
how else I can scan it?
>Have you consider the new kernel seftest thing to make the tests inside kernel
>itself without need for parse this debugfs interface?
Good point. Let me have a look at it.
Thanks a lot Rodrigo.
Anusha
>> +fscanf(fp, "%f", &fw_version_wanted);
>> +fseek(fp, 119, SEEK_SET);
>> +fscanf(fp, "%f", &fw_version_found);
>> +
>> +igt_fail_on_f((fw_version_wanted != fw_version_found),
>> + "Firmware version found not the version wanted\n");
>> +igt_fail_on_f(strstr(firmware_buf, "fetch: NONE"),
>> + "Firmware not fetched\n");
>> +igt_fail_on_f(strstr(firmware_buf, "fetch: SUCCESS") &&
>> + strstr(firmware_buf, "load: NONE "),
>> + "Firmware not loaded\n");
>> +}
>> +
>> +int drm_fd;
>> +int debugfs;
>> +int gen;
>> +
>> +igt_main
>> +{
>> +igt_skip_on_simulation();
>> +
Re: [Intel-gfx] [PATCH] e1000e: Taint a HW lockup
Quoting Chris Wilson (2017-12-05 18:00:00) > When we see an e1000e HW lockup in CI, it is typically fatal with the > hang repeating until the host is forcibly rebooted. Speed up that > process by tainting the kernel, which CI can trivially detect (and is > being used to detect similarly fatal CI conditions) and reboot soon > after. > > Signed-off-by: Chris Wilson > Cc: Daniel Vetter > Cc: Tomi Sarvela I'm not concerned on selling this to e1000e, but if it helps improving CI robustness, then topic/core-for-CI. Or maybe we should create a new topic, Daniel? topic/taints-for-CI? -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property
Hi! > >> > Why would user of the machine want this to be something else than > >> > 'OFF'? > >> > > >> > If kernel implements this, will it mean hardware vendors will have to > >> > prevent user from updating kernel on machines they own? > >> > > >> > If this is merged, does it open kernel developers to DMCA threats if > >> > they try to change it? > >> > >> Because this just implements one part of the content protection scheme. > >> This only gives you an option to enable HDCP (aka encryption, it's really > >> nothing else) on the cable. Just because it has Content Protection in the > >> name does _not_ mean it is (stand-alone) an effective nor complete content > >> protection scheme. It's simply encrypting data, that's all. > > > > Yep. So my first question was: why would user of the machine ever want > > encryption "ENABLED" or "DESIRED"? Could you answer it? > > How about for sensitive video streams in government offices where you > want to avoid a spy potentially tapping the cable to see the video > stream? Except that spies already have the keys, as every monitor manufacturer has them? > >> kernels and be able to exercise their software freedoms already know to > >> avoid such locked down systems. > >> > >> So yeah it would be better to call this the "HDMI/DP cable encryption > >> support", but well, it's not what it's called really. > > > > Well, it does not belong in kernel, no matter what is the name. > > Should we remove support for encrypted file systems and encrypted > virtual machines? Just like them the option is there is you want to > use it. If you don't want to, you don't have to. Encrypted file systems benefit users. Encrypted video is designed to work against users. In particular, users don't have encryption keys for video they generate. I'd have nothing against feature that would let users encrypt video with keys they control. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html signature.asc Description: Digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] e1000e: Taint a HW lockup
When we see an e1000e HW lockup in CI, it is typically fatal with the
hang repeating until the host is forcibly rebooted. Speed up that
process by tainting the kernel, which CI can trivially detect (and is
being used to detect similarly fatal CI conditions) and reboot soon
after.
Signed-off-by: Chris Wilson
Cc: Daniel Vetter
Cc: Tomi Sarvela
---
drivers/net/ethernet/intel/e1000e/netdev.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c
b/drivers/net/ethernet/intel/e1000e/netdev.c
index 9f18d39bdc8f..bcc4b226a184 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -1170,6 +1170,8 @@ static void e1000_print_hw_hang(struct work_struct *work)
/* Suggest workaround for known h/w issue */
if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
e_err("Try turning off Tx pause (flow control) via ethtool\n");
+
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
}
/**
--
2.15.1
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Re: [Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property
On Tue, Dec 5, 2017 at 12:34 PM, Pavel Machek wrote: > On Tue 2017-12-05 11:45:38, Daniel Vetter wrote: >> On Tue, Dec 05, 2017 at 11:28:40AM +0100, Pavel Machek wrote: >> > On Wed 2017-11-29 22:08:56, Sean Paul wrote: >> > > This patch adds a new optional connector property to allow userspace to >> > > enable >> > > protection over the content it is displaying. This will typically be >> > > implemented >> > > by the driver using HDCP. >> > > >> > > The property is a tri-state with the following values: >> > > - OFF: Self explanatory, no content protection >> > > - DESIRED: Userspace requests that the driver enable protection >> > > - ENABLED: Once the driver has authenticated the link, it sets this value >> > > >> > > The driver is responsible for downgrading ENABLED to DESIRED if the link >> > > becomes >> > > unprotected. The driver should also maintain the desiredness of >> > > protection >> > > across hotplug/dpms/suspend. >> > >> > Why would user of the machine want this to be something else than >> > 'OFF'? >> > >> > If kernel implements this, will it mean hardware vendors will have to >> > prevent user from updating kernel on machines they own? >> > >> > If this is merged, does it open kernel developers to DMCA threats if >> > they try to change it? >> >> Because this just implements one part of the content protection scheme. >> This only gives you an option to enable HDCP (aka encryption, it's really >> nothing else) on the cable. Just because it has Content Protection in the >> name does _not_ mean it is (stand-alone) an effective nor complete content >> protection scheme. It's simply encrypting data, that's all. > > Yep. So my first question was: why would user of the machine ever want > encryption "ENABLED" or "DESIRED"? Could you answer it? How about for sensitive video streams in government offices where you want to avoid a spy potentially tapping the cable to see the video stream? > >> If you want to actually lock down a machine to implement content >> protection, then you need secure boot without unlockable boot-loader and a >> pile more bits in userspace. If you do all that, only then do you have >> full content protection. And yes, then you don't really own the machine >> fully, and I think users who are concerned with being able to update >> their > > Yes, so... This patch makes it more likely to see machines with locked > down kernels, preventing developers from working with systems their > own, running hardware. That is evil, and direct threat to Free > software movement. > > Users compiling their own kernels get no benefit from it. Actually it > looks like this only benefits Intel and Disney. We don't want that. And just about every SoC manufacturer and google and amazon and a ton of other companies and organizations. Who gets to decide who's benefit gets taken into account? > >> kernels and be able to exercise their software freedoms already know to >> avoid such locked down systems. >> >> So yeah it would be better to call this the "HDMI/DP cable encryption >> support", but well, it's not what it's called really. > > Well, it does not belong in kernel, no matter what is the name. Should we remove support for encrypted file systems and encrypted virtual machines? Just like them the option is there is you want to use it. If you don't want to, you don't have to. Alex ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: warning for drm/i915: Restore GT performance in headless mode with DMC loaded (rev6)
== Series Details == Series: drm/i915: Restore GT performance in headless mode with DMC loaded (rev6) URL : https://patchwork.freedesktop.org/series/24017/ State : warning == Summary == Series 24017v6 drm/i915: Restore GT performance in headless mode with DMC loaded https://patchwork.freedesktop.org/api/1.0/series/24017/revisions/6/mbox/ Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#103938 +1 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-a: pass -> DMESG-WARN (fi-kbl-r) fdo#103938 https://bugs.freedesktop.org/show_bug.cgi?id=103938 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:439s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:445s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:386s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:528s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:282s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:505s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:482s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:479s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:271s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:540s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:363s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:261s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:399s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:468s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:450s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:486s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:529s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:477s fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:534s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:589s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:455s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:543s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:568s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:513s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:507s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:451s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:549s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:413s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:616s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:629s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:489s 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest 02f30d0e595d drm/i915: Restore GT performance in headless mode with DMC loaded == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7414/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] intel/atomic: Stop updating legacy fb parameters
On Tue, Dec 05, 2017 at 06:00:20PM +0100, Daniel Vetter wrote:
> Even fbc isn't using this stuff anymore, so time to remove it.
>
> Cleaning up one small piece of the atomic conversion cruft at the time
> ...
>
> Cc: Paulo Zanoni
> Cc: Ville Syrjälä
> Cc: Maarten Lankhorst
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_display.c | 29 -
> 1 file changed, 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 1f7e312d0d0d..c883e14a06d3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10967,31 +10967,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
> return ret;
> }
>
> -static void
> -intel_modeset_update_crtc_state(struct drm_atomic_state *state)
> -{
> - struct drm_crtc *crtc;
> - struct drm_crtc_state *new_crtc_state;
> - int i;
> -
> - /* Double check state. */
> - for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
> - to_intel_crtc(crtc)->config =
> to_intel_crtc_state(new_crtc_state);
> -
> - /*
> - * Update legacy state to satisfy fbc code. This can
> - * be removed when fbc uses the atomic state.
> - */
> - if (drm_atomic_get_existing_plane_state(state, crtc->primary)) {
> - struct drm_plane_state *plane_state =
> crtc->primary->state;
> -
> - crtc->primary->fb = plane_state->fb;
> - crtc->x = plane_state->src_x >> 16;
> - crtc->y = plane_state->src_y >> 16;
crtc->x/y seem pretty safe to nuke here.
Not quite sure about plane->fb. The core still messes around with that
quite a bit. The lack of refcounting here seems strange too. I've been
actually wondering if that mess is somehow related to the fb leak we
have in CI on some machines.
> - }
> - }
> -}
> -
> static bool intel_fuzzy_clock_check(int clock1, int clock2)
> {
> int diff;
> @@ -12364,10 +12339,6 @@ static void intel_atomic_commit_tail(struct
> drm_atomic_state *state)
> }
> }
>
> - /* Only after disabling all output pipelines that will be changed can we
> - * update the the output configuration. */
> - intel_modeset_update_crtc_state(state);
> -
> if (intel_state->modeset) {
> drm_atomic_helper_update_legacy_modeset_state(state->dev,
> state);
>
> --
> 2.15.0
--
Ville Syrjälä
Intel OTC
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Re: [Intel-gfx] [RFC PATCH 1/6] drm: Add Content Protection property
On Tue 2017-12-05 11:45:38, Daniel Vetter wrote: > On Tue, Dec 05, 2017 at 11:28:40AM +0100, Pavel Machek wrote: > > On Wed 2017-11-29 22:08:56, Sean Paul wrote: > > > This patch adds a new optional connector property to allow userspace to > > > enable > > > protection over the content it is displaying. This will typically be > > > implemented > > > by the driver using HDCP. > > > > > > The property is a tri-state with the following values: > > > - OFF: Self explanatory, no content protection > > > - DESIRED: Userspace requests that the driver enable protection > > > - ENABLED: Once the driver has authenticated the link, it sets this value > > > > > > The driver is responsible for downgrading ENABLED to DESIRED if the link > > > becomes > > > unprotected. The driver should also maintain the desiredness of protection > > > across hotplug/dpms/suspend. > > > > Why would user of the machine want this to be something else than > > 'OFF'? > > > > If kernel implements this, will it mean hardware vendors will have to > > prevent user from updating kernel on machines they own? > > > > If this is merged, does it open kernel developers to DMCA threats if > > they try to change it? > > Because this just implements one part of the content protection scheme. > This only gives you an option to enable HDCP (aka encryption, it's really > nothing else) on the cable. Just because it has Content Protection in the > name does _not_ mean it is (stand-alone) an effective nor complete content > protection scheme. It's simply encrypting data, that's all. Yep. So my first question was: why would user of the machine ever want encryption "ENABLED" or "DESIRED"? Could you answer it? > If you want to actually lock down a machine to implement content > protection, then you need secure boot without unlockable boot-loader and a > pile more bits in userspace. If you do all that, only then do you have > full content protection. And yes, then you don't really own the machine > fully, and I think users who are concerned with being able to update > their Yes, so... This patch makes it more likely to see machines with locked down kernels, preventing developers from working with systems their own, running hardware. That is evil, and direct threat to Free software movement. Users compiling their own kernels get no benefit from it. Actually it looks like this only benefits Intel and Disney. We don't want that. > kernels and be able to exercise their software freedoms already know to > avoid such locked down systems. > > So yeah it would be better to call this the "HDMI/DP cable encryption > support", but well, it's not what it's called really. Well, it does not belong in kernel, no matter what is the name. Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html signature.asc Description: Digital signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 6/9] drm/i915: Make use of indexed write GMBUS feature
On Tue, Dec 05, 2017 at 12:15:05AM -0500, Sean Paul wrote:
> This patch enables the indexed write feature of the GMBUS to concatenate
> 2 consecutive messages into one. The criteria for an indexed write is
> that both messages are writes, the first is length == 1, and the second
> is length > 0. The first message is sent out by the GMBUS as the slave
> command, and the second one is sent via the GMBUS FIFO as usual.
>
> Changes in v3:
> - Added to series
>
> Suggested-by: Ville Syrjälä
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/intel_i2c.c | 39 ++-
> 1 file changed, 34 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c
> b/drivers/gpu/drm/i915/intel_i2c.c
> index 49fdf09f9919..7399009aee0a 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -373,7 +373,8 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct
> i2c_msg *msg,
>
> static int
> gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
> -unsigned short addr, u8 *buf, unsigned int len)
> +unsigned short addr, u8 *buf, unsigned int len,
> +u32 gmbus1_index)
> {
> unsigned int chunk_size = len;
> u32 val, loop;
> @@ -386,7 +387,7 @@ gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
>
> I915_WRITE_FW(GMBUS3, val);
> I915_WRITE_FW(GMBUS1,
> - GMBUS_CYCLE_WAIT |
> + gmbus1_index | GMBUS_CYCLE_WAIT |
> (chunk_size << GMBUS_BYTE_COUNT_SHIFT) |
> (addr << GMBUS_SLAVE_ADDR_SHIFT) |
> GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
> @@ -409,7 +410,8 @@ gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
> }
>
> static int
> -gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
> +gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
> + u32 gmbus1_index)
> {
> u8 *buf = msg->buf;
> unsigned int tx_size = msg->len;
> @@ -419,7 +421,8 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv,
> struct i2c_msg *msg)
> do {
> len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
>
> - ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len);
> + ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
> + gmbus1_index);
> if (ret)
> return ret;
>
> @@ -430,6 +433,14 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv,
> struct i2c_msg *msg)
> return 0;
> }
>
> +static int
> +gmbus_xfer_index_write(struct drm_i915_private *dev_priv, u8 cmd,
> +struct i2c_msg *msg)
> +{
> + u8 gmbus1_index = GMBUS_CYCLE_INDEX | (cmd << GMBUS_SLAVE_INDEX_SHIFT);
> + return gmbus_xfer_write(dev_priv, msg, gmbus1_index);
> +}
Instead of a duplicating the entire thing I'd just
- gmbus_xfer_index_read
+ gmbus_xfer_index
{
...
+ if (msgs[1].flags & I2C_M_RD)
gmbus_xfer_read()
+ else
+ gmbus_xfer_write()
...
}
Matches the current pattern better (no 'cmd' passed in), and
will give us the 2 byte index for free as well.
> +
> /*
> * The gmbus controller can combine a 1 or 2 byte write with a read that
> * immediately follows it by using an "INDEX" cycle.
> @@ -444,6 +455,20 @@ gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
> (msgs[i + 1].flags & I2C_M_RD));
> }
>
> +/*
> + * The gmbus controller can combine a 2-msg write into a single write that
> + * immediately follows it by using an "INDEX" cycle.
> + */
> +static bool
> +gmbus_is_index_write(struct i2c_msg *msgs, int i, int num)
> +{
> + return (i + 1 < num &&
> + msgs[i].addr == msgs[i + 1].addr &&
> + !(msgs[i].flags & I2C_M_RD) &&
> + !(msgs[i + 1].flags & I2C_M_RD) &&
> + (msgs[i].len == 1 || msgs[i + 1].len > 0));
Hmm. We don't have the len check for the second msg for reads. I wonder
if gmbus can actually do a zero length "read/write"?
> +}
> +
> static int
> gmbus_xfer_index_read(struct drm_i915_private *dev_priv, struct i2c_msg
> *msgs)
> {
> @@ -489,10 +514,14 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct
> i2c_msg *msgs, int num)
> if (gmbus_is_index_read(msgs, i, num)) {
> ret = gmbus_xfer_index_read(dev_priv, &msgs[i]);
> inc = 2; /* an index read is two msgs */
> + } else if (gmbus_is_index_write(msgs, i, num)) {
> + ret = gmbus_xfer_index_write(dev_priv, msgs[i].buf[0],
> + &msgs[i + 1]);
> + inc = 2; /* an index write is two msgs */
> } else if (msgs[i].flags & I2C_M_RD) {
> ret = gmbus_xfer_read(dev_priv, &msgs[i], 0);
> } else {
> -
[Intel-gfx] [PATCH v4] drm/i915: Taint (TAINT_WARN) the kernel if the GPU reset fails
History tells us that if we cannot reset the GPU now, we never will. This
then impacts everything that is run subsequently. On failing the reset,
we mark the driver as wedged, trying to prevent further execution on the
GPU, forcing userspace to fallback to using the CPU to update its
framebuffers and let the user know what happened.
We also want to go one step further and add a taint to the kernel so that
any subsequent faults can be traced back to this failure. This is
useful for CI, where if the GPU/driver fails we want to reboot and
restart testing rather than continue on into oblivion. For everyone
else, the warning taint is a testament to the system unreliability.
TAINT_WARN is used anytime a WARN() is emitted, which is suitable for
our purposes here as well; the driver/system may behave unexpectedly
after the failure.
v2: Also taint if the recovery fails (again history shows us that is
typically fatal).
v3: Use TAINT_WARN
References: https://bugs.freedesktop.org/show_bug.cgi?id=103514
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: Michał Winiarski
Reviewed-by: Joonas Lahtinen
Acked-by: Tomi Sarvela
---
drivers/gpu/drm/i915/i915_drv.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7faf20aff25a..5b1fd5f1defb 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1897,9 +1897,9 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
disable_irq(i915->drm.irq);
ret = i915_gem_reset_prepare(i915);
if (ret) {
- DRM_ERROR("GPU recovery failed\n");
+ dev_err(i915->drm.dev, "GPU recovery failed\n");
intel_gpu_reset(i915, ALL_ENGINES);
- goto error;
+ goto taint;
}
if (!intel_has_gpu_reset(i915)) {
@@ -1916,7 +1916,7 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
}
if (ret) {
dev_err(i915->drm.dev, "Failed to reset chip\n");
- goto error;
+ goto taint;
}
i915_gem_reset(i915);
@@ -1959,6 +1959,20 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
wake_up_bit(&error->flags, I915_RESET_HANDOFF);
return;
+taint:
+ /*
+* History tells us that if we cannot reset the GPU now, we
+* never will. This then impacts everything that is run
+* subsequently. On failing the reset, we mark the driver
+* as wedged, preventing further execution on the GPU.
+* We also want to go one step further and add a taint to the
+* kernel so that any subsequent faults can be traced back to
+* this failure. This is important for CI, where if the
+* GPU/driver fails we would like to reboot and restart testing
+* rather than continue on into oblivion. For everyone else,
+* the system should still plod along, but they have been warned!
+*/
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
error:
i915_gem_set_wedged(i915);
i915_gem_retire_requests(i915);
--
2.15.1
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[Intel-gfx] [PATCH v3] drm/i915: Taint (TAINT_WARN) the kernel if the GPU reset fails
History tells us that if we cannot reset the GPU now, we never will. This
then impacts everything that is run subsequently. On failing the reset,
we mark the driver as wedged, trying to prevent further execution on the
GPU, forcing userspace to fallback to using the CPU to update its
framebuffers and let the user know what happened.
We also want to go one step further and add a taint to the kernel so that
any subsequent faults can be traced back to this failure. This is
useful for CI, where if the GPU/driver fails we want to reboot and
restart testing rather than continue on into oblivion. For everyone
else, the warning taint is a testament to the system unreliability.
TAINT_WARN is used anytime a WARN() is emitted, which is suitable for
our purposes here as well; the driver/system may behave unexpectedly
after the failure.
v2: Also taint if the recovery fails (again history shows us that is
typically fatal).
v3: Use TAINT_WARN
References: https://bugs.freedesktop.org/show_bug.cgi?id=103514
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Daniel Vetter
Cc: Michał Winiarski
Reviewed-by: Joonas Lahtinen
Acked-by: Tomi Sarvela
---
drivers/gpu/drm/i915/i915_drv.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7faf20aff25a..71213c4a13a8 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1897,9 +1897,9 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
disable_irq(i915->drm.irq);
ret = i915_gem_reset_prepare(i915);
if (ret) {
- DRM_ERROR("GPU recovery failed\n");
+ dev_err(i915->drm.dev, "GPU recovery failed\n");
intel_gpu_reset(i915, ALL_ENGINES);
- goto error;
+ goto taint;
}
if (!intel_has_gpu_reset(i915)) {
@@ -1916,7 +1916,7 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
}
if (ret) {
dev_err(i915->drm.dev, "Failed to reset chip\n");
- goto error;
+ goto taint;
}
i915_gem_reset(i915);
@@ -1959,6 +1959,20 @@ void i915_reset(struct drm_i915_private *i915, unsigned
int flags)
wake_up_bit(&error->flags, I915_RESET_HANDOFF);
return;
+taint:
+ /*
+* History tells us that if we cannot reset the GPU now, we
+* never will. This then impacts everything that is run
+* subsequently. On failing the reset, we mark the driver
+* as wedged, preventing further execution on the GPU.
+* We also want to go one step further and add a taint to the
+* kernel so that any subsequent faults can be traced back to
+* this failure. This is important for CI, where if the
+* GPU/driver fails we would like to reboot and restart testing
+* rather than continue on into oblivion. For everyone else,
+* the system should still plod around, but they have been warned!
+*/
+ add_taint(TAINT_WARN, LOCKDEP_STILL_OK);
error:
i915_gem_set_wedged(i915);
i915_gem_retire_requests(i915);
--
2.15.1
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Re: [Intel-gfx] [PATCH] drm/i915: Generalize definition for crtc mask
On Tue, Dec 05, 2017 at 03:59:35PM +0200, Ville Syrjälä wrote:
> On Tue, Dec 05, 2017 at 12:15:39PM +0200, Mika Kahola wrote:
> > crtc_mask is defined explicitly defined for a certain number of pipes per
> > platform. Let's generalize this in a way that crtc_mask dependens only on
> > the number of pipes defined in device info.
> >
> > Signed-off-by: Mika Kahola
> > ---
> > drivers/gpu/drm/i915/intel_crt.c | 9 ++---
> > drivers/gpu/drm/i915/intel_ddi.c | 5 -
> > drivers/gpu/drm/i915/intel_dp.c | 12
> > drivers/gpu/drm/i915/intel_hdmi.c | 4 +++-
> > drivers/gpu/drm/i915/intel_lvds.c | 12 +++-
> > drivers/gpu/drm/i915/intel_sdvo.c | 5 -
> > drivers/gpu/drm/i915/intel_tv.c | 6 +-
> > 7 files changed, 37 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_crt.c
> > b/drivers/gpu/drm/i915/intel_crt.c
> > index 9f31aea..34f65b5 100644
> > --- a/drivers/gpu/drm/i915/intel_crt.c
> > +++ b/drivers/gpu/drm/i915/intel_crt.c
> > @@ -903,6 +903,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
> > struct intel_connector *intel_connector;
> > i915_reg_t adpa_reg;
> > u32 adpa;
> > + enum pipe pipe;
> >
> > if (HAS_PCH_SPLIT(dev_priv))
> > adpa_reg = PCH_ADPA;
> > @@ -950,10 +951,12 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
> >
> > crt->base.type = INTEL_OUTPUT_ANALOG;
> > crt->base.cloneable = (1 << INTEL_OUTPUT_DVO) | (1 <<
> > INTEL_OUTPUT_HDMI);
> > - if (IS_I830(dev_priv))
> > + if (IS_I830(dev_priv)) {
> > crt->base.crtc_mask = (1 << 0);
> > - else
> > - crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
> > + } else {
> > + for_each_pipe(dev_priv, pipe)
> > + crt->base.crtc_mask |= (1 << pipe);
> > + }
>
> The only places you have to touch are DDI and MST. None of the other
> encoder types are relevant for new platforms at all.
>
> Looks like you actually missed MST in this patch, and it looks like the
> code there is just wrong even now. It should really just set
> 'crtc_mask = BIT(pipe)' since the fake mst encoders are pipe specific.
>
> In fact I think what we should do is have a small function that filters
> out the non-existent pipes from the crtc_mask when populating
> encoder->possible_crtcs. And I wouldn't be opposed to s/1<<0/BIT(PIPE_A)/
> etc. everywhere we populate crtc_mask (maybe even s/crtc_mask/pipe_mask/
> to make it clear what we're talking about).
>
> And maybe actually get rid of crtc_mask entirely and just populate
> possible_crtcs directly (with the help of aforementioned filtering
> function).
>
> Possibly some igt would be nice to confirm that possibly_crtcs etc.
> don't advertize invalid crtc indices.
+1 on a generic (i.e. DRIVER_ANY) igt that validates the various
possible_* masks. Lots of drivers e.g. don't set anything, hooray.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [Intel-gfx] [PATCH i-g-t 2/2] kms_content_protection: Add Content Protection test
On Tue, Dec 05, 2017 at 10:22:00AM +0200, Petri Latvala wrote:
> On Tue, Dec 05, 2017 at 12:23:33AM -0500, Sean Paul wrote:
> > Pretty simple test:
> > - initializes the output
> > - clears the content protection property
> > - verifies that it clears
> > - sets the content protection property to desired
> > - verifies that it transitions to enabled
> >
> > Does this for both legacy and atomic.
> >
> > Signed-off-by: Sean Paul
> > ---
> > lib/igt_kms.c | 3 +-
> > lib/igt_kms.h | 1 +
> > tests/Makefile.sources | 1 +
> > tests/kms_content_protection.c | 128
> > +
> > tests/meson.build | 1 +
> > 5 files changed, 133 insertions(+), 1 deletion(-)
> > create mode 100644 tests/kms_content_protection.c
> >
> > diff --git a/lib/igt_kms.c b/lib/igt_kms.c
> > index 125ecb19..907db694 100644
> > --- a/lib/igt_kms.c
> > +++ b/lib/igt_kms.c
> > @@ -190,7 +190,8 @@ const char
> > *igt_connector_prop_names[IGT_NUM_CONNECTOR_PROPS] = {
> > "scaling mode",
> > "CRTC_ID",
> > "DPMS",
> > - "Broadcast RGB"
> > + "Broadcast RGB",
> > + "Content Protection"
> > };
> >
> > /*
> > diff --git a/lib/igt_kms.h b/lib/igt_kms.h
> > index 2a480bf3..93e59dc7 100644
> > --- a/lib/igt_kms.h
> > +++ b/lib/igt_kms.h
> > @@ -118,6 +118,7 @@ enum igt_atomic_connector_properties {
> > IGT_CONNECTOR_CRTC_ID,
> > IGT_CONNECTOR_DPMS,
> > IGT_CONNECTOR_BROADCAST_RGB,
> > + IGT_CONNECTOR_CONTENT_PROTECTION,
> > IGT_NUM_CONNECTOR_PROPS
> > };
> >
> > diff --git a/tests/Makefile.sources b/tests/Makefile.sources
> > index 34ca71a0..e0466411 100644
> > --- a/tests/Makefile.sources
> > +++ b/tests/Makefile.sources
> > @@ -179,6 +179,7 @@ TESTS_progs = \
> > kms_chv_cursor_fail \
> > kms_color \
> > kms_concurrent \
> > + kms_content_protection\
> > kms_crtc_background_color \
> > kms_cursor_crc \
> > kms_cursor_legacy \
> > diff --git a/tests/kms_content_protection.c b/tests/kms_content_protection.c
> > new file mode 100644
> > index ..7bfe9a69
> > --- /dev/null
> > +++ b/tests/kms_content_protection.c
> > @@ -0,0 +1,128 @@
> > +/*
> > + * Copyright © 2017 Google, Inc.
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the
> > "Software"),
> > + * to deal in the Software without restriction, including without
> > limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the
> > next
> > + * paragraph) shall be included in all copies or substantial portions of
> > the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> > OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> > DEALINGS
> > + * IN THE SOFTWARE.
> > + *
> > + */
> > +
> > +#include "igt.h"
> > +
> > +IGT_TEST_DESCRIPTION("Test content protection (HDCP)");
> > +
> > +typedef struct {
> > + int drm_fd;
> > + igt_display_t display;
> > +} data_t;
> > +
> > +static bool
> > +wait_for_prop_value(igt_output_t *output, uint64_t expected)
> > +{
> > + uint64_t val;
> > + int i;
> > +
> > + for (i = 0; i < 2000; i++) {
> > + val = igt_output_get_prop(output,
> > + IGT_CONNECTOR_CONTENT_PROTECTION);
> > + if (val == expected)
> > + return true;
> > + usleep(1000);
> > + }
> > + igt_info("prop_value mismatch %ld != %ld\n", val, expected);
> > + return false;
> > +}
> > +
> > +static void
> > +test_pipe_output(igt_display_t *display, const enum pipe pipe,
> > +igt_output_t *output, enum igt_commit_style s)
> > +{
> > + drmModeModeInfo mode;
> > + igt_plane_t *primary;
> > + struct igt_fb red;
> > + bool ret;
> > +
> > + igt_assert(kmstest_get_connector_default_mode(
> > + display->drm_fd, output->config.connector, &mode));
> > +
> > + igt_output_override_mode(output, &mode);
> > + igt_output_set_pipe(output, pipe);
> > +
> > + igt_create_color_fb(display->drm_fd, mode.hdisplay, mode.vdisplay,
> > + DRM_FORMAT_XRGB, LOCAL_DRM_FORMAT_MOD_NONE,
> > + 1.f, 0.f, 0.f, &red);
> > + primary = igt_output_get_plane_type(output, DRM_PL
[Intel-gfx] ✗ Fi.CI.BAT: warning for series starting with [v3,1/8] drm/i915/huc: Move firmware selection to init_early
== Series Details == Series: series starting with [v3,1/8] drm/i915/huc: Move firmware selection to init_early URL : https://patchwork.freedesktop.org/series/34919/ State : warning == Summary == Series 34919v1 series starting with [v3,1/8] drm/i915/huc: Move firmware selection to init_early https://patchwork.freedesktop.org/api/1.0/series/34919/revisions/1/mbox/ Test debugfs_test: Subgroup read_all_entries: pass -> DMESG-WARN (fi-skl-6260u) pass -> DMESG-WARN (fi-skl-6600u) pass -> DMESG-WARN (fi-skl-6700hq) pass -> DMESG-WARN (fi-skl-6700k) pass -> DMESG-WARN (fi-skl-6770hq) pass -> DMESG-WARN (fi-skl-gvtdvm) pass -> DMESG-WARN (fi-bxt-j4205) pass -> DMESG-WARN (fi-kbl-7500u) fdo#103285 pass -> DMESG-WARN (fi-kbl-7560u) pass -> DMESG-WARN (fi-kbl-7567u) pass -> DMESG-WARN (fi-kbl-r) Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-c: pass -> INCOMPLETE (fi-hsw-4770) fdo#103375 fdo#103285 https://bugs.freedesktop.org/show_bug.cgi?id=103285 fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:439s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:381s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:515s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:281s fi-bxt-j4205 total:288 pass:258 dwarn:1 dfail:0 fail:0 skip:29 time:484s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:489s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:467s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:272s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:539s fi-hsw-4770 total:246 pass:222 dwarn:0 dfail:0 fail:0 skip:23 fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:258s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:398s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:483s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:444s fi-kbl-7500u total:288 pass:262 dwarn:2 dfail:0 fail:0 skip:24 time:469s fi-kbl-7560u total:288 pass:268 dwarn:1 dfail:0 fail:0 skip:19 time:514s fi-kbl-7567u total:288 pass:267 dwarn:1 dfail:0 fail:0 skip:20 time:462s fi-kbl-r total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:522s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:590s fi-skl-6260u total:288 pass:267 dwarn:1 dfail:0 fail:0 skip:20 time:432s fi-skl-6600u total:288 pass:260 dwarn:1 dfail:0 fail:0 skip:27 time:526s fi-skl-6700hqtotal:288 pass:261 dwarn:1 dfail:0 fail:0 skip:26 time:557s fi-skl-6700k total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:499s fi-skl-6770hqtotal:288 pass:267 dwarn:1 dfail:0 fail:0 skip:20 time:487s fi-skl-gvtdvmtotal:288 pass:264 dwarn:1 dfail:0 fail:0 skip:23 time:442s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:417s Blacklisted hosts: fi-cfl-s2total:288 pass:261 dwarn:1 dfail:0 fail:0 skip:26 time:601s fi-cnl-y total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:640s fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:488s fi-bdw-gvtdvm failed to collect. IGT log at Patchwork_7413/fi-bdw-gvtdvm/igt.log fi-bxt-dsi failed to collect. IGT log at Patchwork_7413/fi-bxt-dsi/igt.log fi-snb-2520m failed to collect. IGT log at Patchwork_7413/fi-snb-2520m/igt.log 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest e3794fa68059 HAX enable GuC/HuC load e1cba63a03bc drm/i915/huc: Load HuC only if requested 8f18d9dfba70 drm/i915/guc: Combine enable_guc_loading|submission modparams 1c7710c959f8 drm/i915/uc: Don't use -EIO to report missing firmware ee26419440d7 drm/i915/uc: Don't fetch GuC firmware if no plan to use GuC a9cbe0b82523 drm/i915/guc: Introduce USES_GUC_xxx helper macros ea46ab5331e9 drm/i915/guc: Move firmware selection to init_early 02c22700f17b drm/i915/huc: Move firmware selection to init_early == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7413/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listin
Re: [Intel-gfx] [PATCH v3 2/9] drm/i915: Add more control to wait_for routines
On Tue, Dec 05, 2017 at 12:15:01AM -0500, Sean Paul wrote:
> This patch adds a little more control to a couple wait_for routines such
> that we can avoid open-coding read/wait/timeout patterns which:
> - need the value of the register after the wait_for
> - run arbitrary operation for the read portion
>
> This patch also chooses the correct sleep function (based on
> timers-howto.txt) for the polling interval the caller specifies.
>
> Changes in v2:
> - Added to the series
> Changes in v3:
> - Rebased on drm-intel-next-queued and the new Wmin/max _wait_for
> - Removed msleep option
>
> Suggested-by: Chris Wilson
> Signed-off-by: Sean Paul
Patches 1&2:
Reviewed-by: Daniel Vetter
I can't find the dang docs for patch 3 ... needs a bit of digging or a
different victim.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_drv.h| 17 ++---
> drivers/gpu/drm/i915/intel_uncore.c | 23 ---
> drivers/gpu/drm/i915/intel_uncore.h | 14 +-
> 3 files changed, 39 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 64426d3e078e..852b3d161754 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -41,20 +41,21 @@
> #include
>
> /**
> - * _wait_for - magic (register) wait macro
> + * __wait_for - magic wait macro
> *
> - * Does the right thing for modeset paths when run under kdgb or similar
> atomic
> - * contexts. Note that it's important that we check the condition again after
> - * having timed out, since the timeout could be due to preemption or similar
> and
> - * we've never had a chance to check the condition before the timeout.
> + * Macro to help avoid open coding check/wait/timeout patterns. Note that
> it's
> + * important that we check the condition again after having timed out, since
> the
> + * timeout could be due to preemption or similar and we've never had a
> chance to
> + * check the condition before the timeout.
> */
> -#define _wait_for(COND, US, Wmin, Wmax) ({ \
> +#define __wait_for(OP, COND, US, Wmin, Wmax) ({ \
> unsigned long timeout__ = jiffies + usecs_to_jiffies(US) + 1; \
> long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \
> int ret__; \
> might_sleep(); \
> for (;;) { \
> bool expired__ = time_after(jiffies, timeout__);\
> + OP; \
> if (COND) { \
> ret__ = 0; \
> break; \
> @@ -70,7 +71,9 @@
> ret__; \
> })
>
> -#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
> +#define _wait_for(COND, US, Wmin, Wmax) __wait_for(;, (COND), (US),
> (Wmin), \
> +(Wmax))
> +#define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000)
>
> /* If CONFIG_PREEMPT_COUNT is disabled, in_atomic() always reports false. */
> #if defined(CONFIG_DRM_I915_DEBUG) && defined(CONFIG_PREEMPT_COUNT)
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
> b/drivers/gpu/drm/i915/intel_uncore.c
> index b4621271e7a2..9c7d07151f16 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1770,12 +1770,14 @@ int __intel_wait_for_register_fw(struct
> drm_i915_private *dev_priv,
> }
>
> /**
> - * intel_wait_for_register - wait until register matches expected state
> + * __intel_wait_for_register - wait until register matches expected state
> * @dev_priv: the i915 device
> * @reg: the register to read
> * @mask: mask to apply to register value
> * @value: expected value
> - * @timeout_ms: timeout in millisecond
> + * @fast_timeout_us: fast timeout in microsecond for atomic/tight wait
> + * @slow_timeout_ms: slow timeout in millisecond
> + * @out_value: optional placeholder to hold registry value
> *
> * This routine waits until the target register @reg contains the expected
> * @value after applying the @mask, i.e. it waits until ::
> @@ -1786,15 +1788,18 @@ int __intel_wait_for_register_fw(struct
> drm_i915_private *dev_priv,
> *
> * Returns 0 if the register matches the desired condition, or -ETIMEOUT.
> */
> -int intel_wait_for_register(struct drm_i915_private *dev_priv,
> +int __intel_wait_for_register(struct drm_i915_private *dev_priv,
> i915_reg_t reg,
> u32 mask,
> u32 value,
> - unsigned int timeout_ms)
> + unsigned int fast_timeout_us,
> +
Re: [Intel-gfx] [PATCH v3 9/9] drm/i915: Implement HDCP for DisplayPort
On Tue, Dec 05, 2017 at 12:15:08AM -0500, Sean Paul wrote:
> This patch adds HDCP support for DisplayPort connectors by implementing
> the intel_hdcp_shim.
>
> Most of this is straightforward read/write from/to DPCD registers. One
> thing worth pointing out is the Aksv output bit. It wasn't easily
> separable like it's HDMI counterpart, so it's crammed in with the rest
> of it.
>
> Changes in v2:
> - Moved intel_hdcp_check_link out of intel_dp_check_link and only call
> it on short pulse. Since intel_hdcp_check_link does its own locking,
> this ensures we don't deadlock when intel_dp_check_link is called
> holding connection_mutex.
> - Rebased on drm-intel-next
> Changes in v3:
> - Initialize new worker
> - Move intel_hdcp_check_link further out to avoid calling it while
> holding _any_ locks
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/intel_dp.c | 248
> ++--
> 1 file changed, 241 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c603d4c903e1..dc303e18c1dd 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -36,7 +36,9 @@
> #include
> #include
> #include
> +#include
> #include
> +#include
> #include "intel_drv.h"
> #include
> #include "i915_drv.h"
> @@ -1025,10 +1027,29 @@ static uint32_t skl_get_aux_send_ctl(struct intel_dp
> *intel_dp,
> DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
> }
>
> +static uint32_t intel_dp_get_aux_send_ctl(struct intel_dp *intel_dp,
> + bool has_aux_irq,
> + int send_bytes,
> + uint32_t aux_clock_divider,
> + bool aksv_write)
> +{
> + uint32_t val = 0;
> +
> + if (aksv_write) {
> + send_bytes += 5;
> + val |= DP_AUX_CH_CTL_AUX_AKSV_SELECT;
> + }
> +
> + return val | intel_dp->get_aux_send_ctl(intel_dp,
> + has_aux_irq,
> + send_bytes,
> + aux_clock_divider);
> +}
> +
> static int
> intel_dp_aux_ch(struct intel_dp *intel_dp,
> const uint8_t *send, int send_bytes,
> - uint8_t *recv, int recv_size)
> + uint8_t *recv, int recv_size, bool aksv_write)
> {
> struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> struct drm_i915_private *dev_priv =
> @@ -1088,10 +1109,11 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
> }
>
> while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp,
> clock++))) {
> - u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,
> - has_aux_irq,
> - send_bytes,
> - aux_clock_divider);
> + u32 send_ctl = intel_dp_get_aux_send_ctl(intel_dp,
> + has_aux_irq,
> + send_bytes,
> + aux_clock_divider,
> + aksv_write);
>
> /* Must try at least 3 times according to DP spec */
> for (try = 0; try < 5; try++) {
> @@ -1228,7 +1250,8 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct
> drm_dp_aux_msg *msg)
> if (msg->buffer)
> memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
>
> - ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize);
> + ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize,
> + false);
> if (ret > 0) {
> msg->reply = rxbuf[0] >> 4;
>
> @@ -1250,7 +1273,8 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct
> drm_dp_aux_msg *msg)
> if (WARN_ON(rxsize > 20))
> return -E2BIG;
>
> - ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize);
> + ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize,
> + false);
> if (ret > 0) {
> msg->reply = rxbuf[0] >> 4;
> /*
> @@ -4981,6 +5005,203 @@ void intel_dp_encoder_suspend(struct intel_encoder
> *intel_encoder)
> pps_unlock(intel_dp);
> }
>
> +static
> +int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *intel_dig_port,
> + u8 *an)
> +{
> + struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);
> + uint8_t txbuf[4], rxbuf[2], reply = 0;
> + ssize_t dpcd_ret;
> + int ret;
> +
> + /* Output An
Re: [Intel-gfx] [PATCH v2] drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails
Quoting Chris Wilson (2017-11-29 14:05:33) > History tells us that if we cannot reset the GPU now, we never will. This > then impacts everything that is run subsequently. On failing the reset, > we mark the driver as wedged, trying to prevent further execution on the > GPU, forcing userspace to fallback to using the CPU to update its > framebuffers and let the user know what happened. > > We also want to go one step further and add a taint to the kernel so that > any subsequent faults can be traced back to this failure. This is > important for igt, where if the GPU/driver fails we want to reboot and > restart testing rather than continue on into oblivion. > > TAINT_DIE is colloquially known as "system on fire", which seems > appropriate for unresponsive hardware. > > v2: Also taint if the recovery fails (again history shows us that is > typically fatal). > > References: https://bugs.freedesktop.org/show_bug.cgi?id=103514 > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala > Cc: Daniel Vetter > Cc: Michał Winiarski irc Acked-by: Tomi Sarvela -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v3 8/9] drm/i915: Implement HDCP for HDMI
On Tue, Dec 05, 2017 at 12:15:07AM -0500, Sean Paul wrote:
> This patch adds HDCP support for HDMI connectors by implementing
> the intel_hdcp_shim.
>
> Nothing too special, just a bunch of DDC reads/writes.
>
> Changes in v2:
> - Rebased on drm-intel-next
> Changes in v3:
> - Initialize new worker
>
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_ddi.c | 50
> drivers/gpu/drm/i915/intel_drv.h | 2 +
> drivers/gpu/drm/i915/intel_hdmi.c | 257
> ++
> 4 files changed, 310 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 107e16392710..79944ab4218a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8450,6 +8450,7 @@ enum skl_power_gate {
> #define TRANS_DDI_EDP_INPUT_A_ONOFF (4<<12)
> #define TRANS_DDI_EDP_INPUT_B_ONOFF (5<<12)
> #define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12)
> +#define TRANS_DDI_HDCP_SIGNALLING (1<<9)
> #define TRANS_DDI_DP_VC_PAYLOAD_ALLOC (1<<8)
> #define TRANS_DDI_HDMI_SCRAMBLER_CTS_ENABLE (1<<7)
> #define TRANS_DDI_HDMI_SCRAMBLER_RESET_FREQ (1<<6)
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> b/drivers/gpu/drm/i915/intel_ddi.c
> index eff3b51872eb..a179fd9968a5 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1615,6 +1615,56 @@ void intel_ddi_disable_transcoder_func(struct
> drm_i915_private *dev_priv,
> I915_WRITE(reg, val);
> }
>
> +int intel_ddi_disable_hdcp_signalling(struct intel_encoder *intel_encoder)
> +{
> + struct drm_device *dev = intel_encoder->base.dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + enum pipe pipe = 0;
> + int ret = 0;
> + uint32_t tmp;
> +
> + if (!intel_display_power_get_if_enabled(dev_priv,
> + intel_encoder->power_domain))
> + return -ENXIO;
> +
> + if (!intel_encoder->get_hw_state(intel_encoder, &pipe)) {
> + ret = -EIO;
> + goto out;
> + }
Hm, do we really need these checks here? With the new worker design I
think they'd indicate a synchronization bug (misplaced
cancel_delayed_work_sync probably).
If you want to keep them for safetey please wrap in a WARN_ON. Same for
the one below.
Otherwise looks all good to me.
> +
> + tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe));
> + tmp &= ~TRANS_DDI_HDCP_SIGNALLING;
> + I915_WRITE(TRANS_DDI_FUNC_CTL(pipe), tmp);
> +out:
> + intel_display_power_put(dev_priv, intel_encoder->power_domain);
> + return ret;
> +}
> +
> +int intel_ddi_enable_hdcp_signalling(struct intel_encoder *intel_encoder)
> +{
> + struct drm_device *dev = intel_encoder->base.dev;
> + struct drm_i915_private *dev_priv = to_i915(dev);
> + enum pipe pipe = 0;
> + int ret = 0;
> + uint32_t tmp;
> +
> + if (!intel_display_power_get_if_enabled(dev_priv,
> + intel_encoder->power_domain))
> + return -ENXIO;
> +
> + if (!intel_encoder->get_hw_state(intel_encoder, &pipe)) {
> + ret = -EIO;
> + goto out;
> + }
> +
> + tmp = I915_READ(TRANS_DDI_FUNC_CTL(pipe));
> + tmp |= TRANS_DDI_HDCP_SIGNALLING;
> + I915_WRITE(TRANS_DDI_FUNC_CTL(pipe), tmp);
> +out:
> + intel_display_power_put(dev_priv, intel_encoder->power_domain);
> + return ret;
> +}
> +
> bool intel_ddi_connector_get_hw_state(struct intel_connector
> *intel_connector)
> {
> struct drm_device *dev = intel_connector->base.dev;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 6f47a4227f5f..0b4405f3e988 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1379,6 +1379,8 @@ void intel_ddi_compute_min_voltage_level(struct
> drm_i915_private *dev_priv,
> u32 bxt_signal_levels(struct intel_dp *intel_dp);
> uint32_t ddi_signal_levels(struct intel_dp *intel_dp);
> u8 intel_ddi_dp_voltage_max(struct intel_encoder *encoder);
> +int intel_ddi_enable_hdcp_signalling(struct intel_encoder *intel_encoder);
> +int intel_ddi_disable_hdcp_signalling(struct intel_encoder *intel_encoder);
>
> unsigned int intel_fb_align_height(const struct drm_framebuffer *fb,
> int plane, unsigned int height);
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 9d5e72728475..17a525b9fcf9 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -34,6 +34,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include "intel_drv.h"
> #include
> @@ -873,6 +874,252 @@ void intel_dp_dual_mode_set_tmds_output(struct
> intel_hdmi *hdmi, bool enable)
>adapter, enable);
> }
>
> +static int intel_hdmi_hdcp_read(stru
Re: [Intel-gfx] [PATCH v3 7/9] drm/i915: Add function to output Aksv over GMBUS
On Tue, Dec 05, 2017 at 12:15:06AM -0500, Sean Paul wrote:
> Once the Aksv is available in the PCH, we need to get it on the wire to
> the receiver via DDC. The hardware doesn't allow us to read the value
> directly, so we need to tell GMBUS to source the Aksv internally and
> send it to the right offset on the receiver.
>
> The way we do this is to initiate an indexed write where the index is
> the Aksv register offset. We write dummy values to GMBUS3 as if we were
> sending the key, and the hardware slips in the "real" values when it
> goes out.
>
> Changes in v2:
> - None
> Changes in v3:
> - Uses new index write feature (Ville)
>
> Cc: Ville Syrjälä
> Signed-off-by: Sean Paul
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_i2c.c | 47
> +---
> 3 files changed, 46 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index bddd65839f60..6b39081c5e53 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -4049,6 +4049,7 @@ extern int intel_setup_gmbus(struct drm_i915_private
> *dev_priv);
> extern void intel_teardown_gmbus(struct drm_i915_private *dev_priv);
> extern bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
>unsigned int pin);
> +extern int intel_gmbus_output_aksv(struct i2c_adapter *adapter);
>
> extern struct i2c_adapter *
> intel_gmbus_get_adapter(struct drm_i915_private *dev_priv, unsigned int pin);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2bd2cc8441d4..107e16392710 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3043,6 +3043,7 @@ enum i915_power_well_id {
> # define GPIO_DATA_PULLUP_DISABLE(1 << 13)
>
> #define GMBUS0 _MMIO(dev_priv->gpio_mmio_base +
> 0x5100) /* clock/port select */
> +#define GMBUS_AKSV_SELECT (1<<11)
> #define GMBUS_RATE_100KHZ (0<<8)
> #define GMBUS_RATE_50KHZ (1<<8)
> #define GMBUS_RATE_400KHZ (2<<8) /* reserved on Pineview */
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c
> b/drivers/gpu/drm/i915/intel_i2c.c
> index 7399009aee0a..0a4c7486fc7b 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -30,6 +30,7 @@
> #include
> #include
> #include
> +#include
> #include "intel_drv.h"
> #include
> #include "i915_drv.h"
> @@ -497,7 +498,8 @@ gmbus_xfer_index_read(struct drm_i915_private *dev_priv,
> struct i2c_msg *msgs)
> }
>
> static int
> -do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
> +do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num,
> + u32 gmbus0_source)
> {
> struct intel_gmbus *bus = container_of(adapter,
> struct intel_gmbus,
> @@ -507,7 +509,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg
> *msgs, int num)
> int ret = 0;
>
> retry:
> - I915_WRITE_FW(GMBUS0, bus->reg0);
> + I915_WRITE_FW(GMBUS0, gmbus0_source | bus->reg0);
>
> for (; i < num; i += inc) {
> inc = 1;
> @@ -629,7 +631,7 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg
> *msgs, int num)
> if (ret < 0)
> bus->force_bit &= ~GMBUS_FORCE_BIT_RETRY;
> } else {
> - ret = do_gmbus_xfer(adapter, msgs, num);
> + ret = do_gmbus_xfer(adapter, msgs, num, 0);
> if (ret == -EAGAIN)
> bus->force_bit |= GMBUS_FORCE_BIT_RETRY;
> }
> @@ -639,6 +641,45 @@ gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg
> *msgs, int num)
> return ret;
> }
>
> +int intel_gmbus_output_aksv(struct i2c_adapter *adapter)
> +{
> + struct intel_gmbus *bus = container_of(adapter, struct intel_gmbus,
> +adapter);
> + struct drm_i915_private *dev_priv = bus->dev_priv;
> + int ret;
> + u8 cmd = DRM_HDCP_DDC_AKSV ;
> + u8 buf[DRM_HDCP_KSV_LEN] = { 0 };
> + struct i2c_msg msgs[] = {
> + {
> + .addr = DRM_HDCP_DDC_ADDR,
> + .flags = 0,
> + .len = sizeof(cmd),
> + .buf = &cmd,
> + },
> + {
> + .addr = DRM_HDCP_DDC_ADDR,
> + .flags = 0,
> + .len = sizeof(buf),
> + .buf = buf,
> + }
> + };
> +
> + intel_display_power_get(dev_priv, POWER_DOMAIN_GMBUS);
> + mutex_lock(&dev_priv->gmbus_mutex);
> +
> + /*
> + * In order to output Aksv to the receiver, use an indexed write to
> + * pass the i2c command, and tell GMBUS to use the HW-provided value
> + * instead of sourc
Re: [Intel-gfx] [PATCH v3 6/9] drm/i915: Make use of indexed write GMBUS feature
On Tue, Dec 05, 2017 at 12:15:05AM -0500, Sean Paul wrote:
> This patch enables the indexed write feature of the GMBUS to concatenate
> 2 consecutive messages into one. The criteria for an indexed write is
> that both messages are writes, the first is length == 1, and the second
> is length > 0. The first message is sent out by the GMBUS as the slave
> command, and the second one is sent via the GMBUS FIFO as usual.
>
> Changes in v3:
> - Added to series
>
> Suggested-by: Ville Syrjälä
> Signed-off-by: Sean Paul
lgtm. Will probably never see a user except the aksv write, but oh well
:-)
Reviewed-by: Daniel Vetter
> ---
> drivers/gpu/drm/i915/intel_i2c.c | 39 ++-
> 1 file changed, 34 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c
> b/drivers/gpu/drm/i915/intel_i2c.c
> index 49fdf09f9919..7399009aee0a 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -373,7 +373,8 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct
> i2c_msg *msg,
>
> static int
> gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
> -unsigned short addr, u8 *buf, unsigned int len)
> +unsigned short addr, u8 *buf, unsigned int len,
> +u32 gmbus1_index)
> {
> unsigned int chunk_size = len;
> u32 val, loop;
> @@ -386,7 +387,7 @@ gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
>
> I915_WRITE_FW(GMBUS3, val);
> I915_WRITE_FW(GMBUS1,
> - GMBUS_CYCLE_WAIT |
> + gmbus1_index | GMBUS_CYCLE_WAIT |
> (chunk_size << GMBUS_BYTE_COUNT_SHIFT) |
> (addr << GMBUS_SLAVE_ADDR_SHIFT) |
> GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
> @@ -409,7 +410,8 @@ gmbus_xfer_write_chunk(struct drm_i915_private *dev_priv,
> }
>
> static int
> -gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
> +gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
> + u32 gmbus1_index)
> {
> u8 *buf = msg->buf;
> unsigned int tx_size = msg->len;
> @@ -419,7 +421,8 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv,
> struct i2c_msg *msg)
> do {
> len = min(tx_size, GMBUS_BYTE_COUNT_MAX);
>
> - ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len);
> + ret = gmbus_xfer_write_chunk(dev_priv, msg->addr, buf, len,
> + gmbus1_index);
> if (ret)
> return ret;
>
> @@ -430,6 +433,14 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv,
> struct i2c_msg *msg)
> return 0;
> }
>
> +static int
> +gmbus_xfer_index_write(struct drm_i915_private *dev_priv, u8 cmd,
> +struct i2c_msg *msg)
> +{
> + u8 gmbus1_index = GMBUS_CYCLE_INDEX | (cmd << GMBUS_SLAVE_INDEX_SHIFT);
> + return gmbus_xfer_write(dev_priv, msg, gmbus1_index);
> +}
> +
> /*
> * The gmbus controller can combine a 1 or 2 byte write with a read that
> * immediately follows it by using an "INDEX" cycle.
> @@ -444,6 +455,20 @@ gmbus_is_index_read(struct i2c_msg *msgs, int i, int num)
> (msgs[i + 1].flags & I2C_M_RD));
> }
>
> +/*
> + * The gmbus controller can combine a 2-msg write into a single write that
> + * immediately follows it by using an "INDEX" cycle.
> + */
> +static bool
> +gmbus_is_index_write(struct i2c_msg *msgs, int i, int num)
> +{
> + return (i + 1 < num &&
> + msgs[i].addr == msgs[i + 1].addr &&
> + !(msgs[i].flags & I2C_M_RD) &&
> + !(msgs[i + 1].flags & I2C_M_RD) &&
> + (msgs[i].len == 1 || msgs[i + 1].len > 0));
> +}
> +
> static int
> gmbus_xfer_index_read(struct drm_i915_private *dev_priv, struct i2c_msg
> *msgs)
> {
> @@ -489,10 +514,14 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct
> i2c_msg *msgs, int num)
> if (gmbus_is_index_read(msgs, i, num)) {
> ret = gmbus_xfer_index_read(dev_priv, &msgs[i]);
> inc = 2; /* an index read is two msgs */
> + } else if (gmbus_is_index_write(msgs, i, num)) {
> + ret = gmbus_xfer_index_write(dev_priv, msgs[i].buf[0],
> + &msgs[i + 1]);
> + inc = 2; /* an index write is two msgs */
> } else if (msgs[i].flags & I2C_M_RD) {
> ret = gmbus_xfer_read(dev_priv, &msgs[i], 0);
> } else {
> - ret = gmbus_xfer_write(dev_priv, &msgs[i]);
> + ret = gmbus_xfer_write(dev_priv, &msgs[i], 0);
> }
>
> if (!ret)
> --
> 2.15.0.531.g2ccb3012c9-goog
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailma
Re: [Intel-gfx] [PATCH v3 5/9] drm/i915: Add HDCP framework + base implementation
On Tue, Dec 05, 2017 at 12:15:04AM -0500, Sean Paul wrote:
> This patch adds the framework required to add HDCP support to intel
> connectors. It implements Aksv loading from fuse, and parts 1/2/3
> of the HDCP authentication scheme.
>
> Note that without shim implementations, this does not actually implement
> HDCP. That will come in subsequent patches.
>
> Changes in v2:
> - Don't open code wait_fors (Chris)
> - drm_hdcp.c under MIT license (Daniel)
> - Move intel_hdcp_disable() call above ddi_disable (Ram)
> - Fix // comments (I wore a cone of shame for 12 hours to atone) (Daniel)
> - Justify intel_hdcp_shim with comments (Daniel)
> - Fixed async locking issues by adding hdcp_mutex (Daniel)
> - Don't alter connector_state in enable/disable (Daniel)
> Changes in v3:
> - Added hdcp_mutex/hdcp_value to make async reasonable
> - Added hdcp_prop_work to separate link checking & property setting
> - Added new helper for atomic_check state tracking (Daniel)
> - Moved enable/disable into atomic_commit with matching helpers
> - Moved intel_hdcp_check_link out of all locks when called from dp
> - Bumped up ksv_fifo timeout (noticed failure on one of my dongles)
>
> Cc: Chris Wilson
> Cc: Daniel Vetter
> Cc: Ramalingam C
> Signed-off-by: Sean Paul
> ---
> drivers/gpu/drm/i915/Makefile| 1 +
> drivers/gpu/drm/i915/i915_reg.h | 83
> drivers/gpu/drm/i915/intel_atomic.c | 2 +
> drivers/gpu/drm/i915/intel_display.c | 14 +
> drivers/gpu/drm/i915/intel_drv.h | 88 +
> drivers/gpu/drm/i915/intel_hdcp.c| 731
> +++
> 6 files changed, 919 insertions(+)
> create mode 100644 drivers/gpu/drm/i915/intel_hdcp.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 42bc8bd4ff06..3facea4eefdb 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -107,6 +107,7 @@ i915-y += intel_audio.o \
> intel_fbc.o \
> intel_fifo_underrun.o \
> intel_frontbuffer.o \
> + intel_hdcp.o \
> intel_hotplug.o \
> intel_modes.o \
> intel_overlay.o \
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 09bf043c1c2e..2bd2cc8441d4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8034,6 +8034,7 @@ enum {
> #define GEN9_MEM_LATENCY_LEVEL_1_5_SHIFT 8
> #define GEN9_MEM_LATENCY_LEVEL_2_6_SHIFT 16
> #define GEN9_MEM_LATENCY_LEVEL_3_7_SHIFT 24
> +#define SKL_PCODE_LOAD_HDCP_KEYS 0x5
SKL_ prefix feels right here, since this is for skl, kbl, ... only, and
doesn't apply to bxt. So not gen9 stuff.
> #define SKL_PCODE_CDCLK_CONTROL0x7
> #define SKL_CDCLK_PREPARE_FOR_CHANGE 0x3
> #define SKL_CDCLK_READY_FOR_CHANGE 0x1
> @@ -8335,6 +8336,88 @@ enum skl_power_gate {
> #define SKL_PW_TO_PG(pw)((pw) - SKL_DISP_PW_1 + SKL_PG1)
> #define SKL_FUSE_PG_DIST_STATUS(pg) (1 << (27 - (pg)))
>
> +
> +/* HDCP Key Registers */
> +#define SKL_HDCP_KEY_CONF_MMIO(0x66c00)
> +#define SKL_HDCP_AKSV_SEND_TRIGGER BIT(31)
> +#define SKL_HDCP_CLEAR_KEYS_TRIGGER BIT(30)
> +#define SKL_HDCP_KEY_STATUS _MMIO(0x66c04)
> +#define SKL_HDCP_FUSE_IN_PROGRESS BIT(7)
> +#define SKL_HDCP_FUSE_ERROR BIT(6)
> +#define SKL_HDCP_FUSE_DONE BIT(5)
> +#define SKL_HDCP_KEY_LOAD_STATUSBIT(1)
> +#define SKL_HDCP_KEY_LOAD_DONE BIT(0)
> +#define SKL_HDCP_AKSV_LO _MMIO(0x66c10)
> +#define SKL_HDCP_AKSV_HI _MMIO(0x66c14)
> +
> +/* HDCP Repeater Registers */
> +#define SKL_HDCP_REP_CTL _MMIO(0x66d00)
> +#define SKL_HDCP_DDIB_REP_PRESENT BIT(30)
> +#define SKL_HDCP_DDIB_REP_PRESENT BIT(30)
> +#define SKL_HDCP_DDIA_REP_PRESENT BIT(29)
> +#define SKL_HDCP_DDIC_REP_PRESENT BIT(28)
> +#define SKL_HDCP_DDID_REP_PRESENT BIT(27)
> +#define SKL_HDCP_DDIF_REP_PRESENT BIT(26)
> +#define SKL_HDCP_DDIE_REP_PRESENT BIT(25)
> +#define SKL_HDCP_DDIB_SHA1_M0 (1 << 20)
> +#define SKL_HDCP_DDIA_SHA1_M0 (2 << 20)
> +#define SKL_HDCP_DDIC_SHA1_M0 (3 << 20)
> +#define SKL_HDCP_DDID_SHA1_M0 (4 << 20)
> +#define SKL_HDCP_DDIF_SHA1_M0 (5 << 20)
> +#define SKL_HDCP_DDIE_SHA1_M0 (6 << 20) /* Bspec says 5? */
Yeah that's one good wtf :-)
> +#define SKL_HDCP_SHA1_BUSY BIT(16)
> +#define SKL_HDCP_SHA1_READY BIT(17)
> +#define SKL_HDCP_SHA1_COMPLETE BIT(18)
> +#define SKL_HDCP_SHA1_V_MATCH BIT(19)
> +#define SKL_HDCP_SHA1_TEXT_32 (1 << 1)
> +#define SKL_HDCP_SHA1_COMPLETE_HASH (2 << 1)
> +#define SKL_HDCP_SHA1_TEXT_24 (4 << 1)
> +#define SKL_HDCP_SHA1_TEXT_16 (5 << 1)
> +#define SKL_HDCP_SHA1_TEXT_8(6 << 1)
> +#define SKL_HDCP_SHA1_TEXT
[Intel-gfx] [PATCH] intel/atomic: Stop updating legacy fb parameters
Even fbc isn't using this stuff anymore, so time to remove it.
Cleaning up one small piece of the atomic conversion cruft at the time
...
Cc: Paulo Zanoni
Cc: Ville Syrjälä
Cc: Maarten Lankhorst
Signed-off-by: Daniel Vetter
---
drivers/gpu/drm/i915/intel_display.c | 29 -
1 file changed, 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 1f7e312d0d0d..c883e14a06d3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10967,31 +10967,6 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
return ret;
}
-static void
-intel_modeset_update_crtc_state(struct drm_atomic_state *state)
-{
- struct drm_crtc *crtc;
- struct drm_crtc_state *new_crtc_state;
- int i;
-
- /* Double check state. */
- for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
- to_intel_crtc(crtc)->config =
to_intel_crtc_state(new_crtc_state);
-
- /*
-* Update legacy state to satisfy fbc code. This can
-* be removed when fbc uses the atomic state.
-*/
- if (drm_atomic_get_existing_plane_state(state, crtc->primary)) {
- struct drm_plane_state *plane_state =
crtc->primary->state;
-
- crtc->primary->fb = plane_state->fb;
- crtc->x = plane_state->src_x >> 16;
- crtc->y = plane_state->src_y >> 16;
- }
- }
-}
-
static bool intel_fuzzy_clock_check(int clock1, int clock2)
{
int diff;
@@ -12364,10 +12339,6 @@ static void intel_atomic_commit_tail(struct
drm_atomic_state *state)
}
}
- /* Only after disabling all output pipelines that will be changed can we
-* update the the output configuration. */
- intel_modeset_update_crtc_state(state);
-
if (intel_state->modeset) {
drm_atomic_helper_update_legacy_modeset_state(state->dev,
state);
--
2.15.0
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[Intel-gfx] ✓ Fi.CI.BAT: success for lockdep: Mark up lock disabling with TAINT_CRAP
== Series Details == Series: lockdep: Mark up lock disabling with TAINT_CRAP URL : https://patchwork.freedesktop.org/series/34915/ State : success == Summary == Series 34915v1 lockdep: Mark up lock disabling with TAINT_CRAP https://patchwork.freedesktop.org/api/1.0/series/34915/revisions/1/mbox/ Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> PASS (fi-elk-e7500) fdo#103989 +1 dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#103938 +1 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#103938 https://bugs.freedesktop.org/show_bug.cgi?id=103938 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:440s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:440s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:382s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:515s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:280s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:501s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:505s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:487s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:478s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:276s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:543s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:374s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:266s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:389s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:479s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:445s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:489s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:532s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:479s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:596s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:465s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:548s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:565s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:514s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:497s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:446s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:547s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:415s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:603s fi-cnl-y total:209 pass:188 dwarn:0 dfail:0 fail:0 skip:20 fi-glk-dsi total:52 pass:44 dwarn:0 dfail:0 fail:0 skip:7 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest e4281f1eccfb lockdep: Mark up lock disabling with TAINT_CRAP == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7412/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Taint (TAINT_DIE) the kernel if the GPU reset fails
Quoting Joonas Lahtinen (2017-12-04 13:41:11) > On Wed, 2017-11-29 at 14:05 +, Chris Wilson wrote: > > History tells us that if we cannot reset the GPU now, we never will. This > > then impacts everything that is run subsequently. On failing the reset, > > we mark the driver as wedged, trying to prevent further execution on the > > GPU, forcing userspace to fallback to using the CPU to update its > > framebuffers and let the user know what happened. > > > > We also want to go one step further and add a taint to the kernel so that > > any subsequent faults can be traced back to this failure. This is > > important for igt, where if the GPU/driver fails we want to reboot and > > restart testing rather than continue on into oblivion. > > > > TAINT_DIE is colloquially known as "system on fire", which seems > > appropriate for unresponsive hardware. > > > > v2: Also taint if the recovery fails (again history shows us that is > > typically fatal). > > > > References: https://bugs.freedesktop.org/show_bug.cgi?id=103514 > > Signed-off-by: Chris Wilson > > Cc: Mika Kuoppala > > Cc: Daniel Vetter > > Cc: Michał Winiarski > > > > > @@ -1951,6 +1954,19 @@ void i915_reset(struct drm_i915_private *i915, > > unsigned int flags) > > wake_up_bit(&error->flags, I915_RESET_HANDOFF); > > return; > > > > +taint: > > + /* > > + * History tells us that if we cannot reset the GPU now, we > > + * never will. This then impacts everything that is run > > + * subsequently. On failing the reset, we mark the driver > > + * as wedged, preventing further execution on the GPU. > > + * We also want to go one step further and add a taint to the > > + * kernel so that any subsequent faults can be traced back to > > + * this failure. This is important for igt, where if the > > + * GPU/driver fails we want to reboot and restart testing > > + * rather than continue on into oblivion. > > + */ > > As Marta mentioned too, How igt works on a given day is bit volatile to > document in the kernel comments. More to the point, CI now implements the described response to TAINT_DIE, without which this is pointless (userspace sees the wedged and either handles it or dies; CI sees the wedged as a challenge). -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: warning for series starting with [1/2] drm/i915: Flush pending GTT writes before unbinding (rev2)
== Series Details == Series: series starting with [1/2] drm/i915: Flush pending GTT writes before unbinding (rev2) URL : https://patchwork.freedesktop.org/series/34900/ State : warning == Summary == Test kms_draw_crc: Subgroup draw-method-xrgb2101010-mmap-wc-untiled: pass -> SKIP (shard-hsw) Test kms_cursor_legacy: Subgroup long-nonblocking-modeset-vs-cursor-atomic: skip -> PASS (shard-snb) Test kms_frontbuffer_tracking: Subgroup fbc-1p-primscrn-pri-indfb-draw-mmap-wc: skip -> PASS (shard-snb) Test drv_selftest: Subgroup mock_sanitycheck: dmesg-warn -> PASS (shard-hsw) fdo#102707 Test kms_atomic: Subgroup crtc_invalid_params_fence: pass -> SKIP (shard-snb) Test kms_universal_plane: Subgroup universal-plane-pipe-b-functional: pass -> SKIP (shard-snb) Test drv_module_reload: Subgroup basic-reload-inject: pass -> DMESG-WARN (shard-hsw) fdo#103706 Test perf: Subgroup polling: pass -> FAIL (shard-hsw) fdo#102252 +1 Test kms_flip: Subgroup flip-vs-modeset-interruptible: pass -> DMESG-WARN (shard-hsw) fdo#102614 Subgroup plain-flip-ts-check-interruptible: pass -> FAIL (shard-hsw) fdo#100368 Test kms_plane: Subgroup plane-panning-bottom-right-suspend-pipe-a-planes: pass -> INCOMPLETE (shard-hsw) fdo#103540 fdo#102707 https://bugs.freedesktop.org/show_bug.cgi?id=102707 fdo#103706 https://bugs.freedesktop.org/show_bug.cgi?id=103706 fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252 fdo#102614 https://bugs.freedesktop.org/show_bug.cgi?id=102614 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 shard-hswtotal:2645 pass:1516 dwarn:3 dfail:0 fail:12 skip:1113 time:9265s shard-snbtotal:2612 pass:1272 dwarn:1 dfail:0 fail:10 skip:1328 time:7815s Blacklisted hosts: shard-apltotal:2590 pass:1613 dwarn:3 dfail:0 fail:21 skip:951 time:13083s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7409/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 7/8] drm/i915/huc: Load HuC only if requested
Our new "enable_guc" modparam allows to control whenever HuC
should be loaded. However existing code will try load and
authenticate HuC always when we use the GuC. This patch is
trying to enforce modparam selection.
v2: no need to cast PTR_ERR (Chris)
fetch/fini only if required (Michal)
fix wrong break (Sagar)
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_huc.c | 21 +++--
drivers/gpu/drm/i915/intel_huc.h | 4 ++--
drivers/gpu/drm/i915/intel_uc.c | 25 +
3 files changed, 34 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 6d0e050..974be3d 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -181,17 +181,17 @@ static int huc_ucode_xfer(struct intel_uc_fw *huc_fw,
struct i915_vma *vma)
* intel_huc_init_hw() - load HuC uCode to device
* @huc: intel_huc structure
*
- * Called from guc_setup() during driver loading and also after a GPU reset.
- * Be note that HuC loading must be done before GuC loading.
+ * Called from intel_uc_init_hw() during driver loading and also after a GPU
+ * reset. Be note that HuC loading must be done before GuC loading.
*
* The firmware image should have already been fetched into memory by the
- * earlier call to intel_huc_init(), so here we need only check that
+ * earlier call to intel_uc_init_fw(), so here we need only check that
* is succeeded, and then transfer the image to the h/w.
*
*/
-void intel_huc_init_hw(struct intel_huc *huc)
+int intel_huc_init_hw(struct intel_huc *huc)
{
- intel_uc_fw_upload(&huc->fw, huc_ucode_xfer);
+ return intel_uc_fw_upload(&huc->fw, huc_ucode_xfer);
}
/**
@@ -205,7 +205,7 @@ void intel_huc_init_hw(struct intel_huc *huc)
* signature through intel_guc_auth_huc(). It then waits for 50ms for
* firmware verification ACK and unpins the object.
*/
-void intel_huc_auth(struct intel_huc *huc)
+int intel_huc_auth(struct intel_huc *huc)
{
struct drm_i915_private *i915 = huc_to_i915(huc);
struct intel_guc *guc = &i915->guc;
@@ -213,14 +213,14 @@ void intel_huc_auth(struct intel_huc *huc)
int ret;
if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
- return;
+ return -ENOEXEC;
vma = i915_gem_object_ggtt_pin(huc->fw.obj, NULL, 0, 0,
PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
if (IS_ERR(vma)) {
- DRM_ERROR("failed to pin huc fw object %d\n",
- (int)PTR_ERR(vma));
- return;
+ ret = PTR_ERR(vma);
+ DRM_ERROR("HuC: Failed to pin huc fw object %d\n", ret);
+ return ret;
}
ret = intel_guc_auth_huc(guc,
@@ -243,4 +243,5 @@ void intel_huc_auth(struct intel_huc *huc)
out:
i915_vma_unpin(vma);
+ return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
index 3d757bc..40039db 100644
--- a/drivers/gpu/drm/i915/intel_huc.h
+++ b/drivers/gpu/drm/i915/intel_huc.h
@@ -35,7 +35,7 @@ struct intel_huc {
};
void intel_huc_init_early(struct intel_huc *huc);
-void intel_huc_init_hw(struct intel_huc *huc);
-void intel_huc_auth(struct intel_huc *huc);
+int intel_huc_init_hw(struct intel_huc *huc);
+int intel_huc_auth(struct intel_huc *huc);
#endif
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 7dfc7e0..49bccc9 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -119,7 +119,9 @@ void intel_uc_init_fw(struct drm_i915_private *dev_priv)
if (!USES_GUC(dev_priv))
return;
- intel_uc_fw_fetch(dev_priv, &dev_priv->huc.fw);
+ if (USES_HUC(dev_priv))
+ intel_uc_fw_fetch(dev_priv, &dev_priv->huc.fw);
+
intel_uc_fw_fetch(dev_priv, &dev_priv->guc.fw);
}
@@ -129,7 +131,9 @@ void intel_uc_fini_fw(struct drm_i915_private *dev_priv)
return;
intel_uc_fw_fini(&dev_priv->guc.fw);
- intel_uc_fw_fini(&dev_priv->huc.fw);
+
+ if (USES_HUC(dev_priv))
+ intel_uc_fw_fini(&dev_priv->huc.fw);
}
/**
@@ -186,6 +190,7 @@ static void guc_disable_communication(struct intel_guc *guc)
int intel_uc_init_hw(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
+ struct intel_huc *huc = &dev_priv->huc;
int ret, attempts;
if (!USES_GUC(dev_priv))
@@ -233,7 +238,12 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
if (ret)
goto err_submission;
- intel_huc_init_hw(&dev_priv->huc);
+ if (USES_HUC(dev_priv)) {
+ ret = intel_huc_init_hw(huc);
+ if (ret)
+ goto err_submission;
+
[Intel-gfx] [PATCH v3 8/8] HAX enable GuC/HuC load
Also revert ("drm/i915/guc: Assert that we switch between
known ggtt->invalidate functions")
v2: don't enable GuC on GLK
Signed-off-by: Michal Wajdeczko
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++--
drivers/gpu/drm/i915/i915_params.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 2 ++
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 209bb11..a5e75a3 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3590,17 +3590,13 @@ int i915_ggtt_enable_hw(struct drm_i915_private
*dev_priv)
void i915_ggtt_enable_guc(struct drm_i915_private *i915)
{
- GEM_BUG_ON(i915->ggtt.invalidate != gen6_ggtt_invalidate);
-
i915->ggtt.invalidate = guc_ggtt_invalidate;
}
void i915_ggtt_disable_guc(struct drm_i915_private *i915)
{
- /* We should only be called after i915_ggtt_enable_guc() */
- GEM_BUG_ON(i915->ggtt.invalidate != guc_ggtt_invalidate);
-
- i915->ggtt.invalidate = gen6_ggtt_invalidate;
+ if (i915->ggtt.invalidate == guc_ggtt_invalidate)
+ i915->ggtt.invalidate = gen6_ggtt_invalidate;
}
void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index 792ce26..9725c5a 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -45,7 +45,7 @@
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
- param(int, enable_guc, 0) \
+ param(int, enable_guc, -1) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 49bccc9..22b0afe 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -60,6 +60,8 @@ static int __get_platform_enable_guc(struct drm_i915_private
*dev_priv)
enable_guc |= ENABLE_GUC_LOAD_HUC;
/* Any platform specific fine-tuning can be done here */
+ if (IS_GEMINILAKE(dev_priv))
+ enable_guc = 0; /* no firmware on CI machines */
return enable_guc;
}
--
2.7.4
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[Intel-gfx] [PATCH v3 5/8] drm/i915/uc: Don't use -EIO to report missing firmware
-EIO has special meaning and is used when we want to allow
engine initialization to fail and mark GPU as wedged.
However here at this function we should return error code
that corresponds to upload status only, as any decision how
to handle missing firmware should be done higher level function
(silent fallback to non-GuC mode, fail into wedged mode, or
abort driver load with fatal error).
v2: commit message update (Michal)
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_uc_fw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_uc_fw.c
b/drivers/gpu/drm/i915/intel_uc_fw.c
index b376dd3..784eff9 100644
--- a/drivers/gpu/drm/i915/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/intel_uc_fw.c
@@ -214,7 +214,7 @@ int intel_uc_fw_upload(struct intel_uc_fw *uc_fw,
intel_uc_fw_type_repr(uc_fw->type), uc_fw->path);
if (uc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
- return -EIO;
+ return -ENOEXEC;
uc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
DRM_DEBUG_DRIVER("%s fw load %s\n",
--
2.7.4
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[Intel-gfx] [PATCH v3 3/8] drm/i915/guc: Introduce USES_GUC_xxx helper macros
In the upcoming patch we will change the way how to recognize
when GuC is in use. Using helper macros will minimize scope
of that changes. While here, update dev_info message.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h| 4
drivers/gpu/drm/i915/i915_gem_context.c| 4 ++--
drivers/gpu/drm/i915/i915_gem_gtt.c| 2 +-
drivers/gpu/drm/i915/i915_irq.c| 2 +-
drivers/gpu/drm/i915/intel_guc.c | 2 +-
drivers/gpu/drm/i915/intel_guc_log.c | 6 +++---
drivers/gpu/drm/i915/intel_gvt.c | 2 +-
drivers/gpu/drm/i915/intel_uc.c| 23 +++
drivers/gpu/drm/i915/selftests/intel_guc.c | 2 +-
9 files changed, 25 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bd4eea5..937fa02 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3239,6 +3239,10 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_HUC(dev_priv) (HAS_GUC(dev_priv))
#define HAS_HUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
+/* Having a GuC is not the same as using a GuC */
+#define USES_GUC(dev_priv) (i915_modparams.enable_guc_loading)
+#define USES_GUC_SUBMISSION(dev_priv) (i915_modparams.enable_guc_submission)
+
#define HAS_RESOURCE_STREAMER(dev_priv)
((dev_priv)->info.has_resource_streamer)
#define HAS_POOLED_EU(dev_priv)((dev_priv)->info.has_pooled_eu)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index ce3139e..21ce374 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -316,7 +316,7 @@ __create_hw_context(struct drm_i915_private *dev_priv,
* present or not in use we still need a small bias as ring wraparound
* at offset 0 sometimes hangs. No idea why.
*/
- if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading)
+ if (USES_GUC(dev_priv))
ctx->ggtt_offset_bias = GUC_WOPCM_TOP;
else
ctx->ggtt_offset_bias = I915_GTT_PAGE_SIZE;
@@ -409,7 +409,7 @@ i915_gem_context_create_gvt(struct drm_device *dev)
i915_gem_context_set_closed(ctx); /* not user accessible */
i915_gem_context_clear_bannable(ctx);
i915_gem_context_set_force_single_submission(ctx);
- if (!i915_modparams.enable_guc_submission)
+ if (!USES_GUC_SUBMISSION(to_i915(dev)))
ctx->ring_size = 512 * PAGE_SIZE; /* Max ring buffer size */
GEM_BUG_ON(i915_gem_context_is_kernel(ctx));
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f3c35e8..209bb11 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3503,7 +3503,7 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
* currently don't have any bits spare to pass in this upper
* restriction!
*/
- if (HAS_GUC(dev_priv) && i915_modparams.enable_guc_loading) {
+ if (USES_GUC(dev_priv)) {
ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
ggtt->mappable_end = min(ggtt->mappable_end, ggtt->base.total);
}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7cac07d..3517c65 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1400,7 +1400,7 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32
iir, int test_shift)
if (iir & (GT_RENDER_USER_INTERRUPT << test_shift)) {
notify_ring(engine);
- tasklet |= i915_modparams.enable_guc_submission;
+ tasklet |= USES_GUC_SUBMISSION(engine->i915);
}
if (tasklet)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index df86907..177ee69 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -129,7 +129,7 @@ void intel_guc_init_params(struct intel_guc *guc)
}
/* If GuC submission is enabled, set up additional parameters here */
- if (i915_modparams.enable_guc_submission) {
+ if (USES_GUC_SUBMISSION(dev_priv)) {
u32 ads = guc_ggtt_offset(guc->ads_vma) >> PAGE_SHIFT;
u32 pgs = guc_ggtt_offset(dev_priv->guc.stage_desc_pool);
u32 ctx_in_16 = GUC_MAX_STAGE_DESCRIPTORS / 16;
diff --git a/drivers/gpu/drm/i915/intel_guc_log.c
b/drivers/gpu/drm/i915/intel_guc_log.c
index 76d3eb1..1a2c5ee 100644
--- a/drivers/gpu/drm/i915/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/intel_guc_log.c
@@ -505,7 +505,7 @@ static void guc_flush_logs(struct intel_guc *guc)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- if (!i915_modparams.enable_guc_submission ||
+
[Intel-gfx] [PATCH v3 4/8] drm/i915/uc: Don't fetch GuC firmware if no plan to use GuC
If we don't plan to use GuC then we should not try to fetch GuC and
HuC firmwares. We can save memory and avoid possible dmesg noise.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
---
drivers/gpu/drm/i915/intel_uc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index ed2dd76..c3981aa 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -86,12 +86,18 @@ void intel_uc_init_early(struct drm_i915_private *dev_priv)
void intel_uc_init_fw(struct drm_i915_private *dev_priv)
{
+ if (!USES_GUC(dev_priv))
+ return;
+
intel_uc_fw_fetch(dev_priv, &dev_priv->huc.fw);
intel_uc_fw_fetch(dev_priv, &dev_priv->guc.fw);
}
void intel_uc_fini_fw(struct drm_i915_private *dev_priv)
{
+ if (!USES_GUC(dev_priv))
+ return;
+
intel_uc_fw_fini(&dev_priv->guc.fw);
intel_uc_fw_fini(&dev_priv->huc.fw);
}
--
2.7.4
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3 6/8] drm/i915/guc: Combine enable_guc_loading|submission modparams
We currently have two module parameters that control GuC:
"enable_guc_loading" and "enable_guc_submission". Whenever
we need submission=1, we also need loading=1. We also need
loading=1 when we want to want to load and verify the HuC.
Lets combine above module parameters into one "enable_guc"
modparam. New supported bit values are:
0=disable GuC (no GuC submission, no HuC)
1=enable GuC submission
2=enable HuC load
Special value "-1" can be used to let driver decide what
option should be enabled for given platform based on
hardware/firmware availability or preference.
Explicit enabling any of the GuC features makes GuC load
a required step, fallback to non-GuC mode will not be
supported.
v2: Don't use -EIO
v3: define modparam bits (Chris)
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Cc: Sujaritha Sundaresan
---
drivers/gpu/drm/i915/i915_drv.h| 5 +-
drivers/gpu/drm/i915/i915_params.c | 11 ++--
drivers/gpu/drm/i915/i915_params.h | 7 ++-
drivers/gpu/drm/i915/intel_uc.c| 109 ++---
drivers/gpu/drm/i915/intel_uc.h| 19 +++
5 files changed, 96 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 937fa02..02551c7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3240,8 +3240,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_HUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
/* Having a GuC is not the same as using a GuC */
-#define USES_GUC(dev_priv) (i915_modparams.enable_guc_loading)
-#define USES_GUC_SUBMISSION(dev_priv) (i915_modparams.enable_guc_submission)
+#define USES_GUC(dev_priv) intel_uc_is_using_guc()
+#define USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission()
+#define USES_HUC(dev_priv) intel_uc_is_using_huc()
#define HAS_RESOURCE_STREAMER(dev_priv)
((dev_priv)->info.has_resource_streamer)
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 7bc5386..8dfea03 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -147,13 +147,10 @@ i915_param_named_unsafe(edp_vswing, int, 0400,
"(0=use value from vbt [default], 1=low power swing(200mV),"
"2=default swing(400mV))");
-i915_param_named_unsafe(enable_guc_loading, int, 0400,
- "Enable GuC firmware loading "
- "(-1=auto, 0=never [default], 1=if available, 2=required)");
-
-i915_param_named_unsafe(enable_guc_submission, int, 0400,
- "Enable GuC submission "
- "(-1=auto, 0=never [default], 1=if available, 2=required)");
+i915_param_named_unsafe(enable_guc, int, 0400,
+ "Enable GuC load for GuC submission and/or HuC load. "
+ "Required functionality can be selected using bitmask values. "
+ "(-1=auto, 0=disable [default], 1=GuC submission, 2=HuC load)");
i915_param_named(guc_log_level, int, 0400,
"GuC firmware logging level (-1:disabled (default), 0-3:enabled)");
diff --git a/drivers/gpu/drm/i915/i915_params.h
b/drivers/gpu/drm/i915/i915_params.h
index c48c88b..792ce26 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -25,8 +25,12 @@
#ifndef _I915_PARAMS_H_
#define _I915_PARAMS_H_
+#include
#include /* for __read_mostly */
+#define ENABLE_GUC_SUBMISSION BIT(0)
+#define ENABLE_GUC_LOAD_HUCBIT(1)
+
#define I915_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL) \
param(int, modeset, -1) \
@@ -41,8 +45,7 @@
param(int, disable_power_well, -1) \
param(int, enable_ips, 1) \
param(int, invert_brightness, 0) \
- param(int, enable_guc_loading, 0) \
- param(int, enable_guc_submission, 0) \
+ param(int, enable_guc, 0) \
param(int, guc_log_level, -1) \
param(char *, guc_firmware_path, NULL) \
param(char *, huc_firmware_path, NULL) \
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index c3981aa..7dfc7e0 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -47,35 +47,65 @@ static int __intel_uc_reset_hw(struct drm_i915_private
*dev_priv)
return ret;
}
-void intel_uc_sanitize_options(struct drm_i915_private *dev_priv)
+static int __get_platform_enable_guc(struct drm_i915_private *dev_priv)
{
- if (!HAS_GUC(dev_priv)) {
- if (i915_modparams.enable_guc_loading > 0 ||
- i915_modparams.enable_guc_submission > 0)
- DRM_INFO("Ignoring GuC options, no hardware\n");
+ struct intel_uc_fw *guc_fw = &dev_priv->guc.fw;
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+ int enable_guc = 0;
- i915_modparams.enable_guc_loading = 0;
- i915_modparams.enable_guc_submission = 0;
- return;
- }
+
[Intel-gfx] [PATCH v3 1/8] drm/i915/huc: Move firmware selection to init_early
Doing HuC firmware path selection from sanitize_options function
is not perfect, while there is no problem with doing so during
early init stage as we already have all needed data.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_drv.h | 3 ++
drivers/gpu/drm/i915/intel_huc.c | 60 +---
drivers/gpu/drm/i915/intel_huc.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 4 +--
4 files changed, 42 insertions(+), 27 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 594fd14..bd4eea5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3234,6 +3234,9 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_GUC_CT(dev_priv) ((dev_priv)->info.has_guc_ct)
#define HAS_GUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
#define HAS_GUC_SCHED(dev_priv)(HAS_GUC(dev_priv))
+
+/* For now, anything with a GuC has also HuC */
+#define HAS_HUC(dev_priv) (HAS_GUC(dev_priv))
#define HAS_HUC_UCODE(dev_priv)(HAS_GUC(dev_priv))
#define HAS_RESOURCE_STREAMER(dev_priv)
((dev_priv)->info.has_resource_streamer)
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 98d1725..6d0e050 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -77,43 +77,57 @@ MODULE_FIRMWARE(I915_KBL_HUC_UCODE);
#define I915_GLK_HUC_UCODE HUC_FW_PATH(glk, GLK_HUC_FW_MAJOR, \
GLK_HUC_FW_MINOR, GLK_BLD_NUM)
-/**
- * intel_huc_select_fw() - selects HuC firmware for loading
- * @huc: intel_huc struct
- */
-void intel_huc_select_fw(struct intel_huc *huc)
+static void huc_fw_select(struct intel_uc_fw *huc_fw)
{
+ struct intel_huc *huc = container_of(huc_fw, struct intel_huc, fw);
struct drm_i915_private *dev_priv = huc_to_i915(huc);
- intel_uc_fw_init(&huc->fw, INTEL_UC_FW_TYPE_HUC);
+ GEM_BUG_ON(huc_fw->type != INTEL_UC_FW_TYPE_HUC);
+
+ if (!HAS_HUC(dev_priv))
+ return;
if (i915_modparams.huc_firmware_path) {
- huc->fw.path = i915_modparams.huc_firmware_path;
- huc->fw.major_ver_wanted = 0;
- huc->fw.minor_ver_wanted = 0;
+ huc_fw->path = i915_modparams.huc_firmware_path;
+ huc_fw->major_ver_wanted = 0;
+ huc_fw->minor_ver_wanted = 0;
} else if (IS_SKYLAKE(dev_priv)) {
- huc->fw.path = I915_SKL_HUC_UCODE;
- huc->fw.major_ver_wanted = SKL_HUC_FW_MAJOR;
- huc->fw.minor_ver_wanted = SKL_HUC_FW_MINOR;
+ huc_fw->path = I915_SKL_HUC_UCODE;
+ huc_fw->major_ver_wanted = SKL_HUC_FW_MAJOR;
+ huc_fw->minor_ver_wanted = SKL_HUC_FW_MINOR;
} else if (IS_BROXTON(dev_priv)) {
- huc->fw.path = I915_BXT_HUC_UCODE;
- huc->fw.major_ver_wanted = BXT_HUC_FW_MAJOR;
- huc->fw.minor_ver_wanted = BXT_HUC_FW_MINOR;
+ huc_fw->path = I915_BXT_HUC_UCODE;
+ huc_fw->major_ver_wanted = BXT_HUC_FW_MAJOR;
+ huc_fw->minor_ver_wanted = BXT_HUC_FW_MINOR;
} else if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) {
- huc->fw.path = I915_KBL_HUC_UCODE;
- huc->fw.major_ver_wanted = KBL_HUC_FW_MAJOR;
- huc->fw.minor_ver_wanted = KBL_HUC_FW_MINOR;
+ huc_fw->path = I915_KBL_HUC_UCODE;
+ huc_fw->major_ver_wanted = KBL_HUC_FW_MAJOR;
+ huc_fw->minor_ver_wanted = KBL_HUC_FW_MINOR;
} else if (IS_GEMINILAKE(dev_priv)) {
- huc->fw.path = I915_GLK_HUC_UCODE;
- huc->fw.major_ver_wanted = GLK_HUC_FW_MAJOR;
- huc->fw.minor_ver_wanted = GLK_HUC_FW_MINOR;
+ huc_fw->path = I915_GLK_HUC_UCODE;
+ huc_fw->major_ver_wanted = GLK_HUC_FW_MAJOR;
+ huc_fw->minor_ver_wanted = GLK_HUC_FW_MINOR;
} else {
- DRM_ERROR("No HuC firmware known for platform with HuC!\n");
- return;
+ DRM_WARN("%s: No firmware known for this platform!\n",
+intel_uc_fw_type_repr(huc_fw->type));
}
}
/**
+ * intel_huc_init_early() - initializes HuC struct
+ * @huc: intel_huc struct
+ *
+ * On platforms with HuC selects firmware for uploading
+ */
+void intel_huc_init_early(struct intel_huc *huc)
+{
+ struct intel_uc_fw *huc_fw = &huc->fw;
+
+ intel_uc_fw_init(huc_fw, INTEL_UC_FW_TYPE_HUC);
+ huc_fw_select(huc_fw);
+}
+
+/**
* huc_ucode_xfer() - DMA's the firmware
* @dev_priv: the drm_i915_private device
*
diff --git a/drivers/gpu/drm/i915/intel_huc.h b/drivers/gpu/drm/i915/intel_huc.h
index aaa38b9..3d757bc 100644
--- a/drivers/gpu/drm/i915/intel_huc.h
+++ b/drivers/gpu/drm/i915/intel_huc.h
@@ -34,7 +34,7 @@ st
[Intel-gfx] [PATCH v3 2/8] drm/i915/guc: Move firmware selection to init_early
Doing GuC firmware path selection from sanitize_options function
is not perfect, while there is no problem with doing so during
early init stage as we already have all needed data.
Signed-off-by: Michal Wajdeczko
Cc: Chris Wilson
Cc: Joonas Lahtinen
Cc: Sagar Arun Kamble
Reviewed-by: Chris Wilson
---
drivers/gpu/drm/i915/intel_guc.c| 1 +
drivers/gpu/drm/i915/intel_guc_fw.c | 63 +
drivers/gpu/drm/i915/intel_guc_fw.h | 2 +-
drivers/gpu/drm/i915/intel_uc.c | 2 +-
drivers/gpu/drm/i915/intel_uc_fw.h | 5 +++
5 files changed, 44 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index d08e760..df86907 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -61,6 +61,7 @@ void intel_guc_init_send_regs(struct intel_guc *guc)
void intel_guc_init_early(struct intel_guc *guc)
{
+ intel_guc_fw_init_early(guc);
intel_guc_ct_init_early(&guc->ct);
mutex_init(&guc->send_mutex);
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.c
b/drivers/gpu/drm/i915/intel_guc_fw.c
index 89862fa..cbc51c9 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/intel_guc_fw.c
@@ -56,45 +56,54 @@ MODULE_FIRMWARE(I915_KBL_GUC_UCODE);
#define I915_GLK_GUC_UCODE GUC_FW_PATH(glk, GLK_FW_MAJOR, GLK_FW_MINOR)
-/**
- * intel_guc_fw_select() - selects GuC firmware for uploading
- *
- * @guc: intel_guc struct
- *
- * Return: zero when we know firmware, non-zero in other case
- */
-int intel_guc_fw_select(struct intel_guc *guc)
+static void guc_fw_select(struct intel_uc_fw *guc_fw)
{
+ struct intel_guc *guc = container_of(guc_fw, struct intel_guc, fw);
struct drm_i915_private *dev_priv = guc_to_i915(guc);
- intel_uc_fw_init(&guc->fw, INTEL_UC_FW_TYPE_GUC);
+ GEM_BUG_ON(guc_fw->type != INTEL_UC_FW_TYPE_GUC);
+
+ if (!HAS_GUC(dev_priv))
+ return;
if (i915_modparams.guc_firmware_path) {
- guc->fw.path = i915_modparams.guc_firmware_path;
- guc->fw.major_ver_wanted = 0;
- guc->fw.minor_ver_wanted = 0;
+ guc_fw->path = i915_modparams.guc_firmware_path;
+ guc_fw->major_ver_wanted = 0;
+ guc_fw->minor_ver_wanted = 0;
} else if (IS_SKYLAKE(dev_priv)) {
- guc->fw.path = I915_SKL_GUC_UCODE;
- guc->fw.major_ver_wanted = SKL_FW_MAJOR;
- guc->fw.minor_ver_wanted = SKL_FW_MINOR;
+ guc_fw->path = I915_SKL_GUC_UCODE;
+ guc_fw->major_ver_wanted = SKL_FW_MAJOR;
+ guc_fw->minor_ver_wanted = SKL_FW_MINOR;
} else if (IS_BROXTON(dev_priv)) {
- guc->fw.path = I915_BXT_GUC_UCODE;
- guc->fw.major_ver_wanted = BXT_FW_MAJOR;
- guc->fw.minor_ver_wanted = BXT_FW_MINOR;
+ guc_fw->path = I915_BXT_GUC_UCODE;
+ guc_fw->major_ver_wanted = BXT_FW_MAJOR;
+ guc_fw->minor_ver_wanted = BXT_FW_MINOR;
} else if (IS_KABYLAKE(dev_priv) || IS_COFFEELAKE(dev_priv)) {
- guc->fw.path = I915_KBL_GUC_UCODE;
- guc->fw.major_ver_wanted = KBL_FW_MAJOR;
- guc->fw.minor_ver_wanted = KBL_FW_MINOR;
+ guc_fw->path = I915_KBL_GUC_UCODE;
+ guc_fw->major_ver_wanted = KBL_FW_MAJOR;
+ guc_fw->minor_ver_wanted = KBL_FW_MINOR;
} else if (IS_GEMINILAKE(dev_priv)) {
- guc->fw.path = I915_GLK_GUC_UCODE;
- guc->fw.major_ver_wanted = GLK_FW_MAJOR;
- guc->fw.minor_ver_wanted = GLK_FW_MINOR;
+ guc_fw->path = I915_GLK_GUC_UCODE;
+ guc_fw->major_ver_wanted = GLK_FW_MAJOR;
+ guc_fw->minor_ver_wanted = GLK_FW_MINOR;
} else {
- DRM_ERROR("No GuC firmware known for platform with GuC!\n");
- return -ENOENT;
+ DRM_WARN("%s: No firmware known for this platform!\n",
+intel_uc_fw_type_repr(guc_fw->type));
}
+}
- return 0;
+/**
+ * intel_guc_fw_init_early() - initializes GuC firmware struct
+ * @guc: intel_guc struct
+ *
+ * On platforms with GuC selects firmware for uploading
+ */
+void intel_guc_fw_init_early(struct intel_guc *guc)
+{
+ struct intel_uc_fw *guc_fw = &guc->fw;
+
+ intel_uc_fw_init(guc_fw, INTEL_UC_FW_TYPE_GUC);
+ guc_fw_select(guc_fw);
}
static void guc_prepare_xfer(struct intel_guc *guc)
diff --git a/drivers/gpu/drm/i915/intel_guc_fw.h
b/drivers/gpu/drm/i915/intel_guc_fw.h
index 023f5ba..4ec5d3d 100644
--- a/drivers/gpu/drm/i915/intel_guc_fw.h
+++ b/drivers/gpu/drm/i915/intel_guc_fw.h
@@ -27,7 +27,7 @@
struct intel_guc;
-int intel_guc_fw_select(struct intel_guc *guc);
+void intel_guc_fw_init_early(struct intel_guc *guc);
int intel_guc_fw_upload(struct intel_guc *guc);
#endif
diff --git a
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Put all non-blocking modesets onto an ordered wq
== Series Details == Series: drm/i915: Put all non-blocking modesets onto an ordered wq URL : https://patchwork.freedesktop.org/series/33712/ State : success == Summary == Series 33712v1 drm/i915: Put all non-blocking modesets onto an ordered wq https://patchwork.freedesktop.org/api/1.0/series/33712/revisions/1/mbox/ Test debugfs_test: Subgroup read_all_entries: dmesg-warn -> PASS (fi-elk-e7500) fdo#103989 +1 dmesg-warn -> PASS (fi-bdw-gvtdvm) fdo#103938 +1 fdo#103989 https://bugs.freedesktop.org/show_bug.cgi?id=103989 fdo#103938 https://bugs.freedesktop.org/show_bug.cgi?id=103938 fi-bdw-5557u total:288 pass:267 dwarn:0 dfail:0 fail:0 skip:21 time:445s fi-bdw-gvtdvmtotal:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:445s fi-blb-e6850 total:288 pass:223 dwarn:1 dfail:0 fail:0 skip:64 time:385s fi-bsw-n3050 total:288 pass:242 dwarn:0 dfail:0 fail:0 skip:46 time:523s fi-bwr-2160 total:288 pass:183 dwarn:0 dfail:0 fail:0 skip:105 time:282s fi-bxt-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:505s fi-bxt-j4205 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:504s fi-byt-j1900 total:288 pass:253 dwarn:0 dfail:0 fail:0 skip:35 time:484s fi-byt-n2820 total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:476s fi-elk-e7500 total:224 pass:163 dwarn:15 dfail:0 fail:0 skip:45 fi-gdg-551 total:288 pass:178 dwarn:1 dfail:0 fail:1 skip:108 time:269s fi-glk-1 total:288 pass:260 dwarn:0 dfail:0 fail:0 skip:28 time:542s fi-hsw-4770 total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:367s fi-hsw-4770r total:288 pass:224 dwarn:0 dfail:0 fail:0 skip:64 time:258s fi-ilk-650 total:288 pass:228 dwarn:0 dfail:0 fail:0 skip:60 time:392s fi-ivb-3520m total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:487s fi-ivb-3770 total:288 pass:259 dwarn:0 dfail:0 fail:0 skip:29 time:450s fi-kbl-7500u total:288 pass:263 dwarn:1 dfail:0 fail:0 skip:24 time:489s fi-kbl-7560u total:288 pass:269 dwarn:0 dfail:0 fail:0 skip:19 time:527s fi-kbl-7567u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:478s fi-kbl-r total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:534s fi-pnv-d510 total:288 pass:222 dwarn:1 dfail:0 fail:0 skip:65 time:589s fi-skl-6260u total:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:448s fi-skl-6600u total:288 pass:261 dwarn:0 dfail:0 fail:0 skip:27 time:539s fi-skl-6700hqtotal:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:569s fi-skl-6700k total:288 pass:264 dwarn:0 dfail:0 fail:0 skip:24 time:517s fi-skl-6770hqtotal:288 pass:268 dwarn:0 dfail:0 fail:0 skip:20 time:494s fi-skl-gvtdvmtotal:288 pass:265 dwarn:0 dfail:0 fail:0 skip:23 time:446s fi-snb-2520m total:288 pass:249 dwarn:0 dfail:0 fail:0 skip:39 time:549s fi-snb-2600 total:288 pass:248 dwarn:0 dfail:0 fail:0 skip:40 time:416s Blacklisted hosts: fi-cfl-s2total:288 pass:262 dwarn:0 dfail:0 fail:0 skip:26 time:605s fi-cnl-y total:281 pass:255 dwarn:0 dfail:0 fail:0 skip:25 fi-glk-dsi total:288 pass:258 dwarn:0 dfail:0 fail:0 skip:30 time:488s 0d0fe916f52ad8f05dddab384ae7c90bb62ebac4 drm-tip: 2017y-12m-05d-14h-52m-17s UTC integration manifest 8d1afc151847 drm/i915: Put all non-blocking modesets onto an ordered wq == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_7411/ ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
